thesis/main.lof at master · yllibliu/thesis · GitHub

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\contentsline {figure}{\numberline {2.1}{\ignorespaces Linux Boot Stage on Target Platform}}{4}
\contentsline {figure}{\numberline {2.2}{\ignorespaces Embedded Linux on FPGA}}{5}
\contentsline {figure}{\numberline {2.3}{\ignorespaces Linux Device Driver}}{6}
\contentsline {figure}{\numberline {2.4}{\ignorespaces The UIO way.}}{7}
\contentsline {figure}{\numberline {2.5}{\ignorespaces Direct Memory Access}}{8}
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\contentsline {figure}{\numberline {3.1}{\ignorespaces Register types in Vivado}}{9}
\contentsline {figure}{\numberline {3.2}{\ignorespaces Custom IP with AXI4-Lite/Full Register.}}{11}
\contentsline {figure}{\numberline {3.3}{\ignorespaces Custom IP with DMA and AXI-Stream Register.}}{11}
\contentsline {figure}{\numberline {3.4}{\ignorespaces Cache Coherency Problems.}}{13}
\contentsline {figure}{\numberline {3.5}{\ignorespaces UIO write/read functions.}}{14}
\contentsline {figure}{\numberline {3.6}{\ignorespaces UIO write/read functions(modified)}}{15}
\contentsline {figure}{\numberline {3.7}{\ignorespaces UDMA write/read functions.}}{16}
\contentsline {figure}{\numberline {3.8}{\ignorespaces Udma Prepare for DMA}}{17}
\contentsline {figure}{\numberline {3.9}{\ignorespaces Embedded Linux on FPGA(UDMA ver.)}}{20}
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