diff --git a/Cargo.bwrc.toml b/Cargo.bwrc.toml
index bcd9fd23..f780b15d 100644
--- a/Cargo.bwrc.toml
+++ b/Cargo.bwrc.toml
@@ -53,4 +53,3 @@ itertools = "0.14"
 [features]
 commercial = ["dep:calibre", "dep:abstract_lef", "dep:liberate_mx", "dep:spectre", "dep:sky130_commercial_pdk", "dep:sub_calibre"]
 default = ["commercial"]
-
diff --git a/Cargo.toml b/Cargo.toml
index 4cc1eda5..d5c5655a 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -44,4 +44,3 @@ paste = "1"
 
 [features]
 default = []
-
diff --git a/README.md b/README.md
index 5ed3ca2b..9fcd46d0 100644
--- a/README.md
+++ b/README.md
@@ -27,6 +27,8 @@ If you have BWRC access, you can install all features of SRAM22. Make sure that
 ```
 [net]
 git-fetch-with-cli = true
+[registries]
+substrate = { index = "https://github.com/substrate-labs/crates-index" }
 ```
 
 You can then install SRAM22 using the following commands:
@@ -61,38 +63,45 @@ Options:
   -c, --config <CONFIG>          Path to TOML configuration file [default: sram22.toml]
   -o, --output-dir <OUTPUT_DIR>  Directory to which output files should be saved
       --lef                      Generate LEF (used in place and route)
-      --lib                      Generate LIB (setup, hold, and delay timing information)
+      --liberate                 Generate LIB with Liberate MX instead of the interpolation model
       --drc                      Run DRC using Calibre
       --lvs                      Run LVS using Calibre
-      --pex                      Run PEX using Calibre
   -a, --all                      Run all available steps
   -h, --help                     Print help information
   -V, --version                  Print version information
 ```
 
+`--liberate`, `--drc`, `--lvs`, and `--all` are only available with a full (commercial) installation.
+
 ### Configuration
 
-SRAM22 generates memory blocks based on a TOML configuration file. An example configuration, showing all the available options, is shown below:
+SRAM22 generates memory blocks based on a TOML configuration file. Configurations are specified
+as an array of `[[sram]]` configurations, allowing up to multiple SRAMs to be generated.
 
 ```toml
+[[sram]]
 num_words = 64
 data_width = 32
 mux_ratio = 4
 write_size = 8
+
+[[sram]]
+num_words = 256
+data_width = 64
+mux_ratio = 4
+write_size = 8
 # The `pex_level` flag is only available with a full installation.
 pex_level = "rcc"
 ```
 
-To generate an SRAM using this configuration, put the above text into a file called
-`sram22_64x32m4w8/sram22.toml`, then run:
+Save this as `sram22.toml` and run:
 
 ```
-cd sram22_64x32m4w8
 sram22
 ```
 
-Add additional flags depending on what views you want to generate and what verification you want to run.
-If you do not have access to BWRC servers, most flags will not be available.
+Each `[[sram]]` block is generated independently. Output files are placed in subdirectories
+named after the SRAM (e.g. `build/sram22_64x32m4w8/`)
 
 The number of rows in the SRAM bitcell array is `num_words / mux_ratio`.
 The number of columns in the array is `data_width * mux_ratio`.
@@ -103,7 +112,20 @@ A valid configuration must have:
 * A power-of-two number of rows
 * At least 16 rows
 * At least 16 columns
-* `pex_level`: Must be `"r"`, `"c"`, `"rc"`, or `"rcc"`. If you do not have commercial plugins enabled, this option will be ignored.
+* `pex_level` (optional): Must be `"r"`, `"c"`, `"rc"`, or `"rcc"`. Only available with a full installation. When set, PEX runs automatically — no additional flag required. Each `[[sram]]` block sets its own `pex_level` independently; SRAMs without it skip PEX. The extracted netlist is only consumed by Liberate MX (see below).
+
+### LIB generation
+
+SRAM22 always generates Liberty (.lib) timing files for the tt/ss/ff PVT corners — no flag
+is required. By default the LIB is produced by an open-source interpolation model;
+interpolated LIBs carry a conservative overestimate of up to 2% for SRAM configurations
+with `data_width` between 8 and 128.  `data_width` outside that range is not supported by
+the open-source model and will produce an error.
+
+With a full BWRC installation, passing `--liberate` (or `--all`) instead characterizes the
+LIB with Liberate MX running SPICE simulation; interpolation is skipped in that case. If a
+config also has `pex_level` set, Liberate MX uses the extracted netlist; otherwise it falls
+back to the plain SPICE netlist.
 
 ### Contribution
 
diff --git a/src/blocks/sram/mod.rs b/src/blocks/sram/mod.rs
index e3e849ef..f799b2b8 100644
--- a/src/blocks/sram/mod.rs
+++ b/src/blocks/sram/mod.rs
@@ -67,6 +67,23 @@ pub fn parse_sram_config(path: impl AsRef<Path>) -> anyhow::Result<SramConfig> {
     Ok(data)
 }
 
+#[derive(Debug, Deserialize)]
+pub struct SramBatchConfig {
+    pub sram: Vec<SramConfig>,
+}
+
+pub fn parse_sram_batch_config(path: impl AsRef<Path>) -> anyhow::Result<Vec<SramConfig>> {
+    let contents = std::fs::read_to_string(&path)?;
+    if let Ok(batch) = toml::from_str::<SramBatchConfig>(&contents) {
+        if !batch.sram.is_empty() {
+            return Ok(batch.sram);
+        }
+    }
+    let single = toml::from_str::<SramConfig>(&contents)
+        .map_err(|e| anyhow::anyhow!("Failed to parse config: {}", e))?;
+    Ok(vec![single])
+}
+
 pub struct SramInner {
     params: SramParams,
 }
diff --git a/src/cli/args.rs b/src/cli/args.rs
index 0cb0011d..da8e7a3e 100644
--- a/src/cli/args.rs
+++ b/src/cli/args.rs
@@ -21,10 +21,11 @@ pub struct Args {
     #[arg(short, long)]
     pub output_dir: Option<PathBuf>,
 
-    /// Generate LIB (setup, hold, and delay timing information).
+    /// Generate LIB timing using Liberate MX SPICE characterization instead of
+    /// the open-source interpolation model (requires a full installation).
     #[cfg(feature = "commercial")]
     #[arg(long)]
-    pub lib: bool,
+    pub liberate: bool,
 
     /// Run DRC using Calibre.
     #[cfg(feature = "commercial")]
@@ -36,11 +37,6 @@ pub struct Args {
     #[arg(long)]
     pub lvs: bool,
 
-    /// Run PEX using Calibre.
-    #[cfg(feature = "commercial")]
-    #[arg(long)]
-    pub pex: bool,
-
     #[cfg(feature = "commercial")]
     /// Run all available steps.
     #[arg(short, long)]
diff --git a/src/cli/mod.rs b/src/cli/mod.rs
index 52ea50f4..f1ffb3c0 100644
--- a/src/cli/mod.rs
+++ b/src/cli/mod.rs
@@ -1,32 +1,62 @@
 use std::collections::HashSet;
 use std::fs::canonicalize;
 use std::path::PathBuf;
+use std::sync::Arc;
 
 use clap::Parser;
 
-use crate::blocks::sram::parse_sram_config;
+use indicatif::MultiProgress;
+
+use crate::blocks::sram::{parse_sram_batch_config, SramConfig};
 use crate::cli::args::Args;
 use crate::cli::progress::StepContext;
-use crate::plan::{execute_plan, generate_plan, ExecutePlanParams, TaskKey};
+use crate::paths::{out_gds, out_lef, out_spice, out_verilog};
+use crate::plan::{execute_plan, generate_plan, ExecutePlanParams, SramPlan, TaskKey};
 use crate::Result;
 
 pub mod args;
 pub mod progress;
 
 pub const BANNER: &str = r"
- ________  ________  ________  _____ ______     _______   _______     
-|\   ____\|\   __  \|\   __  \|\   _ \  _   \  /  ___  \ /  ___  \    
-\ \  \___|\ \  \|\  \ \  \|\  \ \  \\\__\ \  \/__/|_/  //__/|_/  /|   
- \ \_____  \ \   _  _\ \   __  \ \  \\|__| \  \__|//  / /__|//  / /   
-  \|____|\  \ \  \\  \\ \  \ \  \ \  \    \ \  \  /  /_/__  /  /_/__  
+ ________  ________  ________  _____ ______     _______   _______
+|\   ____\|\   __  \|\   __  \|\   _ \  _   \  /  ___  \ /  ___  \
+\ \  \___|\ \  \|\  \ \  \|\  \ \  \\\__\ \  \/__/|_/  //__/|_/  /|
+ \ \_____  \ \   _  _\ \   __  \ \  \\|__| \  \__|//  / /__|//  / /
+  \|____|\  \ \  \\  \\ \  \ \  \ \  \    \ \  \  /  /_/__  /  /_/__
     ____\_\  \ \__\\ _\\ \__\ \__\ \__\    \ \__\|\________\\________\
    |\_________\|__|\|__|\|__|\|__|\|__|     \|__| \|_______|\|_______|
-   \|_________|                                                       
-                                                                      
-                                                                      
+   \|_________|
+
+
 SRAM22 v0.2
 ";
 
+fn is_already_built(work_dir: &std::path::Path, name: &str) -> bool {
+    // Completeness is judged on the layout artifacts only, not the LIB. A LIB is
+    // interpolated by default when possible, but not every SRAM config has timing
+    // data to interpolate from, so a missing .lib does not mean the build is stale.
+    out_spice(work_dir, name).exists()
+        && out_gds(work_dir, name).exists()
+        && out_verilog(work_dir, name).exists()
+        && out_lef(work_dir, name).exists()
+}
+
+/// Layer per-config tasks onto the shared base set. A config runs PEX exactly
+/// when it specifies a `pex_level`.
+#[cfg(feature = "commercial")]
+fn config_tasks(base: &HashSet<TaskKey>, config: &SramConfig) -> Arc<HashSet<TaskKey>> {
+    let mut tasks = base.clone();
+    if config.pex_level.is_some() {
+        tasks.insert(TaskKey::RunPex);
+    }
+    Arc::new(tasks)
+}
+
+#[cfg(not(feature = "commercial"))]
+fn config_tasks(base: &HashSet<TaskKey>, _config: &SramConfig) -> Arc<HashSet<TaskKey>> {
+    Arc::new(base.clone())
+}
+
 pub fn run() -> Result<()> {
     let args = Args::parse();
 
@@ -35,59 +65,132 @@ pub fn run() -> Result<()> {
     println!("{BANNER}");
 
     println!("Reading configuration file...\n");
-    let config = parse_sram_config(&config_path)?;
+    let configs = parse_sram_batch_config(&config_path)?;
 
-    println!("Configuration file: {:?}", &config_path);
-    println!("SRAM parameters:");
-    println!("\tNumber of words: {}", config.num_words);
-    println!("\tData width: {}", config.data_width);
-    println!("\tMux ratio: {}", config.mux_ratio as usize);
-    println!("\tWrite size: {}", config.write_size);
+    let config_dir = config_path
+        .parent()
+        .ok_or_else(|| anyhow::anyhow!("Config path has no parent directory"))?;
+
+    let build_dir = if let Some(output_dir) = args.output_dir {
+        output_dir
+    } else {
+        config_dir.join("build")
+    };
+    std::fs::create_dir_all(&build_dir)?;
+    let build_dir = canonicalize(build_dir)?;
 
-    let enabled_tasks = vec![
+    // Every run generates a LIB; DRC, LVS, and the `all` umbrella are opt-in.
+    // PEX is decided per config in `config_tasks` from each config's pex_level.
+    let base_tasks: HashSet<TaskKey> = [
+        (true, TaskKey::GenerateLib),
         #[cfg(feature = "commercial")]
         (args.drc, TaskKey::RunDrc),
         #[cfg(feature = "commercial")]
         (args.lvs, TaskKey::RunLvs),
         #[cfg(feature = "commercial")]
-        (
-            args.pex || (args.lib && config.pex_level.is_some()),
-            TaskKey::RunPex,
-        ),
-        #[cfg(feature = "commercial")]
-        (args.lib, TaskKey::GenerateLib),
-        #[cfg(feature = "commercial")]
         (args.all, TaskKey::All),
     ]
     .into_iter()
-    .filter_map(|(a, b)| if a { Some(b) } else { None });
-
-    let tasks = HashSet::from_iter(enabled_tasks);
-
-    let mut ctx = StepContext::new(&tasks);
+    .filter_map(|(enabled, task)| enabled.then_some(task))
+    .collect();
 
-    let plan = ctx.check(generate_plan(&config))?;
-    ctx.finish(TaskKey::GeneratePlan);
+    let plans: Vec<SramPlan> = configs
+        .iter()
+        .map(|c| generate_plan(c))
+        .collect::<Result<Vec<_>>>()?;
 
-    let work_dir = if let Some(output_dir) = args.output_dir {
-        output_dir
-    } else {
-        PathBuf::from(plan.sram_params.name().as_str())
-    };
-    std::fs::create_dir_all(&work_dir)?;
-    let work_dir = canonicalize(work_dir)?;
-
-    let res = execute_plan(ExecutePlanParams {
-        work_dir: &work_dir,
-        plan: &plan,
-        tasks: &tasks,
-        ctx: Some(&mut ctx),
-        #[cfg(feature = "commercial")]
-        pex_level: config.pex_level,
-    });
-
-    ctx.check(res)?;
-    println!("Artifacts saved to: {:?}\n", &work_dir);
+    println!("Configuration file: {:?}", &config_path);
+    for (i, (config, plan)) in configs.iter().zip(plans.iter()).enumerate() {
+        println!(
+            "  [{}] {} (num_words={}, data_width={}, mux_ratio={}, write_size={})",
+            i + 1,
+            plan.sram_params.name(),
+            config.num_words,
+            config.data_width,
+            config.mux_ratio as usize,
+            config.write_size,
+        );
+    }
+    println!();
+
+    let mp = MultiProgress::new();
+
+    let handles: Vec<_> = plans
+        .into_iter()
+        .zip(configs.into_iter())
+        .filter_map(|(plan, config)| {
+            let work_dir_check = build_dir.join(plan.sram_params.name().as_str());
+            if is_already_built(&work_dir_check, &plan.sram_params.name()) {
+                return None;
+            }
+
+            let tasks = config_tasks(&base_tasks, &config);
+
+            let mut ctx = StepContext::new_with_mp(&tasks, mp.clone(), &plan.sram_params.name());
+            ctx.finish(TaskKey::GeneratePlan);
+
+            let build_dir = build_dir.clone();
+            Some(std::thread::spawn(move || -> (Result<PathBuf>, StepContext) {
+                let result = (|| -> Result<PathBuf> {
+                    let work_dir = build_dir.join(plan.sram_params.name().as_str());
+                    std::fs::create_dir_all(&work_dir)?;
+                    let work_dir = canonicalize(work_dir)?;
+                    let res = execute_plan(ExecutePlanParams {
+                        work_dir: &work_dir,
+                        plan: &plan,
+                        tasks,
+                        ctx: Some(&mut ctx),
+                        #[cfg(feature = "commercial")]
+                        pex_level: config.pex_level,
+                        #[cfg(feature = "commercial")]
+                        use_liberate: args.liberate || args.all,
+                    });
+                    ctx.check(res)?;
+                    Ok(work_dir)
+                })();
+                (result, ctx)
+            }))
+        })
+        .collect();
+
+    // Join ALL threads first, then commit ALL progress bars together to avoid
+    // ghost snapshots that appear when one bar finishes while others are live.
+    let joined: Vec<_> = handles.into_iter().map(|h| h.join()).collect();
+    let mut errors: Vec<anyhow::Error> = Vec::new();
+    let mut work_dirs: Vec<PathBuf> = Vec::new();
+    for join_result in joined {
+        match join_result {
+            Ok((Ok(work_dir), mut ctx)) => {
+                ctx.commit();
+                work_dirs.push(work_dir);
+            }
+            Ok((Err(e), mut ctx)) => {
+                ctx.commit();
+                errors.push(e);
+            }
+            Err(e) => {
+                let msg = e
+                    .downcast_ref::<String>()
+                    .map(|s| s.as_str())
+                    .or_else(|| e.downcast_ref::<&'static str>().copied())
+                    .unwrap_or("(no message)");
+                errors.push(anyhow::anyhow!("SRAM generation thread panicked: {}", msg));
+            }
+        }
+    }
+    for work_dir in work_dirs {
+        println!("Artifacts saved to: {:?}", work_dir);
+    }
+
+    if !errors.is_empty() {
+        let msg = errors
+            .iter()
+            .enumerate()
+            .map(|(i, e)| format!("  [{}] {:#}", i + 1, e))
+            .collect::<Vec<_>>()
+            .join("\n");
+        anyhow::bail!("{} SRAM(s) failed:\n{}", errors.len(), msg);
+    }
 
     Ok(())
 }
diff --git a/src/cli/progress.rs b/src/cli/progress.rs
index de90ca73..74549f92 100644
--- a/src/cli/progress.rs
+++ b/src/cli/progress.rs
@@ -29,43 +29,53 @@ pub struct Step {
     key: TaskKey,
     progress_bar: ProgressBar,
     disabled: bool,
+    done: bool,
+}
+
+impl Step {
+    fn matches(&self, key: TaskKey) -> bool {
+        self.key == key
+    }
 }
 
 impl StepContext {
     #[allow(unused_variables)]
-    pub fn new(tasks: &HashSet<TaskKey>) -> Self {
-        println!("Tasks:");
-
+    pub fn new_with_mp(tasks: &HashSet<TaskKey>, mp: MultiProgress, prefix: &str) -> Self {
         let mut steps = vec![
             Step {
                 desc: "Generate plan".to_string(),
                 key: TaskKey::GeneratePlan,
                 progress_bar: ProgressBar::new_spinner(),
                 disabled: false,
+                done: false,
             },
             Step {
                 desc: "Generate netlist".to_string(),
                 key: TaskKey::GenerateNetlist,
                 progress_bar: ProgressBar::new_spinner(),
                 disabled: false,
+                done: false,
             },
             Step {
                 desc: "Generate layout".to_string(),
                 key: TaskKey::GenerateLayout,
                 progress_bar: ProgressBar::new_spinner(),
                 disabled: false,
+                done: false,
             },
             Step {
                 desc: "Generate Verilog".to_string(),
                 key: TaskKey::GenerateVerilog,
                 progress_bar: ProgressBar::new_spinner(),
                 disabled: false,
+                done: false,
             },
             Step {
                 desc: "Generate LEF".to_string(),
                 key: TaskKey::GenerateLef,
                 progress_bar: ProgressBar::new_spinner(),
                 disabled: false,
+                done: false,
             },
             #[cfg(feature = "commercial")]
             Step {
@@ -73,6 +83,7 @@ impl StepContext {
                 key: TaskKey::RunDrc,
                 progress_bar: ProgressBar::new_spinner(),
                 disabled: !tasks.contains(&TaskKey::RunDrc) && !tasks.contains(&TaskKey::All),
+                done: false,
             },
             #[cfg(feature = "commercial")]
             Step {
@@ -80,36 +91,46 @@ impl StepContext {
                 key: TaskKey::RunLvs,
                 progress_bar: ProgressBar::new_spinner(),
                 disabled: !tasks.contains(&TaskKey::RunLvs) && !tasks.contains(&TaskKey::All),
+                done: false,
             },
-            #[cfg(all(feature = "commercial"))]
+            #[cfg(feature = "commercial")]
             Step {
                 desc: "Run PEX".to_string(),
                 key: TaskKey::RunPex,
                 progress_bar: ProgressBar::new_spinner(),
-                disabled: !tasks.contains(&TaskKey::RunPex) && !tasks.contains(&TaskKey::All),
+                disabled: !tasks.contains(&TaskKey::RunPex),
+                done: false,
             },
-            #[cfg(feature = "commercial")]
+            // LIB is always generated (interpolation by default, Liberate MX
+            // with --liberate/--all), so this step is never disabled.
             Step {
                 desc: "Generate LIB".to_string(),
                 key: TaskKey::GenerateLib,
                 progress_bar: ProgressBar::new_spinner(),
-                disabled: !tasks.contains(&TaskKey::GenerateLib) && !tasks.contains(&TaskKey::All),
+                disabled: false,
+                done: false,
             },
         ];
-        let mp = MultiProgress::new();
+
         let num_steps = steps.iter().filter(|step| !step.disabled).count();
         let mut counter = 0;
         let width = format!("{num_steps}").len();
-        for (i, step) in steps.iter_mut().enumerate() {
-            mp.insert(i + 1, step.progress_bar.clone());
+        let prefix_str = if prefix.is_empty() {
+            String::new()
+        } else {
+            format!("[{}] ", prefix)
+        };
+
+        for step in steps.iter_mut() {
+            mp.add(step.progress_bar.clone());
             if step.disabled {
-                let msg = Some(format!("[-/-] {}", step.desc));
+                let msg = Some(format!("{}[-/-] {}", prefix_str, step.desc));
                 step.set_status(StepStatus::Disabled, msg);
             } else {
                 counter += 1;
                 let msg = Some(format!(
-                    "[{:width$}/{:width$}] {}",
-                    counter, num_steps, step.desc
+                    "{}[{:width$}/{:width$}] {}",
+                    prefix_str, counter, num_steps, step.desc
                 ));
                 step.set_status(StepStatus::Pending, msg);
             }
@@ -151,9 +172,7 @@ impl StepContext {
                     self.advance();
                 }
             }
-            println!("\n");
         }
-
         res
     }
 
@@ -163,10 +182,14 @@ impl StepContext {
 
     pub fn finish(&mut self, key: TaskKey) {
         if let Some(current_step) = self.current_step() {
-            if current_step.key != key {
+            if !current_step.matches(key) {
                 panic!("A step was completed out of order");
             }
 
+            if current_step.done {
+                return;
+            }
+            current_step.done = true;
             current_step.set_status(StepStatus::Done, None);
 
             self.advance();
@@ -176,13 +199,20 @@ impl StepContext {
             } else {
                 self.done();
             }
-        } else {
+        } else if !self.steps.last().is_some_and(|s| s.done && s.matches(key)) {
             panic!("A step was completed after all steps were marked completed");
         }
     }
 
-    pub fn done(&mut self) {
-        println!("\n\nCompleted all tasks");
+    pub fn done(&mut self) {}
+
+    /// Finalize all bars as static terminal output. Call only after all
+    /// concurrent contexts are fully done, so no bar is committed while
+    /// another still shows an in-progress spinner.
+    pub fn commit(&mut self) {
+        for step in &self.steps {
+            step.progress_bar.finish();
+        }
     }
 }
 
@@ -217,7 +247,11 @@ impl Step {
             self.progress_bar
                 .enable_steady_tick(Duration::from_millis(200));
         } else if status != StepStatus::Pending {
-            self.progress_bar.finish();
+            // Stop the spinner and redraw in-place with the new style, but do
+            // NOT call finish() — that would commit this bar as a static line
+            // immediately, causing ghost snapshots of other live bars.
+            self.progress_bar.disable_steady_tick();
+            self.progress_bar.tick();
         }
     }
 }
diff --git a/src/lib.rs b/src/lib.rs
index f3324f30..5787f0ef 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -30,6 +30,7 @@ use tera::Tera;
 pub mod abs;
 pub mod blocks;
 pub mod cli;
+pub mod lib_gen;
 #[cfg(feature = "commercial")]
 pub mod liberate;
 pub mod measure;
diff --git a/src/lib_gen.rs b/src/lib_gen.rs
new file mode 100644
index 00000000..284f257e
--- /dev/null
+++ b/src/lib_gen.rs
@@ -0,0 +1,1068 @@
+// Open-source Liberty (.lib) generator for SRAM macros.
+// Produces the same structural format as Liberate MX CCS output.
+// Numeric values are provided by a pluggable `TimingModel` impl.
+
+use crate::blocks::sram::SramParams;
+use anyhow::Result;
+use std::path::PathBuf;
+
+// ── INDEX AXES ────────────────────────────────────────────────────────────────
+
+const SLEW_IDX: [f64; 7] = [0.002, 0.008, 0.03, 0.073, 0.138, 0.231, 0.351];
+const LOAD_IDX: [f64; 7] = [0.007, 0.013, 0.033, 0.065, 0.13, 0.26, 0.52];
+const PWR_IDX: [f64; 7] = [0.002, 0.004, 0.011, 0.022, 0.035, 0.087, 0.17];
+
+// ── MODEL TYPES ───────────────────────────────────────────────────────────────
+
+/// PVT corner for Liberty characterization.
+#[derive(Clone)]
+pub struct PvtCorner {
+    pub name: String,
+    pub process: f64,
+    pub voltage: f64,
+    pub temperature: f64,
+}
+
+impl PvtCorner {
+    /// Standard corners used in sram22: tt/ss/ff with their PVT values.
+    pub fn tt() -> Self {
+        Self { name: "tt".into(), process: 1.0, voltage: 1.8, temperature: 25.0 }
+    }
+    pub fn ss() -> Self {
+        Self { name: "ss".into(), process: 1.0, voltage: 1.6, temperature: 100.0 }
+    }
+    pub fn ff() -> Self {
+        Self { name: "ff".into(), process: 1.0, voltage: 1.95, temperature: -40.0 }
+    }
+
+    /// e.g. "PVT_1P95V_-40C"
+    fn oc_name(&self) -> String {
+        let v = fmt_voltage_oc(self.voltage);
+        let t = if self.temperature < 0.0 {
+            format!("-{}C", (-self.temperature) as i64)
+        } else {
+            format!("{}C", self.temperature as i64)
+        };
+        format!("PVT_{}V_{}", v, t)
+    }
+
+    /// e.g. "ff_n40C_1v95"
+    pub fn file_suffix(&self) -> String {
+        let t = if self.temperature < 0.0 {
+            format!("n{}C", (-self.temperature) as i64)
+        } else {
+            format!("{:03}C", self.temperature as i64)
+        };
+        let v = format!("{:.2}", self.voltage).replace('.', "v");
+        format!("{}_{}_{}", self.name, t, v)
+    }
+}
+
+/// Capacitance values for a pin (in pF).
+pub struct CapValues {
+    pub cap: f64,
+    pub rise: f64,
+    pub fall: f64,
+    pub rise_lo: f64,
+    pub fall_lo: f64,
+}
+
+/// CCS current waveform for one (slew, load) operating point.
+pub struct CcsVector {
+    pub reference_time: f64,
+    pub slew: f64,
+    pub load: f64,
+    pub time_pts: Vec<f64>,
+    pub currents: Vec<f64>,
+}
+
+/// Logical role of a pin in the SRAM interface.
+#[derive(Clone, Copy)]
+pub enum PinRole {
+    Addr,
+    Din,
+    Ce,
+    We,
+    Rstb,
+    Wmask,
+    Clk,
+}
+
+// ── TimingModel TRAIT ─────────────────────────────────────────────────────────
+
+/// Plug-in point for timing equations.
+/// `[[f64;7];7]` tables: rows index slew, columns index load or clock-slew.
+pub trait TimingModel: Send + Sync {
+    fn area(&self, p: &SramParams) -> f64;
+
+    fn hold_rise(&self, p: &SramParams, pin: PinRole) -> [[f64; 7]; 7];
+    fn hold_fall(&self, p: &SramParams, pin: PinRole) -> [[f64; 7]; 7];
+    fn setup_rise(&self, p: &SramParams, pin: PinRole) -> [[f64; 7]; 7];
+    fn setup_fall(&self, p: &SramParams, pin: PinRole) -> [[f64; 7]; 7];
+
+    fn cell_rise(&self, p: &SramParams) -> [[f64; 7]; 7];
+    fn cell_fall(&self, p: &SramParams) -> [[f64; 7]; 7];
+    fn rise_transition(&self, p: &SramParams) -> [[f64; 7]; 7];
+    fn fall_transition(&self, p: &SramParams) -> [[f64; 7]; 7];
+
+    fn minimum_period(&self, p: &SramParams) -> [f64; 7];
+    fn min_pulse_width(&self, p: &SramParams) -> ([f64; 7], [f64; 7]);
+
+    fn input_cap(&self, p: &SramParams, pin: PinRole) -> CapValues;
+    fn output_max_cap(&self, p: &SramParams) -> f64;
+
+    fn receiver_cap_1_rise(&self, p: &SramParams, pin: PinRole) -> [f64; 7];
+    fn receiver_cap_2_rise(&self, p: &SramParams, pin: PinRole) -> [f64; 7];
+    fn receiver_cap_1_fall(&self, p: &SramParams, pin: PinRole) -> [f64; 7];
+    fn receiver_cap_2_fall(&self, p: &SramParams, pin: PinRole) -> [f64; 7];
+
+    fn ccs_rise(&self, p: &SramParams) -> Vec<CcsVector>;
+    fn ccs_fall(&self, p: &SramParams) -> Vec<CcsVector>;
+
+    fn clk_power_rise(&self, p: &SramParams, when: &str) -> [f64; 7];
+    fn clk_power_fall(&self, p: &SramParams, when: &str) -> [f64; 7];
+}
+
+/// Placeholder: returns zeros for all values. Produces structurally valid Liberty
+/// output that can be syntax-checked without any characterized data.
+pub struct PlaceholderModel;
+
+impl TimingModel for PlaceholderModel {
+    fn area(&self, _: &SramParams) -> f64 { 0.0 }
+    fn hold_rise(&self, _: &SramParams, _: PinRole) -> [[f64; 7]; 7] { [[0.0; 7]; 7] }
+    fn hold_fall(&self, _: &SramParams, _: PinRole) -> [[f64; 7]; 7] { [[0.0; 7]; 7] }
+    fn setup_rise(&self, _: &SramParams, _: PinRole) -> [[f64; 7]; 7] { [[0.0; 7]; 7] }
+    fn setup_fall(&self, _: &SramParams, _: PinRole) -> [[f64; 7]; 7] { [[0.0; 7]; 7] }
+    fn cell_rise(&self, _: &SramParams) -> [[f64; 7]; 7] { [[0.0; 7]; 7] }
+    fn cell_fall(&self, _: &SramParams) -> [[f64; 7]; 7] { [[0.0; 7]; 7] }
+    fn rise_transition(&self, _: &SramParams) -> [[f64; 7]; 7] { [[0.0; 7]; 7] }
+    fn fall_transition(&self, _: &SramParams) -> [[f64; 7]; 7] { [[0.0; 7]; 7] }
+    fn minimum_period(&self, _: &SramParams) -> [f64; 7] { [0.0; 7] }
+    fn min_pulse_width(&self, _: &SramParams) -> ([f64; 7], [f64; 7]) { ([0.0; 7], [0.0; 7]) }
+    fn input_cap(&self, _: &SramParams, _: PinRole) -> CapValues {
+        CapValues { cap: 0.0, rise: 0.0, fall: 0.0, rise_lo: 0.0, fall_lo: 0.0 }
+    }
+    fn output_max_cap(&self, _: &SramParams) -> f64 { 0.52 }
+    fn receiver_cap_1_rise(&self, _: &SramParams, _: PinRole) -> [f64; 7] { [0.0; 7] }
+    fn receiver_cap_2_rise(&self, _: &SramParams, _: PinRole) -> [f64; 7] { [0.0; 7] }
+    fn receiver_cap_1_fall(&self, _: &SramParams, _: PinRole) -> [f64; 7] { [0.0; 7] }
+    fn receiver_cap_2_fall(&self, _: &SramParams, _: PinRole) -> [f64; 7] { [0.0; 7] }
+    fn ccs_rise(&self, _: &SramParams) -> Vec<CcsVector> {
+        SLEW_IDX.iter().flat_map(|&slew| {
+            LOAD_IDX.iter().map(move |&load| CcsVector {
+                reference_time: 0.0,
+                slew,
+                load,
+                time_pts: vec![0.0, 1.0],
+                currents: vec![0.0, 0.0],
+            })
+        }).collect()
+    }
+    fn ccs_fall(&self, p: &SramParams) -> Vec<CcsVector> { self.ccs_rise(p) }
+    fn clk_power_rise(&self, _: &SramParams, _: &str) -> [f64; 7] { [0.0; 7] }
+    fn clk_power_fall(&self, _: &SramParams, _: &str) -> [f64; 7] { [0.0; 7] }
+}
+
+// ── LOOKUP MODEL ─────────────────────────────────────────────────────────────
+//
+// Equation forms (all linear-in-parameters so ordinary least squares suffices).
+// Each basis returns [f64; 4]; trailing zeros are unused slots.
+
+fn basis_lin4_sqrt_log(dw: f64) -> [f64; 4] { [1.0, dw, dw.sqrt(), dw.ln()] }
+fn basis_lin3_cbrt(dw: f64)     -> [f64; 4] { [1.0, dw, dw.cbrt(), 0.0] }
+fn basis_lin3_sqrt(dw: f64)     -> [f64; 4] { [1.0, dw, dw.sqrt(), 0.0] }
+fn basis_log2(dw: f64)          -> [f64; 4] { [1.0, dw.ln(), 0.0, 0.0] }
+fn basis_lin2(dw: f64)          -> [f64; 4] { [1.0, dw, 0.0, 0.0] }
+fn basis_log3(dw: f64)          -> [f64; 4] { [1.0, dw.ln(), dw.ln().powi(2), 0.0] }
+fn basis_lin4_log_log2(dw: f64) -> [f64; 4] { let l = dw.ln(); [1.0, dw, l, l.powi(2)] }
+
+/// One fitted entry: `eval(dw) = sum(params[k] * basis(dw)[k])`.
+/// At characterized training points the original measured value is returned exactly;
+/// the fitted polynomial is only used for interpolated (non-training) dw values.
+#[derive(Clone)]
+struct FitEntry {
+    basis:    fn(f64) -> [f64; 4],
+    params:   [f64; 4],
+    training: Vec<(f64, f64)>,  // (dw, val) pairs stored for exact-match lookup
+}
+
+impl FitEntry {
+    fn eval(&self, dw: f64) -> f64 {
+        // Return the exact characterized value when queried at a training point.
+        if let Some(&(_, y)) = self.training.iter().find(|&&(x, _)| x == dw) {
+            return y;
+        }
+        let x = (self.basis)(dw);
+        x[0] * self.params[0]
+            + x[1] * self.params[1]
+            + x[2] * self.params[2]
+            + x[3] * self.params[3]
+    }
+
+    /// OLS fit with two conservative lift passes:
+    /// 1. Lift at training points so fitted ≥ actual at every training dw.
+    /// 2. Lift at every integer dw in [min_dw, max_dw].  For each point the
+    ///    reference is:
+    ///    - Flat data (range/mean < 1%): global max of training values.
+    ///      The data has no real dw trend; measurement noise can put any
+    ///      intermediate value anywhere in the range, so the global max is
+    ///      the only conservative bound.
+    ///    - Trending data (range/mean ≥ 1%): piecewise log-linear interpolant
+    ///      of training data — tight and conservative for smooth curves.
+    fn fit(basis: fn(f64) -> [f64; 4], dws: &[f64], vals: &[f64]) -> Self {
+        let mut p = ols4(basis, dws, vals);
+
+        // Pass 1: training points
+        let lift1 = dws.iter().zip(vals).map(|(&x, &y)| {
+            let b = basis(x);
+            y - (b[0]*p[0] + b[1]*p[1] + b[2]*p[2] + b[3]*p[3])
+        }).fold(0.0_f64, f64::max);
+        p[0] += lift1;
+
+        // Pass 2: every integer dw between training extremes
+        let val_max = vals.iter().cloned().fold(f64::NEG_INFINITY, f64::max);
+        let val_min = vals.iter().cloned().fold(f64::INFINITY, f64::min);
+        let val_mean = vals.iter().sum::<f64>() / vals.len() as f64;
+        let is_flat = val_mean > 0.0 && (val_max - val_min) / val_mean < 0.02;
+        let min_dw = dws[0] as u32;
+        let max_dw = *dws.last().unwrap() as u32;
+        let lift2 = (min_dw..=max_dw)
+            .map(|dw_i| {
+                let dw = dw_i as f64;
+                let reference = if is_flat {
+                    val_max
+                } else {
+                    piecewise_log_linear(dw, dws, vals)
+                };
+                let b = basis(dw);
+                reference - (b[0]*p[0] + b[1]*p[1] + b[2]*p[2] + b[3]*p[3])
+            })
+            .fold(0.0_f64, f64::max);
+        p[0] += lift2;
+
+        let training = dws.iter().zip(vals).map(|(&x, &y)| (x, y)).collect();
+        Self { basis, params: p, training }
+    }
+}
+
+fn piecewise_log_linear(dw: f64, dws: &[f64], vals: &[f64]) -> f64 {
+    let i = dws.partition_point(|&x| x <= dw);
+    if i == 0 { return vals[0]; }
+    if i >= dws.len() { return vals[dws.len() - 1]; }
+    let (x0, y0) = (dws[i - 1], vals[i - 1]);
+    let (x1, y1) = (dws[i], vals[i]);
+    let t = (dw.ln() - x0.ln()) / (x1.ln() - x0.ln());
+    y0 + t * (y1 - y0)
+}
+
+fn ols4(basis: fn(f64) -> [f64; 4], dws: &[f64], vals: &[f64]) -> [f64; 4] {
+    let mut xtx = [[0.0f64; 4]; 4];
+    let mut xty = [0.0f64; 4];
+    for (&dw, &y) in dws.iter().zip(vals) {
+        let x = basis(dw);
+        for i in 0..4 {
+            xty[i] += x[i] * y;
+            for j in 0..4 { xtx[i][j] += x[i] * x[j]; }
+        }
+    }
+    gauss4(xtx, xty)
+}
+
+fn gauss4(mut a: [[f64; 4]; 4], mut b: [f64; 4]) -> [f64; 4] {
+    for col in 0..4 {
+        let pivot = (col..4)
+            .max_by(|&i, &j| a[i][col].abs().partial_cmp(&a[j][col].abs()).unwrap())
+            .unwrap();
+        a.swap(col, pivot);
+        b.swap(col, pivot);
+        let d = a[col][col];
+        if d.abs() < 1e-14 { continue; }
+        for row in (col + 1)..4 {
+            let f = a[row][col] / d;
+            for k in col..4 { a[row][k] -= f * a[col][k]; }
+            b[row] -= f * b[col];
+        }
+    }
+    let mut x = [0.0f64; 4];
+    for i in (0..4).rev() {
+        let s: f64 = ((i + 1)..4).map(|j| a[i][j] * x[j]).sum();
+        x[i] = if a[i][i].abs() < 1e-14 { 0.0 } else { (b[i] - s) / a[i][i] };
+    }
+    x
+}
+
+fn eval_7x7(tbl: &[[FitEntry; 7]; 7], dw: f64) -> [[f64; 7]; 7] {
+    std::array::from_fn(|i| std::array::from_fn(|j| tbl[i][j].eval(dw)))
+}
+
+/// Data-driven timing model loaded from a characterization JSON file.
+///
+/// Each timing table entry is fitted with a conservative upper-bound parametric
+/// equation (linear in parameters, solved via OLS + intercept lift).
+/// `din_hold_fall` uses a per-entry constant (= max measured value) because its
+/// data has no dw trend (random ±1.5% noise around ~0.04 ns).
+/// `min_period` uses piecewise log-linear interpolation with a monotone upper hull.
+/// For the SS corner, Liberate MX fails to converge at dw=1024+ so those entries
+/// are estimated using the SS/TT ratio (~1.828) computed from the valid dw range.
+pub struct LookupModel {
+    cell_rise:        [[FitEntry; 7]; 7],
+    cell_fall:        [[FitEntry; 7]; 7],
+    rise_transition:  [[FitEntry; 7]; 7],
+    fall_transition:  [[FitEntry; 7]; 7],
+    addr_hold_rise:   [[FitEntry; 7]; 7],
+    addr_hold_fall:   [[FitEntry; 7]; 7],
+    addr_setup_rise:  [[FitEntry; 7]; 7],
+    addr_setup_fall:  [[FitEntry; 7]; 7],
+    din_hold_rise:    [[FitEntry; 7]; 7],
+    din_hold_fall:    [[f64; 7]; 7],
+    din_setup_rise:   [[FitEntry; 7]; 7],
+    din_setup_fall:   [[FitEntry; 7]; 7],
+    ce_hold_rise:     [[FitEntry; 7]; 7],
+    ce_hold_fall:     [[FitEntry; 7]; 7],
+    ce_setup_rise:    [[FitEntry; 7]; 7],
+    ce_setup_fall:    [[FitEntry; 7]; 7],
+    we_hold_rise:     [[FitEntry; 7]; 7],
+    we_hold_fall:     [[FitEntry; 7]; 7],
+    we_setup_rise:    [[FitEntry; 7]; 7],
+    we_setup_fall:    [[FitEntry; 7]; 7],
+    rstb_hold_rise:   [[FitEntry; 7]; 7],
+    rstb_hold_fall:   [[FitEntry; 7]; 7],
+    rstb_setup_rise:  [[FitEntry; 7]; 7],
+    rstb_setup_fall:  [[FitEntry; 7]; 7],
+    mpw_rise:        [FitEntry; 7],
+    mpw_fall:        [FitEntry; 7],
+    min_period:      Vec<(u32, [f64; 7])>,
+    clk_cap:   f64,
+    addr_cap:  f64,
+    din_cap:   f64,
+    ce_cap:    f64,
+    we_cap:    f64,
+    rstb_cap:  f64,
+    wmask_cap: f64,
+}
+
+impl LookupModel {
+    /// Build from embedded JSON bytes for one PVT corner ("tt", "ss", or "ff").
+    pub fn from_json(json_bytes: &[u8], corner: &str) -> Result<Self> {
+        let root: serde_json::Value = serde_json::from_slice(json_bytes)?;
+        let cmap = root[corner]
+            .as_object()
+            .ok_or_else(|| anyhow::anyhow!("corner '{}' not found in timing JSON", corner))?;
+
+        let mut dw_keys: Vec<u32> = cmap.keys().map(|k| k.parse().unwrap()).collect();
+        dw_keys.sort_unstable();
+        let dws: Vec<f64> = dw_keys.iter().map(|&k| k as f64).collect();
+
+        let v2d = |dw: u32, key: &str, i: usize, j: usize| -> f64 {
+            cmap[&dw.to_string()][key][i][j].as_f64().unwrap_or(0.0)
+        };
+        let v1d = |dw: u32, key: &str, j: usize| -> f64 {
+            cmap[&dw.to_string()][key][j].as_f64().unwrap_or(0.0)
+        };
+        let v0d = |dw: u32, key: &str| -> f64 {
+            cmap[&dw.to_string()][key].as_f64().unwrap_or(0.0)
+        };
+
+        let fit7 = |key: &str, basis: fn(f64) -> [f64; 4]| -> [[FitEntry; 7]; 7] {
+            std::array::from_fn(|i| std::array::from_fn(|j| {
+                let vals: Vec<f64> = dw_keys.iter().map(|&dw| v2d(dw, key, i, j)).collect();
+                FitEntry::fit(basis, &dws, &vals)
+            }))
+        };
+        let max7 = |key: &str| -> [[f64; 7]; 7] {
+            std::array::from_fn(|i| std::array::from_fn(|j| {
+                dw_keys.iter().map(|&dw| v2d(dw, key, i, j)).fold(f64::NEG_INFINITY, f64::max)
+            }))
+        };
+        let fit1 = |key: &str, basis: fn(f64) -> [f64; 4]| -> [FitEntry; 7] {
+            std::array::from_fn(|j| {
+                let vals: Vec<f64> = dw_keys.iter().map(|&dw| v1d(dw, key, j)).collect();
+                FitEntry::fit(basis, &dws, &vals)
+            })
+        };
+        let max0 = |key: &str| -> f64 {
+            dw_keys.iter().map(|&dw| v0d(dw, key)).fold(f64::NEG_INFINITY, f64::max)
+        };
+
+        // Build min_period table with SS cross-corner correction and monotone upper hull.
+        // SS corner Liberate MX fails to converge at dw=1024/1536/2048; those entries
+        // are replaced with TT * avg_ratio where ratio ≈ 1.828 across all valid dws.
+        let min_period_snaps: Vec<(u32, [f64; 7])> = {
+            let mut raw: Vec<(u32, [f64; 7])> = dw_keys
+                .iter()
+                .map(|&dw| (dw, std::array::from_fn(|j| v1d(dw, "min_period", j))))
+                .collect();
+
+            if corner == "ss" {
+                if let Some(tt_map) = root["tt"].as_object() {
+                    let v1d_tt = |dw: u32, j: usize| -> f64 {
+                        tt_map[&dw.to_string()]["min_period"][j]
+                            .as_f64()
+                            .unwrap_or(0.0)
+                    };
+                    let mut ratios = Vec::new();
+                    for &(dw, ref arr) in &raw {
+                        if dw <= 768 {
+                            let tt_val = v1d_tt(dw, 0);
+                            if tt_val > 0.0 {
+                                ratios.push(arr[0] / tt_val);
+                            }
+                        }
+                    }
+                    if !ratios.is_empty() {
+                        let avg_ratio = ratios.iter().sum::<f64>() / ratios.len() as f64;
+                        for (dw, arr) in raw.iter_mut() {
+                            if *dw > 768 {
+                                for j in 0..7 {
+                                    arr[j] = v1d_tt(*dw, j) * avg_ratio;
+                                }
+                            }
+                        }
+                    }
+                }
+            }
+
+            // Monotone upper hull (running max left-to-right) applied to every corner.
+            let mut running_max = [0.0f64; 7];
+            for (_, arr) in raw.iter_mut() {
+                for j in 0..7 {
+                    running_max[j] = f64::max(running_max[j], arr[j]);
+                    arr[j] = running_max[j];
+                }
+            }
+            raw
+        };
+
+        Ok(Self {
+            cell_rise:        fit7("cell_rise",        basis_lin4_sqrt_log),
+            cell_fall:        fit7("cell_fall",        basis_lin4_sqrt_log),
+            rise_transition:  fit7("rise_transition",  basis_lin3_cbrt),
+            fall_transition:  fit7("fall_transition",  basis_lin3_sqrt),
+            addr_hold_rise:   fit7("addr_hold_rise",   basis_lin3_sqrt),
+            addr_hold_fall:   fit7("addr_hold_fall",   basis_log2),
+            addr_setup_rise:  fit7("addr_setup_rise",  basis_lin3_sqrt),
+            addr_setup_fall:  fit7("addr_setup_fall",  basis_lin3_sqrt),
+            din_hold_rise:    fit7("din_hold_rise",    basis_lin2),
+            din_hold_fall:    max7("din_hold_fall"),
+            din_setup_rise:   fit7("din_setup_rise",   basis_lin2),
+            din_setup_fall:   fit7("din_setup_fall",   basis_lin2),
+            ce_hold_rise:     fit7("ce_hold_rise",     basis_log3),
+            ce_hold_fall:     fit7("ce_hold_fall",     basis_lin3_sqrt),
+            ce_setup_rise:    fit7("ce_setup_rise",    basis_log3),
+            ce_setup_fall:    fit7("ce_setup_fall",    basis_lin3_sqrt),
+            we_hold_rise:     fit7("we_hold_rise",     basis_log3),
+            we_hold_fall:     fit7("we_hold_fall",     basis_lin3_sqrt),
+            we_setup_rise:    fit7("we_setup_rise",    basis_log3),
+            we_setup_fall:    fit7("we_setup_fall",    basis_lin3_sqrt),
+            rstb_hold_rise:   fit7("rstb_hold_rise",   basis_log3),
+            rstb_hold_fall:   fit7("rstb_hold_fall",   basis_lin4_log_log2),
+            rstb_setup_rise:  fit7("rstb_setup_rise",  basis_log3),
+            rstb_setup_fall:  fit7("rstb_setup_fall",  basis_lin4_log_log2),
+            mpw_rise:        fit1("mpw_rise",        basis_lin3_cbrt),
+            mpw_fall:        fit1("mpw_fall",        basis_log3),
+            min_period:      min_period_snaps,
+            clk_cap:   max0("clk_cap"),
+            addr_cap:  max0("addr_cap"),
+            din_cap:   max0("din_cap"),
+            ce_cap:    max0("ce_cap"),
+            we_cap:    max0("we_cap"),
+            rstb_cap:  max0("rstb_cap"),
+            wmask_cap: max0("wmask_cap"),
+        })
+    }
+}
+
+impl TimingModel for LookupModel {
+    fn area(&self, _: &SramParams) -> f64 { 0.0 }
+
+    fn hold_rise(&self, p: &SramParams, pin: PinRole) -> [[f64; 7]; 7] {
+        let dw = p.data_width() as f64;
+        let tbl = match pin {
+            PinRole::Addr | PinRole::Clk  => &self.addr_hold_rise,
+            PinRole::Din  | PinRole::Wmask => &self.din_hold_rise,
+            PinRole::Ce    => &self.ce_hold_rise,
+            PinRole::We    => &self.we_hold_rise,
+            PinRole::Rstb  => &self.rstb_hold_rise,
+        };
+        eval_7x7(tbl, dw)
+    }
+
+    fn hold_fall(&self, p: &SramParams, pin: PinRole) -> [[f64; 7]; 7] {
+        let dw = p.data_width() as f64;
+        match pin {
+            PinRole::Din  | PinRole::Wmask => self.din_hold_fall,
+            PinRole::Addr | PinRole::Clk   => eval_7x7(&self.addr_hold_fall, dw),
+            PinRole::Ce    => eval_7x7(&self.ce_hold_fall, dw),
+            PinRole::We    => eval_7x7(&self.we_hold_fall, dw),
+            PinRole::Rstb  => eval_7x7(&self.rstb_hold_fall, dw),
+        }
+    }
+
+    fn setup_rise(&self, p: &SramParams, pin: PinRole) -> [[f64; 7]; 7] {
+        let dw = p.data_width() as f64;
+        match pin {
+            PinRole::Addr | PinRole::Clk  => eval_7x7(&self.addr_setup_rise, dw),
+            PinRole::Din  | PinRole::Wmask => eval_7x7(&self.din_setup_rise, dw),
+            PinRole::Ce    => eval_7x7(&self.ce_setup_rise, dw),
+            PinRole::We    => eval_7x7(&self.we_setup_rise, dw),
+            PinRole::Rstb  => eval_7x7(&self.rstb_setup_rise, dw),
+        }
+    }
+    fn setup_fall(&self, p: &SramParams, pin: PinRole) -> [[f64; 7]; 7] {
+        let dw = p.data_width() as f64;
+        match pin {
+            PinRole::Addr | PinRole::Clk  => eval_7x7(&self.addr_setup_fall, dw),
+            PinRole::Din  | PinRole::Wmask => eval_7x7(&self.din_setup_fall, dw),
+            PinRole::Ce    => eval_7x7(&self.ce_setup_fall, dw),
+            PinRole::We    => eval_7x7(&self.we_setup_fall, dw),
+            PinRole::Rstb  => eval_7x7(&self.rstb_setup_fall, dw),
+        }
+    }
+
+    fn cell_rise(&self, p: &SramParams) -> [[f64; 7]; 7] {
+        eval_7x7(&self.cell_rise, p.data_width() as f64)
+    }
+    fn cell_fall(&self, p: &SramParams) -> [[f64; 7]; 7] {
+        eval_7x7(&self.cell_fall, p.data_width() as f64)
+    }
+    fn rise_transition(&self, p: &SramParams) -> [[f64; 7]; 7] {
+        eval_7x7(&self.rise_transition, p.data_width() as f64)
+    }
+    fn fall_transition(&self, p: &SramParams) -> [[f64; 7]; 7] {
+        eval_7x7(&self.fall_transition, p.data_width() as f64)
+    }
+
+    fn minimum_period(&self, p: &SramParams) -> [f64; 7] {
+        let dw = p.data_width() as f64;
+        let snaps = &self.min_period;
+        let n = snaps.len();
+        if n == 0 {
+            return [0.0; 7];
+        }
+        let i = snaps.partition_point(|(d, _)| (*d as f64) <= dw);
+        if i == 0 {
+            return snaps[0].1;
+        }
+        if i >= n {
+            return snaps[n - 1].1;
+        }
+        let (x0, y0) = snaps[i - 1];
+        let (x1, y1) = snaps[i];
+        let t = (dw.ln() - (x0 as f64).ln()) / ((x1 as f64).ln() - (x0 as f64).ln());
+        std::array::from_fn(|j| y0[j] + t * (y1[j] - y0[j]))
+    }
+
+    fn min_pulse_width(&self, p: &SramParams) -> ([f64; 7], [f64; 7]) {
+        let dw = p.data_width() as f64;
+        let rise = std::array::from_fn(|j| self.mpw_rise[j].eval(dw));
+        let fall = std::array::from_fn(|j| self.mpw_fall[j].eval(dw));
+        (rise, fall)
+    }
+
+    fn input_cap(&self, _: &SramParams, pin: PinRole) -> CapValues {
+        let cap = match pin {
+            PinRole::Clk   => self.clk_cap,
+            PinRole::Addr  => self.addr_cap,
+            PinRole::Din   => self.din_cap,
+            PinRole::Ce    => self.ce_cap,
+            PinRole::We    => self.we_cap,
+            PinRole::Rstb  => self.rstb_cap,
+            PinRole::Wmask => self.wmask_cap,
+        };
+        CapValues { cap, rise: cap, fall: cap, rise_lo: 0.0, fall_lo: 0.0 }
+    }
+
+    fn output_max_cap(&self, _: &SramParams) -> f64 { 0.52 }
+    fn receiver_cap_1_rise(&self, _: &SramParams, _: PinRole) -> [f64; 7] { [0.0; 7] }
+    fn receiver_cap_2_rise(&self, _: &SramParams, _: PinRole) -> [f64; 7] { [0.0; 7] }
+    fn receiver_cap_1_fall(&self, _: &SramParams, _: PinRole) -> [f64; 7] { [0.0; 7] }
+    fn receiver_cap_2_fall(&self, _: &SramParams, _: PinRole) -> [f64; 7] { [0.0; 7] }
+
+    fn ccs_rise(&self, _: &SramParams) -> Vec<CcsVector> { vec![] }
+    fn ccs_fall(&self, _: &SramParams) -> Vec<CcsVector> { vec![] }
+    fn clk_power_rise(&self, _: &SramParams, _: &str) -> [f64; 7] { [0.0; 7] }
+    fn clk_power_fall(&self, _: &SramParams, _: &str) -> [f64; 7] { [0.0; 7] }
+}
+
+// ── PUBLIC ENTRY POINT ────────────────────────────────────────────────────────
+
+/// Mirrors `liberate_mx::LibParams` as a single parameter bundle.
+pub struct LibGenParams<'a> {
+    pub sram: &'a SramParams,
+    pub pvt: PvtCorner,
+    pub model: &'a dyn TimingModel,
+    pub output: PathBuf,
+}
+
+/// Mirrors `liberate_mx::generate_sram_lib` — writes a `.lib` file and returns its path.
+pub fn generate_sram_lib(params: &LibGenParams) -> Result<PathBuf> {
+    let content = write_liberty(params.sram, &params.pvt, params.model);
+    if let Some(parent) = params.output.parent() {
+        std::fs::create_dir_all(parent)?;
+    }
+    std::fs::write(&params.output, content)?;
+    Ok(params.output.clone())
+}
+
+// ── WRITER ────────────────────────────────────────────────────────────────────
+
+struct W {
+    buf: String,
+    indent: usize,
+}
+
+impl W {
+    fn new() -> Self {
+        Self { buf: String::new(), indent: 0 }
+    }
+
+    fn ln(&mut self, s: &str) {
+        for _ in 0..self.indent {
+            self.buf.push_str("  ");
+        }
+        self.buf.push_str(s);
+        self.buf.push('\n');
+    }
+
+    fn block(&mut self, header: &str, f: impl FnOnce(&mut Self)) {
+        self.ln(&format!("{} {{", header));
+        self.indent += 1;
+        f(self);
+        self.indent -= 1;
+        self.ln("}");
+    }
+
+    fn attr(&mut self, k: &str, v: &str) {
+        self.ln(&format!("{} : {};", k, v));
+    }
+
+    fn attr_q(&mut self, k: &str, v: &str) {
+        self.ln(&format!("{} : \"{}\";", k, v));
+    }
+
+    fn attr_f(&mut self, k: &str, v: f64) {
+        self.ln(&format!("{} : {};", k, fmtf(v)));
+    }
+
+    fn lut_2d(&mut self, name: &str, tmpl: &str, idx1: &[f64; 7], idx2: &[f64; 7], rows: &[[f64; 7]; 7]) {
+        self.block(&format!("{} ({})", name, tmpl), |w| {
+            w.ln(&format!("index_1 (\"{}\");", fmt_idx(idx1)));
+            w.ln(&format!("index_2 (\"{}\");", fmt_idx(idx2)));
+            w.ln("values ( \\");
+            w.indent += 1;
+            for (i, row) in rows.iter().enumerate() {
+                let vals: Vec<String> = row.iter().map(|v| fmtf(*v)).collect();
+                let trail = if i < 6 { " \\" } else { "" };
+                w.ln(&format!("\"{}\"{}",  vals.join(", "), trail));
+            }
+            w.indent -= 1;
+            w.ln(");");
+        });
+    }
+
+    fn lut_1d(&mut self, name: &str, tmpl: &str, idx1: &[f64; 7], values: &[f64; 7]) {
+        self.block(&format!("{} ({})", name, tmpl), |w| {
+            w.ln(&format!("index_1 (\"{}\");", fmt_idx(idx1)));
+            w.ln("values ( \\");
+            w.indent += 1;
+            let vals: Vec<String> = values.iter().map(|v| fmtf(*v)).collect();
+            w.ln(&format!("\"{}\" \\", vals.join(", ")));
+            w.indent -= 1;
+            w.ln(");");
+        });
+    }
+
+    fn receiver_cap(&mut self, p: &SramParams, m: &dyn TimingModel, pin: PinRole) {
+        let r1r = m.receiver_cap_1_rise(p, pin);
+        let r2r = m.receiver_cap_2_rise(p, pin);
+        let r1f = m.receiver_cap_1_fall(p, pin);
+        let r2f = m.receiver_cap_2_fall(p, pin);
+        self.block("receiver_capacitance ()", |w| {
+            w.lut_1d("receiver_capacitance1_rise", "receiver_cap_power_template_7x7", &SLEW_IDX, &r1r);
+            w.lut_1d("receiver_capacitance2_rise", "receiver_cap_power_template_7x7", &SLEW_IDX, &r2r);
+            w.lut_1d("receiver_capacitance1_fall", "receiver_cap_power_template_7x7", &SLEW_IDX, &r1f);
+            w.lut_1d("receiver_capacitance2_fall", "receiver_cap_power_template_7x7", &SLEW_IDX, &r2f);
+        });
+    }
+
+    fn constraint_timing(&mut self, p: &SramParams, m: &dyn TimingModel, pin: PinRole, ttype: &str) {
+        let (rise, fall) = if ttype == "hold_rising" {
+            (m.hold_rise(p, pin), m.hold_fall(p, pin))
+        } else {
+            (m.setup_rise(p, pin), m.setup_fall(p, pin))
+        };
+        self.block("timing ()", |w| {
+            w.attr_q("related_pin", "clk");
+            w.attr("sdf_edges", "both_edges");
+            w.attr("timing_type", ttype);
+            w.lut_2d("rise_constraint", "constraint_template_7x7", &SLEW_IDX, &SLEW_IDX, &rise);
+            w.lut_2d("fall_constraint", "constraint_template_7x7", &SLEW_IDX, &SLEW_IDX, &fall);
+        });
+    }
+
+    fn input_pin_attrs(&mut self, cap: &CapValues) {
+        self.attr("related_ground_pin", "vss");
+        self.attr("related_power_pin", "vdd");
+        self.attr_f("max_transition", 0.351);
+        self.attr_f("capacitance", cap.cap);
+        self.attr_f("rise_capacitance", cap.rise);
+        self.ln(&format!("rise_capacitance_range ({}, {});", fmtf(cap.rise_lo), fmtf(cap.rise)));
+        self.attr_f("fall_capacitance", cap.fall);
+        self.ln(&format!("fall_capacitance_range ({}, {});", fmtf(cap.fall_lo), fmtf(cap.fall)));
+    }
+
+    fn ccs_arcs(&mut self, rise_or_fall: &str, vecs: &[CcsVector]) {
+        self.block(&format!("output_current_{} ()", rise_or_fall), |w| {
+            for vec in vecs {
+                w.block("vector (ccs_template)", |w| {
+                    w.attr_f("reference_time", vec.reference_time);
+                    w.ln(&format!("index_1 (\"{}\");", fmtf(vec.slew)));
+                    w.ln(&format!("index_2 (\"{}\");", fmtf(vec.load)));
+                    let tpts: Vec<String> = vec.time_pts.iter().map(|v| fmtf(*v)).collect();
+                    w.ln(&format!("index_3 (\"{}\");", tpts.join(", ")));
+                    let curr: Vec<String> = vec.currents.iter().map(|v| fmtf(*v)).collect();
+                    w.ln(&format!("values ( \\"));
+                    w.indent += 1;
+                    w.ln(&format!("\"{}\" \\", curr.join(", ")));
+                    w.indent -= 1;
+                    w.ln(");");
+                });
+            }
+        });
+    }
+}
+
+// ── HELPERS ───────────────────────────────────────────────────────────────────
+
+fn fmtf(v: f64) -> String {
+    if v == 0.0 { return "0".to_string(); }
+    if v.fract() == 0.0 && v.abs() < 1e10 {
+        return format!("{}", v as i64);
+    }
+    let s = format!("{:.7}", v);
+    let s = s.trim_end_matches('0');
+    s.trim_end_matches('.').to_string()
+}
+
+fn fmt_idx(idx: &[f64; 7]) -> String {
+    idx.iter().map(|v| fmtf(*v)).collect::<Vec<_>>().join(", ")
+}
+
+/// 1.95 → "1P95", 1.8 → "1P8", 1.6 → "1P6"
+fn fmt_voltage_oc(v: f64) -> String {
+    let s = format!("{:.2}", v);
+    let (int, dec) = s.split_once('.').unwrap();
+    let dec = dec.trim_end_matches('0');
+    if dec.is_empty() { format!("{}P", int) } else { format!("{}P{}", int, dec) }
+}
+
+fn write_bus_type(w: &mut W, cell: &str, signal: &str, hi: usize, lo: usize) {
+    let name = format!("bus_{}_{}_{}_{}", cell, signal, hi, lo);
+    w.block(&format!("type ({})", name), |w| {
+        w.attr("base_type", "array");
+        w.attr("data_type", "bit");
+        w.attr("bit_width", &(hi - lo + 1).to_string());
+        w.attr("bit_from", &hi.to_string());
+        w.attr("bit_to", &lo.to_string());
+        w.attr("downto", "true");
+    });
+}
+
+fn write_lu_template(w: &mut W, name: &str, var1: &str, var2: Option<&str>, idx1: &[f64; 7], idx2: Option<&[f64; 7]>) {
+    w.block(&format!("lu_table_template ({})", name), |w| {
+        w.attr("variable_1", var1);
+        if let Some(v2) = var2 { w.attr("variable_2", v2); }
+        w.ln(&format!("index_1 (\"{}\");", fmt_idx(idx1)));
+        if let Some(i2) = idx2 { w.ln(&format!("index_2 (\"{}\");", fmt_idx(i2))); }
+    });
+}
+
+fn write_power_template(w: &mut W, name: &str, var1: &str, var2: Option<&str>, idx1: &[f64; 7], idx2: Option<&[f64; 7]>) {
+    w.block(&format!("power_lut_template ({})", name), |w| {
+        w.attr("variable_1", var1);
+        if let Some(v2) = var2 { w.attr("variable_2", v2); }
+        w.ln(&format!("index_1 (\"{}\");", fmt_idx(idx1)));
+        if let Some(i2) = idx2 { w.ln(&format!("index_2 (\"{}\");", fmt_idx(i2))); }
+    });
+}
+
+fn write_control_pin(w: &mut W, p: &SramParams, m: &dyn TimingModel, name: &str, role: PinRole) {
+    let cap = m.input_cap(p, role);
+    w.block(&format!("pin ({})", name), |w| {
+        w.attr("direction", "input");
+        w.input_pin_attrs(&cap);
+        w.constraint_timing(p, m, role, "hold_rising");
+        w.constraint_timing(p, m, role, "setup_rising");
+        w.receiver_cap(p, m, role);
+    });
+}
+
+// ── TOP-LEVEL LIBERTY SERIALIZER ──────────────────────────────────────────────
+
+fn write_liberty(p: &SramParams, pvt: &PvtCorner, m: &dyn TimingModel) -> String {
+    let mut w = W::new();
+    let cell_name = p.name();
+    let cell = cell_name.as_str();
+    let oc = pvt.oc_name();
+    let addr_hi = p.addr_width() - 1;
+    let data_hi = p.data_width() - 1;
+    let wmask_width = p.wmask_width();
+
+    w.block(&format!("library ({})", cell), |w| {
+        // Library-level scalar attributes (order matches Liberate MX output)
+        w.ln("/* Generated by sram22 open-source lib generator */");
+        w.attr("delay_model", "table_lookup");
+        w.attr_q("comment", "");
+        w.attr_q("revision", "1.0");
+        w.ln("capacitive_load_unit (1,pf);");
+        w.attr_q("current_unit", "1mA");
+        w.attr_q("leakage_power_unit", "1nW");
+        w.attr_q("pulling_resistance_unit", "1kohm");
+        w.attr_q("time_unit", "1ns");
+        w.attr_q("voltage_unit", "1V");
+        w.attr("default_cell_leakage_power", "0");
+        w.attr("default_fanout_load", "1");
+        w.attr("default_inout_pin_cap", "0.005");
+        w.attr("default_input_pin_cap", "0.005");
+        w.attr("default_leakage_power_density", "0");
+        w.attr("default_max_transition", "0.04");
+        w.attr("default_output_pin_cap", "0");
+        w.attr("in_place_swap_mode", "match_footprint");
+        w.attr("input_threshold_pct_fall", "50");
+        w.attr("input_threshold_pct_rise", "50");
+        w.attr_f("nom_process", pvt.process);
+        w.attr_f("nom_temperature", pvt.temperature);
+        w.attr_f("nom_voltage", pvt.voltage);
+        w.attr("output_threshold_pct_fall", "50");
+        w.attr("output_threshold_pct_rise", "50");
+        w.attr("slew_derate_from_library", "1");
+        w.attr("slew_lower_threshold_pct_fall", "10");
+        w.attr("slew_lower_threshold_pct_rise", "10");
+        w.attr("slew_upper_threshold_pct_fall", "90");
+        w.attr("slew_upper_threshold_pct_rise", "90");
+        w.ln(&format!("voltage_map (vdd, {});", fmtf(pvt.voltage)));
+        w.ln("voltage_map (vss, 0);");
+        w.ln("voltage_map (GND, 0);");
+
+        // Operating conditions
+        w.block(&format!("operating_conditions ({})", oc), |w| {
+            w.attr_f("process", pvt.process);
+            w.attr_f("temperature", pvt.temperature);
+            w.attr_f("voltage", pvt.voltage);
+        });
+        w.attr_q("default_operating_conditions", &oc);
+        w.attr_q("bus_naming_style", "%s[%d]");
+
+        // Bus type definitions
+        if wmask_width > 1 {
+            write_bus_type(w, cell, "wmask", wmask_width - 1, 0);
+        }
+        write_bus_type(w, cell, "addr", addr_hi, 0);
+        write_bus_type(w, cell, "din", data_hi, 0);
+        write_bus_type(w, cell, "dout", data_hi, 0);
+
+        // Lookup table templates
+        w.block("output_current_template (ccs_template)", |w| {
+            w.attr("variable_1", "input_net_transition");
+            w.attr("variable_2", "total_output_net_capacitance");
+            w.attr("variable_3", "time");
+        });
+        write_lu_template(w, "constraint_template_7x7",
+            "constrained_pin_transition", Some("related_pin_transition"),
+            &SLEW_IDX, Some(&SLEW_IDX));
+        write_lu_template(w, "delay_template_7x7",
+            "input_net_transition", Some("total_output_net_capacitance"),
+            &SLEW_IDX, Some(&LOAD_IDX));
+        write_lu_template(w, "mpw_constraint_template_7x7",
+            "constrained_pin_transition", None,
+            &SLEW_IDX, None);
+        write_power_template(w, "passive_output_power_template_7x1",
+            "total_output_net_capacitance", None,
+            &PWR_IDX, None);
+        write_power_template(w, "passive_power_template_7x1",
+            "input_transition_time", None,
+            &SLEW_IDX, None);
+        write_power_template(w, "power_template_7x7",
+            "input_transition_time", Some("total_output_net_capacitance"),
+            &SLEW_IDX, Some(&PWR_IDX));
+        write_lu_template(w, "receiver_cap_power_template_7x7",
+            "input_net_transition", None,
+            &SLEW_IDX, None);
+
+        w.ln("define (char_when, receiver_capacitance, string);");
+        w.ln("define (is_propagating, receiver_capacitance, string);");
+
+        // ── Cell ─────────────────────────────────────────────────────────────
+        w.block(&format!("cell ({})", cell), |w| {
+            w.attr_f("area", m.area(p));
+            w.attr("cell_leakage_power", "0");
+            w.attr("dont_touch", "true");
+            w.attr("dont_use", "true");
+            w.attr("interface_timing", "true");
+            w.attr("is_macro_cell", "true");
+
+            w.block("pg_pin (vdd)", |w| {
+                w.attr("direction", "inout");
+                w.attr("pg_type", "primary_power");
+                w.attr_q("voltage_name", "vdd");
+            });
+            w.block("pg_pin (vss)", |w| {
+                w.attr("direction", "inout");
+                w.attr("pg_type", "primary_ground");
+                w.attr_q("voltage_name", "vss");
+            });
+            w.block("memory ()", |w| {
+                w.attr("address_width", &p.addr_width().to_string());
+                w.attr("type", "ram");
+                w.attr("word_width", &p.data_width().to_string());
+            });
+
+            // bus(addr)
+            let addr_bus_type = format!("bus_{}_addr_{}_{}", cell, addr_hi, 0);
+            let small_cap = m.input_cap(p, PinRole::Addr);
+            w.block("bus (addr)", |w| {
+                w.attr_q("bus_type", &addr_bus_type);
+                w.attr("direction", "input");
+                for bit in (0..=addr_hi).rev() {
+                    w.block(&format!("pin (addr[{}])", bit), |w| {
+                        w.input_pin_attrs(&small_cap);
+                    });
+                }
+                w.constraint_timing(p, m, PinRole::Addr, "hold_rising");
+                w.constraint_timing(p, m, PinRole::Addr, "setup_rising");
+                w.receiver_cap(p, m, PinRole::Addr);
+            });
+
+            // pin(ce)
+            write_control_pin(w, p, m, "ce", PinRole::Ce);
+
+            // pin(clk)  — clock : true, larger capacitance
+            let clk_cap = m.input_cap(p, PinRole::Clk);
+            let (mpw_rise, mpw_fall) = m.min_pulse_width(p);
+            let min_period = m.minimum_period(p);
+            let when_conds: &[(&str, &str)] = &[
+                ("we&ce",   "vdd"),
+                ("we&ce",   "vss"),
+                ("we&!ce",  "vdd"),
+                ("we&!ce",  "vss"),
+                ("!we&ce",  "vdd"),
+                ("!we&ce",  "vss"),
+                ("!we&!ce", "vdd"),
+                ("!we&!ce", "vss"),
+            ];
+            w.block("pin (clk)", |w| {
+                w.attr("clock", "true");
+                w.attr("direction", "input");
+                w.attr("related_ground_pin", "vss");
+                w.attr("related_power_pin", "vdd");
+                w.attr_f("max_transition", 0.351);
+                w.attr_f("capacitance", clk_cap.cap);
+                w.attr_f("rise_capacitance", clk_cap.rise);
+                w.ln(&format!("rise_capacitance_range ({}, {});", fmtf(clk_cap.rise_lo), fmtf(clk_cap.rise)));
+                w.attr_f("fall_capacitance", clk_cap.fall);
+                w.ln(&format!("fall_capacitance_range ({}, {});", fmtf(clk_cap.fall_lo), fmtf(clk_cap.fall)));
+                w.block("timing ()", |w| {
+                    w.attr_q("related_pin", "clk");
+                    w.attr("timing_type", "min_pulse_width");
+                    w.lut_1d("rise_constraint", "mpw_constraint_template_7x7", &SLEW_IDX, &mpw_rise);
+                    w.lut_1d("fall_constraint", "mpw_constraint_template_7x7", &SLEW_IDX, &mpw_fall);
+                });
+                w.block("timing ()", |w| {
+                    w.attr_q("related_pin", "clk");
+                    w.attr("timing_type", "minimum_period");
+                    w.lut_1d("rise_constraint", "mpw_constraint_template_7x7", &SLEW_IDX, &min_period);
+                    w.lut_1d("fall_constraint", "mpw_constraint_template_7x7", &SLEW_IDX, &min_period);
+                });
+                for &(when, pg) in when_conds {
+                    let rise_pwr = m.clk_power_rise(p, when);
+                    let fall_pwr = m.clk_power_fall(p, when);
+                    w.block("internal_power ()", |w| {
+                        w.attr_q("when", when);
+                        w.attr_q("related_pg_pin", pg);
+                        w.lut_1d("rise_power", "passive_power_template_7x1", &SLEW_IDX, &rise_pwr);
+                        w.lut_1d("fall_power", "passive_power_template_7x1", &SLEW_IDX, &fall_pwr);
+                    });
+                }
+            });
+
+            // bus(din)
+            let din_bus_type = format!("bus_{}_din_{}_{}", cell, data_hi, 0);
+            let din_cap = m.input_cap(p, PinRole::Din);
+            w.block("bus (din)", |w| {
+                w.attr_q("bus_type", &din_bus_type);
+                w.attr("direction", "input");
+                for bit in (0..=data_hi).rev() {
+                    w.block(&format!("pin (din[{}])", bit), |w| {
+                        w.input_pin_attrs(&din_cap);
+                    });
+                }
+                w.constraint_timing(p, m, PinRole::Din, "hold_rising");
+                w.constraint_timing(p, m, PinRole::Din, "setup_rising");
+                w.receiver_cap(p, m, PinRole::Din);
+            });
+
+            // bus(dout) — timing at bus level, not per-pin
+            let dout_bus_type = format!("bus_{}_dout_{}_{}", cell, data_hi, 0);
+            let cell_r = m.cell_rise(p);
+            let cell_f = m.cell_fall(p);
+            let rise_tr = m.rise_transition(p);
+            let fall_tr = m.fall_transition(p);
+            let ccs_r = m.ccs_rise(p);
+            let ccs_f = m.ccs_fall(p);
+            let out_max_cap = m.output_max_cap(p);
+            w.block("bus (dout)", |w| {
+                w.attr_q("bus_type", &dout_bus_type);
+                w.attr("direction", "output");
+                for bit in (0..=data_hi).rev() {
+                    w.block(&format!("pin (dout[{}])", bit), |w| {
+                        w.attr_q("power_down_function", "(!vdd) + (vss)");
+                        w.attr("related_ground_pin", "vss");
+                        w.attr("related_power_pin", "vdd");
+                        w.attr_f("max_capacitance", out_max_cap);
+                    });
+                }
+                w.block("timing ()", |w| {
+                    w.attr_q("related_pin", "clk");
+                    w.attr_q("sdf_cond", "ce == 1'b1");
+                    w.attr("timing_sense", "non_unate");
+                    w.attr("timing_type", "rising_edge");
+                    w.attr_q("when", "ce");
+                    w.lut_2d("cell_rise", "delay_template_7x7", &SLEW_IDX, &LOAD_IDX, &cell_r);
+                    w.lut_2d("rise_transition", "delay_template_7x7", &SLEW_IDX, &LOAD_IDX, &rise_tr);
+                    w.lut_2d("cell_fall", "delay_template_7x7", &SLEW_IDX, &LOAD_IDX, &cell_f);
+                    w.lut_2d("fall_transition", "delay_template_7x7", &SLEW_IDX, &LOAD_IDX, &fall_tr);
+                    if !ccs_r.is_empty() { w.ccs_arcs("rise", &ccs_r); }
+                    if !ccs_f.is_empty() { w.ccs_arcs("fall", &ccs_f); }
+                });
+            });
+
+            // pin(rstb)
+            write_control_pin(w, p, m, "rstb", PinRole::Rstb);
+
+            // pin(we)
+            write_control_pin(w, p, m, "we", PinRole::We);
+
+            // bus(wmask) — 2-bit bus or scalar pin depending on wmask_width
+            if wmask_width > 1 {
+                let wmask_bus_type = format!("bus_{}_wmask_{}_{}", cell, wmask_width - 1, 0);
+                let wmask_cap = m.input_cap(p, PinRole::Wmask);
+                w.block("bus (wmask)", |w| {
+                    w.attr_q("bus_type", &wmask_bus_type);
+                    w.attr("direction", "input");
+                    for bit in (0..wmask_width).rev() {
+                        w.block(&format!("pin (wmask[{}])", bit), |w| {
+                            w.input_pin_attrs(&wmask_cap);
+                        });
+                    }
+                    w.constraint_timing(p, m, PinRole::Wmask, "hold_rising");
+                    w.constraint_timing(p, m, PinRole::Wmask, "setup_rising");
+                    w.receiver_cap(p, m, PinRole::Wmask);
+                });
+            } else {
+                write_control_pin(w, p, m, "wmask", PinRole::Wmask);
+            }
+        });
+    });
+
+    w.buf
+}
diff --git a/src/paths.rs b/src/paths.rs
index 94bac6ec..341977c2 100644
--- a/src/paths.rs
+++ b/src/paths.rs
@@ -20,7 +20,6 @@ pub fn out_lef(work_dir: impl AsRef<Path>, name: &str) -> PathBuf {
     PathBuf::from(work_dir.as_ref()).join(format!("{name}.lef"))
 }
 
-#[cfg(feature = "commercial")]
 pub fn out_lib(work_dir: impl AsRef<Path>, name: &str) -> PathBuf {
     PathBuf::from(work_dir.as_ref()).join(format!("{name}.lib"))
 }
diff --git a/src/plan/mod.rs b/src/plan/mod.rs
index 5f306744..a555ea35 100644
--- a/src/plan/mod.rs
+++ b/src/plan/mod.rs
@@ -6,10 +6,41 @@ use crate::{setup_ctx, Result};
 use anyhow::bail;
 use std::collections::HashSet;
 use std::path::Path;
+use std::sync::Arc;
+#[cfg(feature = "commercial")]
+use std::sync::Mutex;
+
+/// Serializes PEX extraction and Liberate MX characterization across
+/// concurrently-building SRAM configurations, so at most one configuration's
+/// heavy backend work is in flight at a time. PEX (Calibre) is memory/CPU-
+/// heavy per run — running it for many configurations at once can crash the
+/// server. Liberate MX is additionally license-gated (3 licenses per
+/// configuration, one per corner). Configurations that only run the
+/// open-source interpolation model skip this slot and stay concurrent.
+#[cfg(feature = "commercial")]
+static HEAVY_BACKEND_SLOT: Mutex<()> = Mutex::new(());
+
+/// Embedded timing characterization data indexed by (num_words, mux_ratio, write_size).
+/// Each entry corresponds to `timingdata/{num_words}m{mux_ratio}w{write_size}.json`.
+/// Add a new row here when a new characterization dataset is available.
+static TIMING_DATA: &[(usize, usize, usize, &[u8])] = &[
+    (64,   4, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/64m4w8.json"))),
+    (128,  4, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/128m4w8.json"))),
+    (128,  8, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/128m8w8.json"))),
+    (256,  4, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/256m4w8.json"))),
+    (256,  8, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/256m8w8.json"))),
+    (512,  4, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/512m4w8.json"))),
+    (512,  8, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/512m8w8.json"))),
+    (1024, 4, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/1024m4w8.json"))),
+    (1024, 8, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/1024m8w8.json"))),
+    (2048, 4, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/2048m4w8.json"))),
+    (2048, 8, 8, include_bytes!(concat!(env!("CARGO_MANIFEST_DIR"), "/timingdata/2048m8w8.json"))),
+];
 
 /// A concrete plan for an SRAM.
 ///
 /// Has a 1-1 mapping with a schematic.
+#[derive(Clone)]
 pub struct SramPlan {
     pub sram_params: SramParams,
 }
@@ -27,7 +58,6 @@ pub enum TaskKey {
     RunLvs,
     #[cfg(feature = "commercial")]
     RunPex,
-    #[cfg(feature = "commercial")]
     GenerateLib,
     #[cfg(feature = "commercial")]
     All,
@@ -36,10 +66,14 @@ pub enum TaskKey {
 pub struct ExecutePlanParams<'a> {
     pub work_dir: &'a Path,
     pub plan: &'a SramPlan,
-    pub tasks: &'a HashSet<TaskKey>,
+    pub tasks: Arc<HashSet<TaskKey>>,
     pub ctx: Option<&'a mut StepContext>,
     #[cfg(feature = "commercial")]
     pub pex_level: Option<calibre::pex::PexLevel>,
+    /// When true, generate the LIB with Liberate MX; otherwise use the
+    /// open-source interpolation model. Set by `--liberate`/`--all`.
+    #[cfg(feature = "commercial")]
+    pub use_liberate: bool,
 }
 
 pub fn generate_plan(config: &SramConfig) -> Result<SramPlan> {
@@ -170,51 +204,52 @@ pub fn execute_plan(params: ExecutePlanParams) -> Result<()> {
             ctx
         );
 
-        if params.pex_level.is_none() && params.tasks.contains(&TaskKey::RunPex) {
-            bail!("Must specify a PEX level when running PEX");
-        }
         let pex_dir = work_dir.join("pex");
         let pex_source_path = out_spice(&pex_dir, "schematic");
         let pex_out_path = out_spice(&pex_dir, "schematic.pex");
 
-        try_execute_task!(
-            params.tasks,
-            TaskKey::RunPex,
-            {
-                sctx.write_schematic_to_file_for_purpose::<Sram>(
-                    &plan.sram_params,
-                    &pex_source_path,
-                    NetlistPurpose::Pex,
-                )?;
-                let mut opts = HashMap::with_capacity(1);
-                opts.insert("level".into(), params.pex_level.unwrap().as_str().into());
-
-                sctx.run_pex(PexInput {
-                    work_dir: pex_dir,
-                    layout_path: gds_path,
-                    layout_cell_name: name.clone(),
-                    layout_format: substrate::layout::LayoutFormat::Gds,
-                    source_paths: vec![pex_source_path],
-                    source_cell_name: name.clone(),
-                    pex_netlist_path: pex_out_path.clone(),
-                    opts,
-                    ground_net: "vss".to_string(),
-                })?;
-            },
-            ctx
-        );
+        // Held while PEX and/or Liberate MX run, so a given SRAM's heavy-backend
+        // work completes atomically before the next SRAM's begins. Lightweight
+        // runs (interpolation only, no PEX) skip the slot and stay concurrent.
+        let _heavy_backend_slot = if params.pex_level.is_some() || params.use_liberate {
+            Some(HEAVY_BACKEND_SLOT.lock().unwrap_or_else(std::sync::PoisonError::into_inner))
+        } else {
+            None
+        };
 
-        let sram_params = plan.sram_params.clone();
-        try_execute_task!(
-            params.tasks,
-            TaskKey::GenerateLib,
-            {
+        if params.pex_level.is_some() {
+            sctx.write_schematic_to_file_for_purpose::<Sram>(
+                &plan.sram_params,
+                &pex_source_path,
+                NetlistPurpose::Pex,
+            )?;
+            let mut opts = HashMap::with_capacity(1);
+            opts.insert("level".into(), params.pex_level.unwrap().as_str().into());
+            sctx.run_pex(PexInput {
+                work_dir: pex_dir,
+                layout_path: gds_path,
+                layout_cell_name: name.clone(),
+                layout_format: substrate::layout::LayoutFormat::Gds,
+                source_paths: vec![pex_source_path],
+                source_cell_name: name.clone(),
+                pex_netlist_path: pex_out_path.clone(),
+                opts,
+                ground_net: "vss".to_string(),
+            })?;
+            if !pex_out_path.exists() {
+                bail!("PEX failed: no output netlist produced at {:?}", pex_out_path);
+            }
+            try_finish_task!(ctx, TaskKey::RunPex);
+        }
+
+        if params.tasks.contains(&TaskKey::GenerateLib) {
+            // Default to the open-source interpolation model; only invoke
+            // Liberate MX when --liberate/--all was passed.
+            if params.use_liberate {
                 use substrate::schematic::netlist::NetlistPurpose;
 
+                let sram_params = plan.sram_params.clone();
                 let source_path = if params.pex_level.is_some() {
-                    if !pex_out_path.exists() {
-                        bail!("PEX netlist not found at path `{:?}`", pex_out_path);
-                    }
                     pex_out_path
                 } else {
                     let timing_spice_path = out_spice(work_dir, "timing_schematic");
@@ -227,13 +262,14 @@ pub fn execute_plan(params: ExecutePlanParams) -> Result<()> {
                     timing_spice_path
                 };
 
-                let mut handles = Vec::new();
                 let sram = sctx
                     .instantiate_layout::<Sram>(&sram_params)
                     .expect("failed to generate layout");
                 let brect = sram.brect();
                 let width = Decimal::new(brect.width(), 3);
                 let height = Decimal::new(brect.height(), 3);
+
+                let mut handles = Vec::new();
                 for (corner, temp, vdd) in [
                     ("tt", 25, dec!(1.8)),
                     ("ss", 100, dec!(1.6)),
@@ -279,9 +315,55 @@ pub fn execute_plan(params: ExecutePlanParams) -> Result<()> {
                     .into_iter()
                     .collect::<Result<Vec<_>, _>>()
                     .expect("failed to join threads");
-            },
-            ctx
+            } else {
+                generate_interpolated_lib(work_dir, &plan.sram_params)?;
+            }
+            try_finish_task!(ctx, TaskKey::GenerateLib);
+        }
+    }
+
+    #[cfg(not(feature = "commercial"))]
+    if params.tasks.contains(&TaskKey::GenerateLib) {
+        generate_interpolated_lib(work_dir, &plan.sram_params)?;
+        try_finish_task!(ctx, TaskKey::GenerateLib);
+    }
+
+    Ok(())
+}
+
+/// Generate LIB timing files for all PVT corners using the open-source
+/// interpolation model. This is the default LIB path in every build; a
+/// commercial build only skips it when `--liberate` selects Liberate MX.
+fn generate_interpolated_lib(work_dir: &Path, sram_params: &SramParams) -> Result<()> {
+    use crate::lib_gen::{LibGenParams, LookupModel, PvtCorner};
+    if sram_params.data_width() > 128 {
+        anyhow::bail!(
+            "open-source lib generation requires data_width ≤ 128 (got {})",
+            sram_params.data_width()
         );
     }
+    let nw = sram_params.num_words();
+    let mx = sram_params.mux_ratio();
+    let ws = sram_params.wmask_granularity();
+    let json_bytes: &[u8] = TIMING_DATA.iter()
+        .find(|(n, m, w, _)| *n == nw && *m == mx && *w == ws)
+        .map(|(_, _, _, b)| *b)
+        .ok_or_else(|| anyhow::anyhow!(
+            "no timing data for {}m{}w{} — add timingdata/{}m{}w{}.json to the repo",
+            nw, mx, ws, nw, mx, ws
+        ))?;
+    let name = sram_params.name();
+    for pvt in [PvtCorner::tt(), PvtCorner::ss(), PvtCorner::ff()] {
+        let model = LookupModel::from_json(json_bytes, &pvt.name)?;
+        let suffix = pvt.file_suffix();
+        let lib_name = format!("{}_{}", name, suffix);
+        let lib_path = crate::paths::out_lib(work_dir, &lib_name);
+        crate::lib_gen::generate_sram_lib(&LibGenParams {
+            sram: sram_params,
+            pvt,
+            model: &model,
+            output: lib_path,
+        })?;
+    }
     Ok(())
 }
diff --git a/timingdata/1024m4w8.json b/timingdata/1024m4w8.json
new file mode 100644
index 00000000..81db9041
--- /dev/null
+++ b/timingdata/1024m4w8.json
@@ -0,0 +1,47978 @@
+{
+  "tt": {
+    "8": {
+      "clk_cap": 0.0545605,
+      "addr_cap": 0.00105054,
+      "din_cap": 0.00105054,
+      "ce_cap": 0.00105054,
+      "we_cap": 0.00105054,
+      "rstb_cap": 0.059838,
+      "wmask_cap": 0.00105054,
+      "cell_rise": [
+        [
+          2.15023,
+          2.16651,
+          2.21795,
+          2.29884,
+          2.46269,
+          2.79016,
+          3.44498
+        ],
+        [
+          2.15118,
+          2.16748,
+          2.21894,
+          2.29982,
+          2.46367,
+          2.79114,
+          3.44596
+        ],
+        [
+          2.15589,
+          2.17218,
+          2.22363,
+          2.30452,
+          2.46836,
+          2.79583,
+          3.45065
+        ],
+        [
+          2.16239,
+          2.17868,
+          2.23012,
+          2.31101,
+          2.47486,
+          2.80233,
+          3.45715
+        ],
+        [
+          2.16653,
+          2.18283,
+          2.23432,
+          2.31519,
+          2.47904,
+          2.80651,
+          3.46133
+        ],
+        [
+          2.16934,
+          2.18562,
+          2.23707,
+          2.31796,
+          2.48181,
+          2.80927,
+          3.4641
+        ],
+        [
+          2.17013,
+          2.18642,
+          2.23786,
+          2.31875,
+          2.4826,
+          2.81006,
+          3.46489
+        ]
+      ],
+      "cell_fall": [
+        [
+          2.18899,
+          2.20078,
+          2.2346,
+          2.28621,
+          2.39044,
+          2.59876,
+          3.01534
+        ],
+        [
+          2.18996,
+          2.20175,
+          2.23558,
+          2.28719,
+          2.39142,
+          2.59974,
+          3.01632
+        ],
+        [
+          2.19466,
+          2.20645,
+          2.24027,
+          2.29189,
+          2.39612,
+          2.60443,
+          3.02102
+        ],
+        [
+          2.20116,
+          2.21294,
+          2.24677,
+          2.29838,
+          2.40261,
+          2.61093,
+          3.02751
+        ],
+        [
+          2.20532,
+          2.2171,
+          2.25093,
+          2.30254,
+          2.40677,
+          2.61509,
+          3.03167
+        ],
+        [
+          2.2081,
+          2.21989,
+          2.25372,
+          2.30533,
+          2.40956,
+          2.61788,
+          3.03446
+        ],
+        [
+          2.20904,
+          2.22074,
+          2.25457,
+          2.30619,
+          2.41042,
+          2.61874,
+          3.03532
+        ]
+      ],
+      "rise_transition": [
+        [
+          0.050311,
+          0.081812,
+          0.188878,
+          0.362425,
+          0.716643,
+          1.42587,
+          2.84456
+        ],
+        [
+          0.050295,
+          0.081824,
+          0.188875,
+          0.362425,
+          0.716643,
+          1.42589,
+          2.84404
+        ],
+        [
+          0.050311,
+          0.081816,
+          0.188878,
+          0.362425,
+          0.716643,
+          1.42588,
+          2.84428
+        ],
+        [
+          0.050311,
+          0.081823,
+          0.188879,
+          0.362422,
+          0.716643,
+          1.42587,
+          2.84418
+        ],
+        [
+          0.050313,
+          0.081816,
+          0.18888,
+          0.362425,
+          0.716642,
+          1.42587,
+          2.84419
+        ],
+        [
+          0.050311,
+          0.081823,
+          0.188879,
+          0.362425,
+          0.716643,
+          1.42588,
+          2.84446
+        ],
+        [
+          0.05031,
+          0.081817,
+          0.188879,
+          0.362425,
+          0.716643,
+          1.42588,
+          2.84424
+        ]
+      ],
+      "fall_transition": [
+        [
+          0.032856,
+          0.049649,
+          0.106048,
+          0.198784,
+          0.390067,
+          0.774889,
+          1.54534
+        ],
+        [
+          0.032861,
+          0.049647,
+          0.106044,
+          0.198789,
+          0.390063,
+          0.774889,
+          1.54534
+        ],
+        [
+          0.032856,
+          0.049649,
+          0.106041,
+          0.198791,
+          0.390067,
+          0.774889,
+          1.54534
+        ],
+        [
+          0.032856,
+          0.049648,
+          0.106041,
+          0.198788,
+          0.390067,
+          0.774889,
+          1.54534
+        ],
+        [
+          0.032856,
+          0.049649,
+          0.106041,
+          0.198788,
+          0.390067,
+          0.774889,
+          1.54534
+        ],
+        [
+          0.032856,
+          0.049649,
+          0.106041,
+          0.198782,
+          0.390067,
+          0.774888,
+          1.54534
+        ],
+        [
+          0.032852,
+          0.049647,
+          0.106044,
+          0.198792,
+          0.390062,
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+}
\ No newline at end of file
diff --git a/timingdata/1024m8w8.json b/timingdata/1024m8w8.json
new file mode 100644
index 00000000..5d275dee
--- /dev/null
+++ b/timingdata/1024m8w8.json
@@ -0,0 +1,47978 @@
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+  }
+}
\ No newline at end of file
diff --git a/timingdata/128m4w8.json b/timingdata/128m4w8.json
new file mode 100644
index 00000000..22ef1225
--- /dev/null
+++ b/timingdata/128m4w8.json
@@ -0,0 +1,33587 @@
+{
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+      "num_words": 128,
+      "mux_ratio": 4,
+      "write_size": 8
+    }
+  }
+}
\ No newline at end of file
diff --git a/timingdata/128m8w8.json b/timingdata/128m8w8.json
new file mode 100644
index 00000000..1d4e2115
--- /dev/null
+++ b/timingdata/128m8w8.json
@@ -0,0 +1,33587 @@
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+    }
+  }
+}
\ No newline at end of file
diff --git a/timingdata/2048m4w8.json b/timingdata/2048m4w8.json
new file mode 100644
index 00000000..9ed84cb8
--- /dev/null
+++ b/timingdata/2048m4w8.json
@@ -0,0 +1,33587 @@
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+    }
+  }
+}
\ No newline at end of file
diff --git a/timingdata/2048m8w8.json b/timingdata/2048m8w8.json
new file mode 100644
index 00000000..bfc4c720
--- /dev/null
+++ b/timingdata/2048m8w8.json
@@ -0,0 +1,33587 @@
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+    }
+  }
+}
\ No newline at end of file
diff --git a/timingdata/256m4w8.json b/timingdata/256m4w8.json
new file mode 100644
index 00000000..50a1a908
--- /dev/null
+++ b/timingdata/256m4w8.json
@@ -0,0 +1,33587 @@
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+      "write_size": 8
+    }
+  }
+}
\ No newline at end of file
diff --git a/timingdata/256m8w8.json b/timingdata/256m8w8.json
new file mode 100644
index 00000000..3c26ce8e
--- /dev/null
+++ b/timingdata/256m8w8.json
@@ -0,0 +1,33587 @@
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+    }
+  }
+}
\ No newline at end of file
diff --git a/timingdata/512m4w8.json b/timingdata/512m4w8.json
new file mode 100644
index 00000000..ddc44094
--- /dev/null
+++ b/timingdata/512m4w8.json
@@ -0,0 +1,33587 @@
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+    }
+  }
+}
\ No newline at end of file
diff --git a/timingdata/512m8w8.json b/timingdata/512m8w8.json
new file mode 100644
index 00000000..5eb6a273
--- /dev/null
+++ b/timingdata/512m8w8.json
@@ -0,0 +1,33587 @@
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+    }
+  }
+}
\ No newline at end of file
diff --git a/timingdata/64m4w8.json b/timingdata/64m4w8.json
new file mode 100644
index 00000000..6336c10e
--- /dev/null
+++ b/timingdata/64m4w8.json
@@ -0,0 +1,33587 @@
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+          0.0592844,
+          0.0579532,
+          0.0604786,
+          0.066923,
+          0.0780572,
+          0.0937312
+        ],
+        [
+          0.0629997,
+          0.0619882,
+          0.060657,
+          0.0631824,
+          0.0696268,
+          0.080761,
+          0.096435
+        ],
+        [
+          0.0621547,
+          0.0611431,
+          0.059812,
+          0.0623374,
+          0.0687817,
+          0.0799159,
+          0.0955899
+        ]
+      ],
+      "din_setup_fall": [
+        [
+          0.0826904,
+          0.0816922,
+          0.080775,
+          0.0838086,
+          0.0907395,
+          0.102169,
+          0.118406
+        ],
+        [
+          0.0838796,
+          0.0828815,
+          0.0819642,
+          0.0849979,
+          0.0919288,
+          0.103359,
+          0.119596
+        ],
+        [
+          0.0894367,
+          0.0884385,
+          0.0875213,
+          0.0905549,
+          0.0974858,
+          0.108916,
+          0.125153
+        ],
+        [
+          0.102211,
+          0.101213,
+          0.100296,
+          0.10333,
+          0.110261,
+          0.12169,
+          0.137927
+        ],
+        [
+          0.121683,
+          0.120685,
+          0.119768,
+          0.122802,
+          0.129733,
+          0.141162,
+          0.157399
+        ],
+        [
+          0.148341,
+          0.147343,
+          0.146425,
+          0.149459,
+          0.15639,
+          0.16782,
+          0.184057
+        ],
+        [
+          0.179077,
+          0.178079,
+          0.177161,
+          0.180195,
+          0.187126,
+          0.198556,
+          0.214793
+        ]
+      ],
+      "ce_setup_rise": [
+        [
+          0.0439074,
+          0.0428959,
+          0.0415684,
+          0.04409,
+          0.0505341,
+          0.0616683,
+          0.0773422
+        ],
+        [
+          0.0447005,
+          0.043689,
+          0.0423616,
+          0.0448832,
+          0.0513273,
+          0.0624614,
+          0.0781354
+        ],
+        [
+          0.048383,
+          0.0473715,
+          0.0460441,
+          0.0485657,
+          0.0550098,
+          0.0661439,
+          0.0818179
+        ],
+        [
+          0.0548679,
+          0.0538564,
+          0.0525289,
+          0.0550506,
+          0.0614947,
+          0.0726288,
+          0.0883028
+        ],
+        [
+          0.0603033,
+          0.0592918,
+          0.0579643,
+          0.0604859,
+          0.0669301,
+          0.0780642,
+          0.0937382
+        ],
+        [
+          0.0630076,
+          0.0619961,
+          0.0606686,
+          0.0631903,
+          0.0696344,
+          0.0807685,
+          0.0964425
+        ],
+        [
+          0.0621691,
+          0.0611576,
+          0.0598301,
+          0.0623517,
+          0.0687959,
+          0.07993,
+          0.095604
+        ]
+      ],
+      "ce_setup_fall": [
+        [
+          0.0825871,
+          0.0815887,
+          0.0806716,
+          0.083705,
+          0.0906361,
+          0.102065,
+          0.118264
+        ],
+        [
+          0.0839441,
+          0.0829458,
+          0.0820286,
+          0.0850621,
+          0.0919931,
+          0.103422,
+          0.119621
+        ],
+        [
+          0.0894294,
+          0.088431,
+          0.0875139,
+          0.0905473,
+          0.0974784,
+          0.108907,
+          0.125107
+        ],
+        [
+          0.102225,
+          0.101227,
+          0.10031,
+          0.103343,
+          0.110274,
+          0.121703,
+          0.137902
+        ],
+        [
+          0.121711,
+          0.120713,
+          0.119796,
+          0.122829,
+          0.12976,
+          0.141189,
+          0.157388
+        ],
+        [
+          0.148256,
+          0.147258,
+          0.146341,
+          0.149374,
+          0.156305,
+          0.167734,
+          0.183934
+        ],
+        [
+          0.179064,
+          0.178066,
+          0.177148,
+          0.180182,
+          0.187113,
+          0.198542,
+          0.214741
+        ]
+      ],
+      "we_setup_rise": [
+        [
+          0.0439072,
+          0.0428958,
+          0.0415681,
+          0.0440899,
+          0.050534,
+          0.0616681,
+          0.0773421
+        ],
+        [
+          0.0447004,
+          0.0436889,
+          0.0423612,
+          0.044883,
+          0.0513272,
+          0.0624613,
+          0.0781353
+        ],
+        [
+          0.0483829,
+          0.0473714,
+          0.0460437,
+          0.0485655,
+          0.0550097,
+          0.0661438,
+          0.0818177
+        ],
+        [
+          0.0548677,
+          0.0538563,
+          0.0525286,
+          0.0550504,
+          0.0614946,
+          0.0726286,
+          0.0883026
+        ],
+        [
+          0.0603032,
+          0.0592917,
+          0.057964,
+          0.0604858,
+          0.06693,
+          0.0780641,
+          0.0937381
+        ],
+        [
+          0.0630075,
+          0.061996,
+          0.0606684,
+          0.0631902,
+          0.0696343,
+          0.0807684,
+          0.0964424
+        ],
+        [
+          0.0621688,
+          0.0611574,
+          0.0598297,
+          0.0623515,
+          0.0687957,
+          0.0799297,
+          0.0956037
+        ]
+      ],
+      "we_setup_fall": [
+        [
+          0.0825991,
+          0.0816006,
+          0.0806837,
+          0.0837174,
+          0.0906483,
+          0.102078,
+          0.11829
+        ],
+        [
+          0.0838934,
+          0.0828949,
+          0.0819781,
+          0.0850117,
+          0.0919426,
+          0.103372,
+          0.119584
+        ],
+        [
+          0.0894492,
+          0.0884506,
+          0.0875338,
+          0.0905674,
+          0.0974984,
+          0.108928,
+          0.12514
+        ],
+        [
+          0.10223,
+          0.101232,
+          0.100315,
+          0.103348,
+          0.110279,
+          0.121709,
+          0.137921
+        ],
+        [
+          0.121661,
+          0.120662,
+          0.119745,
+          0.122779,
+          0.12971,
+          0.14114,
+          0.157351
+        ],
+        [
+          0.148347,
+          0.147349,
+          0.146432,
+          0.149465,
+          0.156396,
+          0.167826,
+          0.184038
+        ],
+        [
+          0.179039,
+          0.17804,
+          0.177123,
+          0.180157,
+          0.187088,
+          0.198518,
+          0.214729
+        ]
+      ],
+      "rstb_setup_rise": [
+        [
+          0.0472728,
+          0.0462552,
+          0.0449386,
+          0.0474503,
+          0.053896,
+          0.0650249,
+          0.0808844
+        ],
+        [
+          0.0481337,
+          0.047116,
+          0.0457994,
+          0.0483111,
+          0.0547569,
+          0.0658858,
+          0.0817453
+        ],
+        [
+          0.0508607,
+          0.049843,
+          0.0485265,
+          0.0510382,
+          0.0574839,
+          0.0686128,
+          0.0844723
+        ],
+        [
+          0.055604,
+          0.0545864,
+          0.0532698,
+          0.0557815,
+          0.0622272,
+          0.0733562,
+          0.0892156
+        ],
+        [
+          0.060187,
+          0.0591693,
+          0.0578527,
+          0.0603644,
+          0.0668101,
+          0.0779391,
+          0.0937985
+        ],
+        [
+          0.0631071,
+          0.0620895,
+          0.0607729,
+          0.0632846,
+          0.0697303,
+          0.0808593,
+          0.0967187
+        ],
+        [
+          0.0637452,
+          0.0627276,
+          0.061411,
+          0.0639227,
+          0.0703684,
+          0.0814973,
+          0.0973568
+        ]
+      ],
+      "rstb_setup_fall": [
+        [
+          0.0933745,
+          0.0923714,
+          0.0912904,
+          0.0941185,
+          0.100979,
+          0.112347,
+          0.128344
+        ],
+        [
+          0.0943481,
+          0.093345,
+          0.0922639,
+          0.0950921,
+          0.101953,
+          0.11332,
+          0.129317
+        ],
+        [
+          0.100282,
+          0.0992787,
+          0.0981977,
+          0.101026,
+          0.107887,
+          0.119254,
+          0.135251
+        ],
+        [
+          0.113061,
+          0.112058,
+          0.110977,
+          0.113805,
+          0.120666,
+          0.132034,
+          0.148031
+        ],
+        [
+          0.129916,
+          0.128913,
+          0.127832,
+          0.13066,
+          0.137521,
+          0.148888,
+          0.164885
+        ],
+        [
+          0.150097,
+          0.149094,
+          0.148013,
+          0.150841,
+          0.157702,
+          0.169069,
+          0.185066
+        ],
+        [
+          0.173286,
+          0.172283,
+          0.171202,
+          0.17403,
+          0.180891,
+          0.192258,
+          0.208255
+        ]
+      ],
+      "min_period": [
+        1.06702,
+        1.06695,
+        1.06701,
+        1.06701,
+        1.06698,
+        1.06691,
+        1.067
+      ],
+      "mpw_rise": [
+        0.115314,
+        0.115003,
+        0.112148,
+        0.103063,
+        0.0898478,
+        0.0704578,
+        0.0448492
+      ],
+      "mpw_fall": [
+        0.127611,
+        0.127593,
+        0.130648,
+        0.139739,
+        0.153039,
+        0.172362,
+        0.197906
+      ],
+      "num_words": 64,
+      "mux_ratio": 4,
+      "write_size": 8
+    }
+  }
+}
\ No newline at end of file
diff --git a/timingdata/INTERPOLATION.md b/timingdata/INTERPOLATION.md
new file mode 100644
index 00000000..a40e99a4
--- /dev/null
+++ b/timingdata/INTERPOLATION.md
@@ -0,0 +1,529 @@
+# Liberty Timing Interpolation — Architecture and Code Reference
+
+## Overview
+
+SRAM22 can generate Liberty (.lib) timing files without running Liberate MX by using
+a data-driven interpolation model called `LookupModel`, implemented in `src/lib_gen.rs`.
+
+The model is pre-characterized at a sparse set of `data_width` values and interpolates
+smoothly to any requested `data_width` at runtime. Characterization data lives in this
+directory as JSON files. They are embedded directly into the compiled binary via
+`include_bytes!` — no external files are needed at runtime.
+
+---
+
+## Characterization Data Files
+
+### Naming convention
+
+```
+timingdata/{num_words}m{mux_ratio}w{write_size}.json
+```
+
+Each file contains timing measurements across 7 `data_width` breakpoints
+(8, 16, 32, 48, 64, 96, 128) for all 3 PVT corners (tt, ss, ff), produced by
+Liberate MX running SPICE simulation.
+
+### Currently available
+
+| File | num_words | mux_ratio | write_size |
+|---|:---:|:---:|:---:|
+| `64m4w8.json`  | 64  | 4 | 8 |
+| `128m8w8.json` | 128 | 8 | 8 |
+| `256m4w8.json` | 256 | 4 | 8 |
+
+### JSON structure
+
+```json
+{
+  "tt": {
+    "8":  { "cell_rise": [[...7x7...]], "min_period": [...7...], "clk_cap": 0.123, ... },
+    "16": { ... },
+    ...
+    "128": { ... }
+  },
+  "ss": { ... },
+  "ff": { ... }
+}
+```
+
+The top level is keyed by PVT corner. Each corner maps `data_width` (as a string) to
+a timing snapshot containing all Liberty tables for that configuration.
+
+
+## Configuration Selection (`src/plan/mod.rs`)
+
+```rust
+static TIMING_DATA: &[(usize, usize, usize, &[u8])] = &[
+    (64,  4, 8, include_bytes!(..."/timingdata/64m4w8.json")),
+    (128, 8, 8, include_bytes!(..."/timingdata/128m8w8.json")),
+    (256, 4, 8, include_bytes!(..."/timingdata/256m4w8.json")),
+];
+```
+
+This is a compile-time table of `(num_words, mux_ratio, write_size, embedded_bytes)` tuples.
+`include_bytes!` embeds the entire JSON file as a `&'static [u8]` slice directly in the
+binary — there is no runtime file I/O.
+
+At runtime, the correct entry is selected by matching the SRAM parameters:
+
+```rust
+let nw = plan.sram_params.num_words();
+let mx = plan.sram_params.mux_ratio();
+let ws = plan.sram_params.wmask_granularity();
+let json_bytes: &[u8] = TIMING_DATA.iter()
+    .find(|(n, m, w, _)| *n == nw && *m == mx && *w == ws)
+    .map(|(_, _, _, b)| *b)
+    .ok_or_else(|| anyhow::anyhow!(
+        "no timing data for {}m{}w{} — add timingdata/{}m{}w{}.json to the repo",
+        nw, mx, ws, nw, mx, ws
+    ))?;
+```
+
+If no matching entry exists, the error message tells the developer exactly which file
+to create and where to register it.
+
+---
+
+## LookupModel Construction (`LookupModel::from_json`)
+
+`LookupModel::from_json(json_bytes, corner)` deserialises the JSON and fits a
+parametric model for the requested PVT corner. This is the only expensive step —
+it runs once when a lib file is about to be generated.
+
+### Step 1 — Parse data widths
+
+```rust
+let root: serde_json::Value = serde_json::from_slice(json_bytes)?;
+let cmap = root[corner].as_object()...;
+
+let mut dw_keys: Vec<u32> = cmap.keys().map(|k| k.parse().unwrap()).collect();
+dw_keys.sort_unstable();
+let dws: Vec<f64> = dw_keys.iter().map(|&k| k as f64).collect();
+```
+
+The JSON is parsed into a `serde_json::Value`. Only the chosen corner's data is used.
+`data_width` values outside the supported range (8–128) are rejected before this point
+by `generate_plan`, so `from_json` can assume all keys are valid.
+
+### Step 2 — Helper closures
+
+Three closures extract values from the JSON by dimensionality:
+
+```rust
+let v2d = |dw, key, i, j| cmap[&dw.to_string()][key][i][j].as_f64()...;  // 7×7 table entry
+let v1d = |dw, key, j|    cmap[&dw.to_string()][key][j].as_f64()...;      // 1×7 array entry
+let v0d = |dw, key|       cmap[&dw.to_string()][key].as_f64()...;          // scalar
+```
+
+Three fitting closures use these to build fitted structures:
+
+```rust
+// Fit a 7×7 table: one FitEntry per (i,j) cell, each fitted independently
+let fit7 = |key, basis| -> [[FitEntry; 7]; 7] {
+    std::array::from_fn(|i| std::array::from_fn(|j| {
+        let vals: Vec<f64> = dw_keys.iter().map(|&dw| v2d(dw, key, i, j)).collect();
+        FitEntry::fit(basis, &dws, &vals)
+    }))
+};
+
+// Take element-wise max across all dw for a 7×7 table (used for din_hold_fall)
+let max7 = |key| -> [[f64; 7]; 7] {
+    std::array::from_fn(|i| std::array::from_fn(|j| {
+        dw_keys.iter().map(|&dw| v2d(dw, key, i, j)).fold(f64::NEG_INFINITY, f64::max)
+    }))
+};
+
+// Fit a 1×7 array: one FitEntry per index j
+let fit1 = |key, basis| -> [FitEntry; 7] {
+    std::array::from_fn(|j| {
+        let vals: Vec<f64> = dw_keys.iter().map(|&dw| v1d(dw, key, j)).collect();
+        FitEntry::fit(basis, &dws, &vals)
+    })
+};
+
+// Scalar max across all dw (used for capacitances)
+let max0 = |key| -> f64 {
+    dw_keys.iter().map(|&dw| v0d(dw, key)).fold(f64::NEG_INFINITY, f64::max)
+};
+```
+
+### Step 3 — Build the model fields
+
+Each Liberty table is assigned a fitting strategy:
+
+```rust
+Ok(Self {
+    cell_rise:       fit7("cell_rise",       basis_lin4_sqrt_log),
+    cell_fall:       fit7("cell_fall",       basis_lin4_sqrt_log),
+    rise_transition: fit7("rise_transition", basis_lin3_cbrt),
+    fall_transition: fit7("fall_transition", basis_lin3_sqrt),
+    addr_hold_rise:  fit7("addr_hold_rise",  basis_lin3_sqrt),
+    addr_hold_fall:  fit7("addr_hold_fall",  basis_log2),
+    din_hold_rise:   fit7("din_hold_rise",   basis_lin2),
+    din_hold_fall:   max7("din_hold_fall"),   // no curve fit — see below
+    ce_hold_rise:    fit7("ce_hold_rise",    basis_log3),
+    ce_hold_fall:    fit7("ce_hold_fall",    basis_lin3_sqrt),
+    we_hold_rise:    fit7("we_hold_rise",    basis_log3),
+    we_hold_fall:    fit7("we_hold_fall",    basis_lin3_sqrt),
+    rstb_hold_rise:  fit7("rstb_hold_rise",  basis_log3),
+    rstb_hold_fall:  fit7("rstb_hold_fall",  basis_lin4_log_log2),
+    mpw_rise:        fit1("mpw_rise",        basis_lin3_cbrt),
+    mpw_fall:        fit1("mpw_fall",        basis_log3),
+    min_period:      min_period_snaps,        // piecewise — see below
+    clk_cap:   max0("clk_cap"),
+    addr_cap:  max0("addr_cap"),
+    din_cap:   max0("din_cap"),
+    ce_cap:    max0("ce_cap"),
+    we_cap:    max0("we_cap"),
+    rstb_cap:  max0("rstb_cap"),
+    wmask_cap: max0("wmask_cap"),
+})
+```
+
+**Capacitances** (`max0`): pin capacitances are essentially constant with `data_width`
+(they reflect individual pin loading, not array size). The maximum across all
+characterized `dw` is used as a conservative scalar.
+
+**`din_hold_fall`** (`max7`): characterization data shows only ~3.7% variation with
+no dw trend — this is measurement noise, not a real physical relationship. A curve
+fit would be meaningless. Each of the 49 entries stores the global maximum observed
+across all characterized `data_width` values, which is guaranteed conservative.
+
+---
+
+## Basis Functions
+
+All curve-fitted tables use a basis of at most 4 functions of `dw`. Each basis
+returns `[f64; 4]` — trailing zeros are unused slots that simplify the shared OLS
+solver to always work on 4 coefficients.
+
+```rust
+fn basis_lin4_sqrt_log(dw: f64) -> [f64; 4] { [1.0, dw, dw.sqrt(), dw.ln()] }
+fn basis_lin3_cbrt(dw: f64)     -> [f64; 4] { [1.0, dw, dw.cbrt(), 0.0] }
+fn basis_lin3_sqrt(dw: f64)     -> [f64; 4] { [1.0, dw, dw.sqrt(), 0.0] }
+fn basis_log2(dw: f64)          -> [f64; 4] { [1.0, dw.ln(), 0.0, 0.0] }
+fn basis_lin2(dw: f64)          -> [f64; 4] { [1.0, dw, 0.0, 0.0] }
+fn basis_log3(dw: f64)          -> [f64; 4] { [1.0, dw.ln(), dw.ln().powi(2), 0.0] }
+fn basis_lin4_log_log2(dw: f64) -> [f64; 4] { let l = dw.ln(); [1.0, dw, l, l.powi(2)] }
+```
+
+Each basis was chosen by inspecting the shape of the Liberate MX data for that table
+and selecting the minimal set of features that captures the dominant trend:
+
+| Table | Basis | Equation | Physical reason |
+|---|---|---|---|
+| `cell_rise`, `cell_fall` | `basis_lin4_sqrt_log` | `a + b·dw + c·√dw + d·ln(dw)` | Hockey-stick shape: fast initial rise then flattening |
+| `rise_transition`, `mpw_rise` | `basis_lin3_cbrt` | `a + b·dw + c·∛dw` | Sub-linear growth, gentler than √ |
+| `fall_transition`, `addr_hold_rise`, `ce/we_hold_fall` | `basis_lin3_sqrt` | `a + b·dw + c·√dw` | Moderate sub-linear growth |
+| `addr_hold_fall` | `basis_log2` | `a + b·ln(dw)` | Pure logarithmic — very slow growth |
+| `din_hold_rise` | `basis_lin2` | `a + b·dw` | Linear — purely capacitive loading |
+| `ce/we/rstb_hold_rise`, `mpw_fall` | `basis_log3` | `a + b·ln(dw) + c·ln²(dw)` | Logarithmic with curvature |
+| `rstb_hold_fall` | `basis_lin4_log_log2` | `a + b·dw + c·ln(dw) + d·ln²(dw)` | Mixed linear and log (non-monotone dip in data) |
+
+The key property is that all bases are **linear in their parameters** `[a, b, c, d]`,
+even though they are nonlinear functions of `dw`. This makes the fit an ordinary
+linear least-squares problem.
+
+---
+
+## FitEntry: OLS Fitting with Conservative Lift
+
+`FitEntry` is the core fitted object. It stores a basis function pointer, 4
+fitted coefficients, and the original training `(dw, val)` pairs.
+
+```rust
+struct FitEntry {
+    basis:    fn(f64) -> [f64; 4],
+    params:   [f64; 4],
+    training: Vec<(f64, f64)>,  // (dw, val) — original characterized values
+}
+
+impl FitEntry {
+    fn eval(&self, dw: f64) -> f64 {
+        // Exact match → return the raw Liberate MX value, not the fitted curve.
+        if let Some(&(_, y)) = self.training.iter().find(|&&(x, _)| x == dw) {
+            return y;
+        }
+        let x = (self.basis)(dw);
+        x[0]*self.params[0] + x[1]*self.params[1]
+            + x[2]*self.params[2] + x[3]*self.params[3]
+    }
+}
+```
+
+`eval` first checks whether the requested `dw` exactly matches one of the
+7 characterized training breakpoints (8, 16, 32, 48, 64, 96, 128). If so,
+it returns the original Liberate MX measurement directly — no polynomial
+evaluation, no overestimate. Only for `dw` values that fall between training
+points does it fall through to the conservatively-lifted OLS polynomial.
+
+This matters because the intercept lift in `FitEntry::fit` shifts the curve
+upward to guarantee conservatism everywhere, which means at training points
+the polynomial would return a value strictly above the ground truth. Storing
+the raw values and bypassing the polynomial at those points gives exact
+accuracy where the data is known and conservative overestimation only where
+interpolation is actually occurring.
+
+### `FitEntry::fit` — three-stage fitting
+
+```rust
+fn fit(basis: fn(f64) -> [f64; 4], dws: &[f64], vals: &[f64]) -> Self {
+```
+
+**Stage 1 — OLS solve:**
+
+```rust
+let mut p = ols4(basis, dws, vals);
+```
+
+Calls `ols4` to find the 4 coefficients that minimise `||Xp - y||²` over the 7
+training points. This gives the best-fit curve but makes no guarantee of
+conservatism — it will underestimate roughly half the training points.
+
+**Stage 2 — Pass 1 lift (training points):**
+
+```rust
+let lift1 = dws.iter().zip(vals).map(|(&x, &y)| {
+    let b = basis(x);
+    y - (b[0]*p[0] + b[1]*p[1] + b[2]*p[2] + b[3]*p[3])
+}).fold(0.0_f64, f64::max);
+p[0] += lift1;
+```
+
+For each training point, compute how much the current curve underestimates the
+measured value. Take the worst case (largest underestimate). Add it to the
+intercept `p[0]`. The curve now passes at or above every training point.
+Only `p[0]` (the intercept / constant term) is shifted — this preserves the
+shape of the fit while raising the floor.
+
+**Stage 3 — Pass 2 lift (integer sweep):**
+
+```rust
+let val_max  = vals.iter().cloned().fold(f64::NEG_INFINITY, f64::max);
+let val_min  = vals.iter().cloned().fold(f64::INFINITY, f64::min);
+let val_mean = vals.iter().sum::<f64>() / vals.len() as f64;
+let is_flat  = val_mean > 0.0 && (val_max - val_min) / val_mean < 0.02;
+```
+
+First, classify the data. If the full range of measured values is less than 2% of
+the mean, the data has no real dw trend — any apparent variation is measurement
+noise. Otherwise the data is considered trending.
+
+```rust
+let lift2 = (min_dw..=max_dw).map(|dw_i| {
+    let dw = dw_i as f64;
+    let reference = if is_flat {
+        val_max
+    } else {
+        piecewise_log_linear(dw, dws, vals)
+    };
+    let b = basis(dw);
+    reference - (b[0]*p[0] + b[1]*p[1] + b[2]*p[2] + b[3]*p[3])
+}).fold(0.0_f64, f64::max);
+p[0] += lift2;
+
+let training = dws.iter().zip(vals).map(|(&x, &y)| (x, y)).collect();
+Self { basis, params: p, training }
+```
+
+Every integer `dw` from the smallest to largest training value is swept. At each
+point, the curve is compared against a **reference**:
+
+- **Flat data**: the reference is the global maximum of all training values.
+  Since there is no real dw dependence, the global max is the only safe upper
+  bound — noise could place any intermediate value at that level.
+- **Trending data**: the reference is `piecewise_log_linear(dw, dws, vals)`,
+  which interpolates log-linearly between the two nearest training points.
+  This is tight and conservative for smooth monotone curves.
+
+The worst-case underestimate across all integer dw values is added to `p[0]`,
+giving a curve that lies at or above the piecewise log-linear interpolant of the
+data at every integer point, not just at the 7 training points.
+
+---
+
+## `piecewise_log_linear` — Log-Linear Segment Interpolation
+
+```rust
+fn piecewise_log_linear(dw: f64, dws: &[f64], vals: &[f64]) -> f64 {
+    let i = dws.partition_point(|&x| x <= dw);
+    if i == 0 { return vals[0]; }
+    if i >= dws.len() { return vals[dws.len() - 1]; }
+    let (x0, y0) = (dws[i - 1], vals[i - 1]);
+    let (x1, y1) = (dws[i], vals[i]);
+    let t = (dw.ln() - x0.ln()) / (x1.ln() - x0.ln());
+    y0 + t * (y1 - y0)
+}
+```
+
+`partition_point` is a binary search that returns the index of the first `dws[i]`
+strictly greater than `dw`. So `dws[i-1] <= dw < dws[i]` defines the bracketing
+segment. Extrapolation clamps to the nearest endpoint value.
+
+The interpolation parameter `t` is computed in log space:
+
+```
+t = (ln(dw) - ln(x0)) / (ln(x1) - ln(x0))
+```
+
+This maps `dw` linearly onto the interval `[ln(x0), ln(x1)]`, which linearises
+the logarithmic growth of SRAM timing. Linear interpolation is then applied to the
+timing values `y0` and `y1`. The result is exact at both endpoints and follows the
+log-shaped curve in between, as opposed to plain linear interpolation which would
+cut across the curve and potentially underestimate.
+
+**Why log-linear?** SRAM timing scales approximately with `ln(dw)` because the
+dominant physical effect is bitline capacitance: adding more output columns adds
+capacitive load that the sense amplifier must overcome, and the effective RC time
+constant grows logarithmically with the number of active bitlines.
+
+---
+
+## `ols4` — Ordinary Least Squares Solver
+
+```rust
+fn ols4(basis: fn(f64) -> [f64; 4], dws: &[f64], vals: &[f64]) -> [f64; 4] {
+    let mut xtx = [[0.0f64; 4]; 4];
+    let mut xty = [0.0f64; 4];
+    for (&dw, &y) in dws.iter().zip(vals) {
+        let x = basis(dw);
+        for i in 0..4 {
+            xty[i] += x[i] * y;
+            for j in 0..4 { xtx[i][j] += x[i] * x[j]; }
+        }
+    }
+    gauss4(xtx, xty)
+}
+```
+
+This assembles the **normal equations** for least-squares: `(XᵀX)p = Xᵀy`.
+
+- `xtx` accumulates the 4×4 matrix `XᵀX` one training point at a time.
+  Each training point contributes an outer product `x · xᵀ`.
+- `xty` accumulates the 4-vector `Xᵀy`. Each training point contributes `x · y`.
+
+After the loop, `xtx` and `xty` form the 4×4 linear system whose solution is the
+OLS coefficient vector. This is passed to `gauss4`.
+
+---
+
+## `gauss4` — Gaussian Elimination with Partial Pivoting
+
+```rust
+fn gauss4(mut a: [[f64; 4]; 4], mut b: [f64; 4]) -> [f64; 4] {
+    for col in 0..4 {
+        // Partial pivoting: swap the row with the largest absolute value in this column
+        let pivot = (col..4)
+            .max_by(|&i, &j| a[i][col].abs().partial_cmp(&a[j][col].abs()).unwrap())
+            .unwrap();
+        a.swap(col, pivot);
+        b.swap(col, pivot);
+        let d = a[col][col];
+        if d.abs() < 1e-14 { continue; }  // singular or near-zero: skip
+        // Eliminate all rows below the pivot
+        for row in (col + 1)..4 {
+            let f = a[row][col] / d;
+            for k in col..4 { a[row][k] -= f * a[col][k]; }
+            b[row] -= f * b[col];
+        }
+    }
+    // Back-substitution
+    let mut x = [0.0f64; 4];
+    for i in (0..4).rev() {
+        let s: f64 = ((i + 1)..4).map(|j| a[i][j] * x[j]).sum();
+        x[i] = if a[i][i].abs() < 1e-14 { 0.0 } else { (b[i] - s) / a[i][i] };
+    }
+    x
+}
+```
+
+Gaussian elimination reduces the 4×4 system `Ax = b` to upper-triangular form,
+then back-substitution solves for `x`.
+
+**Partial pivoting** (swapping the row with the largest absolute value in the
+current column to the pivot position) is a standard numerical stability technique.
+Without it, small pivot values would amplify floating-point errors during elimination.
+
+When a basis has trailing zeros (e.g. `basis_lin3_sqrt` returns `[1, dw, √dw, 0]`),
+the last column of `XᵀX` is identically zero, making the system singular. The
+`d.abs() < 1e-14` guard and `x[i] = 0.0` fallback handle this gracefully — the
+unused coefficient is set to zero and the remaining 3 are solved correctly.
+
+---
+
+## `eval_7x7` — Table Evaluation at Query Time
+
+```rust
+fn eval_7x7(tbl: &[[FitEntry; 7]; 7], dw: f64) -> [[f64; 7]; 7] {
+    std::array::from_fn(|i| std::array::from_fn(|j| tbl[i][j].eval(dw)))
+}
+```
+
+At query time, each of the 49 `FitEntry` values in a 7×7 table is evaluated
+independently at the requested `dw`. The result is a concrete `[[f64;7];7]` table
+ready to write into the Liberty file. Each call to `eval` is just a dot product of
+4 floats — the entire 7×7 evaluation is ~200 floating-point operations.
+
+---
+
+## `min_period` — Piecewise Log-Linear with Monotone Upper Hull
+
+`min_period` is stored differently from all other tables. Instead of `[[FitEntry;7];7]`,
+it stores the raw characterized snapshots:
+
+```rust
+min_period: Vec<(u32, [f64; 7])>,
+```
+
+## TimingModel Trait Implementation
+
+`LookupModel` implements the `TimingModel` trait, which is the interface the Liberty
+writer (`generate_sram_lib`) calls to get numeric values for every table.
+
+Every `TimingModel` method follows the same pattern: call `eval_7x7` on the relevant
+fitted table, passing `p.data_width() as f64` as the query point:
+
+```rust
+fn cell_rise(&self, p: &SramParams) -> [[f64; 7]; 7] {
+    eval_7x7(&self.cell_rise, p.data_width() as f64)
+}
+```
+
+For `hold_fall`, `din_hold_fall` is a special case — it returns the stored `[[f64;7];7]`
+constant table directly without any interpolation:
+
+```rust
+fn hold_fall(&self, p: &SramParams, pin: PinRole) -> [[f64; 7]; 7] {
+    match pin {
+        PinRole::Din | PinRole::Wmask => self.din_hold_fall,  // constant, no eval
+        PinRole::Addr | PinRole::Clk  => eval_7x7(&self.addr_hold_fall, dw),
+        ...
+    }
+}
+```
+
+`setup_rise` and `setup_fall` return all-zeros. These timing arcs are not present in
+the characterization data (the SRAM has no setup constraints in the conventional sense)
+but the Liberty format requires the fields to be structurally present.
+
+---
+
+## Accuracy
+
+At the 7 characterized `data_width` breakpoints (8, 16, 32, 48, 64, 96, 128)
+`FitEntry::eval` returns the exact Liberate MX value — 0% overestimate by
+construction.
+
+For interpolated values, validated at `dw=72` (between characterized points 64
+and 96) against Liberate MX ground truth:
+
+| Config | Table | Corner | Overestimate range |
+|---|---|---|---|
+| 64×m4w8 | `cell_rise` | tt/ss/ff | +0.15% … +0.37% |
+| 64×m4w8 | `min_period` | tt/ss/ff | +1.40% … +1.71% |
+| 128×m8w8 | `cell_rise` | tt/ss/ff | +0.44% … +0.85% |
+| 128×m8w8 | `min_period` | tt/ss/ff | +0.31% … +0.69% |
+
+The model always overestimates (conservative) and stays well within 2% for
+interpolated `data_width` values.