Summary
With the circuit below, C5 at pcbX={10} produces this error:
pcb_autorouting_error
SingleHighDensityRouteStitchSolver3 terminal identity disagrees with route orientation for "source_net_7"
Changing only C5 to pcbX={10.5} makes the board route with zero errors. This issue documents the position-sensitive routing behavior and provides a reproduction for investigating the terminal identity/orientation handling.
Reproduction
export default () => (
<board width="45mm" height="35mm">
<pinheader
name="J1"
pinCount={2}
footprint="pinrow2"
pcbX={-15}
pcbY={10}
connections={{ pin1: "net.VIN", pin2: "net.GND" }}
/>
<capacitor
name="C1"
capacitance="100uF"
footprint="1210"
pcbX={-9}
pcbY={10}
connections={{ pin1: "net.VIN", pin2: "net.GND" }}
/>
<capacitor
name="C2"
capacitance="10uF"
footprint="0603"
pcbX={-3}
pcbY={10}
connections={{ pin1: "net.VIN", pin2: "net.GND" }}
/>
<chip
name="U1"
footprint="sot223"
pcbX={4}
pcbY={10}
pinLabels={{ pin1: "GND", pin2: "VOUT", pin3: "VIN", pin4: "TAB" }}
connections={{
pin1: "net.GND",
pin2: "net.V3_3",
pin3: "net.VIN",
pin4: "net.V3_3",
}}
/>
<capacitor
name="C5"
capacitance="22uF"
footprint="0805"
pcbX={10}
pcbY={10}
connections={{ pin1: "net.V3_3", pin2: "net.GND" }}
/>
<chip
name="U2"
footprint="soic8"
pcbX={0}
pcbY={-2}
pinLabels={{
pin1: "GND",
pin2: "TRIG",
pin3: "OUT",
pin4: "RESET",
pin5: "CTRL",
pin6: "THRES",
pin7: "DISCH",
pin8: "VCC",
}}
connections={{
pin1: "net.GND",
pin2: "net.TRIG_THRES",
pin3: "net.OUT_NODE",
pin4: "net.V3_3",
pin5: "net.CTRL_NODE",
pin6: "net.TRIG_THRES",
pin7: "net.DISCH_NODE",
pin8: "net.V3_3",
}}
/>
<resistor
name="R1"
resistance="100k"
footprint="0402"
pcbX={6}
pcbY={-0.73}
connections={{ pin1: "net.DISCH_NODE", pin2: "net.V3_3" }}
/>
<resistor
name="R2"
resistance="47k"
footprint="0402"
pcbX={6}
pcbY={-2}
connections={{ pin1: "net.DISCH_NODE", pin2: "net.TRIG_THRES" }}
/>
<capacitor
name="C4"
capacitance="10nF"
footprint="0402"
pcbX={6}
pcbY={-3.905}
connections={{ pin1: "net.CTRL_NODE", pin2: "net.GND" }}
/>
<capacitor
name="C3"
capacitance="10uF"
footprint="0603"
pcbX={-6}
pcbY={-1.365}
pcbRotation="180deg"
connections={{ pin1: "net.TRIG_THRES", pin2: "net.GND" }}
/>
<resistor
name="R3"
resistance="330"
footprint="0402"
pcbX={-6}
pcbY={-2.635}
pcbRotation="180deg"
connections={{ pin1: "net.OUT_NODE", pin2: "net.LED_A" }}
/>
<led
name="D1"
color="red"
footprint="0603"
pcbX={-11}
pcbY={-2.635}
pcbRotation="180deg"
connections={{ pin1: "net.LED_A", pin2: "net.GND" }}
/>
<pinheader
name="J2"
pinCount={2}
footprint="pinrow2"
pcbX={-16}
pcbY={-2.635}
pcbRotation="180deg"
connections={{ pin1: "net.OUT_NODE", pin2: "net.GND" }}
/>
<capacitor
name="C6"
capacitance="100nF"
footprint="0402"
pcbX={-6}
pcbY={-3.905}
pcbRotation="180deg"
connections={{ pin1: "net.V3_3", pin2: "net.GND" }}
/>
</board>
)
Actual behavior
At C5 pcbX={10}, autorouting fails with the terminal identity/route orientation error shown above.
Working comparison
Changing only:
- pcbX={10}
+ pcbX={10.5}
results in zero autorouting errors.
Expected behavior
If the position is routable, the autorouter should complete successfully. If no route can be found, it should return a normal routing diagnostic instead of an internal terminal-identity disagreement.
Additional context
U1 represents an AMS1117-style SOT-223 regulator. Pins 2 and 4 (the tab) are both assigned to net.V3_3. This may be relevant to the reproduction because the same net has multiple terminals on U1.
A screenshot of the failing state is attached below.

Summary
With the circuit below, C5 at
pcbX={10}produces this error:Changing only C5 to
pcbX={10.5}makes the board route with zero errors. This issue documents the position-sensitive routing behavior and provides a reproduction for investigating the terminal identity/orientation handling.Reproduction
Actual behavior
At
C5 pcbX={10}, autorouting fails with the terminal identity/route orientation error shown above.Working comparison
Changing only:
results in zero autorouting errors.
Expected behavior
If the position is routable, the autorouter should complete successfully. If no route can be found, it should return a normal routing diagnostic instead of an internal terminal-identity disagreement.
Additional context
U1 represents an AMS1117-style SOT-223 regulator. Pins 2 and 4 (the tab) are both assigned to
net.V3_3. This may be relevant to the reproduction because the same net has multiple terminals on U1.A screenshot of the failing state is attached below.