rk3568 2G物理内存目标板，拉起host linux过程中报错Zone 0 unhandled mmio fault MMIOAccess

[NaiveWangGe]

1.uboot拉起hvisor的过程：
fatload mmc 1:1 0x00500000 hvisor.bin
fatload mmc 1:1 0x10000000 zone0.dtb
fatload mmc 1:1 0x09400000 Image
setenv bootargs earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=68c6dd9c-02 rw rootwait
bootm 0x00500000 - 0x10000000

2.报错日志：
[ 39.750750] I : [File] : drivers/gpu/arm/mali400/mali/linux/mali_kernel_linux.c; [Line] : 410; [Func] : mali_module_init(); svn_rev_string_from_arm of this mali_ko is '', rk_ko_ver is '5', built at '18:07:14', on 'Mar 3 2026'.
[ 39.751411] Mali:
[ 39.751415] Mali device driver loaded
[ 39.751439] rkisp rkisp-vir0: clear unready subdev num: 5
[ 39.751665] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
[ 39.751682] cfg80211: failed to load regulatory.db
[ 39.752278] rkisp-vir0: update sensor failed
[ 39.752311] ALSA device list:
[ 39.752321] #0: rockchip,hdmi
[ 39.753655] Waiting for root device PARTUUID=614e0000-0000...
[ 39.823387] mmc0: Host Software Queue enabled
[ 39.823424] mmc0: new HS200 MMC card at address 0001
[ 39.824106] mmcblk0: mmc0:0001 SC6311 29.1 GiB
[ 39.824388] mmcblk0boot0: mmc0:0001 SC6311 partition 1 4.00 MiB
[ 39.824694] mmcblk0boot1: mmc0:0001 SC6311 partition 2 4.00 MiB
[ 39.824950] mmcblk0rpmb: mmc0:0001 SC6311 partition 3 4.00 MiB, chardev (236:0)
[ 39.828033] mmcblk0: p1 p2 p3
[ 39.863105] EXT4-fs (mmcblk0p3): recovery complete
[ 39.863152] EXT4-fs (mmcblk0p3): mounted filesystem with ordered data mode. Opts: (null)
[ 39.863219] VFS: Mounted root (ext4 filesystem) on device 179:3.
[ 39.863783] devtmpfs: mounted
[ 39.869315] Freeing unused kernel memory: 6976K
[ 39.889312] Run /sbin/init as init process
[ 39.926176] vendor storage:20190527 ret = 0
[WARN 3] (hvisor::memory::mmio:109) Zone 0 unhandled mmio fault MMIOAccess {
address: 0x3c080072c,
size: 0x4,
is_write: false,
value: 0x0,
}
[ERROR 3] (hvisor::arch::aarch64::trap:251) mmio_handle_access: [src/memory/mmio.rs:110:13] Invalid argument
[ERROR 3] (hvisor::panic:24) panic occurred: PanicInfo {
payload: Any { .. },
message: Some(
root zone has some error,
),
location: Location {
file: "src/zone.rs",
line: 506,
col: 9,
},
can_unwind: true,
force_no_backtrace: false,
}
[WARN 0] (hvisor::memory::mmio:109) Zone 0 unhandled mmio fault MMIOAccess {
address: 0xfe310024,
size: 0x4,
is_write: false,
value: 0x0,
}
[ERROR 0] (hvisor::arch::aarch64::trap:251) mmio_handle_access: [src/memory/mmio.rs:110:13] Invalid argument
[ERROR 0] (hvisor::panic:24) panic occurred: PanicInfo {
payload: Any { .. },
message: Some(
root zone has some error,
),
location: Location {
file: "src/zone.rs",
line: 506,
col: 9,
},
can_unwind: true,
force_no_backtrace: false,
}
[WARN 1] (hvisor::memory::mmio:109) Zone 0 unhandled mmio fault MMIOAccess {
address: 0xfe5f0018,
size: 0x4,
is_write: true,
value: 0x1,
}
[ERROR 1] (hvisor::arch::aarch64::trap:251) mmio_handle_access: [src/memory/mmio.rs:110:13] Invalid argument
[ERROR 1] (hvisor::panic:24) panic occurred: PanicInfo {
payload: Any { .. },
message: Some(
root zone has some error,
),
location: Location {
file: "src/zone.rs",
line: 506,
col: 9,
},
can_unwind: true,
force_no_backtrace: false,
}

3.board.rs文件内容：
// Copyright (c) 2025 Syswonder
// hvisor is licensed under Mulan PSL v2.
// You can use this software according to the terms and conditions of the Mulan PSL v2.
// You may obtain a copy of Mulan PSL v2 at:
// http://license.coscl.org.cn/MulanPSL2
// THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR
// FIT FOR A PARTICULAR PURPOSE.
// See the Mulan PSL v2 for more details.
//
// Syswonder Website:
// https://www.syswonder.org
//
// Authors:
//

use crate::pci_dev;
use crate::{
arch::{
mmu::MemoryType,
zone::{GicConfig, Gicv3Config, HvArchZoneConfig},
},
config::*,
pci::vpci_dev::VpciDevType,
};

pub const BOARD_NAME: &str = "rk3568";

pub const BOARD_NCPUS: usize = 4;
pub const BOARD_UART_BASE: u64 = 0xfe660000;

#[rustfmt::skip]
pub static BOARD_MPIDR_MAPPINGS: [u64; BOARD_NCPUS] = [
0x0, // cpu0
0x100, // cpu1
0x200, // cpu2
0x300, // cpu3
];

/// The physical memory layout of the board.
/// Each address should align to 2M (0x200000).
/// Addresses must be in ascending order.
#[rustfmt::skip]
pub const BOARD_PHYSMEM_LIST: &[(u64, u64, MemoryType)] = &[
// ( start, end, type)
( 0x0, 0x80000000, MemoryType::Normal),
( 0xf0000000, 0x100000000, MemoryType::Device)
];

pub const ROOT_ZONE_DTB_ADDR: u64 = 0x10000000;
pub const ROOT_ZONE_KERNEL_ADDR: u64 = 0x09400000;
pub const ROOT_ZONE_ENTRY: u64 = 0x09400000;
pub const ROOT_ZONE_CPUS: u64 = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3);

pub const ROOT_ZONE_NAME: &str = "root-linux";
pub const ROOT_ZONE_MEMORY_REGIONS: &[HvConfigMemoryRegion] = &[
HvConfigMemoryRegion {
mem_type: MEM_TYPE_RAM,
physical_start: 0x0,
virtual_start: 0x0,
size: 0x200000,
}, // ram
HvConfigMemoryRegion {
mem_type: MEM_TYPE_RAM,
physical_start: 0x200000,
virtual_start: 0x200000,
size: 0x8200000,
}, // memory
HvConfigMemoryRegion {
mem_type: MEM_TYPE_RAM,
physical_start: 0x9400000,
virtual_start: 0x9400000,
size: 0x76c00000,
}, // memory
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfc000000,
virtual_start: 0xfc000000,
size: 0x1000,
}, //sata wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfcc00000,
virtual_start: 0xfcc00000,
size: 0x400000,
}, //usbdrd wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfd000000,
virtual_start: 0xfd000000,
size: 0x400000,
}, //usbhost dwc3 wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfd440000,
virtual_start: 0xfd440000,
size: 0x20000,
}, // its
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfd800000,
virtual_start: 0xfd800000,
size: 0x100000,
}, //usb wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfd904000,
virtual_start: 0xfd904000,
size: 0x4000,
}, //debug
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfd90c000,
virtual_start: 0xfd90c000,
size: 0x4000,
}, //cspmu wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFDC20000,
virtual_start: 0xFDC20000,
size: 0x10000,
}, //syscon
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfdc50000,
virtual_start: 0xfdc50000,
size: 0x10000,
}, //syscon pipegrf
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFDC60000,
virtual_start: 0xFDC60000,
size: 0x30000,
}, //syscon
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfdc90000,
virtual_start: 0xfdc90000,
size: 0x10000,
}, //syscon pipe_phy_grf2
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfdca0000,
virtual_start: 0xfdca0000,
size: 0x8000,
}, //sysconf wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfdca8000,
virtual_start: 0xfdca8000,
size: 0x8000,
}, //sysconf wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFDCB0000,
virtual_start: 0xFDCB0000,
size: 0x8000,
}, //syscon
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfdcb8000,
virtual_start: 0xfdcb8000,
size: 0x10000,
}, //syscon pcie30_phy_grf
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFDD00000,
virtual_start: 0xFDD00000,
size: 0x10000,
}, //clock-controller
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFDD20000,
virtual_start: 0xFDD20000,
size: 0x10000,
}, //clock-controller
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfdd40000,
virtual_start: 0xfdd40000,
size: 0x1000,
}, //i2c wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFDD60000,
virtual_start: 0xFDD60000,
size: 0x10000,
}, //gpio
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFDD70000,
virtual_start: 0xFDD70000,
size: 0x1000,
}, //pwm wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfdd90000,
virtual_start: 0xfdd90000,
size: 0x1000,
}, // power-management
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfdeb0000,
virtual_start: 0xfdeb0000,
size: 0x1000,
}, //rk_rga wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfded0000,
virtual_start: 0xfded0000,
size: 0x1000,
},
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe000000,
virtual_start: 0xfe000000,
size: 0x4000,
}, //dwmmc mmc3
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe010000,
virtual_start: 0xfe010000,
size: 0x10000,
}, //ethernet 0xfe010000 wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe040000,
virtual_start: 0xfe040000,
size: 0x4000,
}, //vop iommu wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe0a0000,
virtual_start: 0xfe0a0000,
size: 0x20000,
}, //hdmi wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe128000,
virtual_start: 0xfe128000,
size: 0x80000,
}, //qos wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe260000,
virtual_start: 0xfe260000,
size: 0x10000,
}, //pci 0xfe260000 apb wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe280000,
virtual_start: 0xfe280000,
size: 0x10000,
}, //pci fe280000 apb wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe2a0000,
virtual_start: 0xfe2a0000,
size: 0x10000,
}, // ethernet 0xfe2a0000 wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe2b0000,
virtual_start: 0xfe2b0000,
size: 0x4000,
}, //dwmmc mmc1
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe2c0000,
virtual_start: 0xfe2c0000,
size: 0x4000,
}, //dwmmc mmc2
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE310000,
virtual_start: 0xFE310000,
size: 0x10000,
}, //sdhci
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE388000,
virtual_start: 0xFE388000,
size: 0x6000,
}, //rng opt wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe400000,
virtual_start: 0xfe400000,
size: 0x1000,
}, //i2s wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe410000,
virtual_start: 0xfe410000,
size: 0x1000,
}, //i2s wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE530000,
virtual_start: 0xFE530000,
size: 0x10000,
}, //dmac
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE550000,
virtual_start: 0xFE550000,
size: 0xa0000,
}, //dmac rkscr can i2c
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE5F0000,
virtual_start: 0xFE5F0000,
size: 0x1000,
}, //timer
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE600000,
virtual_start: 0xFE600000,
size: 0x60000,
}, //watchdog spi serial
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE660000,
virtual_start: 0xFE660000,
size: 0x1000,
}, //serial
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE680000,
virtual_start: 0xFE680000,
size: 0x10000,
}, //serial
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE6E0000,
virtual_start: 0xFE6E0000,
size: 0x1000,
}, //pwm wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE710000,
virtual_start: 0xFE710000,
size: 0x20000,
}, //tsadc saradc wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE740000,
virtual_start: 0xFE740000,
size: 0x10000,
}, //gpio
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE750000,
virtual_start: 0xFE750000,
size: 0x10000,
}, //gpio
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xFE760000,
virtual_start: 0xFE760000,
size: 0x20000,
}, //gpio
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe820000,
virtual_start: 0xfe820000,
size: 0x1000,
}, //phy wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe830000,
virtual_start: 0xfe830000,
size: 0x1000,
}, //phy wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe840000,
virtual_start: 0xfe840000,
size: 0x1000,
}, // combphy2_psq
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe870000,
virtual_start: 0xfe870000,
size: 0x1000,
}, //csi2-dphy-hw
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe8a0000,
virtual_start: 0xfe8a0000,
size: 0x20000,
}, //usb2-phy
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0xfe8c0000,
virtual_start: 0xfe8c0000,
size: 0x20000,
}, // pcie30phy
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0x300000000,
virtual_start: 0x300000000,
size: 0x40000000,
}, //pcie 0xfe260000 bar wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0x380000000,
virtual_start: 0x380000000,
size: 0x40000000,
}, //pcie 0xfe280000 bar wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0x3c0000000,
virtual_start: 0x3c0000000,
size: 0x400000,
}, //pcie 0xfe260000 dbi wangge
HvConfigMemoryRegion {
mem_type: MEM_TYPE_IO,
physical_start: 0x3c0800000,
virtual_start: 0x3c0800000,
size: 0x400000,
}, //pcie 0xfe280000 dbi wangge
];

pub const IRQ_WAKEUP_VIRTIO_DEVICE: usize = 32 + 0x20;
pub const ROOT_ZONE_IRQS_BITMAP: &[BitmapWord] = &get_irqs_bitmap(&[
0x84, 0x98, 0x40, 0x104, 0x105, 0x106, 0x107, 0x2d, 0x2e, 0x2b, 0x2a, 0x29, 0x33, 0x96, 0x11c,
0x44, 0x43, 0x42, 0x41, 0x8d,
]);

pub const ROOT_ARCH_ZONE_CONFIG: HvArchZoneConfig = HvArchZoneConfig {
is_aarch32: 0,
gic_config: GicConfig::Gicv3(Gicv3Config {
gicd_base: 0xfd400000,
gicd_size: 0x10000,
gicr_base: 0xfd460000,
gicr_size: 0xc0000,
gits_base: 0xfd440000,
gits_size: 0x20000,
}),
};
pub const ROOT_PCI_CONFIG: &[HvPciConfig] = &[
HvPciConfig {
ecam_base: 0xfe260000,
ecam_size: 0x400000,
io_base: 0xf4100000,
io_size: 0x100000,
pci_io_base: 0xf4100000,
mem32_base: 0xf4200000,
mem32_size: 0x1e00000,
pci_mem32_base: 0xf4200000,
mem64_base: 0x300000000,
mem64_size: 0x40000000,
pci_mem64_base: 0x300000000,
bus_range_begin: 0x0,
bus_range_end: 0x0f,
domain: 0x0,
},
////HvPciConfig {
//// ecam_base: 0x3c0400000,
//// ecam_size: 0x400000,
//// io_base: 0xf2100000,
//// io_size: 0x100000,
//// pci_io_base: 0xf2100000,
//// mem32_base: 0xf2200000,
//// mem32_size: 0x1e00000,
//// pci_mem32_base: 0xf2200000,
//// mem64_base: 0x340000000,
//// mem64_size: 0x40000000,
//// pci_mem64_base: 0x340000000,
//// bus_range_begin: 0x10,
//// bus_range_end: 0x1f,
//// domain: 0x1,
////},
HvPciConfig {
ecam_base: 0xfe280000,
ecam_size: 0x400000,
io_base: 0xf0100000,
io_size: 0x100000,
pci_io_base: 0xf0100000,
mem32_base: 0xf0200000,
mem32_size: 0x1e00000,
pci_mem32_base: 0xf0200000,
mem64_base: 0x380000000,
mem64_size: 0x40000000,
pci_mem64_base: 0x380000000,
bus_range_begin: 0x20,
bus_range_end: 0x2f,
domain: 0x2,
}
];

pub const ROOT_ZONE_IVC_CONFIG: [HvIvcConfig; 0] = [];

pub const ROOT_DWC_ATU_CONFIG: &[HvDwcAtuConfig] = &[
HvDwcAtuConfig {
ecam_base: 0xfe260000,
dbi_base: 0x3c0000000,
dbi_size: 0x400000,
apb_base: 0xfe260000,
apb_size: 0x10000,
cfg_base: 0xf4000000,
cfg_size: 0x100000,
io_cfg_atu_shared: 0,
},

HvDwcAtuConfig {
    ecam_base: 0xfe280000,
    dbi_base: 0x3c0800000,
    dbi_size: 0x400000,
    apb_base: 0xfe280000,
    apb_size: 0x10000,
    cfg_base: 0xf0000000,
    cfg_size: 0x100000,
    io_cfg_atu_shared: 0,
}

];

////pub const ROOT_DWC_ATU_CONFIG: &[HvDwcAtuConfig] = &[HvDwcAtuConfig {
//// ecam_base: 0x3c0400000,
//// dbi_base: 0x3c0400000,
//// dbi_size: 0x10000,
//// apb_base: 0xfe270000,
//// apb_size: 0x10000,
//// cfg_base: 0xf2000000,
//// cfg_size: 0x80000 * 2,
//// io_cfg_atu_shared: 0,
////}];

pub const ROOT_PCI_DEVS: [HvPciDevConfig; 2] = [
pci_dev!(0x0, 0x00, 0x0, 0x0, VpciDevType::Physical),
pci_dev!(0x0, 0x01, 0x0, 0x0, VpciDevType::Physical),
];

[dallasxy]

上一次出现“即使将 mem 配置写入 mem 节点后，仍然出现 unhandled mmio 错误”，原因是 hvisor.bin 实际占用了 Linux 所使用的内存区域。初步判断该问题与当前内存布局配置有关。
建议参考 platform/aarch64/rk3568/scripts/uboot_cmd 中的内存布局进行调整，并确保 DTB 中配置的 reserved-memory 区域能够完整覆盖 hvisor.bin 所占用的内存范围。
此外，还可以考虑使用 Release 模式进行编译，以减小 hvisor.bin 的体积，从而降低与 Linux 内存区域发生重叠的风险。

[agicy]

hvisor 在编译完成后会输出预期的内存布局，以 make BID=aarch64/rk3568 为例，输出可能如下：

Image Name:   hvisor_img
Created:      Tue May 19 13:57:34 2026
Image Type:   AArch64 Linux Kernel Image (uncompressed)
Data Size:    315624 Bytes = 308.23 KiB = 0.30 MiB
Load Address: 60080000
Entry Point:  60080000

hvisor build summary:
ARCH            = aarch64
BOARD           = rk3568
BID             = aarch64/rk3568
LOG             = info
FEATURES        = gicv3 uart_16550 pci dwc_pcie no_pcie_bar_realloc
RUSTC_TARGET    = aarch64-unknown-none
BUILD_PATH      = target/aarch64-unknown-none/release
HVISON_BIN_SIZE = 312K
START_ADDR      = 0x0000000060080000                # 起始地址
MEM_SIZE        = 0x4387000                         # 为 hvisor 预留的内存区域大小
END_ADDR        = 0x0000000064407000                # 终止地址
BUILD TIME      = Tue May 19 01:57:34 PM UTC 2026

hvisor build success!

zone0 的设备树中需要将为 hvisor 预留的内存写到 reserved-memory 节点中，目前 zone0 的设备树可能缺少了这一部分，可以参考之前对应的 Issue ( #223 ) 和 PR ( #224 )。

[Inquisitor-201]

This is a recurring problem that has appeared at least 10 times across different boards and refactoring cycles. The root cause is always the same: hvisor's physical memory range falls inside the root zone's RAM regions, causing silent memory corruption (page table stomping).

I've filed #310 to track this as a systemic issue. The PR I'm about to submit adds two mitigations:

1. A compile-time overlap check that fails the build if hvisor's range overlaps ROOT_ZONE_MEMORY_REGIONS
2. A runtime diagnostic that prints the actual cause when a fault address lands inside hvisor's memory

Neither is a complete fix — they just make the problem visible instead of silently corrupting memory.