There are several RISC-V CSRs that are not physical registers, but instead provide a restricted view of another CSR. Two examples of this in RISC-V are the mstatus/sstatus and the fcsr/frm/fflags CSRs. For mstatus/sstatus, the base register mstatus is a real register while the sstatus CSR only provides access to a subset of the mstatus CSR's fields. To support this with Sparta today, a functional model has to define both registers and manually keep them in sync. A register alias type would allow reads/writes to be performed on the underlying register.
There are several RISC-V CSRs that are not physical registers, but instead provide a restricted view of another CSR. Two examples of this in RISC-V are the mstatus/sstatus and the fcsr/frm/fflags CSRs. For mstatus/sstatus, the base register mstatus is a real register while the sstatus CSR only provides access to a subset of the mstatus CSR's fields. To support this with Sparta today, a functional model has to define both registers and manually keep them in sync. A register alias type would allow reads/writes to be performed on the underlying register.