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This repository was archived by the owner on Jul 15, 2026. It is now read-only.
This repository was archived by the owner on Jul 15, 2026. It is now read-only.

Add emulation support of ANDed clock signal for Timer A #26

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@sp1187

Timer A in SPG2xx generates its clock signal by ANDing its two clock sources together which can be used for more complex timer patterns, but currently veesem only supports the trivial cases of one source generating a frequency and the other always being high or low.

While the more complex signals are not used often in commercial games, it might be useful for homebrew.

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