From e6577cb9bd4b8aad9af1bb4bcff871f53bfa0bb2 Mon Sep 17 00:00:00 2001 From: Muhammad Bilal Malik <72543651+bilalmalik-lm@users.noreply.github.com> Date: Mon, 30 Nov 2020 18:24:06 +0500 Subject: [PATCH 1/6] Updated Index.js Added support for status command --- lib/index.js | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/lib/index.js b/lib/index.js index d0ccdc4..8334137 100644 --- a/lib/index.js +++ b/lib/index.js @@ -10,6 +10,7 @@ const scafolder = require('./scafolder'); const genVerilogBBX = require('./gen-verilog-bbx.js'); const genHeaderFile = require('./export-header-file.js'); const template = require('./template.js'); +const status = require('./status.js'); const genValidateBus = require('./validate-bus'); @@ -60,15 +61,16 @@ exports.scafolder = argv => new Promise(resolve => { }); }); +exports.status = argv => status(argv) + exports.get = argv => new Promise(resolve => { const path = argv.value; - duhCore.readDuh(argv) - // .then(duhCore.expandAll) - .then(duh => { - const val = get(duh, path) || duh; - console.log(JSON.stringify(val, null, 2)); - resolve(); - }); + console.log('path val ', path) + duhCore.readDuh(argv).then(duhCore.expandAll).then(duh1 => { + const val = get(duh1, path) || duh1; + console.log(JSON.stringify(val, null, 2)); + resolve(); + }); }); /* eslint no-console:0 */ From 0b48ac741d6358eda547dbbe0e22a11f3e324283 Mon Sep 17 00:00:00 2001 From: Muhammad Bilal Malik <72543651+bilalmalik-lm@users.noreply.github.com> Date: Mon, 30 Nov 2020 18:25:27 +0500 Subject: [PATCH 2/6] Updated index.js added support for status command --- lib/index.js | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/index.js b/lib/index.js index 8334137..a42eac6 100644 --- a/lib/index.js +++ b/lib/index.js @@ -61,7 +61,7 @@ exports.scafolder = argv => new Promise(resolve => { }); }); -exports.status = argv => status(argv) +exports.status = argv => status(argv); exports.get = argv => new Promise(resolve => { const path = argv.value; From 368b26756ddaf562b6f23a43a9a69f03f1e9994c Mon Sep 17 00:00:00 2001 From: Muhammad Bilal Malik <72543651+bilalmalik-lm@users.noreply.github.com> Date: Mon, 30 Nov 2020 18:31:52 +0500 Subject: [PATCH 3/6] Updated duh.js Modified yargs to embed status command --- bin/duh.js | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/bin/duh.js b/bin/duh.js index b85beef..7fe5d92 100755 --- a/bin/duh.js +++ b/bin/duh.js @@ -37,7 +37,18 @@ yargs } }) .command({ - command: 'validate filename', + command: 'status [filename]', + desc: 'creates status file', + handler: lib.status, + builder: yargs => { + yargs.positional('filename', { + type: 'string', + desc: 'document file' + }); + } + }) + .command({ + command: 'validate [filename]', aliases: ['val'], desc: 'validate document', handler: lib.validate, From 5f71a5fa44de18815d8dbe4fc5336a994c712a2f Mon Sep 17 00:00:00 2001 From: Adeel Liaquat <72543848+adeelliaquat-lm@users.noreply.github.com> Date: Mon, 30 Nov 2020 19:29:40 +0500 Subject: [PATCH 4/6] Sample Testcases Some Testcases built for the verification of duh status command --- test/dual_prefix.json5 | 730 ++++++++++++++++++++++++++++++++ test/orginal_prefix.json5 | 467 ++++++++++++++++++++ test/orginal_prefix_unmap.json5 | 514 ++++++++++++++++++++++ 3 files changed, 1711 insertions(+) create mode 100644 test/dual_prefix.json5 create mode 100644 test/orginal_prefix.json5 create mode 100644 test/orginal_prefix_unmap.json5 diff --git a/test/dual_prefix.json5 b/test/dual_prefix.json5 new file mode 100644 index 0000000..de30e67 --- /dev/null +++ b/test/dual_prefix.json5 @@ -0,0 +1,730 @@ +{ + "component": { + "vendor": "Lampro-Mellon", + "library": "blocks", + "name": "pio", + "version": "0.1.0", + "busInterfaces": [ + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_0-prefix_LM_lm-slave-AXI4-Lite_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_1-mapping_0-prefix_bil_P-slave-APB4_rtl"}, + {"$ref": "#/definitions/bundleDefinitions/bundle-root"} + ], + "addressSpaces": [], + "memoryMaps": [{ + "name": "CSR", + addressBlocks: [{ + name: 'csrAddressBlock', + baseAddress: 0, + range: 1024, width: 32, + usage: 'register', + volatile: false, access: 'read-write', + registers: [{ + name: 'ODATA', + addressOffset: 0, size: 32, + displayName: 'Output Data Register', + fields: [{name: 'data', bitWidth: 32, bitOffset: 0}] + }, { + name: 'OENABLE', addressOffset: 4, size: 32, + displayName: 'Data direction', + description: 'determines whether the pin is an input or an output. If the data direction bit is a 1, then the pin is an input', + fields: [{name: 'data', bitWidth: 32, bitOffset: 0}] + }, { + name: 'IDATA', addressOffset: 8, size: 32, + displayName: 'Input data', + description: 'read the port pins', + fields: [{name: 'data', bitWidth: 32, bitOffset: 0}] + }] + }] + }], + "model": { + "views": [], + "ports": { + "$ref": "#/definitions/ports" + } + }, + "fileSets": {}, + "pSchema": { + "type": "object", + "properties": { + "addrWidth": { + "title": "Address bus width", + "type": "integer", + "minimum": 6, + "maximum": 32, + "default": 12 + }, + "dataWidth": { + "title": "Data bus width", + "type": "integer", + "minimum": 32, + "maximum": 64, + "default": 32 + }, + "pioWidth": { + "title": "Number of IO pads", + "type": "integer", + "minimum": 1, + "maximum": 32, + "default": 32 + }, + "writeStrobeWidth": { + "title": "Write strobe width", + "type": "integer", + "minimum": 1, + "maximum": 4, + "default": 4 + } + } + }, + "busInterfaceAlts": [ + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_1-prefix_LM_lm-master-AXI4-Lite_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_2-prefix_LM_lm-slave-UH_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_3-prefix_LM_lm-slave-WO_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_4-prefix_LM_lm-slave-UL_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_5-prefix_LM_lm-master-AXI4_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_6-prefix_LM_lm-slave-JTAG_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_7-prefix_LM_lm-master-JTAG_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_1-mapping_1-prefix_bil_P-slave-SPRAM_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_1-mapping_2-prefix_bil_P-master-AXI4Stream_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_1-mapping_3-prefix_bil_P-slave-AXI4Stream_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_1-mapping_4-prefix_bil_P-master-APB4_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_1-mapping_5-prefix_bil_P-master-CLOCK_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_1-mapping_6-prefix_bil_P-slave-AHBLite_rtl"} + ] + }, + "definitions": { + "ports": { + "bil_PCLK": 1, + "bil_PRESETn": 1, + "bil_PSELx": 1, + "bil_PENABLE": 1, + "bil_PWRITE": 1, + "bil_PWDATA": "addrWidth", + "bil_PADDR": "addrWidth", + "readdata": "addrWidth", + "error": 1, + "ready": 1, + "bil_PRDATA": "-(addrWidth)", + "bil_PREADY": -1, + "bil_PSLVERR": -1, + "TX_detect": -1, + "RX_detect": -1, + "write_detect": -1, + "readdetect": -1, + "config_address": "-(addrWidth)", + "LM_lmawvalid": 1, + "LM_lmawready": -1, + "LM_lmawaddr": "addrWidth", + "LM_lmawprot": 3, + "LM_lmwvalid": 1, + "LM_lmwready": -1, + "LM_lmwdata": "dataWidth", + "LM_lmwstrb": "writeStrobeWidth", + "LM_lmbvalid": -1, + "LM_lmbready": 1, + "LM_lmbresp": -2, + "LM_lmarvalid": 1, + "LM_lmarready": -1, + "LM_lmaraddr": "addrWidth", + "LM_lmarprot": 3, + "LM_lmrvalid": -1, + "LM_lmrready": 1, + "LM_lmrdata": "-(dataWidth)", + "LM_lmrresp": -2, + "irq0": -1, + "irq1": -1, + "odata": "-(pioWidth)", + "oenable": "-(pioWidth)", + "idata": "pioWidth", + "clk": 1, + "reset_n": 1 + }, + "pg_cnt": 2, + "busDefinitions": { + "busint-portgroup_0-mapping_0-prefix_LM_lm-slave-AXI4-Lite_rtl": { + "name": "LM_lm", + "interfaceMode": "slave", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4-Lite", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "ARVALID": "LM_lmarvalid", + "AWVALID": "LM_lmawvalid", + "RVALID": "LM_lmrvalid", + "BVALID": "LM_lmbvalid", + "WVALID": "LM_lmwvalid", + "AWREADY": "LM_lmawready", + "ARREADY": "LM_lmarready", + "WREADY": "LM_lmwready", + "AWPROT": "LM_lmawprot", + "BREADY": "LM_lmbready", + "RREADY": "LM_lmrready", + "ARPROT": "LM_lmarprot", + "AWADDR": "LM_lmawaddr", + "BRESP": "LM_lmbresp", + "WSTRB": "LM_lmwstrb", + "ARADDR": "LM_lmaraddr", + "WDATA": "LM_lmwdata", + "RDATA": "LM_lmrdata", + "RRESP": "LM_lmrresp" + } + } + ] + }, + "busint-portgroup_0-mapping_1-prefix_LM_lm-master-AXI4-Lite_rtl": { + "name": "LM_lm", + "interfaceMode": "master", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4-Lite", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "RVALID": "LM_lmarvalid", + "ARVALID": "LM_lmrvalid", + "RREADY": "LM_lmarready", + "ARREADY": "LM_lmrready", + "WVALID": "LM_lmbvalid", + "BVALID": "LM_lmwvalid", + "BREADY": "LM_lmwready", + "WREADY": "LM_lmbready", + "WDATA": "LM_lmrdata", + "AWADDR": "LM_lmawready", + "RDATA": "LM_lmarprot", + "ACLK": "LM_lmwdata", + "__UMAP__": [ + "LM_lmawvalid", + "LM_lmbresp", + "LM_lmawaddr", + "LM_lmwstrb", + "LM_lmawprot", + "LM_lmrresp", + "LM_lmaraddr" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_2-prefix_LM_lm-slave-UH_rtl": { + "name": "LM_lm", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "TL", + "name": "UH", + "version": "1.0.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "d_valid": "LM_lmrvalid", + "a_valid": "LM_lmwvalid", + "d_ready": "LM_lmrready", + "a_ready": "LM_lmwready", + "a_data": "LM_lmwdata", + "d_data": "LM_lmrdata", + "a_address": "LM_lmawaddr", + "a_param": "LM_lmaraddr", + "d_param": "LM_lmrresp", + "a_mask": "LM_lmarprot", + "d_size": "LM_lmbvalid", + "a_code": "LM_lmawprot", + "a_size": "LM_lmawvalid", + "clk": "LM_lmwstrb", + "__UMAP__": [ + "LM_lmarvalid", + "LM_lmbresp", + "LM_lmarready", + "LM_lmbready", + "LM_lmawready" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_3-prefix_LM_lm-slave-WO_rtl": { + "name": "LM_lm", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "MEM", + "name": "WO", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "ADDR": "LM_lmaraddr", + "WRDATA": "LM_lmwdata", + "RDERR": "LM_lmarready", + "WREN": "LM_lmrready", + "BEN": "LM_lmbready", + "CLK": "LM_lmwstrb", + "__UMAP__": [ + "LM_lmarvalid", + "LM_lmrvalid", + "LM_lmawvalid", + "LM_lmbresp", + "LM_lmawaddr", + "LM_lmwready", + "LM_lmbvalid", + "LM_lmwvalid", + "LM_lmawprot", + "LM_lmrdata", + "LM_lmrresp", + "LM_lmarprot", + "LM_lmawready" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_4-prefix_LM_lm-slave-UL_rtl": { + "name": "LM_lm", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "TL", + "name": "UL", + "version": "1.0.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "a_valid": "LM_lmwvalid", + "d_valid": "LM_lmrvalid", + "a_ready": "LM_lmwready", + "d_ready": "LM_lmbready", + "a_data": "LM_lmwdata", + "a_address": "LM_lmaraddr", + "a_mask": "LM_lmawaddr", + "d_size": "LM_lmbresp", + "d_data": "LM_lmbvalid", + "a_code": "LM_lmawprot", + "a_size": "LM_lmarvalid", + "clk": "LM_lmwstrb", + "__UMAP__": [ + "LM_lmawvalid", + "LM_lmarready", + "LM_lmrdata", + "LM_lmrresp", + "LM_lmrready", + "LM_lmarprot", + "LM_lmawready" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_5-prefix_LM_lm-master-AXI4_rtl": { + "name": "LM_lm", + "interfaceMode": "master", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "RVALID": "LM_lmarvalid", + "ARVALID": "LM_lmrvalid", + "RREADY": "LM_lmarready", + "ARREADY": "LM_lmrready", + "WVALID": "LM_lmbvalid", + "BVALID": "LM_lmwvalid", + "BREADY": "LM_lmwready", + "WREADY": "LM_lmbready", + "RDATA": "LM_lmwdata", + "WDATA": "LM_lmrdata", + "AWUSER": [ + "LM_lmawready" + ], + "__UMAP__": [ + "LM_lmawvalid", + "LM_lmbresp", + "LM_lmawaddr", + "LM_lmwstrb", + "LM_lmawprot", + "LM_lmrresp", + "LM_lmarprot", + "LM_lmaraddr" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_6-prefix_LM_lm-slave-JTAG_rtl": { + "name": "LM_lm", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "TEST", + "name": "JTAG", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "TRST": "LM_lmwstrb", + "TMS": "LM_lmwdata", + "TDO": "LM_lmrdata", + "TDI": "LM_lmwvalid", + "__UMAP__": [ + "LM_lmarvalid", + "LM_lmrvalid", + "LM_lmawvalid", + "LM_lmbresp", + "LM_lmawaddr", + "LM_lmarready", + "LM_lmwready", + "LM_lmbvalid", + "LM_lmawprot", + "LM_lmrresp", + "LM_lmrready", + "LM_lmarprot", + "LM_lmbready", + "LM_lmawready", + "LM_lmaraddr" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_7-prefix_LM_lm-master-JTAG_rtl": { + "name": "LM_lm", + "interfaceMode": "master", + "busType": { + "vendor": "sifive.com", + "library": "TEST", + "name": "JTAG", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "TMS": "LM_lmrdata", + "TDO": "LM_lmwdata", + "TDI": "LM_lmbvalid", + "__UMAP__": [ + "LM_lmarvalid", + "LM_lmrvalid", + "LM_lmawaddr", + "LM_lmwvalid", + "LM_lmawprot", + "LM_lmbready", + "LM_lmawready", + "LM_lmawvalid", + "LM_lmbresp", + "LM_lmarready", + "LM_lmwready", + "LM_lmwstrb", + "LM_lmrresp", + "LM_lmrready", + "LM_lmarprot", + "LM_lmaraddr" + ] + } + } + ] + }, + "busint-portgroup_1-mapping_0-prefix_bil_P-slave-APB4_rtl": { + "name": "bil_P", + "interfaceMode": "slave", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "APB4", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "PRDATA": "bil_PRDATA", + "PSLVERR": "bil_PSLVERR", + "PADDR": "bil_PADDR", + "PWDATA": "bil_PWDATA", + "PWRITE": "bil_PWRITE", + "PREADY": "bil_PREADY", + "PCLK": "bil_PCLK", + "PENABLE": "bil_PENABLE", + "PRESETn": "bil_PRESETn", + "PSEL": "bil_PSELx" + } + } + ] + }, + "busint-portgroup_1-mapping_1-prefix_bil_P-slave-SPRAM_rtl": { + "name": "bil_P", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "MEM", + "name": "SPRAM", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "ADDR": "bil_PADDR", + "CLK": "bil_PCLK", + "RDDATA": "bil_PRDATA", + "WRDATA": "bil_PWDATA", + "RDERR": "bil_PSLVERR", + "BEN": "bil_PENABLE", + "WREN": "bil_PWRITE", + "__UMAP__": [ + "bil_PREADY", + "bil_PRESETn", + "bil_PSELx" + ] + } + } + ] + }, + "busint-portgroup_1-mapping_2-prefix_bil_P-master-AXI4Stream_rtl": { + "name": "bil_P", + "interfaceMode": "master", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4Stream", + "version": "r0p0_1" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "ARESETn": "bil_PRESETn", + "ACLK": "bil_PCLK", + "TDEST": "bil_PREADY", + "TSTRB": "bil_PSLVERR", + "TDATA": "bil_PWDATA", + "TKEEP": "bil_PWRITE", + "TLAST": "bil_PSELx", + "TUSER": [ + "bil_PRDATA" + ], + "__UMAP__": [ + "bil_PENABLE", + "bil_PADDR" + ] + } + } + ] + }, + "busint-portgroup_1-mapping_3-prefix_bil_P-slave-AXI4Stream_rtl": { + "name": "bil_P", + "interfaceMode": "slave", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4Stream", + "version": "r0p0_1" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "ARESETn": "bil_PRESETn", + "TREADY": "bil_PREADY", + "TDATA": "bil_PWDATA", + "ACLK": "bil_PCLK", + "TID": "bil_PRDATA", + "TUSER": [ + "bil_PADDR", + "bil_PSELx", + "bil_PWRITE", + "bil_PENABLE" + ], + "__UMAP__": [ + "bil_PSLVERR" + ] + } + } + ] + }, + "busint-portgroup_1-mapping_4-prefix_bil_P-master-APB4_rtl": { + "name": "bil_P", + "interfaceMode": "master", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "APB4", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "PCLK": "bil_PCLK", + "PRESETn": "bil_PRESETn", + "PWDATA": "bil_PRDATA", + "PRDATA": "bil_PWDATA", + "PSEL": "bil_PSLVERR", + "PADDR": "bil_PREADY", + "PWRITE": "bil_PWRITE", + "__UMAP__": [ + "bil_PSELx", + "bil_PENABLE", + "bil_PADDR" + ] + } + } + ] + }, + "busint-portgroup_1-mapping_5-prefix_bil_P-master-CLOCK_rtl": { + "name": "bil_P", + "interfaceMode": "master", + "busType": { + "vendor": "sifive.com", + "library": "PRCI", + "name": "CLOCK", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "CLOCK": "bil_PSLVERR", + "__UMAP__": [ + "bil_PRDATA", + "bil_PADDR", + "bil_PWDATA", + "bil_PSELx", + "bil_PWRITE", + "bil_PREADY", + "bil_PCLK", + "bil_PENABLE", + "bil_PRESETn" + ] + } + } + ] + }, + "busint-portgroup_1-mapping_6-prefix_bil_P-slave-AHBLite_rtl": { + "name": "bil_P", + "interfaceMode": "slave", + "busType": { + "vendor": "amba.com", + "library": "AMBA3", + "name": "AHBLite", + "version": "r2p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "HRESETn": "bil_PRESETn", + "HWRITE": "bil_PWRITE", + "HRDATA": "bil_PRDATA", + "HWDATA": "bil_PWDATA", + "HSELx": "bil_PSELx", + "HADDR": "bil_PADDR", + "HCLK": "bil_PCLK", + "__UMAP__": [ + "bil_PREADY", + "bil_PENABLE", + "bil_PSLVERR" + ] + } + } + ] + } + }, + "busMappedPortGroups": [ + [ + "portgroup_0", + [ + [ + "num_ports", + 19 + ], + [ + "prefix", + "LM_lm" + ], + [ + "num-direction-mismatch", + 0 + ], + [ + "num-width-mismatch", + 0 + ] + ] + ], + [ + "portgroup_1", + [ + [ + "num_ports", + 10 + ], + [ + "prefix", + "bil_P" + ], + [ + "num-direction-mismatch", + 0 + ], + [ + "num-width-mismatch", + 0 + ] + ] + ] + ], + "bundleDefinitions": { + "bundle-root": { + "name": "root", + "interfaceMode": null, + "busType": "bundle", + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "readdata": "readdata", + "error": "error", + "ready": "ready", + "readdetect": "readdetect", + "irq": [ + "irq0", + "irq1" + ], + "odata": "odata", + "oenable": "oenable", + "idata": "idata", + "clk": "clk", + "reset_n": "reset_n", + "config_address": "config_address", + "write_detect": "write_detect", + "rx_detect": "RX_detect", + "tx_detect": "TX_detect" + } + } + ] + } + } + } +} diff --git a/test/orginal_prefix.json5 b/test/orginal_prefix.json5 new file mode 100644 index 0000000..c7e3d48 --- /dev/null +++ b/test/orginal_prefix.json5 @@ -0,0 +1,467 @@ +{ + "component": { + "vendor": "Lampro-Mellon", + "library": "blocks", + "name": "pio", + "version": "0.1.0", + "busInterfaces": [ + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_0-prefix_t_ctrl-slave-AXI4-Lite_rtl"}, + {"$ref": "#/definitions/bundleDefinitions/bundle-root"} + ], + "addressSpaces": [], + "memoryMaps": [{ + "name": "CSR", + addressBlocks: [{ + name: 'csrAddressBlock', + baseAddress: 0, + range: 1024, width: 32, + usage: 'register', + volatile: false, access: 'read-write', + registers: [{ + name: 'ODATA', + addressOffset: 0, size: 32, + displayName: 'Output Data Register', + fields: [{name: 'data', bitWidth: 32, bitOffset: 0}] + }, { + name: 'OENABLE', addressOffset: 4, size: 32, + displayName: 'Data direction', + description: 'determines whether the pin is an input or an output. If the data direction bit is a 1, then the pin is an input', + fields: [{name: 'data', bitWidth: 32, bitOffset: 0}] + }, { + name: 'IDATA', addressOffset: 8, size: 32, + displayName: 'Input data', + description: 'read the port pins', + fields: [{name: 'data', bitWidth: 32, bitOffset: 0}] + }] + }] + }], + "model": { + "views": [], + "ports": { + "$ref": "#/definitions/ports" + } + }, + "fileSets": {}, + "pSchema": { + "type": "object", + "properties": { + "addrWidth": { + "title": "Address bus width", + "type": "integer", + "minimum": 6, + "maximum": 32, + "default": 12 + }, + "dataWidth": { + "title": "Data bus width", + "type": "integer", + "minimum": 32, + "maximum": 64, + "default": 32 + }, + "pioWidth": { + "title": "Number of IO pads", + "type": "integer", + "minimum": 1, + "maximum": 32, + "default": 32 + }, + "writeStrobeWidth": { + "title": "Write strobe width", + "type": "integer", + "minimum": 1, + "maximum": 4, + "default": 4 + } + } + }, + "busInterfaceAlts": [ + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_1-prefix_t_ctrl-slave-LMAXI4-Lite_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_2-prefix_t_ctrl-slave-AXI5-Lite_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_3-prefix_t_ctrl-master-AXI4-Lite_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_4-prefix_t_ctrl-master-LMAXI4-Lite_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_5-prefix_t_ctrl-slave-WO_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_6-prefix_t_ctrl-master-INTERRUPT_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_7-prefix_t_ctrl-slave-INTERRUPT_rtl"} + ] + }, + "definitions": { + "ports": { + "t_ctrl_awvalid": 1, + "t_ctrl_awready": -1, + "t_ctrl_awaddr": "addrWidth", + "t_ctrl_awprot": 3, + "t_ctrl_wvalid": 1, + "t_ctrl_wready": -1, + "t_ctrl_wdata": "dataWidth", + "t_ctrl_wstrb": "writeStrobeWidth", + "t_ctrl_bvalid": -1, + "t_ctrl_bready": 1, + "t_ctrl_bresp": -2, + "t_ctrl_arvalid": 1, + "t_ctrl_arready": -1, + "t_ctrl_araddr": "addrWidth", + "t_ctrl_arprot": 3, + "t_ctrl_rvalid": -1, + "t_ctrl_rready": 1, + "t_ctrl_rdata": "-(dataWidth)", + "t_ctrl_rresp": -2, + "irq0": -1, + "irq1": -1, + "odata": "-(pioWidth)", + "oenable": "-(pioWidth)", + "idata": "pioWidth", + "clk": 1, + "reset_n": 1 + }, + "pg_cnt": 1, + "busDefinitions": { + "busint-portgroup_0-mapping_0-prefix_t_ctrl-slave-AXI4-Lite_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4-Lite", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "RDATA": "t_ctrl_rdata", + "RRESP": "t_ctrl_rresp", + "WVALID": "t_ctrl_wvalid", + "ARPROT": "t_ctrl_arprot", + "BVALID": "t_ctrl_bvalid", + "ARREADY": "t_ctrl_arready", + "AWVALID": "t_ctrl_awvalid", + "ARADDR": "t_ctrl_araddr", + "AWADDR": "t_ctrl_awaddr", + "WDATA": "t_ctrl_wdata", + "BRESP": "t_ctrl_bresp", + "ARVALID": "t_ctrl_arvalid", + "RREADY": "t_ctrl_rready", + "RVALID": "t_ctrl_rvalid", + "BREADY": "t_ctrl_bready", + "WSTRB": "t_ctrl_wstrb", + "AWREADY": "t_ctrl_awready", + "WREADY": "t_ctrl_wready", + "AWPROT": "t_ctrl_awprot" + } + } + ] + }, + "busint-portgroup_0-mapping_1-prefix_t_ctrl-slave-LMAXI4-Lite_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "lampromellon.com", + "library": "LM", + "name": "LMAXI4-Lite", + "version": "LM_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "LMAWVALID": "t_ctrl_awvalid", + "LMARVALID": "t_ctrl_arvalid", + "LMWVALID": "t_ctrl_wvalid", + "LMBVALID": "t_ctrl_bvalid", + "LMRVALID": "t_ctrl_rvalid", + "LMAWREADY": "t_ctrl_awready", + "LMARREADY": "t_ctrl_arready", + "LMBREADY": "t_ctrl_bready", + "LMWREADY": "t_ctrl_wready", + "LMAWPROT": "t_ctrl_awprot", + "LMARPROT": "t_ctrl_arprot", + "LMRREADY": "t_ctrl_rready", + "LMAWADDR": "t_ctrl_awaddr", + "LMARADDR": "t_ctrl_araddr", + "LMBRESP": "t_ctrl_bresp", + "LMWSTRB": "t_ctrl_wstrb", + "LMRDATA": "t_ctrl_rdata", + "LMRRESP": "t_ctrl_rresp", + "LMWDATA": "t_ctrl_wdata" + } + } + ] + }, + "busint-portgroup_0-mapping_2-prefix_t_ctrl-slave-AXI5-Lite_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "amba.com", + "library": "AMBA5", + "name": "AXI5-Lite", + "version": "bil_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "RDATA": "t_ctrl_rdata", + "RRESP": "t_ctrl_rresp", + "WVALID": "t_ctrl_wvalid", + "ARPROT": "t_ctrl_arprot", + "BVALID": "t_ctrl_bvalid", + "ARREADY": "t_ctrl_arready", + "AWVALID": "t_ctrl_awvalid", + "ARADDR": "t_ctrl_araddr", + "AWADDR": "t_ctrl_awaddr", + "WDATA": "t_ctrl_wdata", + "BRESP": "t_ctrl_bresp", + "ARVALID": "t_ctrl_arvalid", + "RREADY": "t_ctrl_rready", + "RVALID": "t_ctrl_rvalid", + "BREADY": "t_ctrl_bready", + "WSTRB": "t_ctrl_wstrb", + "AWREADY": "t_ctrl_awready", + "WREADY": "t_ctrl_wready", + "AWPROT": "t_ctrl_awprot" + } + } + ] + }, + "busint-portgroup_0-mapping_3-prefix_t_ctrl-master-AXI4-Lite_rtl": { + "name": "t_ctrl", + "interfaceMode": "master", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4-Lite", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "RVALID": "t_ctrl_arvalid", + "ARVALID": "t_ctrl_rvalid", + "RREADY": "t_ctrl_arready", + "ARREADY": "t_ctrl_rready", + "BVALID": "t_ctrl_wvalid", + "WVALID": "t_ctrl_bvalid", + "WREADY": "t_ctrl_bready", + "BREADY": "t_ctrl_wready", + "WDATA": "t_ctrl_rdata", + "AWADDR": "t_ctrl_awready", + "WSTRB": "t_ctrl_bresp", + "ACLK": "t_ctrl_awvalid", + "__UMAP__": [ + "t_ctrl_rresp", + "t_ctrl_arprot", + "t_ctrl_araddr", + "t_ctrl_awaddr", + "t_ctrl_wdata", + "t_ctrl_wstrb", + "t_ctrl_awprot" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_4-prefix_t_ctrl-master-LMAXI4-Lite_rtl": { + "name": "t_ctrl", + "interfaceMode": "master", + "busType": { + "vendor": "lampromellon.com", + "library": "LM", + "name": "LMAXI4-Lite", + "version": "LM_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "LMRVALID": "t_ctrl_arvalid", + "LMARVALID": "t_ctrl_rvalid", + "LMRREADY": "t_ctrl_arready", + "LMARREADY": "t_ctrl_rready", + "LMBVALID": "t_ctrl_wvalid", + "LMWVALID": "t_ctrl_bvalid", + "LMWREADY": "t_ctrl_bready", + "LMBREADY": "t_ctrl_wready", + "LMWDATA": "t_ctrl_rdata", + "LMIRQ": "t_ctrl_awvalid", + "LMAWUSER": [ + "t_ctrl_awready" + ], + "__UMAP__": [ + "t_ctrl_rresp", + "t_ctrl_arprot", + "t_ctrl_araddr", + "t_ctrl_awaddr", + "t_ctrl_wdata", + "t_ctrl_bresp", + "t_ctrl_wstrb", + "t_ctrl_awprot" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_5-prefix_t_ctrl-slave-WO_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "MEM", + "name": "WO", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "ADDR": "t_ctrl_araddr", + "WRDATA": "t_ctrl_wdata", + "BEN": "t_ctrl_bready", + "CLK": "t_ctrl_wvalid", + "__UMAP__": [ + "t_ctrl_rdata", + "t_ctrl_rresp", + "t_ctrl_arprot", + "t_ctrl_bvalid", + "t_ctrl_arready", + "t_ctrl_awvalid", + "t_ctrl_awaddr", + "t_ctrl_arvalid", + "t_ctrl_bresp", + "t_ctrl_rready", + "t_ctrl_rvalid", + "t_ctrl_wstrb", + "t_ctrl_awready", + "t_ctrl_wready", + "t_ctrl_awprot" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_6-prefix_t_ctrl-master-INTERRUPT_rtl": { + "name": "t_ctrl", + "interfaceMode": "master", + "busType": { + "vendor": "sifive.com", + "library": "PRCI", + "name": "INTERRUPT", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "IRQ": "t_ctrl_rvalid", + "__UMAP__": [ + "t_ctrl_wvalid", + "t_ctrl_arprot", + "t_ctrl_arready", + "t_ctrl_awaddr", + "t_ctrl_arvalid", + "t_ctrl_bresp", + "t_ctrl_rready", + "t_ctrl_bready", + "t_ctrl_wready", + "t_ctrl_awprot", + "t_ctrl_rdata", + "t_ctrl_rresp", + "t_ctrl_bvalid", + "t_ctrl_awvalid", + "t_ctrl_araddr", + "t_ctrl_wdata", + "t_ctrl_wstrb", + "t_ctrl_awready" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_7-prefix_t_ctrl-slave-INTERRUPT_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "PRCI", + "name": "INTERRUPT", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "IRQ": "t_ctrl_arvalid", + "__UMAP__": [ + "t_ctrl_wvalid", + "t_ctrl_arprot", + "t_ctrl_arready", + "t_ctrl_awaddr", + "t_ctrl_bresp", + "t_ctrl_rready", + "t_ctrl_rvalid", + "t_ctrl_bready", + "t_ctrl_wready", + "t_ctrl_awprot", + "t_ctrl_rdata", + "t_ctrl_rresp", + "t_ctrl_bvalid", + "t_ctrl_awvalid", + "t_ctrl_araddr", + "t_ctrl_wdata", + "t_ctrl_wstrb", + "t_ctrl_awready" + ] + } + } + ] + } + }, + "busMappedPortGroups": [ + [ + "portgroup_0", + [ + [ + "num_ports", + 19 + ], + [ + "prefix", + "t_ctrl_" + ], + [ + "num-direction-mismatch", + 0 + ], + [ + "num-width-mismatch", + 0 + ] + ] + ] + ], + "bundleDefinitions": { + "bundle-root": { + "name": "root", + "interfaceMode": null, + "busType": "bundle", + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "irq": [ + "irq0", + "irq1" + ], + "odata": "odata", + "oenable": "oenable", + "idata": "idata", + "clk": "clk", + "reset_n": "reset_n" + } + } + ] + } + } + } +} diff --git a/test/orginal_prefix_unmap.json5 b/test/orginal_prefix_unmap.json5 new file mode 100644 index 0000000..cae436e --- /dev/null +++ b/test/orginal_prefix_unmap.json5 @@ -0,0 +1,514 @@ +{ + "component": { + "vendor": "Lampro-Mellon", + "library": "blocks", + "name": "pio", + "version": "0.1.0", + "busInterfaces": [ + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_0-prefix_t_ctrl-slave-AXI4-Lite_rtl"}, + {"$ref": "#/definitions/bundleDefinitions/bundle-root"} + ], + "addressSpaces": [], + "memoryMaps": [{ + "name": "CSR", + addressBlocks: [{ + name: 'csrAddressBlock', + baseAddress: 0, + range: 1024, width: 32, + usage: 'register', + volatile: false, access: 'read-write', + registers: [{ + name: 'ODATA', + addressOffset: 0, size: 32, + displayName: 'Output Data Register', + fields: [{name: 'data', bitWidth: 32, bitOffset: 0}] + }, { + name: 'OENABLE', addressOffset: 4, size: 32, + displayName: 'Data direction', + description: 'determines whether the pin is an input or an output. If the data direction bit is a 1, then the pin is an input', + fields: [{name: 'data', bitWidth: 32, bitOffset: 0}] + }, { + name: 'IDATA', addressOffset: 8, size: 32, + displayName: 'Input data', + description: 'read the port pins', + fields: [{name: 'data', bitWidth: 32, bitOffset: 0}] + }] + }] + }], + "model": { + "views": [], + "ports": { + "$ref": "#/definitions/ports" + } + }, + "fileSets": {}, + "pSchema": { + "type": "object", + "properties": { + "addrWidth": { + "title": "Address bus width", + "type": "integer", + "minimum": 6, + "maximum": 32, + "default": 12 + }, + "dataWidth": { + "title": "Data bus width", + "type": "integer", + "minimum": 32, + "maximum": 64, + "default": 32 + }, + "pioWidth": { + "title": "Number of IO pads", + "type": "integer", + "minimum": 1, + "maximum": 32, + "default": 32 + }, + "writeStrobeWidth": { + "title": "Write strobe width", + "type": "integer", + "minimum": 1, + "maximum": 4, + "default": 4 + } + } + }, + "busInterfaceAlts": [ + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_1-prefix_t_ctrl-master-AXI4-Lite_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_2-prefix_t_ctrl-master-AXI4_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_3-prefix_t_ctrl-slave-UL_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_4-prefix_t_ctrl-slave-UH_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_5-prefix_t_ctrl-master-JTAG_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_6-prefix_t_ctrl-slave-JTAG_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_7-prefix_t_ctrl-slave-pipelined_rtl"}, + {"$ref": "#/definitions/busDefinitions/busint-portgroup_0-mapping_8-prefix_t_ctrl-slave-unpipelined_rtl"} + ] + }, + "definitions": { + "ports": { + "t_ctrl_awvalid": 1, + "t_ctrl_awready": -1, + "t_ctrl_awaddr": 32, + "t_ctrl_awprot": 3, + "t_ctrl_wvalid": 1, + "t_ctrl_wready": -1, + "t_ctrl_wdata": 32, + "t_ctrl_wstrb": 4, + "t_ctrl_bvalid": -1, + "t_ctrl_bready": 1, + "t_ctrl_bresp": -2, + "t_ctrl_arvalid": 1, + "t_ctrl_arready": -1, + "t_ctrl_araddr": 32, + "t_ctrl_arprot": 3, + "t_ctrl_rvalid": -1, + "t_ctrl_rready": 1, + "t_ctrl_rdata": -32, + "t_ctrl_rresp": -2, + "irq0": -1, + "irq1": -1, + "odata": -10, + "oenable": -10, + "idata": 10, + "clk": 1, + "reset_n": 1 + }, + "pg_cnt": 1, + "busDefinitions": { + "busint-portgroup_0-mapping_0-prefix_t_ctrl-slave-AXI4-Lite_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4-Lite", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "AWADDR": "t_ctrl_awaddr", + "BREADY": "t_ctrl_bready", + "ARVALID": "t_ctrl_arvalid", + "ARREADY": "t_ctrl_arready", + "RDATA": "t_ctrl_rdata", + "BRESP": "t_ctrl_bresp", + "RREADY": "t_ctrl_rready", + "AWVALID": "t_ctrl_awvalid", + "AWREADY": "t_ctrl_awready", + "WVALID": "t_ctrl_wvalid", + "WSTRB": "t_ctrl_wstrb", + "ARPROT": "t_ctrl_arprot", + "BVALID": "t_ctrl_bvalid", + "RVALID": "t_ctrl_rvalid", + "AWPROT": "t_ctrl_awprot", + "RRESP": "t_ctrl_rresp", + "ARADDR": "t_ctrl_araddr", + "WREADY": "t_ctrl_wready", + "__UMAP__": [ + "t_ctrl_wdata" + ], + } + } + ] + }, + "busint-portgroup_0-mapping_1-prefix_t_ctrl-master-AXI4-Lite_rtl": { + "name": "t_ctrl", + "interfaceMode": "master", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4-Lite", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "RVALID": "t_ctrl_arvalid", + "ARVALID": "t_ctrl_rvalid", + "RREADY": "t_ctrl_arready", + "ARREADY": "t_ctrl_rready", + "WREADY": "t_ctrl_bready", + "BVALID": "t_ctrl_wvalid", + "WVALID": "t_ctrl_bvalid", + "BREADY": "t_ctrl_wready", + "WDATA": "t_ctrl_rdata", + "RDATA": "t_ctrl_wdata", + "AWUSER": [ + "t_ctrl_awready" + ], + "__UMAP__": [ + "t_ctrl_awaddr", + "t_ctrl_bresp", + "t_ctrl_awvalid", + "t_ctrl_wstrb", + "t_ctrl_arprot", + "t_ctrl_awprot", + "t_ctrl_rresp", + "t_ctrl_araddr" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_2-prefix_t_ctrl-master-AXI4_rtl": { + "name": "t_ctrl", + "interfaceMode": "master", + "busType": { + "vendor": "amba.com", + "library": "AMBA4", + "name": "AXI4", + "version": "r0p0_0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "RVALID": "t_ctrl_arvalid", + "ARVALID": "t_ctrl_rvalid", + "RREADY": "t_ctrl_arready", + "ARREADY": "t_ctrl_rready", + "WREADY": "t_ctrl_bready", + "BVALID": "t_ctrl_wvalid", + "WVALID": "t_ctrl_bvalid", + "BREADY": "t_ctrl_wready", + "WDATA": "t_ctrl_rdata", + "RDATA": "t_ctrl_wdata", + "RID": "t_ctrl_araddr", + "AWUSER": [ + "t_ctrl_awready" + ], + "__UMAP__": [ + "t_ctrl_awaddr", + "t_ctrl_bresp", + "t_ctrl_awvalid", + "t_ctrl_wstrb", + "t_ctrl_arprot", + "t_ctrl_awprot", + "t_ctrl_rresp" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_3-prefix_t_ctrl-slave-UL_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "TL", + "name": "UL", + "version": "1.0.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "d_ready": "t_ctrl_rready", + "a_valid": "t_ctrl_wvalid", + "a_ready": "t_ctrl_wready", + "d_valid": "t_ctrl_bvalid", + "a_data": "t_ctrl_wdata", + "d_data": "t_ctrl_rdata", + "a_address": "t_ctrl_araddr", + "d_size": "t_ctrl_rresp", + "a_code": "t_ctrl_awprot", + "a_size": "t_ctrl_bready", + "a_mask": "t_ctrl_wstrb", + "clk": "t_ctrl_awvalid", + "__UMAP__": [ + "t_ctrl_awaddr", + "t_ctrl_arvalid", + "t_ctrl_arready", + "t_ctrl_bresp", + "t_ctrl_rvalid", + "t_ctrl_arprot", + "t_ctrl_awready" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_4-prefix_t_ctrl-slave-UH_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "TL", + "name": "UH", + "version": "1.0.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "d_ready": "t_ctrl_rready", + "a_valid": "t_ctrl_wvalid", + "d_valid": "t_ctrl_rvalid", + "a_ready": "t_ctrl_wready", + "d_data": "t_ctrl_rdata", + "a_data": "t_ctrl_wdata", + "a_address": "t_ctrl_araddr", + "a_param": "t_ctrl_arprot", + "a_size": "t_ctrl_bready", + "d_size": "t_ctrl_bvalid", + "a_code": "t_ctrl_awprot", + "a_mask": "t_ctrl_awaddr", + "clk": "t_ctrl_awvalid", + "__UMAP__": [ + "t_ctrl_arready", + "t_ctrl_arvalid", + "t_ctrl_bresp", + "t_ctrl_wstrb", + "t_ctrl_awready", + "t_ctrl_rresp" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_5-prefix_t_ctrl-master-JTAG_rtl": { + "name": "t_ctrl", + "interfaceMode": "master", + "busType": { + "vendor": "sifive.com", + "library": "TEST", + "name": "JTAG", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "TDI": "t_ctrl_bvalid", + "TDO": "t_ctrl_rready", + "TRST": "t_ctrl_rvalid", + "TCK": "t_ctrl_arready", + "TMS": "t_ctrl_awready", + "__UMAP__": [ + "t_ctrl_awaddr", + "t_ctrl_bready", + "t_ctrl_arvalid", + "t_ctrl_rdata", + "t_ctrl_bresp", + "t_ctrl_awvalid", + "t_ctrl_arprot", + "t_ctrl_wvalid", + "t_ctrl_wstrb", + "t_ctrl_awprot", + "t_ctrl_rresp", + "t_ctrl_araddr", + "t_ctrl_wready", + "t_ctrl_wdata" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_6-prefix_t_ctrl-slave-JTAG_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "TEST", + "name": "JTAG", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "TDI": "t_ctrl_wvalid", + "TDO": "t_ctrl_bvalid", + "TRST": "t_ctrl_rready", + "TCK": "t_ctrl_awvalid", + "TMS": "t_ctrl_bready", + "__UMAP__": [ + "t_ctrl_awaddr", + "t_ctrl_arready", + "t_ctrl_arvalid", + "t_ctrl_rdata", + "t_ctrl_bresp", + "t_ctrl_wstrb", + "t_ctrl_rvalid", + "t_ctrl_arprot", + "t_ctrl_awready", + "t_ctrl_awprot", + "t_ctrl_rresp", + "t_ctrl_araddr", + "t_ctrl_wready", + "t_ctrl_wdata" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_7-prefix_t_ctrl-slave-pipelined_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "SCIE", + "name": "pipelined", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "valid": "t_ctrl_wvalid", + "rd": "t_ctrl_rdata", + "rs2": "t_ctrl_araddr", + "rs1": "t_ctrl_awaddr", + "__UMAP__": [ + "t_ctrl_bready", + "t_ctrl_arready", + "t_ctrl_arvalid", + "t_ctrl_bresp", + "t_ctrl_rready", + "t_ctrl_awvalid", + "t_ctrl_wstrb", + "t_ctrl_rvalid", + "t_ctrl_arprot", + "t_ctrl_awready", + "t_ctrl_bvalid", + "t_ctrl_awprot", + "t_ctrl_rresp", + "t_ctrl_wready", + "t_ctrl_wdata" + ] + } + } + ] + }, + "busint-portgroup_0-mapping_8-prefix_t_ctrl-slave-unpipelined_rtl": { + "name": "t_ctrl", + "interfaceMode": "slave", + "busType": { + "vendor": "sifive.com", + "library": "SCIE", + "name": "unpipelined", + "version": "0.1.0" + }, + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "rd": "t_ctrl_rdata", + "rs2": "t_ctrl_araddr", + "rs1": "t_ctrl_awaddr", + "__UMAP__": [ + "t_ctrl_bready", + "t_ctrl_arready", + "t_ctrl_bresp", + "t_ctrl_rvalid", + "t_ctrl_arprot", + "t_ctrl_awprot", + "t_ctrl_rresp", + "t_ctrl_wready", + "t_ctrl_arvalid", + "t_ctrl_rready", + "t_ctrl_awvalid", + "t_ctrl_awready", + "t_ctrl_wvalid", + "t_ctrl_wstrb", + "t_ctrl_bvalid", + "t_ctrl_wdata" + ] + } + } + ] + } + }, + "busMappedPortGroups": [ + [ + "portgroup_0", + [ + [ + "num_ports", + 19 + ], + [ + "prefix", + "t_ctrl_" + ], + [ + "num-direction-mismatch", + 0 + ], + [ + "num-width-mismatch", + 0 + ] + ] + ] + ], + "bundleDefinitions": { + "bundle-root": { + "name": "root", + "interfaceMode": null, + "busType": "bundle", + "abstractionTypes": [ + { + "viewRef": "RTLview", + "portMaps": { + "irq": [ + "irq0", + "irq1" + ], + "odata": "odata", + "oenable": "oenable", + "idata": "idata", + "clk": "clk", + "reset_n": "reset_n" + } + } + ] + } + } + } +} From bf5526b2dd97a18b1de3762850f8db17e06361c7 Mon Sep 17 00:00:00 2001 From: Adeel Liaquat <72543848+adeelliaquat-lm@users.noreply.github.com> Date: Mon, 30 Nov 2020 19:32:42 +0500 Subject: [PATCH 5/6] status.js Logic implemention for duh status --- lib/status.js | 114 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 114 insertions(+) create mode 100644 lib/status.js diff --git a/lib/status.js b/lib/status.js new file mode 100644 index 0000000..cd79907 --- /dev/null +++ b/lib/status.js @@ -0,0 +1,114 @@ +'use strict'; +const path = require('path'); +var fs = require('fs'); +const chalk = require('chalk'); +var jsyaml = require('js-yaml'); +let ports; +let busDefs; +let regKeys; +let keysLen = 0; +const common = argv => new Promise(() => { + const folderName = path.basename(process.cwd()); + const fileName = argv.filename || folderName + '.json5'; + let rawdata = fs.readFileSync(fileName); + let ldData = jsyaml.safeLoadAll(rawdata); + let defs = ldData[0]['definitions']; + let comps = ldData[0]['component']; + let busInt = comps['busInterfaces']; + let addrSpaces = comps['addressSpaces']; + let memMaps = comps['memoryMaps']; + let addrBlocks; + let regs; + let cnt = 0; + let outs = 0; + let ins = 0; + let str = ''; + let metrics = ['Ports\t\t', 'Bus Interfaces\t', 'Un-mapped Ports', 'Address Spaces\t', 'Memory Maps\t', 'Address Blocks\t', 'Registers\t', 'Fields\t\t']; + let size = Array(8).fill(0); + if (defs != undefined) { + ports = defs['ports']; + busDefs = defs['busDefinitions']; + } + if (ports != undefined) { + let portskeys = Object.keys(ports); + let portswidth = Object.values(ports); + + for (let index = 0; index < portswidth.length; index++) { + if (typeof(portswidth[index]) == 'number') { + if (portswidth[index]>0) { + ins = ins + portswidth[index]; + } else { + outs = outs + portswidth[index]; + } + } else { + str = '(Expression Excluded)'; + } + } + size[0] = portskeys.length; + } + if (busInt != undefined) { + size[1] = busInt.length; + } + if (addrSpaces != undefined) { + size[3] = addrSpaces.length; + } + if (memMaps != undefined) { + size[4] = memMaps.length; + if (size[4]>0) { + addrBlocks = memMaps[0]['addressBlocks']; + } + } + if (addrBlocks != undefined) { + regs = addrBlocks[0]['registers']; + size[5] = addrBlocks.length; + } + if (regs != undefined) { + size[6] = regs.length; + for (var values in regs){ + regKeys = Object.keys(regs[values]['fields'][0]); + keysLen = keysLen + regKeys.length; + size[7] = keysLen; + } + } + console.info(chalk.bold.blue('\n\t METRICS OF COMPONENT\t\n')); + for (let index = 0; index < size.length; index++) { + if (index == 2 && size[2] > 0) { + console.log('\t', metrics[index], ' : ', chalk.red(size[index])); + } else { + console.log('\t', metrics[index], ' : ', size[index]); + } + + if (index == 1 && size[1] >=1) { + console.log(chalk.bold.cyan('\t -\t Number\t\t : type\t\t : name\t\t ')); + for (let index = 0; index < (size[1]); index++) { + let ref = busInt[index]['$ref']; + let refList = ref.split('-'); + let refListPg = ref.split('/'); + let portKeys = refListPg[3]; + let defBsbnd = refList[0].split('/'); + let typeMs = refList[4]; + let typName = refList[5]; + if (defBsbnd[2] == 'busDefinitions') { + for (let index = 6; index <= refList.length-1; index++) { + typName = typName + ' ' + refList[index]; + } + typName = typName.split('_')[0]; + console.log('\t ->\t', cnt, '\t\t :', typeMs, '\t\t :', typName); + busDefs= defs['busDefinitions'][portKeys]; + let umaps = busDefs['abstractionTypes'][0]['portMaps']['__UMAP__']; + if (umaps != undefined) { + size[2] = size[2] + umaps.length; + } + } else { + console.log('\t ->\t', cnt, '\t\t :', 'null\t\t :', refList[1]); + } + cnt = cnt + 1; + } + } + } + console.log('\t Input Width \t : ', ins, 'bits', chalk.red(str)); + console.log('\t Output Width\t : ', Math.abs(outs), 'bits', chalk.red(str)); + console.log('\n'); +}); + +module.exports = common; From b5287b53f049eb3f5e42a8f10b41724909c63d95 Mon Sep 17 00:00:00 2001 From: Adeel Liaquat <72543848+adeelliaquat-lm@users.noreply.github.com> Date: Wed, 20 Jan 2021 16:44:20 +0500 Subject: [PATCH 6/6] Update status.js --- lib/status.js | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lib/status.js b/lib/status.js index cd79907..677ba5a 100644 --- a/lib/status.js +++ b/lib/status.js @@ -112,3 +112,6 @@ const common = argv => new Promise(() => { }); module.exports = common; + +/* eslint no-console:0 */ +/* eslint complexity: [2, 23] */