From acaf80f10fd2fa42974410db61482f68e28209d8 Mon Sep 17 00:00:00 2001 From: Koji Matsuoka Date: Fri, 12 Jan 2018 09:35:03 +0900 Subject: [PATCH] du_cmm: Release for Yocto v3.4.0 This patch made the following correspondence. - Corresponds to kernel v 4.14. - Double buffer only is supported. - Fix CLU / LUT update timing. - Add CMM Channel occupation mode. - Fix Close process. Signed-off-by: Koji Matsuoka --- .../0001-drm-rcar-du-Add-DU-CMM-support.patch | 911 +++++++++++------- ...9.bbappend => linux-renesas_4.14.bbappend} | 0 tmp/du_cmm | 1 + 3 files changed, 552 insertions(+), 360 deletions(-) rename meta-rcar-gen3/recipes-kernel/linux/{linux-renesas_4.9.bbappend => linux-renesas_4.14.bbappend} (100%) create mode 160000 tmp/du_cmm diff --git a/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/salvator-x/0001-drm-rcar-du-Add-DU-CMM-support.patch b/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/salvator-x/0001-drm-rcar-du-Add-DU-CMM-support.patch index 28583e5..2facc80 100644 --- a/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/salvator-x/0001-drm-rcar-du-Add-DU-CMM-support.patch +++ b/meta-rcar-gen3/recipes-kernel/linux/linux-renesas/salvator-x/0001-drm-rcar-du-Add-DU-CMM-support.patch @@ -1,130 +1,103 @@ -From 5c13f5c7a5acf92e75b67fb10426bf90f75273ba Mon Sep 17 00:00:00 2001 -From: Tsutomu Muroya -Date: Fri, 27 Oct 2017 17:23:33 +0900 -Subject: [PATCH] drm: rcar-du: Add R8A77965 device for cmm support +From f77076c1c7740203016e98b3c1e99817597573b2 Mon Sep 17 00:00:00 2001 +From: Koji Matsuoka +Date: Fri, 12 Jan 2018 09:54:21 +0900 +Subject: [PATCH] drm: rcar-du: Add DU CMM Direct write support -Signed-off-by: Tsutomu Muroya +Signed-off-by: Koji Matsuoka --- - .../boot/dts/renesas/r8a7795-es1-salvator-x.dts | 6 +- - arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 18 +- - arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 6 +- - .../arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 6 +- - arch/arm64/boot/dts/renesas/r8a7795.dtsi | 18 +- - arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 6 +- - .../arm64/boot/dts/renesas/r8a7796-salvator-xs.dts | 6 +- - arch/arm64/boot/dts/renesas/r8a7796.dtsi | 16 +- - .../arm64/boot/dts/renesas/r8a77965-salvator-x.dts | 5 +- - .../boot/dts/renesas/r8a77965-salvator-xs.dts | 5 +- - arch/arm64/boot/dts/renesas/r8a77965.dtsi | 16 +- + .../boot/dts/renesas/r8a7795-es1-salvator-x.dts | 5 + + arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 5 + + .../arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 5 + + arch/arm64/boot/dts/renesas/r8a7795.dtsi | 27 +- + arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 5 +- + .../arm64/boot/dts/renesas/r8a7796-salvator-xs.dts | 4 + + arch/arm64/boot/dts/renesas/r8a7796.dtsi | 24 +- + .../arm64/boot/dts/renesas/r8a77965-salvator-x.dts | 4 + + .../boot/dts/renesas/r8a77965-salvator-xs.dts | 4 + + arch/arm64/boot/dts/renesas/r8a77965.dtsi | 24 +- drivers/clk/renesas/r8a7795-cpg-mssr.c | 4 + drivers/clk/renesas/r8a7796-cpg-mssr.c | 3 + drivers/clk/renesas/r8a77965-cpg-mssr.c | 3 + drivers/gpu/drm/rcar-du/Makefile | 2 + - drivers/gpu/drm/rcar-du/rcar_du_cmm.c | 1588 ++++++++++++++++++++ - drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 27 +- + drivers/gpu/drm/rcar-du/rcar_du_cmm.c | 1771 ++++++++++++++++++++ + drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 24 + drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 32 + - drivers/gpu/drm/rcar-du/rcar_du_drv.c | 49 +- + drivers/gpu/drm/rcar-du/rcar_du_drv.c | 48 +- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 12 +- drivers/gpu/drm/rcar-du/rcar_du_group.c | 5 + - drivers/gpu/drm/rcar-du/rcar_du_regs.h | 92 ++ - include/uapi/drm/rcar_du_drm.h | 130 ++ - 23 files changed, 2021 insertions(+), 34 deletions(-) + drivers/gpu/drm/rcar-du/rcar_du_regs.h | 92 + + include/uapi/drm/rcar_du_drm.h | 131 +- + 22 files changed, 2208 insertions(+), 26 deletions(-) create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_cmm.c diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts -index 819d9ab..3b25025 100644 +index ca1c567..ab6d3ba 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts -@@ -388,7 +388,11 @@ +@@ -96,11 +96,16 @@ + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>, <&cpg CPG_MOD 727>, - <&programmable_clk0>, <&du_dotclkin1>, <&du_dotclkin2>, -- <&programmable_clk1>; -+ <&programmable_clk1>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, + <&cpg CPG_MOD 709>, -+ <&cpg CPG_MOD 708>; - - backlight-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; - -diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi -index c29b668..f983ee6 100644 ---- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi -+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi -@@ -2939,8 +2939,13 @@ - du: display@feb00000 { - compatible = "renesas,du-r8a7795"; - reg = <0 0xfeb00000 0 0x80000>, -- <0 0xfeb90000 0 0x14>; -- reg-names = "du", "lvds.0"; -+ <0 0xfeb90000 0 0x14>, -+ <0 0xfea40000 0 0x00001000>, -+ <0 0xfea50000 0 0x00001000>, -+ <0 0xfea60000 0 0x00001000>, -+ <0 0xfea70000 0 0x00001000>; -+ reg-names = "du", "lvds.0", -+ "cmm.0", "cmm.1", "cmm.2", "cmm.3"; - interrupts = , - , - , -@@ -2951,10 +2956,15 @@ - <&cpg CPG_MOD 721>, - <&cpg CPG_MOD 727>, - <&du_dotclkin0>, <&du_dotclkin1>, -- <&du_dotclkin2>, <&du_dotclkin3>; -+ <&du_dotclkin2>, <&du_dotclkin3>, -+ <&cpg CPG_MOD 711>, -+ <&cpg CPG_MOD 710>, -+ <&cpg CPG_MOD 709>, -+ <&cpg CPG_MOD 708>; - clock-names = "du.0", "du.1", "du.2", "du.3", - "lvds.0", "dclkin.0", "dclkin.1", -- "dclkin.2", "dclkin.3"; -+ "dclkin.2", "dclkin.3", -+ "cmm.0", "cmm.1", "cmm.2", "cmm.3"; - status = "disabled"; ++ <&cpg CPG_MOD 708>, + <&versaclock5 1>, + <&x21_clk>, + <&x22_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.2", "cmm.3", + "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; - vsps = <&vspd0 &vspd1 &vspd2 &vspd3>; + ports { diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts -index a945c45..bbe16b0 100644 +index a971e93..ebd4a15 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts -@@ -384,7 +384,11 @@ +@@ -96,11 +96,16 @@ + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>, <&cpg CPG_MOD 727>, - <&programmable_clk0>, <&du_dotclkin1>, <&du_dotclkin2>, -- <&programmable_clk1>; -+ <&programmable_clk1>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, + <&cpg CPG_MOD 709>, -+ <&cpg CPG_MOD 708>; - - backlight-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; ++ <&cpg CPG_MOD 708>, + <&versaclock5 1>, + <&x21_clk>, + <&x22_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.2", "cmm.3", + "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; + ports { diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts -index 070ac3ae..312ab68 100644 +index 84d946c..02923f1 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts -@@ -383,7 +383,11 @@ +@@ -96,11 +96,16 @@ + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>, <&cpg CPG_MOD 727>, - <&programmable_clk0>, <&du_dotclkin1>, <&du_dotclkin2>, -- <&programmable_clk1>; -+ <&programmable_clk1>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, + <&cpg CPG_MOD 709>, -+ <&cpg CPG_MOD 708>; - - backlight-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; ++ <&cpg CPG_MOD 708>, + <&versaclock6 1>, + <&x21_clk>, + <&x22_clk>, + <&versaclock6 2>; + clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.2", "cmm.3", + "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; + ports { diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi -index 66ffe7b..51b69c2 100644 +index fa29f37..ff33896 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi -@@ -2858,8 +2858,13 @@ +@@ -3287,8 +3287,13 @@ du: display@feb00000 { compatible = "renesas,du-r8a7795"; reg = <0 0xfeb00000 0 0x80000>, @@ -136,67 +109,84 @@ index 66ffe7b..51b69c2 100644 + <0 0xfea60000 0 0x00001000>, + <0 0xfea70000 0 0x00001000>; + reg-names = "du", "lvds.0", -+ "cmm.0", "cmm.1", "cmm.2", "cmm.3"; ++ "cmm.0", "cmm.1", "cmm.2", "cmm.3"; interrupts = , , , -@@ -2870,10 +2875,15 @@ +@@ -3297,14 +3302,24 @@ + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>, - <&cpg CPG_MOD 727>, - <&du_dotclkin0>, <&du_dotclkin1>, -- <&du_dotclkin2>, <&du_dotclkin3>; -+ <&du_dotclkin2>, <&du_dotclkin3>, +- <&cpg CPG_MOD 727>; +- clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0"; ++ <&cpg CPG_MOD 727>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, + <&cpg CPG_MOD 709>, + <&cpg CPG_MOD 708>; - clock-names = "du.0", "du.1", "du.2", "du.3", - "lvds.0", "dclkin.0", "dclkin.1", -- "dclkin.2", "dclkin.3"; -+ "dclkin.2", "dclkin.3", ++ clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.2", "cmm.3"; + resets = <&cpg 724>, + <&cpg 724>, + <&cpg 722>, + <&cpg 722>, +- <&cpg 727>; +- reset-names = "du.0", "du.1", "du.2", "du.3", "lvds.0"; ++ <&cpg 727>, ++ <&cpg 711>, ++ <&cpg 710>, ++ <&cpg 709>, ++ <&cpg 708>; ++ reset-names = "du.0", "du.1", "du.2", "du.3", "lvds.0", + "cmm.0", "cmm.1", "cmm.2", "cmm.3"; + vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>; status = "disabled"; - vsps = <&vspd0 &vspd1 &vspd2>; diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts -index ac854db..4abc77c 100644 +index 09c7228..ed4d08b 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts -@@ -511,7 +511,11 @@ +@@ -85,12 +85,15 @@ <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>, <&cpg CPG_MOD 727>, -- <&programmable_clk0>, <&du_dotclkin1>, <&programmable_clk1>; -+ <&programmable_clk0>, <&du_dotclkin1>, <&programmable_clk1>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, + <&cpg CPG_MOD 709>, -+ <&cpg CPG_MOD 708>; - - backlight-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; - + <&versaclock5 1>, + <&x21_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.2", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.2", + "dclkin.0", "dclkin.1", "dclkin.2"; +- + ports { + port@2 { + endpoint { diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts -index 1fd2d10..8fcc204 100644 +index 38d0161..1bf2628 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts -@@ -354,7 +354,11 @@ +@@ -85,10 +85,14 @@ <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>, <&cpg CPG_MOD 727>, -- <&programmable_clk0>, <&du_dotclkin1>, <&programmable_clk1>; -+ <&programmable_clk0>, <&du_dotclkin1>, <&programmable_clk1>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, + <&cpg CPG_MOD 709>, -+ <&cpg CPG_MOD 708>; - - backlight-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + <&versaclock6 1>, + <&x21_clk>, + <&versaclock6 2>; + clock-names = "du.0", "du.1", "du.2", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.2", + "dclkin.0", "dclkin.1", "dclkin.2"; + ports { diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi -index 552892b..cfa7f80 100644 +index 58fea33..4e49e9d 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi -@@ -2607,8 +2607,12 @@ +@@ -3068,21 +3068,33 @@ du: display@feb00000 { compatible = "renesas,du-r8a7796"; reg = <0 0xfeb00000 0 0x70000>, @@ -207,63 +197,78 @@ index 552892b..cfa7f80 100644 + <0 0xfea50000 0 0x00001000>, + <0 0xfea60000 0 0x00001000>; + reg-names = "du", "lvds.0", -+ "cmm.0", "cmm.1", "cmm.2"; ++ "cmm.0", "cmm.1", "cmm.2"; interrupts = , , ; -@@ -2618,9 +2622,13 @@ - <&cpg CPG_MOD 727>, - <&du_dotclkin0>, - <&du_dotclkin1>, -- <&du_dotclkin2>; -+ <&du_dotclkin2>, + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 722>, +- <&cpg CPG_MOD 727>; +- clock-names = "du.0", "du.1", "du.2", "lvds.0"; ++ <&cpg CPG_MOD 727>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, + <&cpg CPG_MOD 709>; - clock-names = "du.0", "du.1", "du.2", "lvds.0", -- "dclkin.0", "dclkin.1", "dclkin.2"; -+ "dclkin.0", "dclkin.1", "dclkin.2", ++ clock-names = "du.0", "du.1", "du.2", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.2"; + resets = <&cpg 724>, + <&cpg 724>, + <&cpg 722>, +- <&cpg 727>; +- reset-names = "du.0", "du.1", "du.2", "lvds.0"; ++ <&cpg 727>, ++ <&cpg 711>, ++ <&cpg 710>, ++ <&cpg 709>; ++ reset-names = "du.0", "du.1", "du.2", "lvds.0", + "cmm.0", "cmm.1", "cmm.2"; status = "disabled"; vsps = <&vspd0 &vspd1 &vspd2>; diff --git a/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts -index 107aafa..cb8bdb6d 100644 +index 53e7260..1b3f4f1 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts -@@ -506,7 +506,10 @@ +@@ -80,10 +80,14 @@ <&cpg CPG_MOD 723>, <&cpg CPG_MOD 721>, <&cpg CPG_MOD 727>, -- <&programmable_clk0>, <&du_dotclkin1>, <&programmable_clk1>; -+ <&programmable_clk0>, <&du_dotclkin1>, <&programmable_clk1>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, -+ <&cpg CPG_MOD 708>; - - backlight-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; ++ <&cpg CPG_MOD 708>, + <&versaclock5 1>, + <&x21_clk>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.3", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.3", + "dclkin.0", "dclkin.1", "dclkin.3"; + ports { diff --git a/arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts -index 09fe4c5..4f4a592 100644 +index 41f6b05..f47ee2f 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts +++ b/arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts -@@ -349,7 +349,10 @@ +@@ -80,10 +80,14 @@ <&cpg CPG_MOD 723>, <&cpg CPG_MOD 721>, <&cpg CPG_MOD 727>, -- <&programmable_clk0>, <&du_dotclkin1>, <&programmable_clk1>; -+ <&programmable_clk0>, <&du_dotclkin1>, <&programmable_clk1>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, -+ <&cpg CPG_MOD 708>; - - backlight-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; ++ <&cpg CPG_MOD 708>, + <&versaclock6 1>, + <&x21_clk>, + <&versaclock6 2>; + clock-names = "du.0", "du.1", "du.3", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.3", + "dclkin.0", "dclkin.1", "dclkin.3"; + ports { diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi -index 43825d3..3def1d7 100644 +index 4de8e13..509c1b6 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi -@@ -2513,8 +2513,12 @@ +@@ -2490,21 +2490,33 @@ du: display@feb00000 { compatible = "renesas,du-r8a77965"; reg = <0 0xfeb00000 0 0x80000>, @@ -278,24 +283,33 @@ index 43825d3..3def1d7 100644 interrupts = , , ; -@@ -2524,9 +2528,13 @@ - <&cpg CPG_MOD 727>, - <&du_dotclkin0>, - <&du_dotclkin1>, -- <&du_dotclkin3>; -+ <&du_dotclkin3>, + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 721>, +- <&cpg CPG_MOD 727>; +- clock-names = "du.0", "du.1", "du.3", "lvds.0"; ++ <&cpg CPG_MOD 727>, + <&cpg CPG_MOD 711>, + <&cpg CPG_MOD 710>, + <&cpg CPG_MOD 708>; - clock-names = "du.0", "du.1", "du.3", "lvds.0", -- "dclkin.0", "dclkin.1", "dclkin.3"; -+ "dclkin.0", "dclkin.1", "dclkin.3", ++ clock-names = "du.0", "du.1", "du.3", "lvds.0", ++ "cmm.0", "cmm.1", "cmm.3"; + resets = <&cpg 724>, + <&cpg 724>, + <&cpg 722>, +- <&cpg 727>; +- reset-names = "du.0", "du.1", "du.3", "lvds.0"; ++ <&cpg 727>, ++ <&cpg 711>, ++ <&cpg 710>, ++ <&cpg 708>; ++ reset-names = "du.0", "du.1", "du.3", "lvds.0", + "cmm.0", "cmm.1", "cmm.3"; status = "disabled"; - vsps = <&vspd0 &vspd1>; + vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c -index 9e5abc3..3c0f642 100644 +index 59bcb4d..d0c16b2 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -208,6 +208,10 @@ enum clk_ids { @@ -310,7 +324,7 @@ index 9e5abc3..3c0f642 100644 DEF_MOD("csi20", 714, R8A7795_CLK_CSI0), DEF_MOD("csi41", 715, R8A7795_CLK_CSI0), diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c -index 015591e..268bcee 100644 +index 491b17c..d50016e 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -187,6 +187,9 @@ enum clk_ids { @@ -324,7 +338,7 @@ index 015591e..268bcee 100644 DEF_MOD("csi40", 716, R8A7796_CLK_CSI0), DEF_MOD("du2", 722, R8A7796_CLK_S2D1), diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c -index bf35b61..6b3da64 100644 +index 2db24f3..9a1ba71 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -179,6 +179,9 @@ enum clk_ids { @@ -338,86 +352,85 @@ index bf35b61..6b3da64 100644 DEF_MOD("csi40", 716, R8A77965_CLK_CSI0), DEF_MOD("du3", 721, R8A77965_CLK_S2D1), diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile -index 4666821..8846f1f 100644 +index 0cf5c11..9082be8 100644 --- a/drivers/gpu/drm/rcar-du/Makefile +++ b/drivers/gpu/drm/rcar-du/Makefile -@@ -6,6 +6,8 @@ rcar-du-drm-y := rcar_du_crtc.o \ - rcar_du_plane.o \ - rcar_du_vgacon.o +@@ -7,6 +7,8 @@ rcar-du-drm-y := rcar_du_crtc.o \ + rcar_du_lvdscon.o \ + rcar_du_plane.o +rcar-du-drm-y += rcar_du_cmm.o + - rcar-du-drm-$(CONFIG_DRM_RCAR_HDMI) += rcar_du_hdmienc.o + rcar-du-drm-$(CONFIG_DRM_RCAR_LVDS) += rcar_du_lvdsenc.o - rcar-du-drm-$(CONFIG_DRM_RCAR_LVDS) += rcar_du_lvdsenc.o \ + rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o diff --git a/drivers/gpu/drm/rcar-du/rcar_du_cmm.c b/drivers/gpu/drm/rcar-du/rcar_du_cmm.c new file mode 100644 -index 0000000..71a64c8 +index 0000000..2a65fe0 --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rcar_du_cmm.c -@@ -0,0 +1,1588 @@ +@@ -0,0 +1,1771 @@ +/*************************************************************************/ /* -+ DU CMM -+ -+ Copyright (C) 2016 - 2017 Renesas Electronics Corporation -+ -+ License Dual MIT/GPLv2 -+ -+ The contents of this file are subject to the MIT license as set out below. -+ -+ Permission is hereby granted, free of charge, to any person obtaining a copy -+ of this software and associated documentation files (the "Software"), to deal -+ in the Software without restriction, including without limitation the rights -+ to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -+ copies of the Software, and to permit persons to whom the Software is -+ furnished to do so, subject to the following conditions: -+ -+ The above copyright notice and this permission notice shall be included in -+ all copies or substantial portions of the Software. -+ -+ Alternatively, the contents of this file may be used under the terms of -+ the GNU General Public License Version 2 ("GPL") in which case the provisions -+ of GPL are applicable instead of those above. -+ -+ If you wish to allow use of your version of this file only under the terms of -+ GPL, and not to allow others to use your version of this file under the terms -+ of the MIT license, indicate your decision by deleting the provisions above -+ and replace them with the notice and other provisions required by GPL as set -+ out in the file called "GPL-COPYING" included in this distribution. If you do -+ not delete the provisions above, a recipient may use your version of this file -+ under the terms of either the MIT license or GPL. -+ -+ This License is also included in this distribution in the file called -+ "MIT-COPYING". -+ -+ EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS -+ PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -+ BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR -+ PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR -+ COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER -+ IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN -+ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -+ -+ -+ GPLv2: -+ If you wish to use this file under the terms of GPL, following terms are -+ effective. -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; version 2 of the License. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+*/ /*************************************************************************/ ++ * DU CMM ++ * ++ * Copyright (C) 2018 Renesas Electronics Corporation ++ * ++ * License Dual MIT/GPLv2 ++ * ++ * The contents of this file are subject to the MIT license as set out below. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * Alternatively, the contents of this file may be used under the terms of ++ * the GNU General Public License Version 2 ("GPL") in which case the provisions ++ * of GPL are applicable instead of those above. ++ * ++ * If you wish to allow use of your version of this file only under the terms of ++ * GPL, and not to allow others to use your version of this file under the terms ++ * of the MIT license, indicate your decision by deleting the provisions above ++ * and replace them with the notice and other provisions required by GPL as set ++ * out in the file called "GPL-COPYING" included in this distribution. If you do ++ * not delete the provisions above, a recipient may use your version of this ++ * file under the terms of either the MIT license or GPL. ++ * ++ * This License is also included in this distribution in the file called ++ * "MIT-COPYING". ++ * ++ * EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS ++ * PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING ++ * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A ++ * PARTICULAR PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS ++ * OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR ++ * IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * ++ * GPLv2: ++ * If you wish to use this file under the terms of GPL, following terms are ++ * effective. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ */ /*************************************************************************/ + +#include ++#include ++#include ++#include + +#include +#include @@ -445,6 +458,11 @@ index 0000000..71a64c8 + QUE_STAT_DONE, +}; + ++static const struct soc_device_attribute rcar_du_cmm_r8a7795_es1[] = { ++ { .soc_id = "r8a7795", .revision = "ES1.*" }, ++ { /* sentinel */ } ++}; ++ +struct rcar_du_cmm; +struct rcar_du_cmm_file_priv; + @@ -487,6 +505,7 @@ index 0000000..71a64c8 + +struct rcar_du_cmm { + struct rcar_du_crtc *rcrtc; ++ struct reset_control *rstc; + + /* CMM base address */ + void __iomem *cmm_base; @@ -505,6 +524,11 @@ index 0000000..71a64c8 + bool dbuf; + bool clu_dbuf; + bool init; ++ bool direct; ++ bool vsync; ++ bool authority; ++ pid_t pid; ++ bool soc_support; +}; + +struct rcar_du_cmm_file_priv { @@ -515,6 +539,7 @@ index 0000000..71a64c8 +}; + +static DEFINE_MUTEX(cmm_event_lock); ++static DEFINE_SPINLOCK(cmm_direct_lock); + +static inline void event_prev_cancel_locked(struct cmm_module_t *module); + @@ -617,12 +642,26 @@ index 0000000..71a64c8 + + if (!data) + return -ENOMEM; ++ + config = (struct rcar_du_cmm_config *)data; + + du_cmm = id_to_cmm(dev, config->crtc_id); + if (!du_cmm) + return -EINVAL; + ++ mutex_lock(&cmm_event_lock); ++ ++ if (du_cmm->authority) { ++ if (du_cmm->pid != sys_getpid()) { ++ mutex_unlock(&cmm_event_lock); ++ return -EBUSY; ++ } ++ } ++ du_cmm->authority = config->authority; ++ du_cmm->pid = sys_getpid(); ++ ++ mutex_unlock(&cmm_event_lock); ++ + cm2_ctl0 = du_cmm->reg_save.cm2_ctl0; + cm2_ctl0 &= ~(CMM_CTL0_TM1_MASK | CMM_CTL0_TM0_MASK | + CMM_CTL0_YC | CMM_CTL0_DBUF | CMM_CTL0_CLUDB); @@ -651,18 +690,12 @@ index 0000000..71a64c8 + return -EINVAL; + } + -+ if (du_cmm->dbuf && du_cmm->clu_dbuf && -+ (config->lut_buf == LUT_SINGLE_BUFFER) && -+ (config->clu_buf != CLU_SINGLE_BUFFER)) -+ return -EINVAL; -+ + if (du_cmm->dbuf) { + switch (config->lut_buf) { + case LUT_DOUBLE_BUFFER_AUTO: + case LUT_DOUBLE_BUFFER_A: + case LUT_DOUBLE_BUFFER_B: + cm2_ctl0 |= CMM_CTL0_DBUF; -+ case LUT_SINGLE_BUFFER: + break; + + default: @@ -671,15 +704,15 @@ index 0000000..71a64c8 + + du_cmm->lut.buf_mode = config->lut_buf; + } else { -+ du_cmm->lut.buf_mode = LUT_SINGLE_BUFFER; ++ return -EINVAL; + } ++ + if (du_cmm->clu_dbuf) { + switch (config->clu_buf) { + case CLU_DOUBLE_BUFFER_AUTO: + case CLU_DOUBLE_BUFFER_A: + case CLU_DOUBLE_BUFFER_B: + cm2_ctl0 |= CMM_CTL0_CLUDB; -+ case CLU_SINGLE_BUFFER: + break; + + default: @@ -688,12 +721,7 @@ index 0000000..71a64c8 + + du_cmm->clu.buf_mode = config->clu_buf; + } else { -+ du_cmm->clu.buf_mode = CLU_SINGLE_BUFFER; -+ } -+ -+ if (du_cmm->lut.buf_mode == LUT_SINGLE_BUFFER) { -+ if (rcar_du_cmm_read(du_cmm, CM2_CTL1) & CMM_CTL1_BFS) -+ rcar_du_cmm_write(du_cmm, CM2_CTL1, 0); ++ return -EINVAL; + } + + rcar_du_cmm_write(du_cmm, CM2_CTL0, cm2_ctl0); @@ -715,9 +743,6 @@ index 0000000..71a64c8 + return -ENOMEM; + table = (struct rcar_du_cmm_table *)data; + -+ if (!table->user_data) -+ return -EINVAL; -+ + if (table->buff_len < (CMM_LUT_NUM * 4)) + return -EINVAL; + @@ -725,6 +750,17 @@ index 0000000..71a64c8 + if (!du_cmm) + return -EINVAL; + ++ mutex_lock(&cmm_event_lock); ++ ++ if (du_cmm->authority) { ++ if (du_cmm->pid != sys_getpid()) { ++ mutex_unlock(&cmm_event_lock); ++ return -EBUSY; ++ } ++ } ++ ++ mutex_unlock(&cmm_event_lock); ++ + gem_obj = drm_gem_object_lookup(file_priv, table->buff); + if (!gem_obj) + return -ENOMEM; @@ -738,7 +774,7 @@ index 0000000..71a64c8 + p->gem_obj = gem_obj; + p->event = CMM_EVENT_LUT_DONE; + p->stat = QUE_STAT_PENDING; -+ p->callback_data = table->user_data; ++ p->callback_data = (uint64_t)table->user_data; + p->du_cmm = du_cmm; + p->fpriv = fpriv; + @@ -749,6 +785,9 @@ index 0000000..71a64c8 + + event_prev_cancel_locked(&du_cmm->lut); + ++ if (du_cmm->direct) ++ queue_work(du_cmm->workqueue, &du_cmm->work); ++ + mutex_unlock(&cmm_event_lock); + + drm_crtc_vblank_get(&du_cmm->rcrtc->crtc); @@ -764,19 +803,34 @@ index 0000000..71a64c8 + struct rcar_du_cmm *du_cmm; + struct rcar_du_cmm_pending_event *p; + struct drm_gem_object *gem_obj; ++ struct rcar_du_device *rcdu; + + if (!data) + return -ENOMEM; + table = (struct rcar_du_cmm_table *)data; + -+ if (!table->user_data) ++ du_cmm = id_to_cmm(dev, table->crtc_id); ++ if (!du_cmm) + return -EINVAL; + -+ if (table->buff_len < (CMM_CLU_NUM * 4)) ++ if (!du_cmm->soc_support) { ++ rcdu = du_cmm->rcrtc->group->dev; ++ dev_err(rcdu->dev, "Double buffer of CLU is not supported in H3 ES1.x.\n"); + return -EINVAL; ++ } + -+ du_cmm = id_to_cmm(dev, table->crtc_id); -+ if (!du_cmm) ++ mutex_lock(&cmm_event_lock); ++ ++ if (du_cmm->authority) { ++ if (du_cmm->pid != sys_getpid()) { ++ mutex_unlock(&cmm_event_lock); ++ return -EBUSY; ++ } ++ } ++ ++ mutex_unlock(&cmm_event_lock); ++ ++ if (table->buff_len < (CMM_CLU_NUM * 4)) + return -EINVAL; + + gem_obj = drm_gem_object_lookup(file_priv, table->buff); @@ -792,7 +846,7 @@ index 0000000..71a64c8 + p->gem_obj = gem_obj; + p->event = CMM_EVENT_CLU_DONE; + p->stat = QUE_STAT_PENDING; -+ p->callback_data = table->user_data; ++ p->callback_data = (uint64_t)table->user_data; + p->du_cmm = du_cmm; + p->fpriv = fpriv; + @@ -803,6 +857,9 @@ index 0000000..71a64c8 + + event_prev_cancel_locked(&du_cmm->clu); + ++ if (du_cmm->direct) ++ queue_work(du_cmm->workqueue, &du_cmm->work); ++ + mutex_unlock(&cmm_event_lock); + + drm_crtc_vblank_get(&du_cmm->rcrtc->crtc); @@ -827,9 +884,20 @@ index 0000000..71a64c8 + if (!du_cmm) + return -EINVAL; + ++ mutex_lock(&cmm_event_lock); ++ ++ if (du_cmm->authority) { ++ if (du_cmm->pid != sys_getpid()) { ++ mutex_unlock(&cmm_event_lock); ++ return -EBUSY; ++ } ++ } ++ ++ mutex_unlock(&cmm_event_lock); ++ + mode = &du_cmm->rcrtc->crtc.mode; + -+ if ((hgo->width < 1) || (hgo->height < 1) || ++ if (hgo->width < 1 || hgo->height < 1 || + (mode->hdisplay < (hgo->x_offset + hgo->width)) || + (mode->vdisplay < (hgo->y_offset + hgo->height))) + return -EINVAL; @@ -903,9 +971,6 @@ index 0000000..71a64c8 + return -ENOMEM; + table = (struct rcar_du_cmm_table *)data; + -+ if (!table->user_data) -+ return -EINVAL; -+ + if (table->buff_len < (CMM_HGO_NUM * 4 * 3)) + return -EINVAL; + @@ -913,6 +978,17 @@ index 0000000..71a64c8 + if (!du_cmm) + return -EINVAL; + ++ mutex_lock(&cmm_event_lock); ++ ++ if (du_cmm->authority) { ++ if (du_cmm->pid != sys_getpid()) { ++ mutex_unlock(&cmm_event_lock); ++ return -EBUSY; ++ } ++ } ++ ++ mutex_unlock(&cmm_event_lock); ++ + gem_obj = drm_gem_object_lookup(file_priv, table->buff); + if (!gem_obj) + return -ENOMEM; @@ -927,7 +1003,7 @@ index 0000000..71a64c8 + p->gem_obj = gem_obj; + p->event = CMM_EVENT_HGO_DONE; + p->stat = QUE_STAT_PENDING; -+ p->callback_data = table->user_data; ++ p->callback_data = (uint64_t)table->user_data; + p->du_cmm = du_cmm; + p->fpriv = fpriv; + @@ -960,6 +1036,13 @@ index 0000000..71a64c8 + + mutex_lock(&cmm_event_lock); + ++ if (du_cmm->authority) { ++ if (du_cmm->pid != sys_getpid()) { ++ mutex_unlock(&cmm_event_lock); ++ return -EBUSY; ++ } ++ } ++ + if (du_cmm->hgo.reset == 0) { + du_cmm->hgo.reset = 1; + drm_crtc_vblank_get(&du_cmm->rcrtc->crtc); @@ -1068,7 +1151,8 @@ index 0000000..71a64c8 + + drm_gem_object_unreference_unlocked(gem_obj); + -+ ret = drm_gem_cma_dumb_map_offset(file_priv, dev, handle, &offset); ++ ret = drm_gem_dumb_map_offset(file_priv, dev, handle, &offset); ++ + if (!ret) { + /* set return value */ + buf->handle = handle; @@ -1136,11 +1220,11 @@ index 0000000..71a64c8 + y = (du_cmm->reg_save.hgo_offset >> 0) & 0xFFFF; + w = (du_cmm->reg_save.hgo_size >> 16) & 0xFFFF; + h = (du_cmm->reg_save.hgo_size >> 0) & 0xFFFF; -+ if ((mode->hdisplay < (w + x)) || (w == 0)) { ++ if ((mode->hdisplay < (w + x)) || w == 0) { + x = 0; + w = mode->hdisplay; + } -+ if ((mode->vdisplay < (h + y)) || (h == 0)) { ++ if ((mode->vdisplay < (h + y)) || h == 0) { + y = 0; + h = mode->vdisplay; + } @@ -1402,7 +1486,6 @@ index 0000000..71a64c8 + /* set LUT */ + switch (du_cmm->lut.buf_mode) { + case LUT_DOUBLE_BUFFER_A: -+ case LUT_SINGLE_BUFFER: + lut_base = CMM_LUT_TBLA(0); + break; + @@ -1411,6 +1494,8 @@ index 0000000..71a64c8 + lut_base = CMM_LUT_TBLA(0); + break; + } ++ lut_base = CMM_LUT_TBLB(0); ++ break; + case LUT_DOUBLE_BUFFER_B: + lut_base = CMM_LUT_TBLB(0); + break; @@ -1515,7 +1600,6 @@ index 0000000..71a64c8 + /* set CLU */ + switch (du_cmm->clu.buf_mode) { + case CLU_DOUBLE_BUFFER_A: -+ case CLU_SINGLE_BUFFER: + addr_reg = CMM_CLU_ADDR; + data_reg = CMM_CLU_DATA; + break; @@ -1526,6 +1610,9 @@ index 0000000..71a64c8 + data_reg = CMM_CLU_DATA; + break; + } ++ addr_reg = CMM_CLU_ADDR2; ++ data_reg = CMM_CLU_DATA2; ++ break; + case CLU_DOUBLE_BUFFER_B: + addr_reg = CMM_CLU_ADDR2; + data_reg = CMM_CLU_DATA2; @@ -1592,7 +1679,7 @@ index 0000000..71a64c8 + + for (j = 0; j < CMM_HGO_NUM; j++) + hgo_buf[j] = rcar_du_cmm_read(du_cmm, -+ histo_offset[i] + j * 4); ++ histo_offset[i] + j * 4); + } + + event_done(stat->p2); @@ -1603,6 +1690,28 @@ index 0000000..71a64c8 + return 0; +} + ++static bool du_cmm_vsync_get(struct rcar_du_cmm *du_cmm) ++{ ++ unsigned long flags; ++ bool vsync; ++ ++ spin_lock_irqsave(&cmm_direct_lock, flags); ++ vsync = du_cmm->vsync; ++ du_cmm->vsync = false; ++ spin_unlock_irqrestore(&cmm_direct_lock, flags); ++ ++ return vsync; ++} ++ ++static void du_cmm_vsync_set(struct rcar_du_cmm *du_cmm, bool vsync) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&cmm_direct_lock, flags); ++ du_cmm->vsync = vsync; ++ spin_unlock_irqrestore(&cmm_direct_lock, flags); ++} ++ +static void du_cmm_work(struct work_struct *work) +{ + struct rcar_du_cmm *du_cmm = @@ -1614,12 +1723,20 @@ index 0000000..71a64c8 + struct timeval start_time, end_time; + unsigned long lut_time, clu_time, hgo_time; +#endif ++ bool vsync_status = false; ++ ++ memset(&s_lut, 0, sizeof(struct rcar_du_cmm_work_stat)); ++ memset(&s_clu, 0, sizeof(struct rcar_du_cmm_work_stat)); ++ memset(&s_hgo, 0, sizeof(struct rcar_du_cmm_work_stat)); ++ ++ vsync_status = du_cmm_vsync_get(du_cmm); + + mutex_lock(&cmm_event_lock); + + lut_pop_locked(du_cmm, &s_lut); + clu_pop_locked(du_cmm, &s_clu); -+ hgo_pop_locked(du_cmm, &s_hgo); ++ if (vsync_status) ++ hgo_pop_locked(du_cmm, &s_hgo); + + mutex_unlock(&cmm_event_lock); + @@ -1647,7 +1764,8 @@ index 0000000..71a64c8 +#ifdef DEBUG_PROCE_TIME + do_gettimeofday(&start_time); +#endif -+ hgo_get(du_cmm, &s_hgo); ++ if (vsync_status) ++ hgo_get(du_cmm, &s_hgo); +#ifdef DEBUG_PROCE_TIME + do_gettimeofday(&end_time); + hgo_time = (long)diff_timevals(&start_time, &end_time); @@ -1693,8 +1811,10 @@ index 0000000..71a64c8 + if (!du_cmm->active) + return; + -+ if (!du_cmm_que_empty(du_cmm)) ++ if (!du_cmm_que_empty(du_cmm)) { ++ du_cmm_vsync_set(du_cmm, true); + queue_work(du_cmm->workqueue, &du_cmm->work); ++ } +} + +#ifdef CONFIG_PM_SLEEP @@ -1793,6 +1913,10 @@ index 0000000..71a64c8 + struct rcar_du_device *rcdu = dev->dev_private; + struct rcar_du_cmm_file_priv *fpriv = file_priv->driver_priv; + struct rcar_du_cmm_pending_event *p, *pt; ++ struct rcar_du_crtc *rcrtc; ++ struct rcar_du_cmm *du_cmm; ++ int i, crtcs_cnt, ret; ++ u32 table_data; + + if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) + return; @@ -1807,6 +1931,8 @@ index 0000000..71a64c8 + case QUE_STAT_PENDING: + cmm_vblank_put(p); + cmm_gem_object_unreference(p); ++ kfree(p); ++ break; + case QUE_STAT_DONE: + kfree(p); + break; @@ -1821,6 +1947,60 @@ index 0000000..71a64c8 + kfree(fpriv->done_list); + kfree(fpriv); + file_priv->driver_priv = NULL; ++ ++ for (crtcs_cnt = 0; crtcs_cnt < rcdu->num_crtcs; crtcs_cnt++) { ++ rcrtc = &rcdu->crtcs[crtcs_cnt]; ++ du_cmm = rcrtc->cmm_handle; ++ if (du_cmm->authority && du_cmm->pid == sys_getpid()) { ++ du_cmm->authority = false; ++ du_cmm->pid = 0; ++ ret = wait_event_timeout(du_cmm->reg_save.wait, ++ du_cmm_que_empty(du_cmm), ++ msecs_to_jiffies(500)); ++ if (ret == 0) ++ dev_err(rcdu->dev, "rcar-du cmm close : timeout\n"); ++ ++ for (i = 0; i < CMM_LUT_NUM; i++) ++ du_cmm->reg_save.lut_table[i] = (i << 16) | ++ (i << 8) | ++ (i << 0); ++ ++ for (i = 0; i < CMM_CLU_NUM; i++) { ++ du_cmm->reg_save.clu_table[i] = ++ index_to_clu_data(i); ++ } ++ ++ for (i = 0; i < CMM_LUT_NUM; i++) { ++#ifdef CONFIG_PM_SLEEP ++ table_data = du_cmm->reg_save.lut_table[i]; ++#else ++ table_data = ((i << 16) | (i << 8) | (i << 0)); ++#endif /* CONFIG_PM_SLEEP */ ++ rcar_du_cmm_write(du_cmm, CMM_LUT_TBLA(i), ++ table_data); ++ if (du_cmm->dbuf) { ++ rcar_du_cmm_write(du_cmm, ++ CMM_LUT_TBLB(i), ++ table_data); ++ } ++ } ++ ++ for (i = 0; i < CMM_CLU_NUM; i++) { ++#ifdef CONFIG_PM_SLEEP ++ table_data = du_cmm->reg_save.clu_table[i]; ++#else ++ table_data = index_to_clu_data(i); ++#endif /* CONFIG_PM_SLEEP */ ++ rcar_du_cmm_write(du_cmm, CMM_CLU_DATA, ++ table_data); ++ ++ if (du_cmm->dbuf) { ++ rcar_du_cmm_write(du_cmm, CMM_CLU_DATA2, ++ table_data); ++ } ++ } ++ } ++ } +} + +int rcar_du_cmm_init(struct rcar_du_crtc *rcrtc) @@ -1863,6 +2043,12 @@ index 0000000..71a64c8 + ret = PTR_ERR(du_cmm->clock); + goto error_clock_cmm; + } ++ du_cmm->rstc = devm_reset_control_get(rcdu->dev, name); ++ if (IS_ERR(du_cmm->rstc)) { ++ dev_err(rcdu->dev, "failed to get cpg reset %s\n", name); ++ ret = PTR_ERR(du_cmm->rstc); ++ goto error_clock_cmm; ++ } + + du_cmm->rcrtc = rcrtc; + @@ -1876,7 +2062,10 @@ index 0000000..71a64c8 + du_cmm->lut.buf_mode = LUT_DOUBLE_BUFFER_AUTO; + du_cmm->reg_save.cm2_ctl0 |= CMM_CTL0_DBUF; + } else { -+ du_cmm->lut.buf_mode = LUT_SINGLE_BUFFER; ++ dev_err(rcdu->dev, "single buffer is not supported.\n"); ++ du_cmm->dbuf = true; ++ du_cmm->lut.buf_mode = LUT_DOUBLE_BUFFER_AUTO; ++ du_cmm->reg_save.cm2_ctl0 |= CMM_CTL0_DBUF; + } + + du_cmm->clu_dbuf = rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM_CLU_DBUF); @@ -1884,7 +2073,10 @@ index 0000000..71a64c8 + du_cmm->clu.buf_mode = CLU_DOUBLE_BUFFER_AUTO; + du_cmm->reg_save.cm2_ctl0 |= CMM_CTL0_CLUDB; + } else { -+ du_cmm->clu.buf_mode = CLU_SINGLE_BUFFER; ++ dev_err(rcdu->dev, "single buffer is not supported.\n"); ++ du_cmm->clu_dbuf = true; ++ du_cmm->clu.buf_mode = CLU_DOUBLE_BUFFER_AUTO; ++ du_cmm->reg_save.cm2_ctl0 |= CMM_CTL0_CLUDB; + } + +#ifdef CONFIG_PM_SLEEP @@ -1908,9 +2100,14 @@ index 0000000..71a64c8 + + init_waitqueue_head(&du_cmm->reg_save.wait); +#endif /* CONFIG_PM_SLEEP */ ++ if (soc_device_match(rcar_du_cmm_r8a7795_es1)) ++ du_cmm->soc_support = false; ++ else ++ du_cmm->soc_support = true; + + du_cmm->active = false; + du_cmm->init = false; ++ du_cmm->direct = true; + + mutex_init(&du_cmm->lock); + INIT_LIST_HEAD(&du_cmm->lut.list); @@ -1945,16 +2142,13 @@ index 0000000..71a64c8 + return ret; +} diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c -index a6764b6..f031b21 100644 +index 33d185a..f704b65 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c -@@ -284,9 +284,19 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) - rcar_du_crtc_write(rcrtc, DSMR, value); - - /* Display timings */ -- rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19); -- rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start + -- mode->hdisplay - 19); +@@ -274,6 +274,19 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) + rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19); + rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start + + mode->hdisplay - 19); + if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_CMM)) { + rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - + mode->hsync_start - 19 - 25); @@ -1971,27 +2165,27 @@ index a6764b6..f031b21 100644 rcar_du_crtc_write(rcrtc, HSWR, mode->hsync_end - mode->hsync_start - 1); rcar_du_crtc_write(rcrtc, HCR, mode->htotal - 1); -@@ -522,6 +532,9 @@ static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc) +@@ -518,6 +531,9 @@ static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc) + rcar_du_lvdsenc_enable(rcdu->lvds[rcrtc->index], crtc, true); - rcar_du_group_start_stop(rcrtc->group, true, rcrtc); - rcar_du_crtc_vbk_check(rcrtc); + rcar_du_group_start_stop(rcrtc->group, true); + + if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_CMM)) + rcar_du_cmm_start_stop(rcrtc, true); } static void rcar_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc) -@@ -557,6 +570,9 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc) - { +@@ -554,6 +570,9 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc) struct drm_crtc *crtc = &rcrtc->crtc; + struct rcar_du_device *rcdu = rcrtc->group->dev; + if (rcar_du_has(rcrtc->group->dev, RCAR_DU_FEATURE_CMM)) + rcar_du_cmm_start_stop(rcrtc, false); + - /* Disable all planes and wait for the change to take effect. This is - * required as the DSnPR registers are updated on vblank, and no vblank - * will occur once the CRTC is stopped. Disabling planes when starting -@@ -795,6 +811,9 @@ static irqreturn_t rcar_du_crtc_irq(int irq, void *arg) + /* + * Disable all planes and wait for the change to take effect. This is + * required as the plane enable registers are updated on vblank, and no +@@ -773,6 +792,9 @@ static irqreturn_t rcar_du_crtc_irq(int irq, void *arg) rcar_du_crtc_finish_page_flip(rcrtc); } @@ -2001,7 +2195,7 @@ index a6764b6..f031b21 100644 ret = IRQ_HANDLED; } -@@ -919,6 +938,8 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) +@@ -876,5 +898,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) return ret; } @@ -2009,22 +2203,21 @@ index a6764b6..f031b21 100644 + return 0; } - diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h -index aa6707c..bca4947 100644 +index 606a77e..d823956 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h -@@ -61,6 +61,8 @@ struct rcar_du_crtc { +@@ -67,6 +67,8 @@ struct rcar_du_crtc { + struct rcar_du_vsp *vsp; + unsigned int vsp_pipe; int lvds_ch; - bool suspend; - unsigned int lif_index; + + void *cmm_handle; }; - struct dpll_info { -@@ -97,4 +99,34 @@ void rcar_du_crtc_route_output(struct drm_crtc *crtc, - void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc); + #define to_rcar_crtc(c) container_of(c, struct rcar_du_crtc, crtc) +@@ -90,4 +92,34 @@ void rcar_du_crtc_route_output(struct drm_crtc *crtc, + enum rcar_du_output output); void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc); +/* DU-CMM functions */ @@ -2059,10 +2252,10 @@ index aa6707c..bca4947 100644 + #endif /* __RCAR_DU_CRTC_H__ */ diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c -index b234918..28176b9 100644 +index 1b3dc0b..c6755fb 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c -@@ -103,7 +103,8 @@ +@@ -93,7 +93,8 @@ static const struct rcar_du_device_info rcar_du_r8a7791_info = { .gen = 2, .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK @@ -2071,54 +2264,44 @@ index b234918..28176b9 100644 + | RCAR_DU_FEATURE_CMM, .num_crtcs = 2, .routes = { - /* R8A779[13] has one RGB output, one LVDS output and one -@@ -175,7 +176,8 @@ - | RCAR_DU_FEATURE_EXT_CTRL_REGS - | RCAR_DU_FEATURE_VSP1_SOURCE - | RCAR_DU_FEATURE_DIDSR2_REG -- | RCAR_DU_FEATURE_GEN3_REGS, -+ | RCAR_DU_FEATURE_GEN3_REGS -+ | RCAR_DU_FEATURE_CMM | RCAR_DU_FEATURE_CMM_LUT_DBUF, - .num_crtcs = 4, - .routes = { - /* R8A7795 has one RGB output, two HDMI outputs and one -@@ -212,7 +214,9 @@ + /* +@@ -157,7 +158,9 @@ + .gen = 3, + .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | RCAR_DU_FEATURE_EXT_CTRL_REGS - | RCAR_DU_FEATURE_VSP1_SOURCE - | RCAR_DU_FEATURE_DIDSR2_REG -- | RCAR_DU_FEATURE_VSPDL_SOURCE, -+ | RCAR_DU_FEATURE_VSPDL_SOURCE +- | RCAR_DU_FEATURE_VSP1_SOURCE, ++ | RCAR_DU_FEATURE_VSP1_SOURCE + | RCAR_DU_FEATURE_CMM | RCAR_DU_FEATURE_CMM_LUT_DBUF + | RCAR_DU_FEATURE_CMM_CLU_DBUF, .num_crtcs = 4, .routes = { - /* R8A7795 has one RGB output, two HDMI outputs and one -@@ -250,7 +254,9 @@ + /* +@@ -189,7 +192,9 @@ + .gen = 3, .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | RCAR_DU_FEATURE_EXT_CTRL_REGS - | RCAR_DU_FEATURE_VSP1_SOURCE -- | RCAR_DU_FEATURE_GEN3_REGS, -+ | RCAR_DU_FEATURE_GEN3_REGS +- | RCAR_DU_FEATURE_VSP1_SOURCE, ++ | RCAR_DU_FEATURE_VSP1_SOURCE + | RCAR_DU_FEATURE_CMM | RCAR_DU_FEATURE_CMM_LUT_DBUF + | RCAR_DU_FEATURE_CMM_CLU_DBUF, .num_crtcs = 3, .routes = { - /* R8A7796 has one RGB output, one LVDS output and one -@@ -283,7 +289,9 @@ + /* +@@ -218,7 +223,9 @@ + .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK + | RCAR_DU_FEATURE_EXT_CTRL_REGS | RCAR_DU_FEATURE_VSP1_SOURCE - | RCAR_DU_FEATURE_GEN3_REGS - | RCAR_DU_FEATURE_R8A77965_REGS -- | RCAR_DU_FEATURE_VSPDL_SOURCE, -+ | RCAR_DU_FEATURE_VSPDL_SOURCE +- | RCAR_DU_FEATURE_R8A77965_REGS, ++ | RCAR_DU_FEATURE_R8A77965_REGS + | RCAR_DU_FEATURE_CMM | RCAR_DU_FEATURE_CMM_LUT_DBUF + | RCAR_DU_FEATURE_CMM_CLU_DBUF, .num_crtcs = 3, .routes = { /* R8A77965 has one RGB output, one LVDS output and one -@@ -373,6 +381,26 @@ static void rcar_du_disable_vblank(struct drm_device *dev, unsigned int pipe) - DRM_UNLOCKED | DRM_CONTROL_ALLOW), +@@ -301,6 +308,26 @@ static void rcar_du_lastclose(struct drm_device *dev) + DRM_UNLOCKED | DRM_CONTROL_ALLOW), DRM_IOCTL_DEF_DRV(RCAR_DU_SCRSHOT, rcar_du_vsp_write_back, - DRM_UNLOCKED | DRM_CONTROL_ALLOW), + DRM_UNLOCKED | DRM_CONTROL_ALLOW), + + /* DU-CMM function */ + DRM_IOCTL_DEF_DRV(RCAR_DU_CMM_SET_CLU, rcar_du_cmm_clu_set, @@ -2141,48 +2324,48 @@ index b234918..28176b9 100644 + DRM_UNLOCKED | DRM_CONTROL_ALLOW), }; - static const struct file_operations rcar_du_fops = { -@@ -392,6 +420,8 @@ static void rcar_du_disable_vblank(struct drm_device *dev, unsigned int pipe) + DEFINE_DRM_GEM_CMA_FOPS(rcar_du_fops); +@@ -308,6 +335,8 @@ static void rcar_du_lastclose(struct drm_device *dev) static struct drm_driver rcar_du_driver = { .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_ATOMIC, + .open = rcar_du_cmm_driver_open, + .postclose = rcar_du_cmm_postclose, .lastclose = rcar_du_lastclose, - .get_vblank_counter = drm_vblank_no_hw_counter, - .enable_vblank = rcar_du_enable_vblank, -@@ -449,6 +479,9 @@ static int rcar_du_pm_suspend(struct device *dev) - } + .gem_free_object_unlocked = drm_gem_cma_free_object, + .gem_vm_ops = &drm_gem_cma_vm_ops, +@@ -345,6 +374,11 @@ static int rcar_du_pm_suspend(struct device *dev) #endif - for (i = 0; i < rcdu->num_crtcs; ++i) { -+ if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) + int i; + ++ if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) { ++ for (i = 0; i < rcdu->num_crtcs; ++i) + rcar_du_cmm_pm_suspend(&rcdu->crtcs[i]); ++ } + - if (rcdu->crtcs[i].initialized) { - rcar_du_crtc_suspend(&rcdu->crtcs[i]); - clk_set_rate(rcdu->crtcs[i].extclock, 0); -@@ -467,9 +500,13 @@ static int rcar_du_pm_resume(struct device *dev) - - encoder = NULL; - -- for (i = 0; i < rcdu->num_crtcs; ++i) -+ for (i = 0; i < rcdu->num_crtcs; ++i) { - rcar_du_crtc_resume(&rcdu->crtcs[i]); + drm_kms_helper_poll_disable(rcdu->ddev); + drm_fbdev_cma_set_suspend_unlocked(rcdu->fbdev, true); -+ if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) +@@ -379,6 +413,12 @@ static int rcar_du_pm_resume(struct device *dev) + struct rcar_du_device *rcdu = dev_get_drvdata(dev); + #if IS_ENABLED(CONFIG_DRM_RCAR_DW_HDMI) + struct drm_encoder *encoder; ++ int i; ++ ++ if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CMM)) { ++ for (i = 0; i < rcdu->num_crtcs; ++i) + rcar_du_cmm_pm_resume(&rcdu->crtcs[i]); + } -+ - #if IS_ENABLED(CONFIG_DRM_RCAR_HDMI) + list_for_each_entry(encoder, - &rcdu->ddev->mode_config.encoder_list, head) { + &rcdu->ddev->mode_config.encoder_list, diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h -index 1bfeb5a..9df36bf 100644 +index d6ccc5e..55896c6 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h -@@ -42,8 +42,16 @@ - #define RCAR_DU_FEATURE_VSPDL_SOURCE (1 << 5) /* Has VSPDL from VSP2 */ - #define RCAR_DU_FEATURE_R8A77965_REGS (1 << 6) /* Use R8A77965 registers */ +@@ -35,8 +35,16 @@ + #define RCAR_DU_FEATURE_R8A77995_REGS (1 << 4) /* Use R8A77995 registers */ + #define RCAR_DU_FEATURE_LVDS_PLL (1 << 5) /* Use PLL in LVDS */ -#define RCAR_DU_QUIRK_ALIGN_128B (1 << 0) /* Align pitches to 128 bytes */ -#define RCAR_DU_QUIRK_LVDS_LANES (1 << 1) /* LVDS lanes 1 and 3 inverted */ @@ -2200,10 +2383,10 @@ index 1bfeb5a..9df36bf 100644 /* * struct rcar_du_output_routing - Output routing specification diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c -index 1af5eb7..af86720 100644 +index 4cc37cd..05c2b77 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_group.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c -@@ -148,6 +148,11 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp) +@@ -146,6 +146,11 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp) if (rcdu->info->gen >= 3) rcar_du_group_write(rgrp, DEFR10, DEFR10_CODE | DEFR10_DEFE10); @@ -2212,11 +2395,11 @@ index 1af5eb7..af86720 100644 + DEF7R_CMME1 | DEF7R_CMME0); + } + - /* Use DS1PR and DS2PR to configure planes priorities and connects the + /* + * Use DS1PR and DS2PR to configure planes priorities and connects the * superposition 0 to DU0 pins. DU1 pins will be configured dynamically. - */ diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h -index 4d43d93..59f4df6 100644 +index d5bae99..262f0c4 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h @@ -200,6 +200,11 @@ @@ -2231,7 +2414,7 @@ index 4d43d93..59f4df6 100644 /* ----------------------------------------------------------------------------- * R8A7790-only Control Registers */ -@@ -550,4 +555,91 @@ +@@ -552,4 +557,91 @@ #define GCBCR 0x11098 #define BCBCR 0x1109c @@ -2324,10 +2507,19 @@ index 4d43d93..59f4df6 100644 + #endif /* __RCAR_DU_REGS_H__ */ diff --git a/include/uapi/drm/rcar_du_drm.h b/include/uapi/drm/rcar_du_drm.h -index b695b8b2a..d7867d5 100644 +index 712b729..1f29aca 100644 --- a/include/uapi/drm/rcar_du_drm.h +++ b/include/uapi/drm/rcar_du_drm.h -@@ -27,10 +27,104 @@ struct rcar_du_screen_shot { +@@ -1,7 +1,7 @@ + /* + * rcar_du_drm.h -- R-Car Display Unit DRM driver + * +- * Copyright (C) 2017 Renesas Electronics Corporation ++ * Copyright (C) 2018 Renesas Electronics Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by +@@ -27,10 +27,103 @@ struct rcar_du_screen_shot { unsigned int height; }; @@ -2338,7 +2530,7 @@ index b695b8b2a..d7867d5 100644 + unsigned int crtc_id; + unsigned int buff; /* set DRM_RCAR_DU_CMM_ALLOC handle */ + unsigned int buff_len; -+ unsigned long user_data; ++ uint64_t user_data; +}; + +/* DRM_RCAR_DU_CMM_SET_HGO: DU-CMM set HGO */ @@ -2356,15 +2548,16 @@ index b695b8b2a..d7867d5 100644 +struct rcar_du_cmm_event { + unsigned int crtc_id; + unsigned int event; -+ unsigned long callback_data; ++ uint64_t callback_data; +}; + +/* DRM_RCAR_DU_CMM_CONFIG: DU-CMM set config */ +struct rcar_du_cmm_config { + unsigned int crtc_id; -+ int csc; -+ int lut_buf; -+ int clu_buf; ++ unsigned int csc; ++ unsigned int lut_buf; ++ unsigned int clu_buf; ++ bool authority; +}; + +/* DRM_RCAR_DU_CMM_ALLOC: DU-CMM alloc cma buffer */ @@ -2373,7 +2566,7 @@ index b695b8b2a..d7867d5 100644 + size_t size; /* in */ + uint64_t mmap_offset; /* out */ + uint64_t phy_addr; /* out */ -+ uint32_t handle; /* out */ ++ unsigned int handle; /* out */ +}; + +/* DRM_RCAR_DU_CMM_WAIT_EVENT: DU-CMM done event */ @@ -2406,12 +2599,10 @@ index b695b8b2a..d7867d5 100644 +#define LUT_DOUBLE_BUFFER_AUTO 0 +#define LUT_DOUBLE_BUFFER_A 1 +#define LUT_DOUBLE_BUFFER_B 2 -+#define LUT_SINGLE_BUFFER 3 + +#define CLU_DOUBLE_BUFFER_AUTO 0 +#define CLU_DOUBLE_BUFFER_A 1 +#define CLU_DOUBLE_BUFFER_B 2 -+#define CLU_SINGLE_BUFFER 3 + /* rcar-du + vspd specific ioctls */ #define DRM_RCAR_DU_SET_VMUTE 0 @@ -2432,7 +2623,7 @@ index b695b8b2a..d7867d5 100644 #define DRM_IOCTL_RCAR_DU_SET_VMUTE \ DRM_IOW(DRM_COMMAND_BASE + DRM_RCAR_DU_SET_VMUTE, \ struct rcar_du_vmute) -@@ -38,5 +132,41 @@ struct rcar_du_screen_shot { +@@ -38,5 +131,41 @@ struct rcar_du_screen_shot { #define DRM_IOCTL_RCAR_DU_SCRSHOT \ DRM_IOW(DRM_COMMAND_BASE + DRM_RCAR_DU_SCRSHOT, \ struct rcar_du_screen_shot) diff --git a/meta-rcar-gen3/recipes-kernel/linux/linux-renesas_4.9.bbappend b/meta-rcar-gen3/recipes-kernel/linux/linux-renesas_4.14.bbappend similarity index 100% rename from meta-rcar-gen3/recipes-kernel/linux/linux-renesas_4.9.bbappend rename to meta-rcar-gen3/recipes-kernel/linux/linux-renesas_4.14.bbappend diff --git a/tmp/du_cmm b/tmp/du_cmm new file mode 160000 index 0000000..b36963a --- /dev/null +++ b/tmp/du_cmm @@ -0,0 +1 @@ +Subproject commit b36963af54f6c36fb462bb756961f8a3b72ccec6