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Decide how to handle alignment requirements in RISC-V embedded library variants #397

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We recently went through the exercise of checking this in our Arm/AArch64 configs in #388, but presumably the same thing impacts RISC-V (in the past I remember us looking at code size differences between Arm and RISC-V code that boiled down to whether unaligned accesses were allowed or not).

I assume the same rough outline from #388 applies in terms of what our options are, etc. but it might be good to go through and double check this and decide whether we should take similar steps or not.

Our RISC-V variants also don't have the same "history" as our Arm variants where we inherited -mno-unaligned-access for some variants, etc.

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