From 201dfa4cbcdc752fe874fefe586b729a98b4cd2d Mon Sep 17 00:00:00 2001 From: Florian Echtler Date: Wed, 16 Oct 2013 19:07:19 +0200 Subject: [PATCH 1/5] enable setting the hardware address size --- RF24.cpp | 8 ++++++++ RF24.h | 9 +++++++++ 2 files changed, 17 insertions(+) diff --git a/RF24.cpp b/RF24.cpp index 9471583d..1165cd98 100644 --- a/RF24.cpp +++ b/RF24.cpp @@ -266,6 +266,14 @@ void RF24::setPayloadSize(uint8_t size) /****************************************************************************/ +void RF24::setAddressSize(uint8_t size) +{ + uint8_t tmp = max(3,min(5,size)); + write_register(SETUP_AW, (tmp-2) & 0x03 ); +} + +/****************************************************************************/ + uint8_t RF24::getPayloadSize(void) { return payload_size; diff --git a/RF24.h b/RF24.h index 18914f09..e3e4aef9 100644 --- a/RF24.h +++ b/RF24.h @@ -388,6 +388,15 @@ class RF24 */ void setPayloadSize(uint8_t size); + /** + * Set Hardware Address Size + * + * Set to either 3, 4 or 5 bytes. Default is 5. + * + * @param size The number of bytes in the payload + */ + void setAddressSize(uint8_t size); + /** * Get Static Payload Size * From c73baa7f40ad36530d1142f4495b80ae61319465 Mon Sep 17 00:00:00 2001 From: Florian Echtler Date: Wed, 16 Oct 2013 19:13:03 +0200 Subject: [PATCH 2/5] keep track of HW address size --- RF24.cpp | 16 ++++++++-------- RF24.h | 1 + 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/RF24.cpp b/RF24.cpp index 1165cd98..04dff00a 100644 --- a/RF24.cpp +++ b/RF24.cpp @@ -240,8 +240,8 @@ void RF24::print_address_register(const char* name, uint8_t reg, uint8_t qty) RF24::RF24(uint8_t _cepin, uint8_t _cspin): ce_pin(_cepin), csn_pin(_cspin), wide_band(true), p_variant(false), - payload_size(32), ack_payload_available(false), dynamic_payloads_enabled(false), - pipe0_reading_address(0) + payload_size(32), address_size(5), ack_payload_available(false), + dynamic_payloads_enabled(false), pipe0_reading_address(0) { } @@ -268,8 +268,8 @@ void RF24::setPayloadSize(uint8_t size) void RF24::setAddressSize(uint8_t size) { - uint8_t tmp = max(3,min(5,size)); - write_register(SETUP_AW, (tmp-2) & 0x03 ); + address_size = max(3,min(5,size)); + write_register(SETUP_AW, (address_size-2) & 0x03 ); } /****************************************************************************/ @@ -408,7 +408,7 @@ void RF24::startListening(void) // Restore the pipe0 adddress, if exists if (pipe0_reading_address) - write_register(RX_ADDR_P0, reinterpret_cast(&pipe0_reading_address), 5); + write_register(RX_ADDR_P0, reinterpret_cast(&pipe0_reading_address), address_size); // Flush buffers flush_rx(); @@ -614,8 +614,8 @@ void RF24::openWritingPipe(uint64_t value) // Note that AVR 8-bit uC's store this LSB first, and the NRF24L01(+) // expects it LSB first too, so we're good. - write_register(RX_ADDR_P0, reinterpret_cast(&value), 5); - write_register(TX_ADDR, reinterpret_cast(&value), 5); + write_register(RX_ADDR_P0, reinterpret_cast(&value), address_size); + write_register(TX_ADDR, reinterpret_cast(&value), address_size); const uint8_t max_payload_size = 32; write_register(RX_PW_P0,min(payload_size,max_payload_size)); @@ -648,7 +648,7 @@ void RF24::openReadingPipe(uint8_t child, uint64_t address) { // For pipes 2-5, only write the LSB if ( child < 2 ) - write_register(pgm_read_byte(&child_pipe[child]), reinterpret_cast(&address), 5); + write_register(pgm_read_byte(&child_pipe[child]), reinterpret_cast(&address), address_size); else write_register(pgm_read_byte(&child_pipe[child]), reinterpret_cast(&address), 1); diff --git a/RF24.h b/RF24.h index e3e4aef9..4baea079 100644 --- a/RF24.h +++ b/RF24.h @@ -50,6 +50,7 @@ class RF24 bool wide_band; /* 2Mbs data rate in use? */ bool p_variant; /* False for RF24L01 and true for RF24L01P */ uint8_t payload_size; /**< Fixed size of payloads */ + uint8_t address_size; /**< Size of hardware addresses */ bool ack_payload_available; /**< Whether there is an ack payload waiting */ bool dynamic_payloads_enabled; /**< Whether dynamic payloads are enabled. */ uint8_t ack_payload_length; /**< Dynamic size of pending ack payload. */ From cd66b5d6b13103b76cd07135dfdb9bac8438c6c2 Mon Sep 17 00:00:00 2001 From: Florian Echtler Date: Thu, 14 Nov 2013 18:35:55 +0100 Subject: [PATCH 3/5] add some bg info on chinese SI24R01 clone modules --- README.md | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/README.md b/README.md index c0e71c09..10f2a128 100644 --- a/README.md +++ b/README.md @@ -18,3 +18,18 @@ Please refer to: This chip uses the SPI bus, plus two chip control pins. Remember that pin 10 must still remain an output, or the SPI hardware will go into 'slave' mode. +# Some notes about the SI24R01 "power enhanced version 2.4G wireless module" + +The SI24R01 chip on these modules is apparently a Chinese clone of the NRF24L01+. Sometimes, when you buy an nRF24L01+ module (particularly on eBay), you will actually get an SI24R01 module instead. Below is some slightly cleaned up information found about this chip on a [Chinese reseller site](http://www.wayengineer.com/index.php?main_page=product_info&products_id=3442). + +SI24R01 and NRF24L01 are completely compatible (SPI register, definition timing, the state diagram), which can communicate with each other, support NRF24L01+ all communication functions. + +1: 7dBm output power +SI24R1 default mode output power is 2~3dBm, if you want to output 7dBm, the register address 0x06 (RF_SETUP) the lowest register write 1 (NRF24L01+ without the use of the bit, the default is 0), namely 0x06 register a minimum of four to 1111 + +Translation: you can actually broadcast at up to 7dBm with this module if you set bit 0 in RF_SETUP to 1. For the nRF24L01+, this bit is marked as obsolete/don't care, so it shouldn't hurt to set it. + +2: SI24R1 emission problem +Launch operation mode of SI24R1 and NRF24L01+ exactly the same, cause problems: if the register is powerdown mode operation, higher CE to at least 2ms, because the powerdown model of crystal does not work, crystal is from close to emission data need about 2ms. If the standbyI mode to drop-down CE high, that is not problem, CE only needs a pulse of 10us, because under the mode of standbyI crystal is the work (current is very small, only dozen microamperes) + +Translation: the transition from power-down to standby-I mode will take longer at about 2 ms on these modules, as opposed to 1.5 ms on the nRF24L01+. From 2cc4b6702e88a47fb24c82ea3db70494b0de2977 Mon Sep 17 00:00:00 2001 From: Florian Echtler Date: Thu, 14 Nov 2013 18:35:55 +0100 Subject: [PATCH 4/5] add some bg info on chinese SI24R01 clone modules --- README.md | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/README.md b/README.md index c0e71c09..5887c2c7 100644 --- a/README.md +++ b/README.md @@ -18,3 +18,18 @@ Please refer to: This chip uses the SPI bus, plus two chip control pins. Remember that pin 10 must still remain an output, or the SPI hardware will go into 'slave' mode. +### Some notes about the SI24R01 "power enhanced version 2.4G wireless module" + +The SI24R01 chip on these modules is apparently a Chinese clone of the NRF24L01+. Sometimes, when you buy an nRF24L01+ module (particularly on eBay), you will actually get an SI24R01 module instead. Below is some slightly cleaned up information found about this chip on a [Chinese reseller site](http://www.wayengineer.com/index.php?main_page=product_info&products_id=3442). + +> SI24R01 and NRF24L01 are completely compatible (SPI register, definition timing, the state diagram), which can communicate with each other, support NRF24L01+ all communication functions. + +> 1: 7dBm output power +> SI24R1 default mode output power is 2~3dBm, if you want to output 7dBm, the register address 0x06 (RF_SETUP) the lowest register write 1 (NRF24L01+ without the use of the bit, the default is 0), namely 0x06 register a minimum of four to 1111 + +Translation: you can actually broadcast at up to 7dBm with this module if you set bit 0 in RF_SETUP to 1. For the nRF24L01+, this bit is marked as obsolete/don't care, so it shouldn't hurt to set it. + +> 2: SI24R1 emission problem +> Launch operation mode of SI24R1 and NRF24L01+ exactly the same, cause problems: if the register is powerdown mode operation, higher CE to at least 2ms, because the powerdown model of crystal does not work, crystal is from close to emission data need about 2ms. If the standbyI mode to drop-down CE high, that is not problem, CE only needs a pulse of 10us, because under the mode of standbyI crystal is the work (current is very small, only dozen microamperes) + +Translation: the transition from power-down to standby-I mode will take longer at about 2 ms on these modules, as opposed to 1.5 ms on the nRF24L01+. From 96f4cdc32e975e46b0c80deb36f07179e1a44dbd Mon Sep 17 00:00:00 2001 From: Florian Echtler Date: Fri, 15 Nov 2013 13:38:17 +0100 Subject: [PATCH 5/5] markdown fixes --- README.md | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/README.md b/README.md index 10f2a128..5887c2c7 100644 --- a/README.md +++ b/README.md @@ -18,18 +18,18 @@ Please refer to: This chip uses the SPI bus, plus two chip control pins. Remember that pin 10 must still remain an output, or the SPI hardware will go into 'slave' mode. -# Some notes about the SI24R01 "power enhanced version 2.4G wireless module" +### Some notes about the SI24R01 "power enhanced version 2.4G wireless module" The SI24R01 chip on these modules is apparently a Chinese clone of the NRF24L01+. Sometimes, when you buy an nRF24L01+ module (particularly on eBay), you will actually get an SI24R01 module instead. Below is some slightly cleaned up information found about this chip on a [Chinese reseller site](http://www.wayengineer.com/index.php?main_page=product_info&products_id=3442). -SI24R01 and NRF24L01 are completely compatible (SPI register, definition timing, the state diagram), which can communicate with each other, support NRF24L01+ all communication functions. +> SI24R01 and NRF24L01 are completely compatible (SPI register, definition timing, the state diagram), which can communicate with each other, support NRF24L01+ all communication functions. -1: 7dBm output power -SI24R1 default mode output power is 2~3dBm, if you want to output 7dBm, the register address 0x06 (RF_SETUP) the lowest register write 1 (NRF24L01+ without the use of the bit, the default is 0), namely 0x06 register a minimum of four to 1111 +> 1: 7dBm output power +> SI24R1 default mode output power is 2~3dBm, if you want to output 7dBm, the register address 0x06 (RF_SETUP) the lowest register write 1 (NRF24L01+ without the use of the bit, the default is 0), namely 0x06 register a minimum of four to 1111 Translation: you can actually broadcast at up to 7dBm with this module if you set bit 0 in RF_SETUP to 1. For the nRF24L01+, this bit is marked as obsolete/don't care, so it shouldn't hurt to set it. -2: SI24R1 emission problem -Launch operation mode of SI24R1 and NRF24L01+ exactly the same, cause problems: if the register is powerdown mode operation, higher CE to at least 2ms, because the powerdown model of crystal does not work, crystal is from close to emission data need about 2ms. If the standbyI mode to drop-down CE high, that is not problem, CE only needs a pulse of 10us, because under the mode of standbyI crystal is the work (current is very small, only dozen microamperes) +> 2: SI24R1 emission problem +> Launch operation mode of SI24R1 and NRF24L01+ exactly the same, cause problems: if the register is powerdown mode operation, higher CE to at least 2ms, because the powerdown model of crystal does not work, crystal is from close to emission data need about 2ms. If the standbyI mode to drop-down CE high, that is not problem, CE only needs a pulse of 10us, because under the mode of standbyI crystal is the work (current is very small, only dozen microamperes) Translation: the transition from power-down to standby-I mode will take longer at about 2 ms on these modules, as opposed to 1.5 ms on the nRF24L01+.