The STM32F469 Cortex-M4F has a VFPv4-SP (single-precision only) FPU. If the build flag -mfpu=fpv5-d16 is specified instead of mfpu=fpv4-sp-d16, the compiler will change to double precision VFP instructions like VLDR.64, VSTR,.64, VMUL.F64 that are architecturally undefined on our hardware. These instructions then triggered a UNDEFINSTR UsageFaults (CFSR bit 16) which escalated to HardFault.
The build system accepted the wrong flag without warning and we only discovered this mismatch during runtime which is extremely annoying and hard to find.
Let's try to include a post-build PlatformIO script for the vehicle environment that validates the compiled ELF's ABI attributes match the target hardware. I don't exactly know how this will be done or what it would look like but I think it would be helpful
The STM32F469 Cortex-M4F has a VFPv4-SP (single-precision only) FPU. If the build flag
-mfpu=fpv5-d16is specified instead ofmfpu=fpv4-sp-d16, the compiler will change to double precision VFP instructions like VLDR.64, VSTR,.64, VMUL.F64 that are architecturally undefined on our hardware. These instructions then triggered a UNDEFINSTR UsageFaults (CFSR bit 16) which escalated to HardFault.The build system accepted the wrong flag without warning and we only discovered this mismatch during runtime which is extremely annoying and hard to find.
Let's try to include a post-build PlatformIO script for the vehicle environment that validates the compiled ELF's ABI attributes match the target hardware. I don't exactly know how this will be done or what it would look like but I think it would be helpful