The hack to poke an internal verilog signal corresponding to a coreir register no longer works: https://github.com/leonardt/fault/blob/master/fault/wrapper.py#L141-L147 Need to refer to the generated MLIR name (could insert a name in fault).
The hack to poke an internal verilog signal corresponding to a coreir register no longer works: https://github.com/leonardt/fault/blob/master/fault/wrapper.py#L141-L147
Need to refer to the generated MLIR name (could insert a name in fault).