long path failure in WSL

[gojimmypi]

when programming a bitstream with a long file source path with WSL, an open ... failed message occurs, for example as shown in my FuseSoC example:

In WSL:

0 $  ls /mnt/c/workspace/myFuseSoC/build/fusesoc_utils_blinky_1.0/ulx3s_85-trellis/fusesoc_utils_blinky_1.0.bit -al
-rwxrwxrwx 1 gojimmypi gojimmypi 1927725 Jun 12 13:10 /mnt/c/workspace/myFuseSoC/build/fusesoc_utils_blinky_1.0/ulx3s_85-trellis/fusesoc_utils_blinky_1.0.bit
gojimmypi@DESKTOP(WSL): /mnt/c/workspace/myFuseSoC ()

0 $  /mnt/c/workspace/fujprog/build/fujprog-v48-win64.exe /mnt/c/workspace/myFuseSoC/build/fusesoc_utils_blinky_1.0/ulx3s_85-trellis/fusesoc_utils_blinky_1.0.bit
ULX2S / ULX3S JTAG programmer v4.8 (git 96ebb45 built Oct  7 2020 22:42:00)
Copyright (C) Marko Zec, EMARD, gojimmypi, kost and contributors
Using USB cable: ULX3S FPGA 12K v3.0.3
open(/mnt/c/workspace/myFuseSoC/build/fusesoc_utils_blinky_1.0/ulx3s_85-trellis/fusesoc_utils_blinky_1.0.bit) failed

Failed.
Programming: 0% - gojimmypi@DESKTOP(WSL): /mnt/c/workspace/myFuseSoC ()

0 $  cp /mnt/c/workspace/myFuseSoC/build/fusesoc_utils_blinky_1.0/ulx3s_85-trellis/fusesoc_utils_blinky_1.0.bit ./fuse_blinky.bit
gojimmypi@DESKTOP(WSL): /mnt/c/workspace/myFuseSoC ()

0 $  /mnt/c/workspace/fujprog/build/fujprog-v48-win64.exe ./fuse_blinky.bit
ULX2S / ULX3S JTAG programmer v4.8 (git 96ebb45 built Oct  7 2020 22:42:00)
Copyright (C) Marko Zec, EMARD, gojimmypi, kost and contributors
Using USB cable: ULX3S FPGA 12K v3.0.3
Programming: 100%
Completed in 61.91 seconds.
gojimmypi@DESKTOP(WSL): /mnt/c/workspace/myFuseSoC ()

Curiously, this is not a problem when calling the same executable from DOS to to same path:

C:\workspace>cd myFuseSoC

C:\workspace\myFuseSoC>dir c:\workspace\myFuseSoC\build\fusesoc_utils_blinky_1.0\ulx3s_85-trellis\fusesoc_utils_blinky_1.0.bit
 Volume in drive C is OS
 Volume Serial Number is [omit]

 Directory of c:\workspace\myFuseSoC\build\fusesoc_utils_blinky_1.0\ulx3s_85-trellis

06/12/2021  01:10 PM         1,927,725 fusesoc_utils_blinky_1.0.bit
               1 File(s)      1,927,725 bytes

C:\workspace\myFuseSoC>c:\workspace\fujprog\build\fujprog-v48-win64.exe c:\workspace\myFuseSoC\build\fusesoc_utils_blinky_1.0\ulx3s_85-trellis\fusesoc_utils_blinky_1.0.bit
ULX2S / ULX3S JTAG programmer v4.8 (git 96ebb45 built Oct  7 2020 22:42:00)
Copyright (C) Marko Zec, EMARD, gojimmypi, kost and contributors
Using USB cable: ULX3S FPGA 12K v3.0.3
Programming: 100%
Completed in 61.88 seconds.

C:\workspace\myFuseSoC>

I tried to duplicate in a real Linux environment, well - actually a VM, but I was unable to get the ULX3S to be recognized from within the VM: