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Update system_test_plan.md, Replaced all occurrences of DPActivated with DataPathActivated (sonic-net#26328)
What: Doc-only change to docs/testplan/transceiver/system_test_plan.md, replacing all DPActivated occurrences with DataPathActivated (DPDeactivated left unchanged). Why: DPActivated is not a valid CMIS DataPath state name; correct state observed on real hardware (Nvidia SN5640, Arista 7060x6) is DataPathActivated. How: Simple find/replace of the incorrect state name in the transceiver system test plan doc. Testing: Doc-only change; diff reviewed for correctness against observed CLI/STATE_DB output. CI green (CodeQL, Semgrep, Analyze, DCO, EasyCLA all pass). Signed-off-by: Simon Chen <simon.chen@terahop.com>
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docs/testplan/transceiver/system_test_plan.md

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@@ -157,7 +157,7 @@ This procedure is used after any test that modifies transceiver state or after s
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- Per-operation peer link-flap expectations (e.g. the peer bounces once on reseat/reboot) are asserted in the individual test cases, not here.
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5. **CMIS State Verification** (for CMIS active optical transceivers (can be checked via `cmis_active_optical` attribute))
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- Verify DataPathState is `DPActivated` for operational ports
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- Verify DataPathState is `DataPathActivated` for operational ports
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- Verify ConfigState is `ConfigSuccess`
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6. **SI Settings Verification** (if applicable)
@@ -239,7 +239,7 @@ The following tests aim to validate the link status and stability of transceiver
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| 1 | Transceiver reset validation | 1. Skip test if `transceiver_reset_supported` is False.<br>2. Execute **State Preservation and Restoration** (capture phase).<br>3. Reset the transceiver using appropriate CLI command.<br>4. Wait for `transceiver_reset_i2c_recover_sec` to allow I2C recovery.<br>5. Verify port is linked down after reset and transceiver is in low power mode (if `low_power_mode_supported` is True).<br>6. If `low_pwr_request_hw_asserted` is True:<br> a. Check DataPath is in DPDeactivated state.<br> b. Verify LowPwrAllowRequestHW (page 0h, byte 26.6) is set to 1.<br>7. Issue `config interface shutdown <port>` and wait for `port_shutdown_wait_sec`.<br>8. Issue `config interface startup <port>` and wait for `port_startup_wait_sec`.<br>9. Execute **Standard Port Recovery and Verification Procedure**.<br>10. Execute **State Preservation and Restoration** (restoration phase). | Ensure that the port is linked down after reset and is in low power mode (if transceiver supports it). If `low_pwr_request_hw_asserted` is True, verify DataPath is in DPDeactivated state and LowPwrAllowRequestHW signal is asserted (set to 1). The shutdown and startup commands should re-initialize the port and bring the link up with all verification checks passing. |
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| 2 | Transceiver low power mode validation | 1. Skip test if `low_power_mode_supported` is False.<br>2. Execute **State Preservation and Restoration** (capture phase).<br>3. Ensure transceiver is in high power mode initially.<br>4. Put the transceiver in low power mode using CLI command.<br>5. Wait for `transceiver_reset_i2c_recover_sec`.<br>6. Verify port is linked down and DataPath is in DPDeactivated state.<br>7. Verify transceiver is in low power mode through CLI.<br>8. Disable low power mode (restore to high power mode).<br>9. Wait for `transceiver_reset_i2c_recover_sec`.<br>10. Execute **Standard Port Recovery and Verification Procedure**.<br>11. Execute **State Preservation and Restoration** (restoration phase). | Ensure transceiver transitions correctly between high and low power modes. Port should be down in low power mode and up in high power mode with all verification checks passing. |
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| 3 | CMIS transceiver boot-up low power mode test | 1. Skip test if `cmis_bootup_low_power_test_supported` is False.<br>2. Add `"skip_xcvrd": true,` to the `pmon_daemon_control.json` file.<br>3. Reboot the device using cold reboot.<br>4. Wait for `cold_reboot_settle_sec` and verify system is operational.<br>5. Verify CMIS transceiver is in low power mode after boot-up.<br>6. Revert the `pmon_daemon_control.json` file to original state.<br>7. Restart pmon service: `sudo systemctl restart pmon`.<br>8. Wait for `pmon_restart_settle_sec` and verify normal operation restored.<br>9. Execute **Standard Port Recovery and Verification Procedure** for all ports. | Ensure CMIS transceiver boots up in low power mode when xcvrd is disabled. System should restore normal operation after reverting configuration and restarting pmon with all verification checks passing. |
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| 4 | Transceiver Tx disable DataPath validation | 1. Skip test if `tx_disable_test_supported` is False.<br>2. Execute **State Preservation and Restoration** (capture phase).<br>3. Verify transceiver is in operational state with DataPath in DPActivated state.<br>4. Read MaxDurationDPTxTurnOff value from EEPROM (page 1h, byte 168.7:4) using appropriate API.<br>5. Disable Tx by writing to EEPROM or calling `tx_disable` API.<br>6. Monitor DataPath state transition from DPActivated within the MaxDurationDPTxTurnOff time read from EEPROM.<br>7. Verify DataPath state changes from DPActivated to a different state within the specified time.<br>8. Issue `config interface shutdown <port>` and wait for `port_shutdown_wait_sec`.<br>9. Issue `config interface startup <port>` and wait for `port_startup_wait_sec`.<br>10. Execute **Standard Port Recovery and Verification Procedure**.<br>11. Execute **State Preservation and Restoration** (restoration phase). | Ensure DataPath state transitions correctly within MaxDurationDPTxTurnOff time (read from EEPROM) when Tx is disabled. Port should recover after shutdown/startup cycle with all verification checks passing. This test can be run as a stress test with multiple iterations. |
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| 4 | Transceiver Tx disable DataPath validation | 1. Skip test if `tx_disable_test_supported` is False.<br>2. Execute **State Preservation and Restoration** (capture phase).<br>3. Verify transceiver is in operational state with DataPath in DataPathActivated state.<br>4. Read MaxDurationDPTxTurnOff value from EEPROM (page 1h, byte 168.7:4) using appropriate API.<br>5. Disable Tx by writing to EEPROM or calling `tx_disable` API.<br>6. Monitor DataPath state transition from DataPathActivated within the MaxDurationDPTxTurnOff time read from EEPROM.<br>7. Verify DataPath state changes from DataPathActivated to a different state within the specified time.<br>8. Issue `config interface shutdown <port>` and wait for `port_shutdown_wait_sec`.<br>9. Issue `config interface startup <port>` and wait for `port_startup_wait_sec`.<br>10. Execute **Standard Port Recovery and Verification Procedure**.<br>11. Execute **State Preservation and Restoration** (restoration phase). | Ensure DataPath state transitions correctly within MaxDurationDPTxTurnOff time (read from EEPROM) when Tx is disabled. Port should recover after shutdown/startup cycle with all verification checks passing. This test can be run as a stress test with multiple iterations. |
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| 5 | CMIS breakout subport concurrent recovery after reset | 1. Skip test if the transceiver is not a CMIS active-optical module (check via `cmis_active_optical`) or if `transceiver_reset_supported` is False.<br>2. Identify all logical sibling subports `S = {S1..Sn}` mapped to the same physical port as the test port (i.e. ports that share `index` in CONFIG_DB `PORT` table).<br>3. Skip test if `len(S) < 2`.<br>4. Execute **State Preservation and Restoration** (capture phase) for every port in `S`.<br>5. For `breakout_concurrent_startup_iterations` iterations:<br> a. Issue `config interface shutdown` for every port in `S`. Wait `port_shutdown_wait_sec`.<br> b. Verify all are operationally down and DataPath is in `DPDeactivated` for all lanes.<br> c. Issue `sfputil reset <S1>` to force the module into `ModuleLowPwr` with default `DPDeinit=0x00` and `OutputDisableTx=0x00` registers. Wait `transceiver_reset_i2c_recover_sec`.<br> d. Bring all subports in `S` back up **concurrently in randomized order** (e.g. via parallel shell jobs `for p in $(shuf -e ${S[@]}); do config interface startup $p & done; wait`, or a single Python helper invoking `subprocess.run(["config","interface","startup", port])` for each port back-to-back without inter-port sleep).<br> e. Wait `breakout_subport_settle_sec` for CMIS state machines to converge.<br> f. For every port in `S`, verify `redis-cli -n 6 hget "TRANSCEIVER_STATUS_SW\|<port>" cmis_state == "READY"` (NOT `"FAILED"`).<br> g. Verify syslog contains no `pmon#CmisManagerTask` `: FAILED` lines and no `timeout for 'DataPathDeactivated/DataPathInitialized'` lines for any port in `S` from the iteration window.<br> h. Execute **Standard Port Recovery and Verification Procedure** for every port in `S`.<br>6. Execute **State Preservation and Restoration** (restoration phase). | Ensure that all sibling subports of a CMIS breakout module recover to `cmis_state=READY` regardless of admin-up arrival order after a module reset. No port should be stuck in `cmis_state=FAILED` and there should be no `"timeout for 'DataPathDeactivated/DataPathInitialized'"` error in syslog. This validates that xcvrd's CMIS state machine handles the `ModuleLowPwr -> ModuleReady` auto-init transition correctly when multiple subports race to issue `set_lpmode(False)`. |
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### Diagnostic Test Cases
@@ -282,7 +282,7 @@ The following steps are performed once after **all test cases** in this plan hav
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### State Restoration
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1. **Interface state**: Confirm all ports in `port_attributes_dict` are operationally up. If any port remains in shutdown state (e.g., due to mid-test failure), issue `config interface startup <port>`.
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2. **Transceiver state**: Confirm all transceivers are in high power mode with DataPath in DPActivated state. If any transceiver remains in low power mode or a non-operational DataPath state, restore using the appropriate CLI command.
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2. **Transceiver state**: Confirm all transceivers are in high power mode with DataPath in DataPathActivated state. If any transceiver remains in low power mode or a non-operational DataPath state, restore using the appropriate CLI command.
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3. **Configuration files**: Ensure any temporary configuration changes (e.g., `pmon_daemon_control.json` modifications from Transceiver Event Handling TC 3) have been reverted to their original state.
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4. **C-CMIS settings**: Confirm frequency and tx power values are restored to their defaults (first entry in `frequency_values` and `tx_power_values` respectively) for all ports tested by Configuration Validation test cases.
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