diff --git a/go.mod b/go.mod index 1efbb6e290..25193c5790 100644 --- a/go.mod +++ b/go.mod @@ -15,7 +15,7 @@ require ( github.com/spf13/pflag v1.0.9 go.starlark.net v0.0.0-20231101134539-556fd59b42f6 go.yaml.in/yaml/v3 v3.0.4 - golang.org/x/arch v0.11.0 + golang.org/x/arch v0.28.0 golang.org/x/sys v0.46.0 golang.org/x/telemetry v0.0.0-20241106142447-58a1122356f5 ) diff --git a/go.sum b/go.sum index ed54c200b2..a6f1bd2dca 100644 --- a/go.sum +++ b/go.sum @@ -44,8 +44,8 @@ go.starlark.net v0.0.0-20231101134539-556fd59b42f6 h1:+eC0F/k4aBLC4szgOcjd7bDTEn go.starlark.net v0.0.0-20231101134539-556fd59b42f6/go.mod h1:LcLNIzVOMp4oV+uusnpk+VU+SzXaJakUuBjoCSWH5dM= go.yaml.in/yaml/v3 v3.0.4 h1:tfq32ie2Jv2UxXFdLJdh3jXuOzWiL1fo0bu/FbuKpbc= go.yaml.in/yaml/v3 v3.0.4/go.mod h1:DhzuOOF2ATzADvBadXxruRBLzYTpT36CKvDb3+aBEFg= -golang.org/x/arch v0.11.0 h1:KXV8WWKCXm6tRpLirl2szsO5j/oOODwZf4hATmGVNs4= -golang.org/x/arch v0.11.0/go.mod h1:FEVrYAQjsQXMVJ1nsMoVVXPZg6p2JE2mx8psSWTDQys= +golang.org/x/arch v0.28.0 h1:wVwVdqsTuUbJvhYVCspQYwZXHNYeLSoZnmHD+ggddpQ= +golang.org/x/arch v0.28.0/go.mod h1:0X+GdSIP+kL5wPmpK7sdkEVTt2XoYP0cSjQSbZBwOi8= golang.org/x/exp v0.0.0-20230224173230-c95f2b4c22f2 h1:Jvc7gsqn21cJHCmAWx0LiimpP18LZmUxkT5Mp7EZ1mI= golang.org/x/exp v0.0.0-20230224173230-c95f2b4c22f2/go.mod h1:CxIveKay+FTh1D0yPZemJVgC/95VzuuOLq5Qi4xnoYc= golang.org/x/mod v0.20.0 h1:utOm6MM3R3dnawAiJgn0y+xvuYRsm1RKM/4giyfDgV0= diff --git a/pkg/proc/x86_disasm.go b/pkg/proc/x86_disasm.go index 96e2070195..93c3b7f386 100644 --- a/pkg/proc/x86_disasm.go +++ b/pkg/proc/x86_disasm.go @@ -21,7 +21,6 @@ func x86AsmDecode(asmInst *AsmInstruction, mem []byte, regs *op.DwarfRegisters, asmInst.Size = inst.Len asmInst.Bytes = mem[:asmInst.Size] - patchPCRelX86(asmInst.Loc.PC, &inst) asmInst.Inst = (*x86Inst)(&inst) asmInst.Kind = OtherInstruction @@ -40,16 +39,6 @@ func x86AsmDecode(asmInst *AsmInstruction, mem []byte, regs *op.DwarfRegisters, return nil } -// converts PC relative arguments to absolute addresses -func patchPCRelX86(pc uint64, inst *x86asm.Inst) { - for i := range inst.Args { - rel, isrel := inst.Args[i].(x86asm.Rel) - if isrel { - inst.Args[i] = x86asm.Imm(int64(pc) + int64(rel) + int64(inst.Len)) - } - } -} - func (inst *x86Inst) Text(flavour AssemblyFlavour, pc uint64, symLookup func(uint64) (string, uint64)) string { if inst == nil { return "?" @@ -117,6 +106,8 @@ func resolveCallArgX86(inst *x86asm.Inst, instAddr uint64, currentGoroutine bool if err != nil { return nil } + case x86asm.Rel: + pc = instAddr + uint64(arg) + uint64(inst.Len) default: return nil } diff --git a/pkg/terminal/command_test.go b/pkg/terminal/command_test.go index f2bc0708c2..58f68ac61f 100644 --- a/pkg/terminal/command_test.go +++ b/pkg/terminal/command_test.go @@ -1474,7 +1474,7 @@ func TestDisassPosCmd(t *testing.T) { term.MustExec("continue") out := term.MustExec("step-instruction") t.Logf("%q\n", out) - if !strings.Contains(out, "call $runtime.Breakpoint") && !strings.Contains(out, "CALL runtime.Breakpoint(SB)") { + if !strings.Contains(out, "call runtime.Breakpoint") && !strings.Contains(out, "CALL runtime.Breakpoint") { t.Errorf("output doesn't look like disassembly") } }) diff --git a/vendor/golang.org/x/arch/arm64/arm64asm/inst.go b/vendor/golang.org/x/arch/arm64/arm64asm/inst.go index 866e399cd1..39ddaf751e 100644 --- a/vendor/golang.org/x/arch/arm64/arm64asm/inst.go +++ b/vendor/golang.org/x/arch/arm64/arm64asm/inst.go @@ -469,7 +469,7 @@ func (rea RegExtshiftAmount) String() string { if rea.amount != 0 { buf += fmt.Sprintf(" #%d", rea.amount) } else { - if rea.show_zero == true { + if rea.show_zero { buf += fmt.Sprintf(" #%d", rea.amount) } } @@ -527,7 +527,7 @@ func (m MemImmediate) String() string { postR := post.String() return fmt.Sprintf("[%s], %s", R, postR) } - return fmt.Sprintf("unimplemented!") + return "unimplemented!" } // A MemExtend is a memory reference made up of a base R and index expression X. @@ -1021,110 +1021,110 @@ func (s sysInstFields) getType() sys { } var sysInstsAttrs = map[sysInstFields]sysInstAttrs{ - sysInstFields{0, 8, 3, 0}: {sys_TLBI, "VMALLE1IS", false}, - sysInstFields{0, 8, 3, 1}: {sys_TLBI, "VAE1IS", true}, - sysInstFields{0, 8, 3, 2}: {sys_TLBI, "ASIDE1IS", true}, - sysInstFields{0, 8, 3, 3}: {sys_TLBI, "VAAE1IS", true}, - sysInstFields{0, 8, 3, 5}: {sys_TLBI, "VALE1IS", true}, - sysInstFields{0, 8, 3, 7}: {sys_TLBI, "VAALE1IS", true}, - sysInstFields{0, 8, 7, 0}: {sys_TLBI, "VMALLE1", false}, - sysInstFields{0, 8, 7, 1}: {sys_TLBI, "VAE1", true}, - sysInstFields{0, 8, 7, 2}: {sys_TLBI, "ASIDE1", true}, - sysInstFields{0, 8, 7, 3}: {sys_TLBI, "VAAE1", true}, - sysInstFields{0, 8, 7, 5}: {sys_TLBI, "VALE1", true}, - sysInstFields{0, 8, 7, 7}: {sys_TLBI, "VAALE1", true}, - sysInstFields{4, 8, 0, 1}: {sys_TLBI, "IPAS2E1IS", true}, - sysInstFields{4, 8, 0, 5}: {sys_TLBI, "IPAS2LE1IS", true}, - sysInstFields{4, 8, 3, 0}: {sys_TLBI, "ALLE2IS", false}, - sysInstFields{4, 8, 3, 1}: {sys_TLBI, "VAE2IS", true}, - sysInstFields{4, 8, 3, 4}: {sys_TLBI, "ALLE1IS", false}, - sysInstFields{4, 8, 3, 5}: {sys_TLBI, "VALE2IS", true}, - sysInstFields{4, 8, 3, 6}: {sys_TLBI, "VMALLS12E1IS", false}, - sysInstFields{4, 8, 4, 1}: {sys_TLBI, "IPAS2E1", true}, - sysInstFields{4, 8, 4, 5}: {sys_TLBI, "IPAS2LE1", true}, - sysInstFields{4, 8, 7, 0}: {sys_TLBI, "ALLE2", false}, - sysInstFields{4, 8, 7, 1}: {sys_TLBI, "VAE2", true}, - sysInstFields{4, 8, 7, 4}: {sys_TLBI, "ALLE1", false}, - sysInstFields{4, 8, 7, 5}: {sys_TLBI, "VALE2", true}, - sysInstFields{4, 8, 7, 6}: {sys_TLBI, "VMALLS12E1", false}, - sysInstFields{6, 8, 3, 0}: {sys_TLBI, "ALLE3IS", false}, - sysInstFields{6, 8, 3, 1}: {sys_TLBI, "VAE3IS", true}, - sysInstFields{6, 8, 3, 5}: {sys_TLBI, "VALE3IS", true}, - sysInstFields{6, 8, 7, 0}: {sys_TLBI, "ALLE3", false}, - sysInstFields{6, 8, 7, 1}: {sys_TLBI, "VAE3", true}, - sysInstFields{6, 8, 7, 5}: {sys_TLBI, "VALE3", true}, - sysInstFields{0, 8, 1, 0}: {sys_TLBI, "VMALLE1OS", false}, - sysInstFields{0, 8, 1, 1}: {sys_TLBI, "VAE1OS", true}, - sysInstFields{0, 8, 1, 2}: {sys_TLBI, "ASIDE1OS", true}, - sysInstFields{0, 8, 1, 3}: {sys_TLBI, "VAAE1OS", true}, - sysInstFields{0, 8, 1, 5}: {sys_TLBI, "VALE1OS", true}, - sysInstFields{0, 8, 1, 7}: {sys_TLBI, "VAALE1OS", true}, - sysInstFields{0, 8, 2, 1}: {sys_TLBI, "RVAE1IS", true}, - sysInstFields{0, 8, 2, 3}: {sys_TLBI, "RVAAE1IS", true}, - sysInstFields{0, 8, 2, 5}: {sys_TLBI, "RVALE1IS", true}, - sysInstFields{0, 8, 2, 7}: {sys_TLBI, "RVAALE1IS", true}, - sysInstFields{0, 8, 5, 1}: {sys_TLBI, "RVAE1OS", true}, - sysInstFields{0, 8, 5, 3}: {sys_TLBI, "RVAAE1OS", true}, - sysInstFields{0, 8, 5, 5}: {sys_TLBI, "RVALE1OS", true}, - sysInstFields{0, 8, 5, 7}: {sys_TLBI, "RVAALE1OS", true}, - sysInstFields{0, 8, 6, 1}: {sys_TLBI, "RVAE1", true}, - sysInstFields{0, 8, 6, 3}: {sys_TLBI, "RVAAE1", true}, - sysInstFields{0, 8, 6, 5}: {sys_TLBI, "RVALE1", true}, - sysInstFields{0, 8, 6, 7}: {sys_TLBI, "RVAALE1", true}, - sysInstFields{4, 8, 0, 2}: {sys_TLBI, "RIPAS2E1IS", true}, - sysInstFields{4, 8, 0, 6}: {sys_TLBI, "RIPAS2LE1IS", true}, - sysInstFields{4, 8, 1, 0}: {sys_TLBI, "ALLE2OS", false}, - sysInstFields{4, 8, 1, 1}: {sys_TLBI, "VAE2OS", true}, - sysInstFields{4, 8, 1, 4}: {sys_TLBI, "ALLE1OS", false}, - sysInstFields{4, 8, 1, 5}: {sys_TLBI, "VALE2OS", true}, - sysInstFields{4, 8, 1, 6}: {sys_TLBI, "VMALLS12E1OS", false}, - sysInstFields{4, 8, 2, 1}: {sys_TLBI, "RVAE2IS", true}, - sysInstFields{4, 8, 2, 5}: {sys_TLBI, "RVALE2IS", true}, - sysInstFields{4, 8, 4, 0}: {sys_TLBI, "IPAS2E1OS", true}, - sysInstFields{4, 8, 4, 2}: {sys_TLBI, "RIPAS2E1", true}, - sysInstFields{4, 8, 4, 3}: {sys_TLBI, "RIPAS2E1OS", true}, - sysInstFields{4, 8, 4, 4}: {sys_TLBI, "IPAS2LE1OS", true}, - sysInstFields{4, 8, 4, 6}: {sys_TLBI, "RIPAS2LE1", true}, - sysInstFields{4, 8, 4, 7}: {sys_TLBI, "RIPAS2LE1OS", true}, - sysInstFields{4, 8, 5, 1}: {sys_TLBI, "RVAE2OS", true}, - sysInstFields{4, 8, 5, 5}: {sys_TLBI, "RVALE2OS", true}, - sysInstFields{4, 8, 6, 1}: {sys_TLBI, "RVAE2", true}, - sysInstFields{4, 8, 6, 5}: {sys_TLBI, "RVALE2", true}, - sysInstFields{6, 8, 1, 0}: {sys_TLBI, "ALLE3OS", false}, - sysInstFields{6, 8, 1, 1}: {sys_TLBI, "VAE3OS", true}, - sysInstFields{6, 8, 1, 5}: {sys_TLBI, "VALE3OS", true}, - sysInstFields{6, 8, 2, 1}: {sys_TLBI, "RVAE3IS", true}, - sysInstFields{6, 8, 2, 5}: {sys_TLBI, "RVALE3IS", true}, - sysInstFields{6, 8, 5, 1}: {sys_TLBI, "RVAE3OS", true}, - sysInstFields{6, 8, 5, 5}: {sys_TLBI, "RVALE3OS", true}, - sysInstFields{6, 8, 6, 1}: {sys_TLBI, "RVAE3", true}, - sysInstFields{6, 8, 6, 5}: {sys_TLBI, "RVALE3", true}, - sysInstFields{0, 7, 6, 1}: {sys_DC, "IVAC", true}, - sysInstFields{0, 7, 6, 2}: {sys_DC, "ISW", true}, - sysInstFields{0, 7, 10, 2}: {sys_DC, "CSW", true}, - sysInstFields{0, 7, 14, 2}: {sys_DC, "CISW", true}, - sysInstFields{3, 7, 4, 1}: {sys_DC, "ZVA", true}, - sysInstFields{3, 7, 10, 1}: {sys_DC, "CVAC", true}, - sysInstFields{3, 7, 11, 1}: {sys_DC, "CVAU", true}, - sysInstFields{3, 7, 14, 1}: {sys_DC, "CIVAC", true}, - sysInstFields{0, 7, 6, 3}: {sys_DC, "IGVAC", true}, - sysInstFields{0, 7, 6, 4}: {sys_DC, "IGSW", true}, - sysInstFields{0, 7, 6, 5}: {sys_DC, "IGDVAC", true}, - sysInstFields{0, 7, 6, 6}: {sys_DC, "IGDSW", true}, - sysInstFields{0, 7, 10, 4}: {sys_DC, "CGSW", true}, - sysInstFields{0, 7, 10, 6}: {sys_DC, "CGDSW", true}, - sysInstFields{0, 7, 14, 4}: {sys_DC, "CIGSW", true}, - sysInstFields{0, 7, 14, 6}: {sys_DC, "CIGDSW", true}, - sysInstFields{3, 7, 4, 3}: {sys_DC, "GVA", true}, - sysInstFields{3, 7, 4, 4}: {sys_DC, "GZVA", true}, - sysInstFields{3, 7, 10, 3}: {sys_DC, "CGVAC", true}, - sysInstFields{3, 7, 10, 5}: {sys_DC, "CGDVAC", true}, - sysInstFields{3, 7, 12, 3}: {sys_DC, "CGVAP", true}, - sysInstFields{3, 7, 12, 5}: {sys_DC, "CGDVAP", true}, - sysInstFields{3, 7, 13, 3}: {sys_DC, "CGVADP", true}, - sysInstFields{3, 7, 13, 5}: {sys_DC, "CGDVADP", true}, - sysInstFields{3, 7, 14, 3}: {sys_DC, "CIGVAC", true}, - sysInstFields{3, 7, 14, 5}: {sys_DC, "CIGDVAC", true}, - sysInstFields{3, 7, 12, 1}: {sys_DC, "CVAP", true}, - sysInstFields{3, 7, 13, 1}: {sys_DC, "CVADP", true}, + {0, 8, 3, 0}: {sys_TLBI, "VMALLE1IS", false}, + {0, 8, 3, 1}: {sys_TLBI, "VAE1IS", true}, + {0, 8, 3, 2}: {sys_TLBI, "ASIDE1IS", true}, + {0, 8, 3, 3}: {sys_TLBI, "VAAE1IS", true}, + {0, 8, 3, 5}: {sys_TLBI, "VALE1IS", true}, + {0, 8, 3, 7}: {sys_TLBI, "VAALE1IS", true}, + {0, 8, 7, 0}: {sys_TLBI, "VMALLE1", false}, + {0, 8, 7, 1}: {sys_TLBI, "VAE1", true}, + {0, 8, 7, 2}: {sys_TLBI, "ASIDE1", true}, + {0, 8, 7, 3}: {sys_TLBI, "VAAE1", true}, + {0, 8, 7, 5}: {sys_TLBI, "VALE1", true}, + {0, 8, 7, 7}: {sys_TLBI, "VAALE1", true}, + {4, 8, 0, 1}: {sys_TLBI, "IPAS2E1IS", true}, + {4, 8, 0, 5}: {sys_TLBI, "IPAS2LE1IS", true}, + {4, 8, 3, 0}: {sys_TLBI, "ALLE2IS", false}, + {4, 8, 3, 1}: {sys_TLBI, "VAE2IS", true}, + {4, 8, 3, 4}: {sys_TLBI, "ALLE1IS", false}, + {4, 8, 3, 5}: {sys_TLBI, "VALE2IS", true}, + {4, 8, 3, 6}: {sys_TLBI, "VMALLS12E1IS", false}, + {4, 8, 4, 1}: {sys_TLBI, "IPAS2E1", true}, + {4, 8, 4, 5}: {sys_TLBI, "IPAS2LE1", true}, + {4, 8, 7, 0}: {sys_TLBI, "ALLE2", false}, + {4, 8, 7, 1}: {sys_TLBI, "VAE2", true}, + {4, 8, 7, 4}: {sys_TLBI, "ALLE1", false}, + {4, 8, 7, 5}: {sys_TLBI, "VALE2", true}, + {4, 8, 7, 6}: {sys_TLBI, "VMALLS12E1", false}, + {6, 8, 3, 0}: {sys_TLBI, "ALLE3IS", false}, + {6, 8, 3, 1}: {sys_TLBI, "VAE3IS", true}, + {6, 8, 3, 5}: {sys_TLBI, "VALE3IS", true}, + {6, 8, 7, 0}: {sys_TLBI, "ALLE3", false}, + {6, 8, 7, 1}: {sys_TLBI, "VAE3", true}, + {6, 8, 7, 5}: {sys_TLBI, "VALE3", true}, + {0, 8, 1, 0}: {sys_TLBI, "VMALLE1OS", false}, + {0, 8, 1, 1}: {sys_TLBI, "VAE1OS", true}, + {0, 8, 1, 2}: {sys_TLBI, "ASIDE1OS", true}, + {0, 8, 1, 3}: {sys_TLBI, "VAAE1OS", true}, + {0, 8, 1, 5}: {sys_TLBI, "VALE1OS", true}, + {0, 8, 1, 7}: {sys_TLBI, "VAALE1OS", true}, + {0, 8, 2, 1}: {sys_TLBI, "RVAE1IS", true}, + {0, 8, 2, 3}: {sys_TLBI, "RVAAE1IS", true}, + {0, 8, 2, 5}: {sys_TLBI, "RVALE1IS", true}, + {0, 8, 2, 7}: {sys_TLBI, "RVAALE1IS", true}, + {0, 8, 5, 1}: {sys_TLBI, "RVAE1OS", true}, + {0, 8, 5, 3}: {sys_TLBI, "RVAAE1OS", true}, + {0, 8, 5, 5}: {sys_TLBI, "RVALE1OS", true}, + {0, 8, 5, 7}: {sys_TLBI, "RVAALE1OS", true}, + {0, 8, 6, 1}: {sys_TLBI, "RVAE1", true}, + {0, 8, 6, 3}: {sys_TLBI, "RVAAE1", true}, + {0, 8, 6, 5}: {sys_TLBI, "RVALE1", true}, + {0, 8, 6, 7}: {sys_TLBI, "RVAALE1", true}, + {4, 8, 0, 2}: {sys_TLBI, "RIPAS2E1IS", true}, + {4, 8, 0, 6}: {sys_TLBI, "RIPAS2LE1IS", true}, + {4, 8, 1, 0}: {sys_TLBI, "ALLE2OS", false}, + {4, 8, 1, 1}: {sys_TLBI, "VAE2OS", true}, + {4, 8, 1, 4}: {sys_TLBI, "ALLE1OS", false}, + {4, 8, 1, 5}: {sys_TLBI, "VALE2OS", true}, + {4, 8, 1, 6}: {sys_TLBI, "VMALLS12E1OS", false}, + {4, 8, 2, 1}: {sys_TLBI, "RVAE2IS", true}, + {4, 8, 2, 5}: {sys_TLBI, "RVALE2IS", true}, + {4, 8, 4, 0}: {sys_TLBI, "IPAS2E1OS", true}, + {4, 8, 4, 2}: {sys_TLBI, "RIPAS2E1", true}, + {4, 8, 4, 3}: {sys_TLBI, "RIPAS2E1OS", true}, + {4, 8, 4, 4}: {sys_TLBI, "IPAS2LE1OS", true}, + {4, 8, 4, 6}: {sys_TLBI, "RIPAS2LE1", true}, + {4, 8, 4, 7}: {sys_TLBI, "RIPAS2LE1OS", true}, + {4, 8, 5, 1}: {sys_TLBI, "RVAE2OS", true}, + {4, 8, 5, 5}: {sys_TLBI, "RVALE2OS", true}, + {4, 8, 6, 1}: {sys_TLBI, "RVAE2", true}, + {4, 8, 6, 5}: {sys_TLBI, "RVALE2", true}, + {6, 8, 1, 0}: {sys_TLBI, "ALLE3OS", false}, + {6, 8, 1, 1}: {sys_TLBI, "VAE3OS", true}, + {6, 8, 1, 5}: {sys_TLBI, "VALE3OS", true}, + {6, 8, 2, 1}: {sys_TLBI, "RVAE3IS", true}, + {6, 8, 2, 5}: {sys_TLBI, "RVALE3IS", true}, + {6, 8, 5, 1}: {sys_TLBI, "RVAE3OS", true}, + {6, 8, 5, 5}: {sys_TLBI, "RVALE3OS", true}, + {6, 8, 6, 1}: {sys_TLBI, "RVAE3", true}, + {6, 8, 6, 5}: {sys_TLBI, "RVALE3", true}, + {0, 7, 6, 1}: {sys_DC, "IVAC", true}, + {0, 7, 6, 2}: {sys_DC, "ISW", true}, + {0, 7, 10, 2}: {sys_DC, "CSW", true}, + {0, 7, 14, 2}: {sys_DC, "CISW", true}, + {3, 7, 4, 1}: {sys_DC, "ZVA", true}, + {3, 7, 10, 1}: {sys_DC, "CVAC", true}, + {3, 7, 11, 1}: {sys_DC, "CVAU", true}, + {3, 7, 14, 1}: {sys_DC, "CIVAC", true}, + {0, 7, 6, 3}: {sys_DC, "IGVAC", true}, + {0, 7, 6, 4}: {sys_DC, "IGSW", true}, + {0, 7, 6, 5}: {sys_DC, "IGDVAC", true}, + {0, 7, 6, 6}: {sys_DC, "IGDSW", true}, + {0, 7, 10, 4}: {sys_DC, "CGSW", true}, + {0, 7, 10, 6}: {sys_DC, "CGDSW", true}, + {0, 7, 14, 4}: {sys_DC, "CIGSW", true}, + {0, 7, 14, 6}: {sys_DC, "CIGDSW", true}, + {3, 7, 4, 3}: {sys_DC, "GVA", true}, + {3, 7, 4, 4}: {sys_DC, "GZVA", true}, + {3, 7, 10, 3}: {sys_DC, "CGVAC", true}, + {3, 7, 10, 5}: {sys_DC, "CGDVAC", true}, + {3, 7, 12, 3}: {sys_DC, "CGVAP", true}, + {3, 7, 12, 5}: {sys_DC, "CGDVAP", true}, + {3, 7, 13, 3}: {sys_DC, "CGVADP", true}, + {3, 7, 13, 5}: {sys_DC, "CGDVADP", true}, + {3, 7, 14, 3}: {sys_DC, "CIGVAC", true}, + {3, 7, 14, 5}: {sys_DC, "CIGDVAC", true}, + {3, 7, 12, 1}: {sys_DC, "CVAP", true}, + {3, 7, 13, 1}: {sys_DC, "CVADP", true}, } diff --git a/vendor/golang.org/x/arch/arm64/arm64asm/plan9x.go b/vendor/golang.org/x/arch/arm64/arm64asm/plan9x.go index ea5139cb82..2cadeba508 100644 --- a/vendor/golang.org/x/arch/arm64/arm64asm/plan9x.go +++ b/vendor/golang.org/x/arch/arm64/arm64asm/plan9x.go @@ -52,31 +52,18 @@ func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text // Move addressing mode into opcode suffix. suffix := "" - switch inst.Op { - case LDR, LDRB, LDRH, LDRSB, LDRSH, LDRSW, STR, STRB, STRH, STUR, STURB, STURH, LD1, ST1: - switch mem := inst.Args[1].(type) { + for i := range inst.Args { + switch mem := inst.Args[i].(type) { case MemImmediate: switch mem.Mode { case AddrOffset: // no suffix case AddrPreIndex: - suffix = ".W" + suffix += ".W" case AddrPostIndex, AddrPostReg: - suffix = ".P" + suffix += ".P" } - } - case STP, LDP: - switch mem := inst.Args[2].(type) { - case MemImmediate: - switch mem.Mode { - case AddrOffset: - // no suffix - case AddrPreIndex: - suffix = ".W" - case AddrPostIndex: - suffix = ".P" - } } } diff --git a/vendor/golang.org/x/arch/ppc64/ppc64asm/decode.go b/vendor/golang.org/x/arch/ppc64/ppc64asm/decode.go index b8d857c6a6..6c25c5c327 100644 --- a/vendor/golang.org/x/arch/ppc64/ppc64asm/decode.go +++ b/vendor/golang.org/x/arch/ppc64/ppc64asm/decode.go @@ -8,6 +8,8 @@ import ( "encoding/binary" "fmt" "log" + "sort" + "sync" ) const debugDecode = false @@ -111,6 +113,47 @@ const ( TypeLast // must be the last one ) +type InstMaskMap struct { + mask uint64 + insn map[uint64]*instFormat +} + +// Note, plxv/pstxv have a 5 bit opcode in the second instruction word. Only match the most significant 5 of 6 bits of the second primary opcode. +const lookupOpcodeMask = uint64(0xFC000000F8000000) + +// Three level lookup for any instruction: +// 1. Primary opcode map to a list of secondary opcode maps. +// 2. A list of opcodes with distinct masks, sorted by largest to smallest mask. +// 3. A map to a specific opcodes with a given mask. +var getLookupMap = sync.OnceValue(func() map[uint64][]InstMaskMap { + lMap := make(map[uint64][]InstMaskMap) + for idx, _ := range instFormats { + i := &instFormats[idx] + pop := i.Value & lookupOpcodeMask + var me *InstMaskMap + masks := lMap[pop] + for im, m := range masks { + if m.mask == i.Mask { + me = &masks[im] + break + } + } + if me == nil { + me = &InstMaskMap{i.Mask, map[uint64]*instFormat{}} + masks = append(masks, *me) + } + me.insn[i.Value] = i + lMap[pop] = masks + } + // Reverse sort masks to ensure extended mnemonics match before more generic forms of an opcode (e.x nop over ori 0,0,0) + for _, v := range lMap { + sort.Slice(v, func(i, j int) bool { + return v[i].mask > v[j].mask + }) + } + return lMap +}) + func (t ArgType) String() string { switch t { default: @@ -191,10 +234,13 @@ func Decode(src []byte, ord binary.ByteOrder) (inst Inst, err error) { ui |= uint64(ui_extn[1]) inst.SuffixEnc = ui_extn[1] } - for i, iform := range instFormats { - if ui&iform.Mask != iform.Value { + + fmts := getLookupMap()[ui&lookupOpcodeMask] + for i, masks := range fmts { + if _, fnd := masks.insn[masks.mask&ui]; !fnd { continue } + iform := masks.insn[masks.mask&ui] if ui&iform.DontCare != 0 { if debugDecode { log.Printf("Decode(%#x): unused bit is 1 for Op %s", ui, iform.Op) diff --git a/vendor/golang.org/x/arch/riscv64/riscv64asm/arg.go b/vendor/golang.org/x/arch/riscv64/riscv64asm/arg.go index 7898c27366..2b96b416f6 100644 --- a/vendor/golang.org/x/arch/riscv64/riscv64asm/arg.go +++ b/vendor/golang.org/x/arch/riscv64/riscv64asm/arg.go @@ -22,13 +22,23 @@ package riscv64asm // // - arg_fs3: a floating point register rs3 encoded in rs3[31:27] field // +// - arg_vd: a vector register vd encoded in vd[11:7] field +// +// - arg_vm: indicates the presence of the mask register, encoded in vm[25] field +// +// - arg_vs1: a vector register vs1 encoded in vs1[19:15] field +// +// - arg_vs2: a vector register vs3 encoded in vs2[20:24] field +// +// - arg_vs3: a vector register vs3 encoded in vs3[11:7] field +// // - arg_csr: a control status register encoded in csr[31:20] field // // - arg_rs1_mem: source register with offset in load commands // // - arg_rs1_store: source register with offset in store commands // -// - arg_rs1_amo: source register with offset in atomic commands +// - arg_rs1_ptr: source register used as an address with no offset in atomic and vector commands // // - arg_pred: predecessor memory ordering information encoded in pred[27:24] field // For details, please refer to chapter 2.7 of ISA manual volume 1 @@ -46,6 +56,14 @@ package riscv64asm // // - arg_imm20: an U-type immediate encoded in imm20[31:12] field // +// - arg_simm5: a 5 bit signed immediate encoded in imm[19:15] field +// +// - arg_zimm5: a 5 bit unsigned immediate encoded in imm[19:15] field +// +// - arg_vtype_zimm10: a 10 bit unsigned immediate encoded in vtypei[29:20] field +// +// - arg_vtype_zimm11: an 11 bit unsigned immediate encoded in vtypei[30:20] field +// // - arg_jimm20: a J-type immediate encoded in jimm20[31:12] field // // - arg_shamt5: a shift amount encoded in shamt5[24:20] field @@ -65,9 +83,14 @@ const ( arg_fs1 arg_fs2 arg_fs3 + arg_vd + arg_vm + arg_vs1 + arg_vs2 + arg_vs3 arg_csr - arg_rs1_amo + arg_rs1_ptr arg_rs1_mem arg_rs1_store @@ -77,6 +100,10 @@ const ( arg_zimm arg_imm12 arg_simm12 + arg_simm5 + arg_zimm5 + arg_vtype_zimm10 + arg_vtype_zimm11 arg_bimm12 arg_imm20 arg_jimm20 diff --git a/vendor/golang.org/x/arch/riscv64/riscv64asm/decode.go b/vendor/golang.org/x/arch/riscv64/riscv64asm/decode.go index d78fef9e39..390edfa936 100644 --- a/vendor/golang.org/x/arch/riscv64/riscv64asm/decode.go +++ b/vendor/golang.org/x/arch/riscv64/riscv64asm/decode.go @@ -63,16 +63,23 @@ Search: // Decode args. var args Args - for j, aop := range f.args { + k := 0 + for _, aop := range f.args { if aop == 0 { break } arg := decodeArg(aop, x, i) - if arg == nil && f.op != C_NOP { - // Cannot decode argument. - continue Search + if arg == nil { + if aop == arg_vm { + continue + } + if f.op != C_NOP { + // Cannot decode argument. + continue Search + } } - args[j] = arg + args[k] = arg + k++ } if length == 2 { @@ -119,8 +126,27 @@ func decodeArg(aop argType, x uint32, index int) Arg { case arg_fs3: return F0 + Reg((x>>27)&((1<<5)-1)) - case arg_rs1_amo: - return AmoReg{X0 + Reg((x>>15)&((1<<5)-1))} + case arg_vd: + return V0 + Reg((x>>7)&((1<<5)-1)) + + case arg_vm: + if x&(1<<25) == 0 { + return V0 + } else { + return nil + } + + case arg_vs1: + return V0 + Reg((x>>15)&((1<<5)-1)) + + case arg_vs2: + return V0 + Reg((x>>20)&((1<<5)-1)) + + case arg_vs3: + return V0 + Reg((x>>7)&((1<<5)-1)) + + case arg_rs1_ptr: + return RegPtr{X0 + Reg((x>>15)&((1<<5)-1))} case arg_rs1_mem: imm := x >> 20 @@ -198,6 +224,26 @@ func decodeArg(aop argType, x uint32, index int) Arg { } return Simm{int32(imm), true, 13} + case arg_simm5: + imm := x << 12 >> 27 + // Sign-extend + if imm>>uint32(5-1) == 1 { + imm |= 0x7ffffff << 5 + } + return Simm{int32(imm), true, 5} + + case arg_zimm5: + imm := x << 12 >> 27 + return Uimm{imm, true} + + case arg_vtype_zimm10: + imm := x << 2 >> 22 + return VType(imm) + + case arg_vtype_zimm11: + imm := x << 1 >> 21 + return VType(imm) + case arg_rd_p, arg_rs2_p: return X8 + Reg((x>>2)&((1<<3)-1)) diff --git a/vendor/golang.org/x/arch/riscv64/riscv64asm/gnu.go b/vendor/golang.org/x/arch/riscv64/riscv64asm/gnu.go index d6b3dc040e..324b365fcd 100644 --- a/vendor/golang.org/x/arch/riscv64/riscv64asm/gnu.go +++ b/vendor/golang.org/x/arch/riscv64/riscv64asm/gnu.go @@ -12,17 +12,26 @@ import ( // This form typically matches the syntax defined in the RISC-V Instruction Set Manual. See // https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMAFDQC/riscv-spec-20191213.pdf func GNUSyntax(inst Inst) string { - op := strings.ToLower(inst.Op.String()) + hasVectorArg := false var args []string for _, a := range inst.Args { if a == nil { break } args = append(args, strings.ToLower(a.String())) + if r, ok := a.(Reg); ok { + hasVectorArg = hasVectorArg || (r >= V0 && r <= V31) + } } + if hasVectorArg { + return gnuVectorOp(inst, args) + } + + op := strings.ToLower(inst.Op.String()) +gnuSyntaxSwitch: switch inst.Op { - case ADDI, ADDIW, ANDI, ORI, SLLI, SLLIW, SRAI, SRAIW, SRLI, SRLIW, XORI: + case ADDI, ADDIW, ANDI, SLLI, SLLIW, SRAI, SRAIW, SRLI, SRLIW, XORI: if inst.Op == ADDI { if inst.Args[1].(Reg) == X0 && inst.Args[0].(Reg) != X0 { op = "li" @@ -42,6 +51,11 @@ func GNUSyntax(inst Inst) string { } } + if inst.Op == ANDI && inst.Args[2].(Simm).Imm == 255 { + op = "zext.b" + args = args[:len(args)-1] + } + if inst.Op == ADDIW && inst.Args[2].(Simm).Imm == 0 { op = "sext.w" args = args[:len(args)-1] @@ -52,6 +66,25 @@ func GNUSyntax(inst Inst) string { args = args[:len(args)-1] } + case ORI: + if inst.Args[0].(Reg) == X0 { + simm := inst.Args[2].(Simm) + switch simm.Imm & 0b11111 { + case 0: + op = "prefetch.i" + case 1: + op = "prefetch.r" + case 3: + op = "prefetch.w" + default: + break gnuSyntaxSwitch + } + // compared to ORI, the lowest 5 bits of simm.Imm in PREFETCH should be zeros + simm.Imm = simm.Imm &^ 0b11111 + args[0] = RegOffset{inst.Args[1].(Reg), simm}.String() + args = args[:len(args)-2] + } + case ADD: if inst.Args[1].(Reg) == X0 { op = "mv" @@ -208,11 +241,25 @@ func GNUSyntax(inst Inst) string { args = args[:len(args)-1] } - // When both pred and succ equals to iorw, the GNU objdump will omit them. case FENCE: - if inst.Args[0].(MemOrder).String() == "iorw" && - inst.Args[1].(MemOrder).String() == "iorw" { - args = nil + fm := inst.Enc >> 28 + pred := inst.Args[0].(MemOrder).String() + succ := inst.Args[1].(MemOrder).String() + if fm == 0b1000 { + if pred == "rw" && succ == "rw" { + return "fence.tso" + } + return op + } + // PAUSE is encoded as a FENCE instruction with pred=W, succ=0. + if pred == "w" && succ == "" { + return "pause" + } + if fm != 0 || pred == "" || succ == "" || (pred == "iorw" && succ == "iorw") { + // We've either got a full fence or a reserved encoding which should be + // treated as a full fence. When both pred and succ equals to iorw, GNU + // objdump will omit them. + return op } case FSGNJX_D: @@ -319,6 +366,12 @@ func GNUSyntax(inst Inst) string { args[1] = args[2] args = args[:len(args)-1] } + + case VSETVLI, VSETIVLI: + args[0], args[2] = args[2], strings.ReplaceAll(args[0], " ", "") + + case VSETVL: + args[0], args[2] = args[2], args[0] } if args != nil { @@ -326,3 +379,60 @@ func GNUSyntax(inst Inst) string { } return op } + +func gnuVectorOp(inst Inst, args []string) string { + // Instruction is either a vector load, store or an arithmetic + // operation. We can use the inst.Enc to figure out which. Whatever + // it is, it has at least one argument. + + rawArgs := inst.Args[:] + + var mask string + var op string + if inst.Enc&(1<<25) == 0 { + if implicitMask(inst.Op) { + mask = "v0" + } else { + mask = "v0.t" + args = args[1:] + rawArgs = rawArgs[1:] + } + } + + if len(args) > 1 { + if inst.Enc&0x7f == 0x7 || inst.Enc&0x7f == 0x27 { + // It's a load or a store + if len(args) >= 2 { + args[0], args[len(args)-1] = args[len(args)-1], args[0] + } + op = pseudoRVVLoad(inst.Op) + } else { + // It's an arithmetic instruction + + op, args = pseudoRVVArith(inst.Op, rawArgs, args) + + if len(args) == 3 { + if imaOrFma(inst.Op) { + args[0], args[2] = args[2], args[0] + } else { + args[0], args[1], args[2] = args[2], args[0], args[1] + } + } else if len(args) == 2 { + args[0], args[1] = args[1], args[0] + } + } + } + + // The mask is always the last argument + + if mask != "" { + args = append(args, mask) + } + + if op == "" { + op = inst.Op.String() + } + op = strings.ToLower(op) + + return op + " " + strings.Join(args, ",") +} diff --git a/vendor/golang.org/x/arch/riscv64/riscv64asm/inst.go b/vendor/golang.org/x/arch/riscv64/riscv64asm/inst.go index 3c13567cb0..6253413b8b 100644 --- a/vendor/golang.org/x/arch/riscv64/riscv64asm/inst.go +++ b/vendor/golang.org/x/arch/riscv64/riscv64asm/inst.go @@ -59,7 +59,7 @@ func (i Inst) String() string { type Reg uint16 const ( - // General-purpose register + // General-purpose registers X0 Reg = iota X1 X2 @@ -93,7 +93,7 @@ const ( X30 X31 - //Float point register + // Floating point registers F0 F1 F2 @@ -126,6 +126,40 @@ const ( F29 F30 F31 + + // Vector registers + V0 + V1 + V2 + V3 + V4 + V5 + V6 + V7 + V8 + V9 + V10 + V11 + V12 + V13 + V14 + V15 + V16 + V17 + V18 + V19 + V20 + V21 + V22 + V23 + V24 + V25 + V26 + V27 + V28 + V29 + V30 + V31 ) func (r Reg) String() string { @@ -136,6 +170,9 @@ func (r Reg) String() string { case r >= F0 && r <= F31: return fmt.Sprintf("f%d", r-F0) + case r >= V0 && r <= V31: + return fmt.Sprintf("v%d", r-V0) + default: return fmt.Sprintf("Unknown(%d)", r) } @@ -455,13 +492,13 @@ func (si Simm) String() string { return fmt.Sprintf("%#x", si.Imm) } -// An AmoReg is an atomic address register used in AMO instructions -type AmoReg struct { +// A RegPtr is an address register with no offset +type RegPtr struct { reg Reg // Avoid promoted String method } -func (amoReg AmoReg) String() string { - return fmt.Sprintf("(%s)", amoReg.reg) +func (regPtr RegPtr) String() string { + return fmt.Sprintf("(%s)", regPtr.reg) } // A RegOffset is a register with offset value @@ -479,17 +516,35 @@ type MemOrder uint8 func (memOrder MemOrder) String() string { var str string - if memOrder<<7>>7 == 1 { + if memOrder&0b1000 != 0 { str += "i" } - if memOrder>>1<<7>>7 == 1 { + if memOrder&0b0100 != 0 { str += "o" } - if memOrder>>2<<7>>7 == 1 { + if memOrder&0b0010 != 0 { str += "r" } - if memOrder>>3<<7>>7 == 1 { + if memOrder&0b0001 != 0 { str += "w" } return str } + +// A VType represents the vtype field of VSETIVLI and VSETVLI instructions +type VType uint32 + +var vlmulName = []string{"M1", "M2", "M4", "M8", "", "MF8", "MF4", "MF2"} +var vsewName = []string{"E8", "E16", "E32", "E64", "", "", "", ""} +var vtaName = []string{"TU", "TA"} +var vmaName = []string{"MU", "MA"} + +func (vtype VType) String() string { + + vlmul := vtype & 0x7 + vsew := (vtype >> 3) & 0x7 + vta := (vtype >> 6) & 0x1 + vma := (vtype >> 7) & 0x1 + + return fmt.Sprintf("%s, %s, %s, %s", vsewName[vsew], vlmulName[vlmul], vtaName[vta], vmaName[vma]) +} diff --git a/vendor/golang.org/x/arch/riscv64/riscv64asm/plan9x.go b/vendor/golang.org/x/arch/riscv64/riscv64asm/plan9x.go index 367122d940..59f2a5b92d 100644 --- a/vendor/golang.org/x/arch/riscv64/riscv64asm/plan9x.go +++ b/vendor/golang.org/x/arch/riscv64/riscv64asm/plan9x.go @@ -26,16 +26,25 @@ func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text symname = func(uint64) (string, uint64) { return "", 0 } } + hasVectorArg := false var args []string for _, a := range inst.Args { if a == nil { break } args = append(args, plan9Arg(&inst, pc, symname, a)) + if r, ok := a.(Reg); ok { + hasVectorArg = hasVectorArg || (r >= V0 && r <= V31) + } + } + + if hasVectorArg { + return plan9VectorOp(inst, args) } op := inst.Op.String() +goSyntaxSwitch: switch inst.Op { case AMOADD_D, AMOADD_D_AQ, AMOADD_D_RL, AMOADD_D_AQRL, AMOADD_W, AMOADD_W_AQ, @@ -66,6 +75,25 @@ func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text args = args[:len(args)-1] } + case ORI: + if inst.Args[0].(Reg) == X0 { + simm := inst.Args[2].(Simm) + switch simm.Imm & 0b11111 { + case 0: + op = "PREFETCHI" + case 1: + op = "PREFETCHR" + case 3: + op = "PREFETCHW" + default: + break goSyntaxSwitch + } + // compared to ORI, the lowest 5 bits of simm.Imm in PREFETCH should be zeros + simm.Imm = simm.Imm &^ 0b11111 + args[0] = plan9Arg(&inst, pc, symname, RegOffset{inst.Args[1].(Reg), simm}) + args = args[:len(args)-2] + } + case ANDI: if inst.Args[2].(Simm).Imm == 255 { op = "MOVBU" @@ -171,15 +199,48 @@ func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text } } - // Fence instruction in plan9 doesn't have any operands. case FENCE: - args = nil + fm := inst.Enc >> 28 + pred := inst.Args[0].(MemOrder).String() + succ := inst.Args[1].(MemOrder).String() + if fm == 0b1000 { + if pred == "rw" && succ == "rw" { + return "FENCE.TSO" + } + return op + } + // PAUSE is encoded as a FENCE instruction with pred=W, succ=0. + if pred == "w" && succ == "" { + return "PAUSE" + } + if fm != 0 || pred == "" || succ == "" || (pred == "iorw" && succ == "iorw") { + // We've either got a full fence or a reserved encoding which should be + // treated as a full fence. + return op + } + args[0], args[1] = args[1], args[0] case FMADD_D, FMADD_H, FMADD_Q, FMADD_S, FMSUB_D, FMSUB_H, FMSUB_Q, FMSUB_S, FNMADD_D, FNMADD_H, FNMADD_Q, FNMADD_S, FNMSUB_D, FNMSUB_H, FNMSUB_Q, FNMSUB_S: args[1], args[3] = args[3], args[1] + case FMV_W_X: + if inst.Args[1].(Reg) == X0 { + args[1] = "$(0.0)" + } + fallthrough + case FMV_X_W: + op = "MOVF" + + case FMV_D_X: + if inst.Args[1].(Reg) == X0 { + args[1] = "$(0.0)" + } + fallthrough + case FMV_X_D: + op = "MOVD" + case FSGNJ_S: if inst.Args[2] == inst.Args[1] { op = "MOVF" @@ -251,13 +312,13 @@ func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text case FLW, FSW: op = "MOVF" - if inst.Op == FLW { + if inst.Op == FSW { args[0], args[1] = args[1], args[0] } case FLD, FSD: op = "MOVD" - if inst.Op == FLD { + if inst.Op == FSD { args[0], args[1] = args[1], args[0] } @@ -317,6 +378,12 @@ func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text } else { args[0], args[1] = args[1], args[0] } + + case VSETVLI, VSETIVLI: + args[0], args[1], args[2] = args[2], args[0], args[1] + + case VSETVL: + args[0], args[2] = args[2], args[0] } // Reverse args, placing dest last. @@ -354,13 +421,6 @@ func plan9Arg(inst *Inst, pc uint64, symname func(uint64) (string, uint64), arg } return fmt.Sprintf("$%d", int32(imm)) - case Reg: - if a <= 31 { - return fmt.Sprintf("X%d", a) - } else { - return fmt.Sprintf("F%d", a-32) - } - case RegOffset: if a.Ofs.Imm == 0 { return fmt.Sprintf("(X%d)", a.OfsReg) @@ -368,10 +428,66 @@ func plan9Arg(inst *Inst, pc uint64, symname func(uint64) (string, uint64), arg return fmt.Sprintf("%s(X%d)", a.Ofs.String(), a.OfsReg) } - case AmoReg: + case RegPtr: return fmt.Sprintf("(X%d)", a.reg) default: return strings.ToUpper(arg.String()) } } + +func plan9VectorOp(inst Inst, args []string) string { + // Instruction is either a vector load, store or an arithmetic + // operation. We can use the inst.Enc to figure out which. Whatever + // it is, it has at least one argument. + + var op string + rawArgs := inst.Args[:] + + var mask string + if inst.Enc&(1<<25) == 0 { + mask = "V0" + if !implicitMask(inst.Op) { + args = args[1:] + rawArgs = rawArgs[1:] + } + } + + if len(args) > 1 { + if inst.Enc&0x7f == 0x7 { + // It's a load + if len(args) == 3 { + args[0], args[1] = args[1], args[0] + } + op = pseudoRVVLoad(inst.Op) + } else if inst.Enc&0x7f == 0x27 { + // It's a store + if len(args) == 3 { + args[0], args[1], args[2] = args[2], args[0], args[1] + } else if len(args) == 2 { + args[0], args[1] = args[1], args[0] + } + } else { + // It's an arithmetic instruction + + op, args = pseudoRVVArith(inst.Op, rawArgs, args) + + if len(args) == 3 && !imaOrFma(inst.Op) { + args[0], args[1] = args[1], args[0] + } + } + } + + // The mask is always the penultimate argument + + if mask != "" { + args = append(args[:len(args)-1], mask, args[len(args)-1]) + } + + if op == "" { + op = inst.Op.String() + } + + op = strings.Replace(op, ".", "", -1) + return op + " " + strings.Join(args, ", ") +} diff --git a/vendor/golang.org/x/arch/riscv64/riscv64asm/tables.go b/vendor/golang.org/x/arch/riscv64/riscv64asm/tables.go index 3e5db415e7..f96c307b1a 100644 --- a/vendor/golang.org/x/arch/riscv64/riscv64asm/tables.go +++ b/vendor/golang.org/x/arch/riscv64/riscv64asm/tables.go @@ -1,5 +1,4 @@ -// Code generated by riscv64spec riscv-opcodes -// DO NOT EDIT +// Code generated by 'go run ../riscv64spec riscv-opcodes'; DO NOT EDIT. // Copyright 2024 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style @@ -104,6 +103,13 @@ const ( BNE BSET BSETI + CBO_CLEAN + CBO_FLUSH + CBO_INVAL + CBO_ZERO + CLMUL + CLMULH + CLMULR CLZ CLZW CPOP @@ -116,6 +122,8 @@ const ( CSRRWI CTZ CTZW + CZERO_EQZ + CZERO_NEZ C_ADD C_ADDI C_ADDI16SP @@ -369,6 +377,654 @@ const ( SUB SUBW SW + VAADDU_VV + VAADDU_VX + VAADD_VV + VAADD_VX + VAESDF_VS + VAESDF_VV + VAESDM_VS + VAESDM_VV + VAESEF_VS + VAESEF_VV + VAESEM_VS + VAESEM_VV + VAESKF1_VI + VAESKF2_VI + VAESZ_VS + VGHSH_VV + VGMUL_VV + VSHA2CH_VV + VSHA2CL_VV + VSHA2MS_VV + VSM3C_VI + VSM3ME_VV + VSM4K_VI + VSM4R_VS + VSM4R_VV + VADC_VIM + VADC_VVM + VADC_VXM + VADD_VI + VADD_VV + VADD_VX + VAND_VI + VAND_VV + VAND_VX + VASUBU_VV + VASUBU_VX + VASUB_VV + VASUB_VX + VCOMPRESS_VM + VCPOP_M + VDIVU_VV + VDIVU_VX + VDIV_VV + VDIV_VX + VFADD_VF + VFADD_VV + VFCLASS_V + VFCVT_F_XU_V + VFCVT_F_X_V + VFCVT_RTZ_XU_F_V + VFCVT_RTZ_X_F_V + VFCVT_XU_F_V + VFCVT_X_F_V + VFDIV_VF + VFDIV_VV + VFIRST_M + VFMACC_VF + VFMACC_VV + VFMADD_VF + VFMADD_VV + VFMAX_VF + VFMAX_VV + VFMERGE_VFM + VFMIN_VF + VFMIN_VV + VFMSAC_VF + VFMSAC_VV + VFMSUB_VF + VFMSUB_VV + VFMUL_VF + VFMUL_VV + VFMV_F_S + VFMV_S_F + VFMV_V_F + VFNCVT_F_F_W + VFNCVT_F_XU_W + VFNCVT_F_X_W + VFNCVT_ROD_F_F_W + VFNCVT_RTZ_XU_F_W + VFNCVT_RTZ_X_F_W + VFNCVT_XU_F_W + VFNCVT_X_F_W + VFNMACC_VF + VFNMACC_VV + VFNMADD_VF + VFNMADD_VV + VFNMSAC_VF + VFNMSAC_VV + VFNMSUB_VF + VFNMSUB_VV + VFRDIV_VF + VFREC7_V + VFREDMAX_VS + VFREDMIN_VS + VFREDOSUM_VS + VFREDUSUM_VS + VFRSQRT7_V + VFRSUB_VF + VFSGNJN_VF + VFSGNJN_VV + VFSGNJX_VF + VFSGNJX_VV + VFSGNJ_VF + VFSGNJ_VV + VFSLIDE1DOWN_VF + VFSLIDE1UP_VF + VFSQRT_V + VFSUB_VF + VFSUB_VV + VFWADD_VF + VFWADD_VV + VFWADD_WF + VFWADD_WV + VFWCVT_F_F_V + VFWCVT_F_XU_V + VFWCVT_F_X_V + VFWCVT_RTZ_XU_F_V + VFWCVT_RTZ_X_F_V + VFWCVT_XU_F_V + VFWCVT_X_F_V + VFWMACC_VF + VFWMACC_VV + VFWMSAC_VF + VFWMSAC_VV + VFWMUL_VF + VFWMUL_VV + VFWNMACC_VF + VFWNMACC_VV + VFWNMSAC_VF + VFWNMSAC_VV + VFWREDOSUM_VS + VFWREDUSUM_VS + VFWSUB_VF + VFWSUB_VV + VFWSUB_WF + VFWSUB_WV + VID_V + VIOTA_M + VL1RE16_V + VL1RE32_V + VL1RE64_V + VL1RE8_V + VL2RE16_V + VL2RE32_V + VL2RE64_V + VL2RE8_V + VL4RE16_V + VL4RE32_V + VL4RE64_V + VL4RE8_V + VL8RE16_V + VL8RE32_V + VL8RE64_V + VL8RE8_V + VLE16FF_V + VLE16_V + VLE32FF_V + VLE32_V + VLE64FF_V + VLE64_V + VLE8FF_V + VLE8_V + VLM_V + VLOXEI16_V + VLOXEI32_V + VLOXEI64_V + VLOXEI8_V + VLOXSEG2EI16_V + VLOXSEG2EI32_V + VLOXSEG2EI64_V + VLOXSEG2EI8_V + VLOXSEG3EI16_V + VLOXSEG3EI32_V + VLOXSEG3EI64_V + VLOXSEG3EI8_V + VLOXSEG4EI16_V + VLOXSEG4EI32_V + VLOXSEG4EI64_V + VLOXSEG4EI8_V + VLOXSEG5EI16_V + VLOXSEG5EI32_V + VLOXSEG5EI64_V + VLOXSEG5EI8_V + VLOXSEG6EI16_V + VLOXSEG6EI32_V + VLOXSEG6EI64_V + VLOXSEG6EI8_V + VLOXSEG7EI16_V + VLOXSEG7EI32_V + VLOXSEG7EI64_V + VLOXSEG7EI8_V + VLOXSEG8EI16_V + VLOXSEG8EI32_V + VLOXSEG8EI64_V + VLOXSEG8EI8_V + VLSE16_V + VLSE32_V + VLSE64_V + VLSE8_V + VLSEG2E16FF_V + VLSEG2E16_V + VLSEG2E32FF_V + VLSEG2E32_V + VLSEG2E64FF_V + VLSEG2E64_V + VLSEG2E8FF_V + VLSEG2E8_V + VLSEG3E16FF_V + VLSEG3E16_V + VLSEG3E32FF_V + VLSEG3E32_V + VLSEG3E64FF_V + VLSEG3E64_V + VLSEG3E8FF_V + VLSEG3E8_V + VLSEG4E16FF_V + VLSEG4E16_V + VLSEG4E32FF_V + VLSEG4E32_V + VLSEG4E64FF_V + VLSEG4E64_V + VLSEG4E8FF_V + VLSEG4E8_V + VLSEG5E16FF_V + VLSEG5E16_V + VLSEG5E32FF_V + VLSEG5E32_V + VLSEG5E64FF_V + VLSEG5E64_V + VLSEG5E8FF_V + VLSEG5E8_V + VLSEG6E16FF_V + VLSEG6E16_V + VLSEG6E32FF_V + VLSEG6E32_V + VLSEG6E64FF_V + VLSEG6E64_V + VLSEG6E8FF_V + VLSEG6E8_V + VLSEG7E16FF_V + VLSEG7E16_V + VLSEG7E32FF_V + VLSEG7E32_V + VLSEG7E64FF_V + VLSEG7E64_V + VLSEG7E8FF_V + VLSEG7E8_V + VLSEG8E16FF_V + VLSEG8E16_V + VLSEG8E32FF_V + VLSEG8E32_V + VLSEG8E64FF_V + VLSEG8E64_V + VLSEG8E8FF_V + VLSEG8E8_V + VLSSEG2E16_V + VLSSEG2E32_V + VLSSEG2E64_V + VLSSEG2E8_V + VLSSEG3E16_V + VLSSEG3E32_V + VLSSEG3E64_V + VLSSEG3E8_V + VLSSEG4E16_V + VLSSEG4E32_V + VLSSEG4E64_V + VLSSEG4E8_V + VLSSEG5E16_V + VLSSEG5E32_V + VLSSEG5E64_V + VLSSEG5E8_V + VLSSEG6E16_V + VLSSEG6E32_V + VLSSEG6E64_V + VLSSEG6E8_V + VLSSEG7E16_V + VLSSEG7E32_V + VLSSEG7E64_V + VLSSEG7E8_V + VLSSEG8E16_V + VLSSEG8E32_V + VLSSEG8E64_V + VLSSEG8E8_V + VLUXEI16_V + VLUXEI32_V + VLUXEI64_V + VLUXEI8_V + VLUXSEG2EI16_V + VLUXSEG2EI32_V + VLUXSEG2EI64_V + VLUXSEG2EI8_V + VLUXSEG3EI16_V + VLUXSEG3EI32_V + VLUXSEG3EI64_V + VLUXSEG3EI8_V + VLUXSEG4EI16_V + VLUXSEG4EI32_V + VLUXSEG4EI64_V + VLUXSEG4EI8_V + VLUXSEG5EI16_V + VLUXSEG5EI32_V + VLUXSEG5EI64_V + VLUXSEG5EI8_V + VLUXSEG6EI16_V + VLUXSEG6EI32_V + VLUXSEG6EI64_V + VLUXSEG6EI8_V + VLUXSEG7EI16_V + VLUXSEG7EI32_V + VLUXSEG7EI64_V + VLUXSEG7EI8_V + VLUXSEG8EI16_V + VLUXSEG8EI32_V + VLUXSEG8EI64_V + VLUXSEG8EI8_V + VMACC_VV + VMACC_VX + VMADC_VI + VMADC_VIM + VMADC_VV + VMADC_VVM + VMADC_VX + VMADC_VXM + VMADD_VV + VMADD_VX + VMANDN_MM + VMAND_MM + VMAXU_VV + VMAXU_VX + VMAX_VV + VMAX_VX + VMERGE_VIM + VMERGE_VVM + VMERGE_VXM + VMFEQ_VF + VMFEQ_VV + VMFGE_VF + VMFGT_VF + VMFLE_VF + VMFLE_VV + VMFLT_VF + VMFLT_VV + VMFNE_VF + VMFNE_VV + VMINU_VV + VMINU_VX + VMIN_VV + VMIN_VX + VMNAND_MM + VMNOR_MM + VMORN_MM + VMOR_MM + VMSBC_VV + VMSBC_VVM + VMSBC_VX + VMSBC_VXM + VMSBF_M + VMSEQ_VI + VMSEQ_VV + VMSEQ_VX + VMSGTU_VI + VMSGTU_VX + VMSGT_VI + VMSGT_VX + VMSIF_M + VMSLEU_VI + VMSLEU_VV + VMSLEU_VX + VMSLE_VI + VMSLE_VV + VMSLE_VX + VMSLTU_VV + VMSLTU_VX + VMSLT_VV + VMSLT_VX + VMSNE_VI + VMSNE_VV + VMSNE_VX + VMSOF_M + VMULHSU_VV + VMULHSU_VX + VMULHU_VV + VMULHU_VX + VMULH_VV + VMULH_VX + VMUL_VV + VMUL_VX + VMV1R_V + VMV2R_V + VMV4R_V + VMV8R_V + VMV_S_X + VMV_V_I + VMV_V_V + VMV_V_X + VMV_X_S + VMXNOR_MM + VMXOR_MM + VNCLIPU_WI + VNCLIPU_WV + VNCLIPU_WX + VNCLIP_WI + VNCLIP_WV + VNCLIP_WX + VNMSAC_VV + VNMSAC_VX + VNMSUB_VV + VNMSUB_VX + VNSRA_WI + VNSRA_WV + VNSRA_WX + VNSRL_WI + VNSRL_WV + VNSRL_WX + VOR_VI + VOR_VV + VOR_VX + VREDAND_VS + VREDMAXU_VS + VREDMAX_VS + VREDMINU_VS + VREDMIN_VS + VREDOR_VS + VREDSUM_VS + VREDXOR_VS + VREMU_VV + VREMU_VX + VREM_VV + VREM_VX + VRGATHEREI16_VV + VRGATHER_VI + VRGATHER_VV + VRGATHER_VX + VRSUB_VI + VRSUB_VX + VS1R_V + VS2R_V + VS4R_V + VS8R_V + VSADDU_VI + VSADDU_VV + VSADDU_VX + VSADD_VI + VSADD_VV + VSADD_VX + VSBC_VVM + VSBC_VXM + VSE16_V + VSE32_V + VSE64_V + VSE8_V + VSETIVLI + VSETVL + VSETVLI + VSEXT_VF2 + VSEXT_VF4 + VSEXT_VF8 + VSLIDE1DOWN_VX + VSLIDE1UP_VX + VSLIDEDOWN_VI + VSLIDEDOWN_VX + VSLIDEUP_VI + VSLIDEUP_VX + VSLL_VI + VSLL_VV + VSLL_VX + VSMUL_VV + VSMUL_VX + VSM_V + VSOXEI16_V + VSOXEI32_V + VSOXEI64_V + VSOXEI8_V + VSOXSEG2EI16_V + VSOXSEG2EI32_V + VSOXSEG2EI64_V + VSOXSEG2EI8_V + VSOXSEG3EI16_V + VSOXSEG3EI32_V + VSOXSEG3EI64_V + VSOXSEG3EI8_V + VSOXSEG4EI16_V + VSOXSEG4EI32_V + VSOXSEG4EI64_V + VSOXSEG4EI8_V + VSOXSEG5EI16_V + VSOXSEG5EI32_V + VSOXSEG5EI64_V + VSOXSEG5EI8_V + VSOXSEG6EI16_V + VSOXSEG6EI32_V + VSOXSEG6EI64_V + VSOXSEG6EI8_V + VSOXSEG7EI16_V + VSOXSEG7EI32_V + VSOXSEG7EI64_V + VSOXSEG7EI8_V + VSOXSEG8EI16_V + VSOXSEG8EI32_V + VSOXSEG8EI64_V + VSOXSEG8EI8_V + VSRA_VI + VSRA_VV + VSRA_VX + VSRL_VI + VSRL_VV + VSRL_VX + VSSE16_V + VSSE32_V + VSSE64_V + VSSE8_V + VSSEG2E16_V + VSSEG2E32_V + VSSEG2E64_V + VSSEG2E8_V + VSSEG3E16_V + VSSEG3E32_V + VSSEG3E64_V + VSSEG3E8_V + VSSEG4E16_V + VSSEG4E32_V + VSSEG4E64_V + VSSEG4E8_V + VSSEG5E16_V + VSSEG5E32_V + VSSEG5E64_V + VSSEG5E8_V + VSSEG6E16_V + VSSEG6E32_V + VSSEG6E64_V + VSSEG6E8_V + VSSEG7E16_V + VSSEG7E32_V + VSSEG7E64_V + VSSEG7E8_V + VSSEG8E16_V + VSSEG8E32_V + VSSEG8E64_V + VSSEG8E8_V + VSSRA_VI + VSSRA_VV + VSSRA_VX + VSSRL_VI + VSSRL_VV + VSSRL_VX + VSSSEG2E16_V + VSSSEG2E32_V + VSSSEG2E64_V + VSSSEG2E8_V + VSSSEG3E16_V + VSSSEG3E32_V + VSSSEG3E64_V + VSSSEG3E8_V + VSSSEG4E16_V + VSSSEG4E32_V + VSSSEG4E64_V + VSSSEG4E8_V + VSSSEG5E16_V + VSSSEG5E32_V + VSSSEG5E64_V + VSSSEG5E8_V + VSSSEG6E16_V + VSSSEG6E32_V + VSSSEG6E64_V + VSSSEG6E8_V + VSSSEG7E16_V + VSSSEG7E32_V + VSSSEG7E64_V + VSSSEG7E8_V + VSSSEG8E16_V + VSSSEG8E32_V + VSSSEG8E64_V + VSSSEG8E8_V + VSSUBU_VV + VSSUBU_VX + VSSUB_VV + VSSUB_VX + VSUB_VV + VSUB_VX + VSUXEI16_V + VSUXEI32_V + VSUXEI64_V + VSUXEI8_V + VSUXSEG2EI16_V + VSUXSEG2EI32_V + VSUXSEG2EI64_V + VSUXSEG2EI8_V + VSUXSEG3EI16_V + VSUXSEG3EI32_V + VSUXSEG3EI64_V + VSUXSEG3EI8_V + VSUXSEG4EI16_V + VSUXSEG4EI32_V + VSUXSEG4EI64_V + VSUXSEG4EI8_V + VSUXSEG5EI16_V + VSUXSEG5EI32_V + VSUXSEG5EI64_V + VSUXSEG5EI8_V + VSUXSEG6EI16_V + VSUXSEG6EI32_V + VSUXSEG6EI64_V + VSUXSEG6EI8_V + VSUXSEG7EI16_V + VSUXSEG7EI32_V + VSUXSEG7EI64_V + VSUXSEG7EI8_V + VSUXSEG8EI16_V + VSUXSEG8EI32_V + VSUXSEG8EI64_V + VSUXSEG8EI8_V + VWADDU_VV + VWADDU_VX + VWADDU_WV + VWADDU_WX + VWADD_VV + VWADD_VX + VWADD_WV + VWADD_WX + VWMACCSU_VV + VWMACCSU_VX + VWMACCUS_VX + VWMACCU_VV + VWMACCU_VX + VWMACC_VV + VWMACC_VX + VWMULSU_VV + VWMULSU_VX + VWMULU_VV + VWMULU_VX + VWMUL_VV + VWMUL_VX + VWREDSUMU_VS + VWREDSUM_VS + VWSUBU_VV + VWSUBU_VX + VWSUBU_WV + VWSUBU_WX + VWSUB_VV + VWSUB_VX + VWSUB_WV + VWSUB_WX + VXOR_VI + VXOR_VV + VXOR_VX + VZEXT_VF2 + VZEXT_VF4 + VZEXT_VF8 XNOR XOR XORI @@ -376,370 +1032,1027 @@ const ( ) var opstr = [...]string{ - ADD: "ADD", - ADDI: "ADDI", - ADDIW: "ADDIW", - ADDW: "ADDW", - ADD_UW: "ADD.UW", - AMOADD_D: "AMOADD.D", - AMOADD_D_AQ: "AMOADD.D.AQ", - AMOADD_D_AQRL: "AMOADD.D.AQRL", - AMOADD_D_RL: "AMOADD.D.RL", - AMOADD_W: "AMOADD.W", - AMOADD_W_AQ: "AMOADD.W.AQ", - AMOADD_W_AQRL: "AMOADD.W.AQRL", - AMOADD_W_RL: "AMOADD.W.RL", - AMOAND_D: "AMOAND.D", - AMOAND_D_AQ: "AMOAND.D.AQ", - AMOAND_D_AQRL: "AMOAND.D.AQRL", - AMOAND_D_RL: "AMOAND.D.RL", - AMOAND_W: "AMOAND.W", - AMOAND_W_AQ: "AMOAND.W.AQ", - AMOAND_W_AQRL: "AMOAND.W.AQRL", - AMOAND_W_RL: "AMOAND.W.RL", - AMOMAXU_D: "AMOMAXU.D", - AMOMAXU_D_AQ: "AMOMAXU.D.AQ", - AMOMAXU_D_AQRL: "AMOMAXU.D.AQRL", - AMOMAXU_D_RL: "AMOMAXU.D.RL", - AMOMAXU_W: "AMOMAXU.W", - AMOMAXU_W_AQ: "AMOMAXU.W.AQ", - AMOMAXU_W_AQRL: "AMOMAXU.W.AQRL", - AMOMAXU_W_RL: "AMOMAXU.W.RL", - AMOMAX_D: "AMOMAX.D", - AMOMAX_D_AQ: "AMOMAX.D.AQ", - AMOMAX_D_AQRL: "AMOMAX.D.AQRL", - AMOMAX_D_RL: "AMOMAX.D.RL", - AMOMAX_W: "AMOMAX.W", - AMOMAX_W_AQ: "AMOMAX.W.AQ", - AMOMAX_W_AQRL: "AMOMAX.W.AQRL", - AMOMAX_W_RL: "AMOMAX.W.RL", - AMOMINU_D: "AMOMINU.D", - AMOMINU_D_AQ: "AMOMINU.D.AQ", - AMOMINU_D_AQRL: "AMOMINU.D.AQRL", - AMOMINU_D_RL: "AMOMINU.D.RL", - AMOMINU_W: "AMOMINU.W", - AMOMINU_W_AQ: "AMOMINU.W.AQ", - AMOMINU_W_AQRL: "AMOMINU.W.AQRL", - AMOMINU_W_RL: "AMOMINU.W.RL", - AMOMIN_D: "AMOMIN.D", - AMOMIN_D_AQ: "AMOMIN.D.AQ", - AMOMIN_D_AQRL: "AMOMIN.D.AQRL", - AMOMIN_D_RL: "AMOMIN.D.RL", - AMOMIN_W: "AMOMIN.W", - AMOMIN_W_AQ: "AMOMIN.W.AQ", - AMOMIN_W_AQRL: "AMOMIN.W.AQRL", - AMOMIN_W_RL: "AMOMIN.W.RL", - AMOOR_D: "AMOOR.D", - AMOOR_D_AQ: "AMOOR.D.AQ", - AMOOR_D_AQRL: "AMOOR.D.AQRL", - AMOOR_D_RL: "AMOOR.D.RL", - AMOOR_W: "AMOOR.W", - AMOOR_W_AQ: "AMOOR.W.AQ", - AMOOR_W_AQRL: "AMOOR.W.AQRL", - AMOOR_W_RL: "AMOOR.W.RL", - AMOSWAP_D: "AMOSWAP.D", - AMOSWAP_D_AQ: "AMOSWAP.D.AQ", - AMOSWAP_D_AQRL: "AMOSWAP.D.AQRL", - AMOSWAP_D_RL: "AMOSWAP.D.RL", - AMOSWAP_W: "AMOSWAP.W", - AMOSWAP_W_AQ: "AMOSWAP.W.AQ", - AMOSWAP_W_AQRL: "AMOSWAP.W.AQRL", - AMOSWAP_W_RL: "AMOSWAP.W.RL", - AMOXOR_D: "AMOXOR.D", - AMOXOR_D_AQ: "AMOXOR.D.AQ", - AMOXOR_D_AQRL: "AMOXOR.D.AQRL", - AMOXOR_D_RL: "AMOXOR.D.RL", - AMOXOR_W: "AMOXOR.W", - AMOXOR_W_AQ: "AMOXOR.W.AQ", - AMOXOR_W_AQRL: "AMOXOR.W.AQRL", - AMOXOR_W_RL: "AMOXOR.W.RL", - AND: "AND", - ANDI: "ANDI", - ANDN: "ANDN", - AUIPC: "AUIPC", - BCLR: "BCLR", - BCLRI: "BCLRI", - BEQ: "BEQ", - BEXT: "BEXT", - BEXTI: "BEXTI", - BGE: "BGE", - BGEU: "BGEU", - BINV: "BINV", - BINVI: "BINVI", - BLT: "BLT", - BLTU: "BLTU", - BNE: "BNE", - BSET: "BSET", - BSETI: "BSETI", - CLZ: "CLZ", - CLZW: "CLZW", - CPOP: "CPOP", - CPOPW: "CPOPW", - CSRRC: "CSRRC", - CSRRCI: "CSRRCI", - CSRRS: "CSRRS", - CSRRSI: "CSRRSI", - CSRRW: "CSRRW", - CSRRWI: "CSRRWI", - CTZ: "CTZ", - CTZW: "CTZW", - C_ADD: "C.ADD", - C_ADDI: "C.ADDI", - C_ADDI16SP: "C.ADDI16SP", - C_ADDI4SPN: "C.ADDI4SPN", - C_ADDIW: "C.ADDIW", - C_ADDW: "C.ADDW", - C_AND: "C.AND", - C_ANDI: "C.ANDI", - C_BEQZ: "C.BEQZ", - C_BNEZ: "C.BNEZ", - C_EBREAK: "C.EBREAK", - C_FLD: "C.FLD", - C_FLDSP: "C.FLDSP", - C_FSD: "C.FSD", - C_FSDSP: "C.FSDSP", - C_J: "C.J", - C_JALR: "C.JALR", - C_JR: "C.JR", - C_LD: "C.LD", - C_LDSP: "C.LDSP", - C_LI: "C.LI", - C_LUI: "C.LUI", - C_LW: "C.LW", - C_LWSP: "C.LWSP", - C_MV: "C.MV", - C_NOP: "C.NOP", - C_OR: "C.OR", - C_SD: "C.SD", - C_SDSP: "C.SDSP", - C_SLLI: "C.SLLI", - C_SRAI: "C.SRAI", - C_SRLI: "C.SRLI", - C_SUB: "C.SUB", - C_SUBW: "C.SUBW", - C_SW: "C.SW", - C_SWSP: "C.SWSP", - C_UNIMP: "C.UNIMP", - C_XOR: "C.XOR", - DIV: "DIV", - DIVU: "DIVU", - DIVUW: "DIVUW", - DIVW: "DIVW", - EBREAK: "EBREAK", - ECALL: "ECALL", - FADD_D: "FADD.D", - FADD_H: "FADD.H", - FADD_Q: "FADD.Q", - FADD_S: "FADD.S", - FCLASS_D: "FCLASS.D", - FCLASS_H: "FCLASS.H", - FCLASS_Q: "FCLASS.Q", - FCLASS_S: "FCLASS.S", - FCVT_D_L: "FCVT.D.L", - FCVT_D_LU: "FCVT.D.LU", - FCVT_D_Q: "FCVT.D.Q", - FCVT_D_S: "FCVT.D.S", - FCVT_D_W: "FCVT.D.W", - FCVT_D_WU: "FCVT.D.WU", - FCVT_H_L: "FCVT.H.L", - FCVT_H_LU: "FCVT.H.LU", - FCVT_H_S: "FCVT.H.S", - FCVT_H_W: "FCVT.H.W", - FCVT_H_WU: "FCVT.H.WU", - FCVT_LU_D: "FCVT.LU.D", - FCVT_LU_H: "FCVT.LU.H", - FCVT_LU_Q: "FCVT.LU.Q", - FCVT_LU_S: "FCVT.LU.S", - FCVT_L_D: "FCVT.L.D", - FCVT_L_H: "FCVT.L.H", - FCVT_L_Q: "FCVT.L.Q", - FCVT_L_S: "FCVT.L.S", - FCVT_Q_D: "FCVT.Q.D", - FCVT_Q_L: "FCVT.Q.L", - FCVT_Q_LU: "FCVT.Q.LU", - FCVT_Q_S: "FCVT.Q.S", - FCVT_Q_W: "FCVT.Q.W", - FCVT_Q_WU: "FCVT.Q.WU", - FCVT_S_D: "FCVT.S.D", - FCVT_S_H: "FCVT.S.H", - FCVT_S_L: "FCVT.S.L", - FCVT_S_LU: "FCVT.S.LU", - FCVT_S_Q: "FCVT.S.Q", - FCVT_S_W: "FCVT.S.W", - FCVT_S_WU: "FCVT.S.WU", - FCVT_WU_D: "FCVT.WU.D", - FCVT_WU_H: "FCVT.WU.H", - FCVT_WU_Q: "FCVT.WU.Q", - FCVT_WU_S: "FCVT.WU.S", - FCVT_W_D: "FCVT.W.D", - FCVT_W_H: "FCVT.W.H", - FCVT_W_Q: "FCVT.W.Q", - FCVT_W_S: "FCVT.W.S", - FDIV_D: "FDIV.D", - FDIV_H: "FDIV.H", - FDIV_Q: "FDIV.Q", - FDIV_S: "FDIV.S", - FENCE: "FENCE", - FENCE_I: "FENCE.I", - FEQ_D: "FEQ.D", - FEQ_H: "FEQ.H", - FEQ_Q: "FEQ.Q", - FEQ_S: "FEQ.S", - FLD: "FLD", - FLE_D: "FLE.D", - FLE_H: "FLE.H", - FLE_Q: "FLE.Q", - FLE_S: "FLE.S", - FLH: "FLH", - FLQ: "FLQ", - FLT_D: "FLT.D", - FLT_H: "FLT.H", - FLT_Q: "FLT.Q", - FLT_S: "FLT.S", - FLW: "FLW", - FMADD_D: "FMADD.D", - FMADD_H: "FMADD.H", - FMADD_Q: "FMADD.Q", - FMADD_S: "FMADD.S", - FMAX_D: "FMAX.D", - FMAX_H: "FMAX.H", - FMAX_Q: "FMAX.Q", - FMAX_S: "FMAX.S", - FMIN_D: "FMIN.D", - FMIN_H: "FMIN.H", - FMIN_Q: "FMIN.Q", - FMIN_S: "FMIN.S", - FMSUB_D: "FMSUB.D", - FMSUB_H: "FMSUB.H", - FMSUB_Q: "FMSUB.Q", - FMSUB_S: "FMSUB.S", - FMUL_D: "FMUL.D", - FMUL_H: "FMUL.H", - FMUL_Q: "FMUL.Q", - FMUL_S: "FMUL.S", - FMV_D_X: "FMV.D.X", - FMV_H_X: "FMV.H.X", - FMV_W_X: "FMV.W.X", - FMV_X_D: "FMV.X.D", - FMV_X_H: "FMV.X.H", - FMV_X_W: "FMV.X.W", - FNMADD_D: "FNMADD.D", - FNMADD_H: "FNMADD.H", - FNMADD_Q: "FNMADD.Q", - FNMADD_S: "FNMADD.S", - FNMSUB_D: "FNMSUB.D", - FNMSUB_H: "FNMSUB.H", - FNMSUB_Q: "FNMSUB.Q", - FNMSUB_S: "FNMSUB.S", - FSD: "FSD", - FSGNJN_D: "FSGNJN.D", - FSGNJN_H: "FSGNJN.H", - FSGNJN_Q: "FSGNJN.Q", - FSGNJN_S: "FSGNJN.S", - FSGNJX_D: "FSGNJX.D", - FSGNJX_H: "FSGNJX.H", - FSGNJX_Q: "FSGNJX.Q", - FSGNJX_S: "FSGNJX.S", - FSGNJ_D: "FSGNJ.D", - FSGNJ_H: "FSGNJ.H", - FSGNJ_Q: "FSGNJ.Q", - FSGNJ_S: "FSGNJ.S", - FSH: "FSH", - FSQ: "FSQ", - FSQRT_D: "FSQRT.D", - FSQRT_H: "FSQRT.H", - FSQRT_Q: "FSQRT.Q", - FSQRT_S: "FSQRT.S", - FSUB_D: "FSUB.D", - FSUB_H: "FSUB.H", - FSUB_Q: "FSUB.Q", - FSUB_S: "FSUB.S", - FSW: "FSW", - JAL: "JAL", - JALR: "JALR", - LB: "LB", - LBU: "LBU", - LD: "LD", - LH: "LH", - LHU: "LHU", - LR_D: "LR.D", - LR_D_AQ: "LR.D.AQ", - LR_D_AQRL: "LR.D.AQRL", - LR_D_RL: "LR.D.RL", - LR_W: "LR.W", - LR_W_AQ: "LR.W.AQ", - LR_W_AQRL: "LR.W.AQRL", - LR_W_RL: "LR.W.RL", - LUI: "LUI", - LW: "LW", - LWU: "LWU", - MAX: "MAX", - MAXU: "MAXU", - MIN: "MIN", - MINU: "MINU", - MUL: "MUL", - MULH: "MULH", - MULHSU: "MULHSU", - MULHU: "MULHU", - MULW: "MULW", - OR: "OR", - ORC_B: "ORC.B", - ORI: "ORI", - ORN: "ORN", - REM: "REM", - REMU: "REMU", - REMUW: "REMUW", - REMW: "REMW", - REV8: "REV8", - ROL: "ROL", - ROLW: "ROLW", - ROR: "ROR", - RORI: "RORI", - RORIW: "RORIW", - RORW: "RORW", - SB: "SB", - SC_D: "SC.D", - SC_D_AQ: "SC.D.AQ", - SC_D_AQRL: "SC.D.AQRL", - SC_D_RL: "SC.D.RL", - SC_W: "SC.W", - SC_W_AQ: "SC.W.AQ", - SC_W_AQRL: "SC.W.AQRL", - SC_W_RL: "SC.W.RL", - SD: "SD", - SEXT_B: "SEXT.B", - SEXT_H: "SEXT.H", - SH: "SH", - SH1ADD: "SH1ADD", - SH1ADD_UW: "SH1ADD.UW", - SH2ADD: "SH2ADD", - SH2ADD_UW: "SH2ADD.UW", - SH3ADD: "SH3ADD", - SH3ADD_UW: "SH3ADD.UW", - SLL: "SLL", - SLLI: "SLLI", - SLLIW: "SLLIW", - SLLI_UW: "SLLI.UW", - SLLW: "SLLW", - SLT: "SLT", - SLTI: "SLTI", - SLTIU: "SLTIU", - SLTU: "SLTU", - SRA: "SRA", - SRAI: "SRAI", - SRAIW: "SRAIW", - SRAW: "SRAW", - SRL: "SRL", - SRLI: "SRLI", - SRLIW: "SRLIW", - SRLW: "SRLW", - SUB: "SUB", - SUBW: "SUBW", - SW: "SW", - XNOR: "XNOR", - XOR: "XOR", - XORI: "XORI", - ZEXT_H: "ZEXT.H", + ADD: "ADD", + ADDI: "ADDI", + ADDIW: "ADDIW", + ADDW: "ADDW", + ADD_UW: "ADD.UW", + AMOADD_D: "AMOADD.D", + AMOADD_D_AQ: "AMOADD.D.AQ", + AMOADD_D_AQRL: "AMOADD.D.AQRL", + AMOADD_D_RL: "AMOADD.D.RL", + AMOADD_W: "AMOADD.W", + AMOADD_W_AQ: "AMOADD.W.AQ", + AMOADD_W_AQRL: "AMOADD.W.AQRL", + AMOADD_W_RL: "AMOADD.W.RL", + AMOAND_D: "AMOAND.D", + AMOAND_D_AQ: "AMOAND.D.AQ", + AMOAND_D_AQRL: "AMOAND.D.AQRL", + AMOAND_D_RL: "AMOAND.D.RL", + AMOAND_W: "AMOAND.W", + AMOAND_W_AQ: "AMOAND.W.AQ", + AMOAND_W_AQRL: "AMOAND.W.AQRL", + AMOAND_W_RL: "AMOAND.W.RL", + AMOMAXU_D: "AMOMAXU.D", + AMOMAXU_D_AQ: "AMOMAXU.D.AQ", + AMOMAXU_D_AQRL: "AMOMAXU.D.AQRL", + AMOMAXU_D_RL: "AMOMAXU.D.RL", + AMOMAXU_W: "AMOMAXU.W", + AMOMAXU_W_AQ: "AMOMAXU.W.AQ", + AMOMAXU_W_AQRL: "AMOMAXU.W.AQRL", + AMOMAXU_W_RL: "AMOMAXU.W.RL", + AMOMAX_D: "AMOMAX.D", + AMOMAX_D_AQ: "AMOMAX.D.AQ", + AMOMAX_D_AQRL: "AMOMAX.D.AQRL", + AMOMAX_D_RL: "AMOMAX.D.RL", + AMOMAX_W: "AMOMAX.W", + AMOMAX_W_AQ: "AMOMAX.W.AQ", + AMOMAX_W_AQRL: "AMOMAX.W.AQRL", + AMOMAX_W_RL: "AMOMAX.W.RL", + AMOMINU_D: "AMOMINU.D", + AMOMINU_D_AQ: "AMOMINU.D.AQ", + AMOMINU_D_AQRL: "AMOMINU.D.AQRL", + AMOMINU_D_RL: "AMOMINU.D.RL", + AMOMINU_W: "AMOMINU.W", + AMOMINU_W_AQ: "AMOMINU.W.AQ", + AMOMINU_W_AQRL: "AMOMINU.W.AQRL", + AMOMINU_W_RL: "AMOMINU.W.RL", + AMOMIN_D: "AMOMIN.D", + AMOMIN_D_AQ: "AMOMIN.D.AQ", + AMOMIN_D_AQRL: "AMOMIN.D.AQRL", + AMOMIN_D_RL: "AMOMIN.D.RL", + AMOMIN_W: "AMOMIN.W", + AMOMIN_W_AQ: "AMOMIN.W.AQ", + AMOMIN_W_AQRL: "AMOMIN.W.AQRL", + AMOMIN_W_RL: "AMOMIN.W.RL", + AMOOR_D: "AMOOR.D", + AMOOR_D_AQ: "AMOOR.D.AQ", + AMOOR_D_AQRL: "AMOOR.D.AQRL", + AMOOR_D_RL: "AMOOR.D.RL", + AMOOR_W: "AMOOR.W", + AMOOR_W_AQ: "AMOOR.W.AQ", + AMOOR_W_AQRL: "AMOOR.W.AQRL", + AMOOR_W_RL: "AMOOR.W.RL", + AMOSWAP_D: "AMOSWAP.D", + AMOSWAP_D_AQ: "AMOSWAP.D.AQ", + AMOSWAP_D_AQRL: "AMOSWAP.D.AQRL", + AMOSWAP_D_RL: "AMOSWAP.D.RL", + AMOSWAP_W: "AMOSWAP.W", + AMOSWAP_W_AQ: "AMOSWAP.W.AQ", + AMOSWAP_W_AQRL: "AMOSWAP.W.AQRL", + AMOSWAP_W_RL: "AMOSWAP.W.RL", + AMOXOR_D: "AMOXOR.D", + AMOXOR_D_AQ: "AMOXOR.D.AQ", + AMOXOR_D_AQRL: "AMOXOR.D.AQRL", + AMOXOR_D_RL: "AMOXOR.D.RL", + AMOXOR_W: "AMOXOR.W", + AMOXOR_W_AQ: "AMOXOR.W.AQ", + AMOXOR_W_AQRL: "AMOXOR.W.AQRL", + AMOXOR_W_RL: "AMOXOR.W.RL", + AND: "AND", + ANDI: "ANDI", + ANDN: "ANDN", + AUIPC: "AUIPC", + BCLR: "BCLR", + BCLRI: "BCLRI", + BEQ: "BEQ", + BEXT: "BEXT", + BEXTI: "BEXTI", + BGE: "BGE", + BGEU: "BGEU", + BINV: "BINV", + BINVI: "BINVI", + BLT: "BLT", + BLTU: "BLTU", + BNE: "BNE", + BSET: "BSET", + BSETI: "BSETI", + CBO_CLEAN: "CBO.CLEAN", + CBO_FLUSH: "CBO.FLUSH", + CBO_INVAL: "CBO.INVAL", + CBO_ZERO: "CBO.ZERO", + CLMUL: "CLMUL", + CLMULH: "CLMULH", + CLMULR: "CLMULR", + CLZ: "CLZ", + CLZW: "CLZW", + CPOP: "CPOP", + CPOPW: "CPOPW", + CSRRC: "CSRRC", + CSRRCI: "CSRRCI", + CSRRS: "CSRRS", + CSRRSI: "CSRRSI", + CSRRW: "CSRRW", + CSRRWI: "CSRRWI", + CTZ: "CTZ", + CTZW: "CTZW", + CZERO_EQZ: "CZERO.EQZ", + CZERO_NEZ: "CZERO.NEZ", + C_ADD: "C.ADD", + C_ADDI: "C.ADDI", + C_ADDI16SP: "C.ADDI16SP", + C_ADDI4SPN: "C.ADDI4SPN", + C_ADDIW: "C.ADDIW", + C_ADDW: "C.ADDW", + C_AND: "C.AND", + C_ANDI: "C.ANDI", + C_BEQZ: "C.BEQZ", + C_BNEZ: "C.BNEZ", + C_EBREAK: "C.EBREAK", + C_FLD: "C.FLD", + C_FLDSP: "C.FLDSP", + C_FSD: "C.FSD", + C_FSDSP: "C.FSDSP", + C_J: "C.J", + C_JALR: "C.JALR", + C_JR: "C.JR", + C_LD: "C.LD", + C_LDSP: "C.LDSP", + C_LI: "C.LI", + C_LUI: "C.LUI", + C_LW: "C.LW", + C_LWSP: "C.LWSP", + C_MV: "C.MV", + C_NOP: "C.NOP", + C_OR: "C.OR", + C_SD: "C.SD", + C_SDSP: "C.SDSP", + C_SLLI: "C.SLLI", + C_SRAI: "C.SRAI", + C_SRLI: "C.SRLI", + C_SUB: "C.SUB", + C_SUBW: "C.SUBW", + C_SW: "C.SW", + C_SWSP: "C.SWSP", + C_UNIMP: "C.UNIMP", + C_XOR: "C.XOR", + DIV: "DIV", + DIVU: "DIVU", + DIVUW: "DIVUW", + DIVW: "DIVW", + EBREAK: "EBREAK", + ECALL: "ECALL", + FADD_D: "FADD.D", + FADD_H: "FADD.H", + FADD_Q: "FADD.Q", + FADD_S: "FADD.S", + FCLASS_D: "FCLASS.D", + FCLASS_H: "FCLASS.H", + FCLASS_Q: "FCLASS.Q", + FCLASS_S: "FCLASS.S", + FCVT_D_L: "FCVT.D.L", + FCVT_D_LU: "FCVT.D.LU", + FCVT_D_Q: "FCVT.D.Q", + FCVT_D_S: "FCVT.D.S", + FCVT_D_W: "FCVT.D.W", + FCVT_D_WU: "FCVT.D.WU", + FCVT_H_L: "FCVT.H.L", + FCVT_H_LU: "FCVT.H.LU", + FCVT_H_S: "FCVT.H.S", + FCVT_H_W: "FCVT.H.W", + FCVT_H_WU: "FCVT.H.WU", + FCVT_LU_D: "FCVT.LU.D", + FCVT_LU_H: "FCVT.LU.H", + FCVT_LU_Q: "FCVT.LU.Q", + FCVT_LU_S: "FCVT.LU.S", + FCVT_L_D: "FCVT.L.D", + FCVT_L_H: "FCVT.L.H", + FCVT_L_Q: "FCVT.L.Q", + FCVT_L_S: "FCVT.L.S", + FCVT_Q_D: "FCVT.Q.D", + FCVT_Q_L: "FCVT.Q.L", + FCVT_Q_LU: "FCVT.Q.LU", + FCVT_Q_S: "FCVT.Q.S", + FCVT_Q_W: "FCVT.Q.W", + FCVT_Q_WU: "FCVT.Q.WU", + FCVT_S_D: "FCVT.S.D", + FCVT_S_H: "FCVT.S.H", + FCVT_S_L: "FCVT.S.L", + FCVT_S_LU: "FCVT.S.LU", + FCVT_S_Q: "FCVT.S.Q", + FCVT_S_W: "FCVT.S.W", + FCVT_S_WU: "FCVT.S.WU", + FCVT_WU_D: "FCVT.WU.D", + FCVT_WU_H: "FCVT.WU.H", + FCVT_WU_Q: "FCVT.WU.Q", + FCVT_WU_S: "FCVT.WU.S", + FCVT_W_D: "FCVT.W.D", + FCVT_W_H: "FCVT.W.H", + FCVT_W_Q: "FCVT.W.Q", + FCVT_W_S: "FCVT.W.S", + FDIV_D: "FDIV.D", + FDIV_H: "FDIV.H", + FDIV_Q: "FDIV.Q", + FDIV_S: "FDIV.S", + FENCE: "FENCE", + FENCE_I: "FENCE.I", + FEQ_D: "FEQ.D", + FEQ_H: "FEQ.H", + FEQ_Q: "FEQ.Q", + FEQ_S: "FEQ.S", + FLD: "FLD", + FLE_D: "FLE.D", + FLE_H: "FLE.H", + FLE_Q: "FLE.Q", + FLE_S: "FLE.S", + FLH: "FLH", + FLQ: "FLQ", + FLT_D: "FLT.D", + FLT_H: "FLT.H", + FLT_Q: "FLT.Q", + FLT_S: "FLT.S", + FLW: "FLW", + FMADD_D: "FMADD.D", + FMADD_H: "FMADD.H", + FMADD_Q: "FMADD.Q", + FMADD_S: "FMADD.S", + FMAX_D: "FMAX.D", + FMAX_H: "FMAX.H", + FMAX_Q: "FMAX.Q", + FMAX_S: "FMAX.S", + FMIN_D: "FMIN.D", + FMIN_H: "FMIN.H", + FMIN_Q: "FMIN.Q", + FMIN_S: "FMIN.S", + FMSUB_D: "FMSUB.D", + FMSUB_H: "FMSUB.H", + FMSUB_Q: "FMSUB.Q", + FMSUB_S: "FMSUB.S", + FMUL_D: "FMUL.D", + FMUL_H: "FMUL.H", + FMUL_Q: "FMUL.Q", + FMUL_S: "FMUL.S", + FMV_D_X: "FMV.D.X", + FMV_H_X: "FMV.H.X", + FMV_W_X: "FMV.W.X", + FMV_X_D: "FMV.X.D", + FMV_X_H: "FMV.X.H", + FMV_X_W: "FMV.X.W", + FNMADD_D: "FNMADD.D", + FNMADD_H: "FNMADD.H", + FNMADD_Q: "FNMADD.Q", + FNMADD_S: "FNMADD.S", + FNMSUB_D: "FNMSUB.D", + FNMSUB_H: "FNMSUB.H", + FNMSUB_Q: "FNMSUB.Q", + FNMSUB_S: "FNMSUB.S", + FSD: "FSD", + FSGNJN_D: "FSGNJN.D", + FSGNJN_H: "FSGNJN.H", + FSGNJN_Q: "FSGNJN.Q", + FSGNJN_S: "FSGNJN.S", + FSGNJX_D: "FSGNJX.D", + FSGNJX_H: "FSGNJX.H", + FSGNJX_Q: "FSGNJX.Q", + FSGNJX_S: "FSGNJX.S", + FSGNJ_D: "FSGNJ.D", + FSGNJ_H: "FSGNJ.H", + FSGNJ_Q: "FSGNJ.Q", + FSGNJ_S: "FSGNJ.S", + FSH: "FSH", + FSQ: "FSQ", + FSQRT_D: "FSQRT.D", + FSQRT_H: "FSQRT.H", + FSQRT_Q: "FSQRT.Q", + FSQRT_S: "FSQRT.S", + FSUB_D: "FSUB.D", + FSUB_H: "FSUB.H", + FSUB_Q: "FSUB.Q", + FSUB_S: "FSUB.S", + FSW: "FSW", + JAL: "JAL", + JALR: "JALR", + LB: "LB", + LBU: "LBU", + LD: "LD", + LH: "LH", + LHU: "LHU", + LR_D: "LR.D", + LR_D_AQ: "LR.D.AQ", + LR_D_AQRL: "LR.D.AQRL", + LR_D_RL: "LR.D.RL", + LR_W: "LR.W", + LR_W_AQ: "LR.W.AQ", + LR_W_AQRL: "LR.W.AQRL", + LR_W_RL: "LR.W.RL", + LUI: "LUI", + LW: "LW", + LWU: "LWU", + MAX: "MAX", + MAXU: "MAXU", + MIN: "MIN", + MINU: "MINU", + MUL: "MUL", + MULH: "MULH", + MULHSU: "MULHSU", + MULHU: "MULHU", + MULW: "MULW", + OR: "OR", + ORC_B: "ORC.B", + ORI: "ORI", + ORN: "ORN", + REM: "REM", + REMU: "REMU", + REMUW: "REMUW", + REMW: "REMW", + REV8: "REV8", + ROL: "ROL", + ROLW: "ROLW", + ROR: "ROR", + RORI: "RORI", + RORIW: "RORIW", + RORW: "RORW", + SB: "SB", + SC_D: "SC.D", + SC_D_AQ: "SC.D.AQ", + SC_D_AQRL: "SC.D.AQRL", + SC_D_RL: "SC.D.RL", + SC_W: "SC.W", + SC_W_AQ: "SC.W.AQ", + SC_W_AQRL: "SC.W.AQRL", + SC_W_RL: "SC.W.RL", + SD: "SD", + SEXT_B: "SEXT.B", + SEXT_H: "SEXT.H", + SH: "SH", + SH1ADD: "SH1ADD", + SH1ADD_UW: "SH1ADD.UW", + SH2ADD: "SH2ADD", + SH2ADD_UW: "SH2ADD.UW", + SH3ADD: "SH3ADD", + SH3ADD_UW: "SH3ADD.UW", + SLL: "SLL", + SLLI: "SLLI", + SLLIW: "SLLIW", + SLLI_UW: "SLLI.UW", + SLLW: "SLLW", + SLT: "SLT", + SLTI: "SLTI", + SLTIU: "SLTIU", + SLTU: "SLTU", + SRA: "SRA", + SRAI: "SRAI", + SRAIW: "SRAIW", + SRAW: "SRAW", + SRL: "SRL", + SRLI: "SRLI", + SRLIW: "SRLIW", + SRLW: "SRLW", + SUB: "SUB", + SUBW: "SUBW", + SW: "SW", + VAADDU_VV: "VAADDU.VV", + VAADDU_VX: "VAADDU.VX", + VAADD_VV: "VAADD.VV", + VAADD_VX: "VAADD.VX", + VAESDF_VS: "VAESDF.VS", + VAESDF_VV: "VAESDF.VV", + VAESDM_VS: "VAESDM.VS", + VAESDM_VV: "VAESDM.VV", + VAESEF_VS: "VAESEF.VS", + VAESEF_VV: "VAESEF.VV", + VAESEM_VS: "VAESEM.VS", + VAESEM_VV: "VAESEM.VV", + VAESKF1_VI: "VAESKF1.VI", + VAESKF2_VI: "VAESKF2.VI", + VAESZ_VS: "VAESZ.VS", + VGHSH_VV: "VGHSH.VV", + VGMUL_VV: "VGMUL.VV", + VSHA2CH_VV: "VSHA2CH.VV", + VSHA2CL_VV: "VSHA2CL.VV", + VSHA2MS_VV: "VSHA2MS.VV", + VSM3C_VI: "VSM3C.VI", + VSM3ME_VV: "VSM3ME.VV", + VSM4K_VI: "VSM4K.VI", + VSM4R_VS: "VSM4R.VS", + VSM4R_VV: "VSM4R.VV", + VADC_VIM: "VADC.VIM", + VADC_VVM: "VADC.VVM", + VADC_VXM: "VADC.VXM", + VADD_VI: "VADD.VI", + VADD_VV: "VADD.VV", + VADD_VX: "VADD.VX", + VAND_VI: "VAND.VI", + VAND_VV: "VAND.VV", + VAND_VX: "VAND.VX", + VASUBU_VV: "VASUBU.VV", + VASUBU_VX: "VASUBU.VX", + VASUB_VV: "VASUB.VV", + VASUB_VX: "VASUB.VX", + VCOMPRESS_VM: "VCOMPRESS.VM", + VCPOP_M: "VCPOP.M", + VDIVU_VV: "VDIVU.VV", + VDIVU_VX: "VDIVU.VX", + VDIV_VV: "VDIV.VV", + VDIV_VX: "VDIV.VX", + VFADD_VF: "VFADD.VF", + VFADD_VV: "VFADD.VV", + VFCLASS_V: "VFCLASS.V", + VFCVT_F_XU_V: "VFCVT.F.XU.V", + VFCVT_F_X_V: "VFCVT.F.X.V", + VFCVT_RTZ_XU_F_V: "VFCVT.RTZ.XU.F.V", + VFCVT_RTZ_X_F_V: "VFCVT.RTZ.X.F.V", + VFCVT_XU_F_V: "VFCVT.XU.F.V", + VFCVT_X_F_V: "VFCVT.X.F.V", + VFDIV_VF: "VFDIV.VF", + VFDIV_VV: "VFDIV.VV", + VFIRST_M: "VFIRST.M", + VFMACC_VF: "VFMACC.VF", + VFMACC_VV: "VFMACC.VV", + VFMADD_VF: "VFMADD.VF", + VFMADD_VV: "VFMADD.VV", + VFMAX_VF: "VFMAX.VF", + VFMAX_VV: "VFMAX.VV", + VFMERGE_VFM: "VFMERGE.VFM", + VFMIN_VF: "VFMIN.VF", + VFMIN_VV: "VFMIN.VV", + VFMSAC_VF: "VFMSAC.VF", + VFMSAC_VV: "VFMSAC.VV", + VFMSUB_VF: "VFMSUB.VF", + VFMSUB_VV: "VFMSUB.VV", + VFMUL_VF: "VFMUL.VF", + VFMUL_VV: "VFMUL.VV", + VFMV_F_S: "VFMV.F.S", + VFMV_S_F: "VFMV.S.F", + VFMV_V_F: "VFMV.V.F", + VFNCVT_F_F_W: "VFNCVT.F.F.W", + VFNCVT_F_XU_W: "VFNCVT.F.XU.W", + VFNCVT_F_X_W: "VFNCVT.F.X.W", + VFNCVT_ROD_F_F_W: "VFNCVT.ROD.F.F.W", + VFNCVT_RTZ_XU_F_W: "VFNCVT.RTZ.XU.F.W", + VFNCVT_RTZ_X_F_W: "VFNCVT.RTZ.X.F.W", + VFNCVT_XU_F_W: "VFNCVT.XU.F.W", + VFNCVT_X_F_W: "VFNCVT.X.F.W", + VFNMACC_VF: "VFNMACC.VF", + VFNMACC_VV: "VFNMACC.VV", + VFNMADD_VF: "VFNMADD.VF", + VFNMADD_VV: "VFNMADD.VV", + VFNMSAC_VF: "VFNMSAC.VF", + VFNMSAC_VV: "VFNMSAC.VV", + VFNMSUB_VF: "VFNMSUB.VF", + VFNMSUB_VV: "VFNMSUB.VV", + VFRDIV_VF: "VFRDIV.VF", + VFREC7_V: "VFREC7.V", + VFREDMAX_VS: "VFREDMAX.VS", + VFREDMIN_VS: "VFREDMIN.VS", + VFREDOSUM_VS: "VFREDOSUM.VS", + VFREDUSUM_VS: "VFREDUSUM.VS", + VFRSQRT7_V: "VFRSQRT7.V", + VFRSUB_VF: "VFRSUB.VF", + VFSGNJN_VF: "VFSGNJN.VF", + VFSGNJN_VV: "VFSGNJN.VV", + VFSGNJX_VF: "VFSGNJX.VF", + VFSGNJX_VV: "VFSGNJX.VV", + VFSGNJ_VF: "VFSGNJ.VF", + VFSGNJ_VV: "VFSGNJ.VV", + VFSLIDE1DOWN_VF: "VFSLIDE1DOWN.VF", + VFSLIDE1UP_VF: "VFSLIDE1UP.VF", + VFSQRT_V: "VFSQRT.V", + VFSUB_VF: "VFSUB.VF", + VFSUB_VV: "VFSUB.VV", + VFWADD_VF: "VFWADD.VF", + VFWADD_VV: "VFWADD.VV", + VFWADD_WF: "VFWADD.WF", + VFWADD_WV: "VFWADD.WV", + VFWCVT_F_F_V: "VFWCVT.F.F.V", + VFWCVT_F_XU_V: "VFWCVT.F.XU.V", + VFWCVT_F_X_V: "VFWCVT.F.X.V", + VFWCVT_RTZ_XU_F_V: "VFWCVT.RTZ.XU.F.V", + VFWCVT_RTZ_X_F_V: "VFWCVT.RTZ.X.F.V", + VFWCVT_XU_F_V: "VFWCVT.XU.F.V", + VFWCVT_X_F_V: "VFWCVT.X.F.V", + VFWMACC_VF: "VFWMACC.VF", + VFWMACC_VV: "VFWMACC.VV", + VFWMSAC_VF: "VFWMSAC.VF", + VFWMSAC_VV: "VFWMSAC.VV", + VFWMUL_VF: "VFWMUL.VF", + VFWMUL_VV: "VFWMUL.VV", + VFWNMACC_VF: "VFWNMACC.VF", + VFWNMACC_VV: "VFWNMACC.VV", + VFWNMSAC_VF: "VFWNMSAC.VF", + VFWNMSAC_VV: "VFWNMSAC.VV", + VFWREDOSUM_VS: "VFWREDOSUM.VS", + VFWREDUSUM_VS: "VFWREDUSUM.VS", + VFWSUB_VF: "VFWSUB.VF", + VFWSUB_VV: "VFWSUB.VV", + VFWSUB_WF: "VFWSUB.WF", + VFWSUB_WV: "VFWSUB.WV", + VID_V: "VID.V", + VIOTA_M: "VIOTA.M", + VL1RE16_V: "VL1RE16.V", + VL1RE32_V: "VL1RE32.V", + VL1RE64_V: "VL1RE64.V", + VL1RE8_V: "VL1RE8.V", + VL2RE16_V: "VL2RE16.V", + VL2RE32_V: "VL2RE32.V", + VL2RE64_V: "VL2RE64.V", + VL2RE8_V: "VL2RE8.V", + VL4RE16_V: "VL4RE16.V", + VL4RE32_V: "VL4RE32.V", + VL4RE64_V: "VL4RE64.V", + VL4RE8_V: "VL4RE8.V", + VL8RE16_V: "VL8RE16.V", + VL8RE32_V: "VL8RE32.V", + VL8RE64_V: "VL8RE64.V", + VL8RE8_V: "VL8RE8.V", + VLE16FF_V: "VLE16FF.V", + VLE16_V: "VLE16.V", + VLE32FF_V: "VLE32FF.V", + VLE32_V: "VLE32.V", + VLE64FF_V: "VLE64FF.V", + VLE64_V: "VLE64.V", + VLE8FF_V: "VLE8FF.V", + VLE8_V: "VLE8.V", + VLM_V: "VLM.V", + VLOXEI16_V: "VLOXEI16.V", + VLOXEI32_V: "VLOXEI32.V", + VLOXEI64_V: "VLOXEI64.V", + VLOXEI8_V: "VLOXEI8.V", + VLOXSEG2EI16_V: "VLOXSEG2EI16.V", + VLOXSEG2EI32_V: "VLOXSEG2EI32.V", + VLOXSEG2EI64_V: "VLOXSEG2EI64.V", + VLOXSEG2EI8_V: "VLOXSEG2EI8.V", + VLOXSEG3EI16_V: "VLOXSEG3EI16.V", + VLOXSEG3EI32_V: "VLOXSEG3EI32.V", + VLOXSEG3EI64_V: "VLOXSEG3EI64.V", + VLOXSEG3EI8_V: "VLOXSEG3EI8.V", + VLOXSEG4EI16_V: "VLOXSEG4EI16.V", + VLOXSEG4EI32_V: "VLOXSEG4EI32.V", + VLOXSEG4EI64_V: "VLOXSEG4EI64.V", + VLOXSEG4EI8_V: "VLOXSEG4EI8.V", + VLOXSEG5EI16_V: "VLOXSEG5EI16.V", + VLOXSEG5EI32_V: "VLOXSEG5EI32.V", + VLOXSEG5EI64_V: "VLOXSEG5EI64.V", + VLOXSEG5EI8_V: "VLOXSEG5EI8.V", + VLOXSEG6EI16_V: "VLOXSEG6EI16.V", + VLOXSEG6EI32_V: "VLOXSEG6EI32.V", + VLOXSEG6EI64_V: "VLOXSEG6EI64.V", + VLOXSEG6EI8_V: "VLOXSEG6EI8.V", + VLOXSEG7EI16_V: "VLOXSEG7EI16.V", + VLOXSEG7EI32_V: "VLOXSEG7EI32.V", + VLOXSEG7EI64_V: "VLOXSEG7EI64.V", + VLOXSEG7EI8_V: "VLOXSEG7EI8.V", + VLOXSEG8EI16_V: "VLOXSEG8EI16.V", + VLOXSEG8EI32_V: "VLOXSEG8EI32.V", + VLOXSEG8EI64_V: "VLOXSEG8EI64.V", + VLOXSEG8EI8_V: "VLOXSEG8EI8.V", + VLSE16_V: "VLSE16.V", + VLSE32_V: "VLSE32.V", + VLSE64_V: "VLSE64.V", + VLSE8_V: "VLSE8.V", + VLSEG2E16FF_V: "VLSEG2E16FF.V", + VLSEG2E16_V: "VLSEG2E16.V", + VLSEG2E32FF_V: "VLSEG2E32FF.V", + VLSEG2E32_V: "VLSEG2E32.V", + VLSEG2E64FF_V: "VLSEG2E64FF.V", + VLSEG2E64_V: "VLSEG2E64.V", + VLSEG2E8FF_V: "VLSEG2E8FF.V", + VLSEG2E8_V: "VLSEG2E8.V", + VLSEG3E16FF_V: "VLSEG3E16FF.V", + VLSEG3E16_V: "VLSEG3E16.V", + VLSEG3E32FF_V: "VLSEG3E32FF.V", + VLSEG3E32_V: "VLSEG3E32.V", + VLSEG3E64FF_V: "VLSEG3E64FF.V", + VLSEG3E64_V: "VLSEG3E64.V", + VLSEG3E8FF_V: "VLSEG3E8FF.V", + VLSEG3E8_V: "VLSEG3E8.V", + VLSEG4E16FF_V: "VLSEG4E16FF.V", + VLSEG4E16_V: "VLSEG4E16.V", + VLSEG4E32FF_V: "VLSEG4E32FF.V", + VLSEG4E32_V: "VLSEG4E32.V", + VLSEG4E64FF_V: "VLSEG4E64FF.V", + VLSEG4E64_V: "VLSEG4E64.V", + VLSEG4E8FF_V: "VLSEG4E8FF.V", + VLSEG4E8_V: "VLSEG4E8.V", + VLSEG5E16FF_V: "VLSEG5E16FF.V", + VLSEG5E16_V: "VLSEG5E16.V", + VLSEG5E32FF_V: "VLSEG5E32FF.V", + VLSEG5E32_V: "VLSEG5E32.V", + VLSEG5E64FF_V: "VLSEG5E64FF.V", + VLSEG5E64_V: "VLSEG5E64.V", + VLSEG5E8FF_V: "VLSEG5E8FF.V", + VLSEG5E8_V: "VLSEG5E8.V", + VLSEG6E16FF_V: "VLSEG6E16FF.V", + VLSEG6E16_V: "VLSEG6E16.V", + VLSEG6E32FF_V: "VLSEG6E32FF.V", + VLSEG6E32_V: "VLSEG6E32.V", + VLSEG6E64FF_V: "VLSEG6E64FF.V", + VLSEG6E64_V: "VLSEG6E64.V", + VLSEG6E8FF_V: "VLSEG6E8FF.V", + VLSEG6E8_V: "VLSEG6E8.V", + VLSEG7E16FF_V: "VLSEG7E16FF.V", + VLSEG7E16_V: "VLSEG7E16.V", + VLSEG7E32FF_V: "VLSEG7E32FF.V", + VLSEG7E32_V: "VLSEG7E32.V", + VLSEG7E64FF_V: "VLSEG7E64FF.V", + VLSEG7E64_V: "VLSEG7E64.V", + VLSEG7E8FF_V: "VLSEG7E8FF.V", + VLSEG7E8_V: "VLSEG7E8.V", + VLSEG8E16FF_V: "VLSEG8E16FF.V", + VLSEG8E16_V: "VLSEG8E16.V", + VLSEG8E32FF_V: "VLSEG8E32FF.V", + VLSEG8E32_V: "VLSEG8E32.V", + VLSEG8E64FF_V: "VLSEG8E64FF.V", + VLSEG8E64_V: "VLSEG8E64.V", + VLSEG8E8FF_V: "VLSEG8E8FF.V", + VLSEG8E8_V: "VLSEG8E8.V", + VLSSEG2E16_V: "VLSSEG2E16.V", + VLSSEG2E32_V: "VLSSEG2E32.V", + VLSSEG2E64_V: "VLSSEG2E64.V", + VLSSEG2E8_V: "VLSSEG2E8.V", + VLSSEG3E16_V: "VLSSEG3E16.V", + VLSSEG3E32_V: "VLSSEG3E32.V", + VLSSEG3E64_V: "VLSSEG3E64.V", + VLSSEG3E8_V: "VLSSEG3E8.V", + VLSSEG4E16_V: "VLSSEG4E16.V", + VLSSEG4E32_V: "VLSSEG4E32.V", + VLSSEG4E64_V: "VLSSEG4E64.V", + VLSSEG4E8_V: "VLSSEG4E8.V", + VLSSEG5E16_V: "VLSSEG5E16.V", + VLSSEG5E32_V: "VLSSEG5E32.V", + VLSSEG5E64_V: "VLSSEG5E64.V", + VLSSEG5E8_V: "VLSSEG5E8.V", + VLSSEG6E16_V: "VLSSEG6E16.V", + VLSSEG6E32_V: "VLSSEG6E32.V", + VLSSEG6E64_V: "VLSSEG6E64.V", + VLSSEG6E8_V: "VLSSEG6E8.V", + VLSSEG7E16_V: "VLSSEG7E16.V", + VLSSEG7E32_V: "VLSSEG7E32.V", + VLSSEG7E64_V: "VLSSEG7E64.V", + VLSSEG7E8_V: "VLSSEG7E8.V", + VLSSEG8E16_V: "VLSSEG8E16.V", + VLSSEG8E32_V: "VLSSEG8E32.V", + VLSSEG8E64_V: "VLSSEG8E64.V", + VLSSEG8E8_V: "VLSSEG8E8.V", + VLUXEI16_V: "VLUXEI16.V", + VLUXEI32_V: "VLUXEI32.V", + VLUXEI64_V: "VLUXEI64.V", + VLUXEI8_V: "VLUXEI8.V", + VLUXSEG2EI16_V: "VLUXSEG2EI16.V", + VLUXSEG2EI32_V: "VLUXSEG2EI32.V", + VLUXSEG2EI64_V: "VLUXSEG2EI64.V", + VLUXSEG2EI8_V: "VLUXSEG2EI8.V", + VLUXSEG3EI16_V: "VLUXSEG3EI16.V", + VLUXSEG3EI32_V: "VLUXSEG3EI32.V", + VLUXSEG3EI64_V: "VLUXSEG3EI64.V", + VLUXSEG3EI8_V: "VLUXSEG3EI8.V", + VLUXSEG4EI16_V: "VLUXSEG4EI16.V", + VLUXSEG4EI32_V: "VLUXSEG4EI32.V", + VLUXSEG4EI64_V: "VLUXSEG4EI64.V", + VLUXSEG4EI8_V: "VLUXSEG4EI8.V", + VLUXSEG5EI16_V: "VLUXSEG5EI16.V", + VLUXSEG5EI32_V: "VLUXSEG5EI32.V", + VLUXSEG5EI64_V: "VLUXSEG5EI64.V", + VLUXSEG5EI8_V: "VLUXSEG5EI8.V", + VLUXSEG6EI16_V: "VLUXSEG6EI16.V", + VLUXSEG6EI32_V: "VLUXSEG6EI32.V", + VLUXSEG6EI64_V: "VLUXSEG6EI64.V", + VLUXSEG6EI8_V: "VLUXSEG6EI8.V", + VLUXSEG7EI16_V: "VLUXSEG7EI16.V", + VLUXSEG7EI32_V: "VLUXSEG7EI32.V", + VLUXSEG7EI64_V: "VLUXSEG7EI64.V", + VLUXSEG7EI8_V: "VLUXSEG7EI8.V", + VLUXSEG8EI16_V: "VLUXSEG8EI16.V", + VLUXSEG8EI32_V: "VLUXSEG8EI32.V", + VLUXSEG8EI64_V: "VLUXSEG8EI64.V", + VLUXSEG8EI8_V: "VLUXSEG8EI8.V", + VMACC_VV: "VMACC.VV", + VMACC_VX: "VMACC.VX", + VMADC_VI: "VMADC.VI", + VMADC_VIM: "VMADC.VIM", + VMADC_VV: "VMADC.VV", + VMADC_VVM: "VMADC.VVM", + VMADC_VX: "VMADC.VX", + VMADC_VXM: "VMADC.VXM", + VMADD_VV: "VMADD.VV", + VMADD_VX: "VMADD.VX", + VMANDN_MM: "VMANDN.MM", + VMAND_MM: "VMAND.MM", + VMAXU_VV: "VMAXU.VV", + VMAXU_VX: "VMAXU.VX", + VMAX_VV: "VMAX.VV", + VMAX_VX: "VMAX.VX", + VMERGE_VIM: "VMERGE.VIM", + VMERGE_VVM: "VMERGE.VVM", + VMERGE_VXM: "VMERGE.VXM", + VMFEQ_VF: "VMFEQ.VF", + VMFEQ_VV: "VMFEQ.VV", + VMFGE_VF: "VMFGE.VF", + VMFGT_VF: "VMFGT.VF", + VMFLE_VF: "VMFLE.VF", + VMFLE_VV: "VMFLE.VV", + VMFLT_VF: "VMFLT.VF", + VMFLT_VV: "VMFLT.VV", + VMFNE_VF: "VMFNE.VF", + VMFNE_VV: "VMFNE.VV", + VMINU_VV: "VMINU.VV", + VMINU_VX: "VMINU.VX", + VMIN_VV: "VMIN.VV", + VMIN_VX: "VMIN.VX", + VMNAND_MM: "VMNAND.MM", + VMNOR_MM: "VMNOR.MM", + VMORN_MM: "VMORN.MM", + VMOR_MM: "VMOR.MM", + VMSBC_VV: "VMSBC.VV", + VMSBC_VVM: "VMSBC.VVM", + VMSBC_VX: "VMSBC.VX", + VMSBC_VXM: "VMSBC.VXM", + VMSBF_M: "VMSBF.M", + VMSEQ_VI: "VMSEQ.VI", + VMSEQ_VV: "VMSEQ.VV", + VMSEQ_VX: "VMSEQ.VX", + VMSGTU_VI: "VMSGTU.VI", + VMSGTU_VX: "VMSGTU.VX", + VMSGT_VI: "VMSGT.VI", + VMSGT_VX: "VMSGT.VX", + VMSIF_M: "VMSIF.M", + VMSLEU_VI: "VMSLEU.VI", + VMSLEU_VV: "VMSLEU.VV", + VMSLEU_VX: "VMSLEU.VX", + VMSLE_VI: "VMSLE.VI", + VMSLE_VV: "VMSLE.VV", + VMSLE_VX: "VMSLE.VX", + VMSLTU_VV: "VMSLTU.VV", + VMSLTU_VX: "VMSLTU.VX", + VMSLT_VV: "VMSLT.VV", + VMSLT_VX: "VMSLT.VX", + VMSNE_VI: "VMSNE.VI", + VMSNE_VV: "VMSNE.VV", + VMSNE_VX: "VMSNE.VX", + VMSOF_M: "VMSOF.M", + VMULHSU_VV: "VMULHSU.VV", + VMULHSU_VX: "VMULHSU.VX", + VMULHU_VV: "VMULHU.VV", + VMULHU_VX: "VMULHU.VX", + VMULH_VV: "VMULH.VV", + VMULH_VX: "VMULH.VX", + VMUL_VV: "VMUL.VV", + VMUL_VX: "VMUL.VX", + VMV1R_V: "VMV1R.V", + VMV2R_V: "VMV2R.V", + VMV4R_V: "VMV4R.V", + VMV8R_V: "VMV8R.V", + VMV_S_X: "VMV.S.X", + VMV_V_I: "VMV.V.I", + VMV_V_V: "VMV.V.V", + VMV_V_X: "VMV.V.X", + VMV_X_S: "VMV.X.S", + VMXNOR_MM: "VMXNOR.MM", + VMXOR_MM: "VMXOR.MM", + VNCLIPU_WI: "VNCLIPU.WI", + VNCLIPU_WV: "VNCLIPU.WV", + VNCLIPU_WX: "VNCLIPU.WX", + VNCLIP_WI: "VNCLIP.WI", + VNCLIP_WV: "VNCLIP.WV", + VNCLIP_WX: "VNCLIP.WX", + VNMSAC_VV: "VNMSAC.VV", + VNMSAC_VX: "VNMSAC.VX", + VNMSUB_VV: "VNMSUB.VV", + VNMSUB_VX: "VNMSUB.VX", + VNSRA_WI: "VNSRA.WI", + VNSRA_WV: "VNSRA.WV", + VNSRA_WX: "VNSRA.WX", + VNSRL_WI: "VNSRL.WI", + VNSRL_WV: "VNSRL.WV", + VNSRL_WX: "VNSRL.WX", + VOR_VI: "VOR.VI", + VOR_VV: "VOR.VV", + VOR_VX: "VOR.VX", + VREDAND_VS: "VREDAND.VS", + VREDMAXU_VS: "VREDMAXU.VS", + VREDMAX_VS: "VREDMAX.VS", + VREDMINU_VS: "VREDMINU.VS", + VREDMIN_VS: "VREDMIN.VS", + VREDOR_VS: "VREDOR.VS", + VREDSUM_VS: "VREDSUM.VS", + VREDXOR_VS: "VREDXOR.VS", + VREMU_VV: "VREMU.VV", + VREMU_VX: "VREMU.VX", + VREM_VV: "VREM.VV", + VREM_VX: "VREM.VX", + VRGATHEREI16_VV: "VRGATHEREI16.VV", + VRGATHER_VI: "VRGATHER.VI", + VRGATHER_VV: "VRGATHER.VV", + VRGATHER_VX: "VRGATHER.VX", + VRSUB_VI: "VRSUB.VI", + VRSUB_VX: "VRSUB.VX", + VS1R_V: "VS1R.V", + VS2R_V: "VS2R.V", + VS4R_V: "VS4R.V", + VS8R_V: "VS8R.V", + VSADDU_VI: "VSADDU.VI", + VSADDU_VV: "VSADDU.VV", + VSADDU_VX: "VSADDU.VX", + VSADD_VI: "VSADD.VI", + VSADD_VV: "VSADD.VV", + VSADD_VX: "VSADD.VX", + VSBC_VVM: "VSBC.VVM", + VSBC_VXM: "VSBC.VXM", + VSE16_V: "VSE16.V", + VSE32_V: "VSE32.V", + VSE64_V: "VSE64.V", + VSE8_V: "VSE8.V", + VSETIVLI: "VSETIVLI", + VSETVL: "VSETVL", + VSETVLI: "VSETVLI", + VSEXT_VF2: "VSEXT.VF2", + VSEXT_VF4: "VSEXT.VF4", + VSEXT_VF8: "VSEXT.VF8", + VSLIDE1DOWN_VX: "VSLIDE1DOWN.VX", + VSLIDE1UP_VX: "VSLIDE1UP.VX", + VSLIDEDOWN_VI: "VSLIDEDOWN.VI", + VSLIDEDOWN_VX: "VSLIDEDOWN.VX", + VSLIDEUP_VI: "VSLIDEUP.VI", + VSLIDEUP_VX: "VSLIDEUP.VX", + VSLL_VI: "VSLL.VI", + VSLL_VV: "VSLL.VV", + VSLL_VX: "VSLL.VX", + VSMUL_VV: "VSMUL.VV", + VSMUL_VX: "VSMUL.VX", + VSM_V: "VSM.V", + VSOXEI16_V: "VSOXEI16.V", + VSOXEI32_V: "VSOXEI32.V", + VSOXEI64_V: "VSOXEI64.V", + VSOXEI8_V: "VSOXEI8.V", + VSOXSEG2EI16_V: "VSOXSEG2EI16.V", + VSOXSEG2EI32_V: "VSOXSEG2EI32.V", + VSOXSEG2EI64_V: "VSOXSEG2EI64.V", + VSOXSEG2EI8_V: "VSOXSEG2EI8.V", + VSOXSEG3EI16_V: "VSOXSEG3EI16.V", + VSOXSEG3EI32_V: "VSOXSEG3EI32.V", + VSOXSEG3EI64_V: "VSOXSEG3EI64.V", + VSOXSEG3EI8_V: "VSOXSEG3EI8.V", + VSOXSEG4EI16_V: "VSOXSEG4EI16.V", + VSOXSEG4EI32_V: "VSOXSEG4EI32.V", + VSOXSEG4EI64_V: "VSOXSEG4EI64.V", + VSOXSEG4EI8_V: "VSOXSEG4EI8.V", + VSOXSEG5EI16_V: "VSOXSEG5EI16.V", + VSOXSEG5EI32_V: "VSOXSEG5EI32.V", + VSOXSEG5EI64_V: "VSOXSEG5EI64.V", + VSOXSEG5EI8_V: "VSOXSEG5EI8.V", + VSOXSEG6EI16_V: "VSOXSEG6EI16.V", + VSOXSEG6EI32_V: "VSOXSEG6EI32.V", + VSOXSEG6EI64_V: "VSOXSEG6EI64.V", + VSOXSEG6EI8_V: "VSOXSEG6EI8.V", + VSOXSEG7EI16_V: "VSOXSEG7EI16.V", + VSOXSEG7EI32_V: "VSOXSEG7EI32.V", + VSOXSEG7EI64_V: "VSOXSEG7EI64.V", + VSOXSEG7EI8_V: "VSOXSEG7EI8.V", + VSOXSEG8EI16_V: "VSOXSEG8EI16.V", + VSOXSEG8EI32_V: "VSOXSEG8EI32.V", + VSOXSEG8EI64_V: "VSOXSEG8EI64.V", + VSOXSEG8EI8_V: "VSOXSEG8EI8.V", + VSRA_VI: "VSRA.VI", + VSRA_VV: "VSRA.VV", + VSRA_VX: "VSRA.VX", + VSRL_VI: "VSRL.VI", + VSRL_VV: "VSRL.VV", + VSRL_VX: "VSRL.VX", + VSSE16_V: "VSSE16.V", + VSSE32_V: "VSSE32.V", + VSSE64_V: "VSSE64.V", + VSSE8_V: "VSSE8.V", + VSSEG2E16_V: "VSSEG2E16.V", + VSSEG2E32_V: "VSSEG2E32.V", + VSSEG2E64_V: "VSSEG2E64.V", + VSSEG2E8_V: "VSSEG2E8.V", + VSSEG3E16_V: "VSSEG3E16.V", + VSSEG3E32_V: "VSSEG3E32.V", + VSSEG3E64_V: "VSSEG3E64.V", + VSSEG3E8_V: "VSSEG3E8.V", + VSSEG4E16_V: "VSSEG4E16.V", + VSSEG4E32_V: "VSSEG4E32.V", + VSSEG4E64_V: "VSSEG4E64.V", + VSSEG4E8_V: "VSSEG4E8.V", + VSSEG5E16_V: "VSSEG5E16.V", + VSSEG5E32_V: "VSSEG5E32.V", + VSSEG5E64_V: "VSSEG5E64.V", + VSSEG5E8_V: "VSSEG5E8.V", + VSSEG6E16_V: "VSSEG6E16.V", + VSSEG6E32_V: "VSSEG6E32.V", + VSSEG6E64_V: "VSSEG6E64.V", + VSSEG6E8_V: "VSSEG6E8.V", + VSSEG7E16_V: "VSSEG7E16.V", + VSSEG7E32_V: "VSSEG7E32.V", + VSSEG7E64_V: "VSSEG7E64.V", + VSSEG7E8_V: "VSSEG7E8.V", + VSSEG8E16_V: "VSSEG8E16.V", + VSSEG8E32_V: "VSSEG8E32.V", + VSSEG8E64_V: "VSSEG8E64.V", + VSSEG8E8_V: "VSSEG8E8.V", + VSSRA_VI: "VSSRA.VI", + VSSRA_VV: "VSSRA.VV", + VSSRA_VX: "VSSRA.VX", + VSSRL_VI: "VSSRL.VI", + VSSRL_VV: "VSSRL.VV", + VSSRL_VX: "VSSRL.VX", + VSSSEG2E16_V: "VSSSEG2E16.V", + VSSSEG2E32_V: "VSSSEG2E32.V", + VSSSEG2E64_V: "VSSSEG2E64.V", + VSSSEG2E8_V: "VSSSEG2E8.V", + VSSSEG3E16_V: "VSSSEG3E16.V", + VSSSEG3E32_V: "VSSSEG3E32.V", + VSSSEG3E64_V: "VSSSEG3E64.V", + VSSSEG3E8_V: "VSSSEG3E8.V", + VSSSEG4E16_V: "VSSSEG4E16.V", + VSSSEG4E32_V: "VSSSEG4E32.V", + VSSSEG4E64_V: "VSSSEG4E64.V", + VSSSEG4E8_V: "VSSSEG4E8.V", + VSSSEG5E16_V: "VSSSEG5E16.V", + VSSSEG5E32_V: "VSSSEG5E32.V", + VSSSEG5E64_V: "VSSSEG5E64.V", + VSSSEG5E8_V: "VSSSEG5E8.V", + VSSSEG6E16_V: "VSSSEG6E16.V", + VSSSEG6E32_V: "VSSSEG6E32.V", + VSSSEG6E64_V: "VSSSEG6E64.V", + VSSSEG6E8_V: "VSSSEG6E8.V", + VSSSEG7E16_V: "VSSSEG7E16.V", + VSSSEG7E32_V: "VSSSEG7E32.V", + VSSSEG7E64_V: "VSSSEG7E64.V", + VSSSEG7E8_V: "VSSSEG7E8.V", + VSSSEG8E16_V: "VSSSEG8E16.V", + VSSSEG8E32_V: "VSSSEG8E32.V", + VSSSEG8E64_V: "VSSSEG8E64.V", + VSSSEG8E8_V: "VSSSEG8E8.V", + VSSUBU_VV: "VSSUBU.VV", + VSSUBU_VX: "VSSUBU.VX", + VSSUB_VV: "VSSUB.VV", + VSSUB_VX: "VSSUB.VX", + VSUB_VV: "VSUB.VV", + VSUB_VX: "VSUB.VX", + VSUXEI16_V: "VSUXEI16.V", + VSUXEI32_V: "VSUXEI32.V", + VSUXEI64_V: "VSUXEI64.V", + VSUXEI8_V: "VSUXEI8.V", + VSUXSEG2EI16_V: "VSUXSEG2EI16.V", + VSUXSEG2EI32_V: "VSUXSEG2EI32.V", + VSUXSEG2EI64_V: "VSUXSEG2EI64.V", + VSUXSEG2EI8_V: "VSUXSEG2EI8.V", + VSUXSEG3EI16_V: "VSUXSEG3EI16.V", + VSUXSEG3EI32_V: "VSUXSEG3EI32.V", + VSUXSEG3EI64_V: "VSUXSEG3EI64.V", + VSUXSEG3EI8_V: "VSUXSEG3EI8.V", + VSUXSEG4EI16_V: "VSUXSEG4EI16.V", + VSUXSEG4EI32_V: "VSUXSEG4EI32.V", + VSUXSEG4EI64_V: "VSUXSEG4EI64.V", + VSUXSEG4EI8_V: "VSUXSEG4EI8.V", + VSUXSEG5EI16_V: "VSUXSEG5EI16.V", + VSUXSEG5EI32_V: "VSUXSEG5EI32.V", + VSUXSEG5EI64_V: "VSUXSEG5EI64.V", + VSUXSEG5EI8_V: "VSUXSEG5EI8.V", + VSUXSEG6EI16_V: "VSUXSEG6EI16.V", + VSUXSEG6EI32_V: "VSUXSEG6EI32.V", + VSUXSEG6EI64_V: "VSUXSEG6EI64.V", + VSUXSEG6EI8_V: "VSUXSEG6EI8.V", + VSUXSEG7EI16_V: "VSUXSEG7EI16.V", + VSUXSEG7EI32_V: "VSUXSEG7EI32.V", + VSUXSEG7EI64_V: "VSUXSEG7EI64.V", + VSUXSEG7EI8_V: "VSUXSEG7EI8.V", + VSUXSEG8EI16_V: "VSUXSEG8EI16.V", + VSUXSEG8EI32_V: "VSUXSEG8EI32.V", + VSUXSEG8EI64_V: "VSUXSEG8EI64.V", + VSUXSEG8EI8_V: "VSUXSEG8EI8.V", + VWADDU_VV: "VWADDU.VV", + VWADDU_VX: "VWADDU.VX", + VWADDU_WV: "VWADDU.WV", + VWADDU_WX: "VWADDU.WX", + VWADD_VV: "VWADD.VV", + VWADD_VX: "VWADD.VX", + VWADD_WV: "VWADD.WV", + VWADD_WX: "VWADD.WX", + VWMACCSU_VV: "VWMACCSU.VV", + VWMACCSU_VX: "VWMACCSU.VX", + VWMACCUS_VX: "VWMACCUS.VX", + VWMACCU_VV: "VWMACCU.VV", + VWMACCU_VX: "VWMACCU.VX", + VWMACC_VV: "VWMACC.VV", + VWMACC_VX: "VWMACC.VX", + VWMULSU_VV: "VWMULSU.VV", + VWMULSU_VX: "VWMULSU.VX", + VWMULU_VV: "VWMULU.VV", + VWMULU_VX: "VWMULU.VX", + VWMUL_VV: "VWMUL.VV", + VWMUL_VX: "VWMUL.VX", + VWREDSUMU_VS: "VWREDSUMU.VS", + VWREDSUM_VS: "VWREDSUM.VS", + VWSUBU_VV: "VWSUBU.VV", + VWSUBU_VX: "VWSUBU.VX", + VWSUBU_WV: "VWSUBU.WV", + VWSUBU_WX: "VWSUBU.WX", + VWSUB_VV: "VWSUB.VV", + VWSUB_VX: "VWSUB.VX", + VWSUB_WV: "VWSUB.WV", + VWSUB_WX: "VWSUB.WX", + VXOR_VI: "VXOR.VI", + VXOR_VV: "VXOR.VV", + VXOR_VX: "VXOR.VX", + VZEXT_VF2: "VZEXT.VF2", + VZEXT_VF4: "VZEXT.VF4", + VZEXT_VF8: "VZEXT.VF8", + XNOR: "XNOR", + XOR: "XOR", + XORI: "XORI", + ZEXT_H: "ZEXT.H", } var instFormats = [...]instFormat{ @@ -753,150 +2066,150 @@ var instFormats = [...]instFormat{ {mask: 0xfe00707f, value: 0x0000003b, op: ADDW, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, // ADD.UW rd, rs1, rs2 {mask: 0xfe00707f, value: 0x0800003b, op: ADD_UW, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, - // AMOADD.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0000302f, op: AMOADD_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOADD.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0400302f, op: AMOADD_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOADD.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0600302f, op: AMOADD_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOADD.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0200302f, op: AMOADD_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOADD.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0000202f, op: AMOADD_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOADD.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0400202f, op: AMOADD_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOADD.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0600202f, op: AMOADD_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOADD.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0200202f, op: AMOADD_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOAND.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x6000302f, op: AMOAND_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOAND.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x6400302f, op: AMOAND_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOAND.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x6600302f, op: AMOAND_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOAND.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x6200302f, op: AMOAND_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOAND.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x6000202f, op: AMOAND_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOAND.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x6400202f, op: AMOAND_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOAND.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x6600202f, op: AMOAND_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOAND.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x6200202f, op: AMOAND_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAXU.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xe000302f, op: AMOMAXU_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAXU.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xe400302f, op: AMOMAXU_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAXU.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xe600302f, op: AMOMAXU_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAXU.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xe200302f, op: AMOMAXU_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAXU.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xe000202f, op: AMOMAXU_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAXU.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xe400202f, op: AMOMAXU_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAXU.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xe600202f, op: AMOMAXU_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAXU.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xe200202f, op: AMOMAXU_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAX.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xa000302f, op: AMOMAX_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAX.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xa400302f, op: AMOMAX_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAX.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xa600302f, op: AMOMAX_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAX.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xa200302f, op: AMOMAX_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAX.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xa000202f, op: AMOMAX_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAX.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xa400202f, op: AMOMAX_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAX.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xa600202f, op: AMOMAX_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMAX.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xa200202f, op: AMOMAX_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMINU.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xc000302f, op: AMOMINU_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMINU.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xc400302f, op: AMOMINU_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMINU.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xc600302f, op: AMOMINU_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMINU.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xc200302f, op: AMOMINU_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMINU.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xc000202f, op: AMOMINU_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMINU.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xc400202f, op: AMOMINU_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMINU.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xc600202f, op: AMOMINU_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMINU.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0xc200202f, op: AMOMINU_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMIN.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x8000302f, op: AMOMIN_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMIN.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x8400302f, op: AMOMIN_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMIN.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x8600302f, op: AMOMIN_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMIN.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x8200302f, op: AMOMIN_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMIN.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x8000202f, op: AMOMIN_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMIN.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x8400202f, op: AMOMIN_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMIN.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x8600202f, op: AMOMIN_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOMIN.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x8200202f, op: AMOMIN_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOOR.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x4000302f, op: AMOOR_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOOR.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x4400302f, op: AMOOR_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOOR.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x4600302f, op: AMOOR_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOOR.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x4200302f, op: AMOOR_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOOR.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x4000202f, op: AMOOR_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOOR.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x4400202f, op: AMOOR_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOOR.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x4600202f, op: AMOOR_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOOR.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x4200202f, op: AMOOR_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOSWAP.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0800302f, op: AMOSWAP_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOSWAP.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0c00302f, op: AMOSWAP_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOSWAP.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0e00302f, op: AMOSWAP_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOSWAP.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0a00302f, op: AMOSWAP_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOSWAP.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0800202f, op: AMOSWAP_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOSWAP.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0c00202f, op: AMOSWAP_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOSWAP.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0e00202f, op: AMOSWAP_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOSWAP.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x0a00202f, op: AMOSWAP_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOXOR.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x2000302f, op: AMOXOR_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOXOR.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x2400302f, op: AMOXOR_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOXOR.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x2600302f, op: AMOXOR_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOXOR.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x2200302f, op: AMOXOR_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOXOR.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x2000202f, op: AMOXOR_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOXOR.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x2400202f, op: AMOXOR_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOXOR.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x2600202f, op: AMOXOR_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // AMOXOR.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x2200202f, op: AMOXOR_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, + // AMOADD.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0000302f, op: AMOADD_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOADD.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0400302f, op: AMOADD_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOADD.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0600302f, op: AMOADD_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOADD.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0200302f, op: AMOADD_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOADD.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0000202f, op: AMOADD_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOADD.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0400202f, op: AMOADD_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOADD.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0600202f, op: AMOADD_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOADD.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0200202f, op: AMOADD_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOAND.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x6000302f, op: AMOAND_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOAND.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x6400302f, op: AMOAND_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOAND.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x6600302f, op: AMOAND_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOAND.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x6200302f, op: AMOAND_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOAND.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x6000202f, op: AMOAND_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOAND.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x6400202f, op: AMOAND_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOAND.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x6600202f, op: AMOAND_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOAND.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x6200202f, op: AMOAND_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAXU.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xe000302f, op: AMOMAXU_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAXU.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xe400302f, op: AMOMAXU_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAXU.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xe600302f, op: AMOMAXU_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAXU.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xe200302f, op: AMOMAXU_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAXU.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xe000202f, op: AMOMAXU_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAXU.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xe400202f, op: AMOMAXU_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAXU.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xe600202f, op: AMOMAXU_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAXU.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xe200202f, op: AMOMAXU_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAX.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xa000302f, op: AMOMAX_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAX.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xa400302f, op: AMOMAX_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAX.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xa600302f, op: AMOMAX_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAX.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xa200302f, op: AMOMAX_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAX.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xa000202f, op: AMOMAX_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAX.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xa400202f, op: AMOMAX_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAX.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xa600202f, op: AMOMAX_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMAX.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xa200202f, op: AMOMAX_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMINU.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xc000302f, op: AMOMINU_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMINU.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xc400302f, op: AMOMINU_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMINU.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xc600302f, op: AMOMINU_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMINU.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xc200302f, op: AMOMINU_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMINU.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xc000202f, op: AMOMINU_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMINU.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xc400202f, op: AMOMINU_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMINU.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xc600202f, op: AMOMINU_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMINU.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0xc200202f, op: AMOMINU_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMIN.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x8000302f, op: AMOMIN_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMIN.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x8400302f, op: AMOMIN_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMIN.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x8600302f, op: AMOMIN_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMIN.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x8200302f, op: AMOMIN_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMIN.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x8000202f, op: AMOMIN_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMIN.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x8400202f, op: AMOMIN_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMIN.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x8600202f, op: AMOMIN_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOMIN.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x8200202f, op: AMOMIN_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOOR.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x4000302f, op: AMOOR_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOOR.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x4400302f, op: AMOOR_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOOR.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x4600302f, op: AMOOR_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOOR.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x4200302f, op: AMOOR_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOOR.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x4000202f, op: AMOOR_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOOR.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x4400202f, op: AMOOR_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOOR.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x4600202f, op: AMOOR_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOOR.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x4200202f, op: AMOOR_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOSWAP.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0800302f, op: AMOSWAP_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOSWAP.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0c00302f, op: AMOSWAP_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOSWAP.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0e00302f, op: AMOSWAP_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOSWAP.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0a00302f, op: AMOSWAP_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOSWAP.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0800202f, op: AMOSWAP_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOSWAP.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0c00202f, op: AMOSWAP_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOSWAP.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0e00202f, op: AMOSWAP_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOSWAP.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x0a00202f, op: AMOSWAP_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOXOR.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x2000302f, op: AMOXOR_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOXOR.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x2400302f, op: AMOXOR_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOXOR.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x2600302f, op: AMOXOR_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOXOR.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x2200302f, op: AMOXOR_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOXOR.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x2000202f, op: AMOXOR_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOXOR.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x2400202f, op: AMOXOR_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOXOR.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x2600202f, op: AMOXOR_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // AMOXOR.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x2200202f, op: AMOXOR_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, // AND rd, rs1, rs2 {mask: 0xfe00707f, value: 0x00007033, op: AND, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, // ANDI rd, rs1, imm12 @@ -933,6 +2246,20 @@ var instFormats = [...]instFormat{ {mask: 0xfe00707f, value: 0x28001033, op: BSET, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, // BSETI rd, rs1, shamt6 {mask: 0xfc00707f, value: 0x28001013, op: BSETI, args: argTypeList{arg_rd, arg_rs1, arg_shamt6}}, + // CBO.CLEAN rs1_ptr + {mask: 0xfff07fff, value: 0x0010200f, op: CBO_CLEAN, args: argTypeList{arg_rs1_ptr}}, + // CBO.FLUSH rs1_ptr + {mask: 0xfff07fff, value: 0x0020200f, op: CBO_FLUSH, args: argTypeList{arg_rs1_ptr}}, + // CBO.INVAL rs1_ptr + {mask: 0xfff07fff, value: 0x0000200f, op: CBO_INVAL, args: argTypeList{arg_rs1_ptr}}, + // CBO.ZERO rs1_ptr + {mask: 0xfff07fff, value: 0x0040200f, op: CBO_ZERO, args: argTypeList{arg_rs1_ptr}}, + // CLMUL rd, rs1, rs2 + {mask: 0xfe00707f, value: 0x0a001033, op: CLMUL, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, + // CLMULH rd, rs1, rs2 + {mask: 0xfe00707f, value: 0x0a003033, op: CLMULH, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, + // CLMULR rd, rs1, rs2 + {mask: 0xfe00707f, value: 0x0a002033, op: CLMULR, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, // CLZ rd, rs1 {mask: 0xfff0707f, value: 0x60001013, op: CLZ, args: argTypeList{arg_rd, arg_rs1}}, // CLZW rd, rs1 @@ -957,6 +2284,10 @@ var instFormats = [...]instFormat{ {mask: 0xfff0707f, value: 0x60101013, op: CTZ, args: argTypeList{arg_rd, arg_rs1}}, // CTZW rd, rs1 {mask: 0xfff0707f, value: 0x6010101b, op: CTZW, args: argTypeList{arg_rd, arg_rs1}}, + // CZERO.EQZ rd, rs1, rs2 + {mask: 0xfe00707f, value: 0x0e005033, op: CZERO_EQZ, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, + // CZERO.NEZ rd, rs1, rs2 + {mask: 0xfe00707f, value: 0x0e007033, op: CZERO_NEZ, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, // C.ADD rd_rs1_n0, c_rs2_n0 {mask: 0x0000f003, value: 0x00009002, op: C_ADD, args: argTypeList{arg_rd_rs1_n0, arg_c_rs2_n0}}, // C.ADDI rd_rs1_n0, c_nzimm6 @@ -1315,22 +2646,22 @@ var instFormats = [...]instFormat{ {mask: 0x0000707f, value: 0x00001003, op: LH, args: argTypeList{arg_rd, arg_rs1_mem}}, // LHU rd, rs1_mem {mask: 0x0000707f, value: 0x00005003, op: LHU, args: argTypeList{arg_rd, arg_rs1_mem}}, - // LR.D rd, rs1_amo - {mask: 0xfff0707f, value: 0x1000302f, op: LR_D, args: argTypeList{arg_rd, arg_rs1_amo}}, - // LR.D.AQ rd, rs1_amo - {mask: 0xfff0707f, value: 0x1400302f, op: LR_D_AQ, args: argTypeList{arg_rd, arg_rs1_amo}}, - // LR.D.AQRL rd, rs1_amo - {mask: 0xfff0707f, value: 0x1600302f, op: LR_D_AQRL, args: argTypeList{arg_rd, arg_rs1_amo}}, - // LR.D.RL rd, rs1_amo - {mask: 0xfff0707f, value: 0x1200302f, op: LR_D_RL, args: argTypeList{arg_rd, arg_rs1_amo}}, - // LR.W rd, rs1_amo - {mask: 0xfff0707f, value: 0x1000202f, op: LR_W, args: argTypeList{arg_rd, arg_rs1_amo}}, - // LR.W.AQ rd, rs1_amo - {mask: 0xfff0707f, value: 0x1400202f, op: LR_W_AQ, args: argTypeList{arg_rd, arg_rs1_amo}}, - // LR.W.AQRL rd, rs1_amo - {mask: 0xfff0707f, value: 0x1600202f, op: LR_W_AQRL, args: argTypeList{arg_rd, arg_rs1_amo}}, - // LR.W.RL rd, rs1_amo - {mask: 0xfff0707f, value: 0x1200202f, op: LR_W_RL, args: argTypeList{arg_rd, arg_rs1_amo}}, + // LR.D rd, rs1_ptr + {mask: 0xfff0707f, value: 0x1000302f, op: LR_D, args: argTypeList{arg_rd, arg_rs1_ptr}}, + // LR.D.AQ rd, rs1_ptr + {mask: 0xfff0707f, value: 0x1400302f, op: LR_D_AQ, args: argTypeList{arg_rd, arg_rs1_ptr}}, + // LR.D.AQRL rd, rs1_ptr + {mask: 0xfff0707f, value: 0x1600302f, op: LR_D_AQRL, args: argTypeList{arg_rd, arg_rs1_ptr}}, + // LR.D.RL rd, rs1_ptr + {mask: 0xfff0707f, value: 0x1200302f, op: LR_D_RL, args: argTypeList{arg_rd, arg_rs1_ptr}}, + // LR.W rd, rs1_ptr + {mask: 0xfff0707f, value: 0x1000202f, op: LR_W, args: argTypeList{arg_rd, arg_rs1_ptr}}, + // LR.W.AQ rd, rs1_ptr + {mask: 0xfff0707f, value: 0x1400202f, op: LR_W_AQ, args: argTypeList{arg_rd, arg_rs1_ptr}}, + // LR.W.AQRL rd, rs1_ptr + {mask: 0xfff0707f, value: 0x1600202f, op: LR_W_AQRL, args: argTypeList{arg_rd, arg_rs1_ptr}}, + // LR.W.RL rd, rs1_ptr + {mask: 0xfff0707f, value: 0x1200202f, op: LR_W_RL, args: argTypeList{arg_rd, arg_rs1_ptr}}, // LUI rd, imm20 {mask: 0x0000007f, value: 0x00000037, op: LUI, args: argTypeList{arg_rd, arg_imm20}}, // LW rd, rs1_mem @@ -1387,22 +2718,22 @@ var instFormats = [...]instFormat{ {mask: 0xfe00707f, value: 0x6000503b, op: RORW, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, // SB rs2, rs1_store {mask: 0x0000707f, value: 0x00000023, op: SB, args: argTypeList{arg_rs2, arg_rs1_store}}, - // SC.D rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x1800302f, op: SC_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // SC.D.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x1c00302f, op: SC_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // SC.D.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x1e00302f, op: SC_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // SC.D.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x1a00302f, op: SC_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // SC.W rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x1800202f, op: SC_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // SC.W.AQ rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x1c00202f, op: SC_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // SC.W.AQRL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x1e00202f, op: SC_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, - // SC.W.RL rd, rs2, rs1_amo - {mask: 0xfe00707f, value: 0x1a00202f, op: SC_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_amo}}, + // SC.D rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x1800302f, op: SC_D, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // SC.D.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x1c00302f, op: SC_D_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // SC.D.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x1e00302f, op: SC_D_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // SC.D.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x1a00302f, op: SC_D_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // SC.W rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x1800202f, op: SC_W, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // SC.W.AQ rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x1c00202f, op: SC_W_AQ, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // SC.W.AQRL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x1e00202f, op: SC_W_AQRL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, + // SC.W.RL rd, rs2, rs1_ptr + {mask: 0xfe00707f, value: 0x1a00202f, op: SC_W_RL, args: argTypeList{arg_rd, arg_rs2, arg_rs1_ptr}}, // SD rs2, rs1_store {mask: 0x0000707f, value: 0x00003023, op: SD, args: argTypeList{arg_rs2, arg_rs1_store}}, // SEXT.B rd, rs1 @@ -1463,6 +2794,1302 @@ var instFormats = [...]instFormat{ {mask: 0xfe00707f, value: 0x4000003b, op: SUBW, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, // SW rs2, rs1_store {mask: 0x0000707f, value: 0x00002023, op: SW, args: argTypeList{arg_rs2, arg_rs1_store}}, + // VAADDU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x20002057, op: VAADDU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VAADDU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x20006057, op: VAADDU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VAADD.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x24002057, op: VAADD_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VAADD.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x24006057, op: VAADD_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VAESDF.VS vs2, vd + {mask: 0xfe0ff07f, value: 0xa600a077, op: VAESDF_VS, args: argTypeList{arg_vs2, arg_vd}}, + // VAESDF.VV vs2, vd + {mask: 0xfe0ff07f, value: 0xa200a077, op: VAESDF_VV, args: argTypeList{arg_vs2, arg_vd}}, + // VAESDM.VS vs2, vd + {mask: 0xfe0ff07f, value: 0xa6002077, op: VAESDM_VS, args: argTypeList{arg_vs2, arg_vd}}, + // VAESDM.VV vs2, vd + {mask: 0xfe0ff07f, value: 0xa2002077, op: VAESDM_VV, args: argTypeList{arg_vs2, arg_vd}}, + // VAESEF.VS vs2, vd + {mask: 0xfe0ff07f, value: 0xa601a077, op: VAESEF_VS, args: argTypeList{arg_vs2, arg_vd}}, + // VAESEF.VV vs2, vd + {mask: 0xfe0ff07f, value: 0xa201a077, op: VAESEF_VV, args: argTypeList{arg_vs2, arg_vd}}, + // VAESEM.VS vs2, vd + {mask: 0xfe0ff07f, value: 0xa6012077, op: VAESEM_VS, args: argTypeList{arg_vs2, arg_vd}}, + // VAESEM.VV vs2, vd + {mask: 0xfe0ff07f, value: 0xa2012077, op: VAESEM_VV, args: argTypeList{arg_vs2, arg_vd}}, + // VAESKF1.VI vs2, zimm, vd + {mask: 0xfe00707f, value: 0x8a002077, op: VAESKF1_VI, args: argTypeList{arg_vs2, arg_zimm, arg_vd}}, + // VAESKF2.VI vs2, zimm, vd + {mask: 0xfe00707f, value: 0xaa002077, op: VAESKF2_VI, args: argTypeList{arg_vs2, arg_zimm, arg_vd}}, + // VAESZ.VS vs2, vd + {mask: 0xfe0ff07f, value: 0xa603a077, op: VAESZ_VS, args: argTypeList{arg_vs2, arg_vd}}, + // VGHSH.VV vs2, vs1, vd + {mask: 0xfe00707f, value: 0xb2002077, op: VGHSH_VV, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VGMUL.VV vs2, vd + {mask: 0xfe0ff07f, value: 0xa208a077, op: VGMUL_VV, args: argTypeList{arg_vs2, arg_vd}}, + // VSHA2CH.VV vs2, vs1, vd + {mask: 0xfe00707f, value: 0xba002077, op: VSHA2CH_VV, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VSHA2CL.VV vs2, vs1, vd + {mask: 0xfe00707f, value: 0xbe002077, op: VSHA2CL_VV, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VSHA2MS.VV vs2, vs1, vd + {mask: 0xfe00707f, value: 0xb6002077, op: VSHA2MS_VV, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VSM3C.VI vs2, zimm, vd + {mask: 0xfe00707f, value: 0xae002077, op: VSM3C_VI, args: argTypeList{arg_vs2, arg_zimm, arg_vd}}, + // VSM3ME.VV vs2, vs1, vd + {mask: 0xfe00707f, value: 0x82002077, op: VSM3ME_VV, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VSM4K.VI vs2, zimm, vd + {mask: 0xfe00707f, value: 0x86002077, op: VSM4K_VI, args: argTypeList{arg_vs2, arg_zimm, arg_vd}}, + // VSM4R.VS vs2, vd + {mask: 0xfe0ff07f, value: 0xa6082077, op: VSM4R_VS, args: argTypeList{arg_vs2, arg_vd}}, + // VSM4R.VV vs2, vd + {mask: 0xfe0ff07f, value: 0xa2082077, op: VSM4R_VV, args: argTypeList{arg_vs2, arg_vd}}, + // VADC.VIM vs2, simm5, vd + {mask: 0xfe00707f, value: 0x40003057, op: VADC_VIM, args: argTypeList{arg_vs2, arg_simm5, arg_vd}}, + // VADC.VVM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x40000057, op: VADC_VVM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VADC.VXM vs2, rs1, vd + {mask: 0xfe00707f, value: 0x40004057, op: VADC_VXM, args: argTypeList{arg_vs2, arg_rs1, arg_vd}}, + // VADD.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x00003057, op: VADD_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VADD.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x00000057, op: VADD_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VADD.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x00004057, op: VADD_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VAND.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x24003057, op: VAND_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VAND.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x24000057, op: VAND_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VAND.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x24004057, op: VAND_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VASUBU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x28002057, op: VASUBU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VASUBU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x28006057, op: VASUBU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VASUB.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x2c002057, op: VASUB_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VASUB.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x2c006057, op: VASUB_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VCOMPRESS.VM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x5e002057, op: VCOMPRESS_VM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VCPOP.M vm, vs2, rd + {mask: 0xfc0ff07f, value: 0x40082057, op: VCPOP_M, args: argTypeList{arg_vm, arg_vs2, arg_rd}}, + // VDIVU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x80002057, op: VDIVU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VDIVU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x80006057, op: VDIVU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VDIV.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x84002057, op: VDIV_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VDIV.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x84006057, op: VDIV_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VFADD.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x00005057, op: VFADD_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFADD.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x00001057, op: VFADD_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFCLASS.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x4c081057, op: VFCLASS_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFCVT.F.XU.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48011057, op: VFCVT_F_XU_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFCVT.F.X.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48019057, op: VFCVT_F_X_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFCVT.RTZ.XU.F.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48031057, op: VFCVT_RTZ_XU_F_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFCVT.RTZ.X.F.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48039057, op: VFCVT_RTZ_X_F_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFCVT.XU.F.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48001057, op: VFCVT_XU_F_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFCVT.X.F.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48009057, op: VFCVT_X_F_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFDIV.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x80005057, op: VFDIV_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFDIV.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x80001057, op: VFDIV_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFIRST.M vm, vs2, rd + {mask: 0xfc0ff07f, value: 0x4008a057, op: VFIRST_M, args: argTypeList{arg_vm, arg_vs2, arg_rd}}, + // VFMACC.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xb0005057, op: VFMACC_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFMACC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xb0001057, op: VFMACC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFMADD.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xa0005057, op: VFMADD_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFMADD.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xa0001057, op: VFMADD_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFMAX.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x18005057, op: VFMAX_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFMAX.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x18001057, op: VFMAX_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFMERGE.VFM vs2, fs1, vd + {mask: 0xfe00707f, value: 0x5c005057, op: VFMERGE_VFM, args: argTypeList{arg_vs2, arg_fs1, arg_vd}}, + // VFMIN.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x10005057, op: VFMIN_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFMIN.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x10001057, op: VFMIN_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFMSAC.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xb8005057, op: VFMSAC_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFMSAC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xb8001057, op: VFMSAC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFMSUB.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xa8005057, op: VFMSUB_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFMSUB.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xa8001057, op: VFMSUB_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFMUL.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x90005057, op: VFMUL_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFMUL.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x90001057, op: VFMUL_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFMV.F.S vs2, fd + {mask: 0xfe0ff07f, value: 0x42001057, op: VFMV_F_S, args: argTypeList{arg_vs2, arg_fd}}, + // VFMV.S.F fs1, vd + {mask: 0xfff0707f, value: 0x42005057, op: VFMV_S_F, args: argTypeList{arg_fs1, arg_vd}}, + // VFMV.V.F fs1, vd + {mask: 0xfff0707f, value: 0x5e005057, op: VFMV_V_F, args: argTypeList{arg_fs1, arg_vd}}, + // VFNCVT.F.F.W vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x480a1057, op: VFNCVT_F_F_W, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFNCVT.F.XU.W vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48091057, op: VFNCVT_F_XU_W, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFNCVT.F.X.W vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48099057, op: VFNCVT_F_X_W, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFNCVT.ROD.F.F.W vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x480a9057, op: VFNCVT_ROD_F_F_W, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFNCVT.RTZ.XU.F.W vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x480b1057, op: VFNCVT_RTZ_XU_F_W, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFNCVT.RTZ.X.F.W vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x480b9057, op: VFNCVT_RTZ_X_F_W, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFNCVT.XU.F.W vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48081057, op: VFNCVT_XU_F_W, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFNCVT.X.F.W vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48089057, op: VFNCVT_X_F_W, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFNMACC.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xb4005057, op: VFNMACC_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFNMACC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xb4001057, op: VFNMACC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFNMADD.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xa4005057, op: VFNMADD_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFNMADD.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xa4001057, op: VFNMADD_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFNMSAC.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xbc005057, op: VFNMSAC_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFNMSAC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xbc001057, op: VFNMSAC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFNMSUB.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xac005057, op: VFNMSUB_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFNMSUB.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xac001057, op: VFNMSUB_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFRDIV.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x84005057, op: VFRDIV_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFREC7.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x4c029057, op: VFREC7_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFREDMAX.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x1c001057, op: VFREDMAX_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFREDMIN.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x14001057, op: VFREDMIN_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFREDOSUM.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x0c001057, op: VFREDOSUM_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFREDUSUM.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x04001057, op: VFREDUSUM_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFRSQRT7.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x4c021057, op: VFRSQRT7_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFRSUB.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x9c005057, op: VFRSUB_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFSGNJN.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x24005057, op: VFSGNJN_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFSGNJN.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x24001057, op: VFSGNJN_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFSGNJX.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x28005057, op: VFSGNJX_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFSGNJX.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x28001057, op: VFSGNJX_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFSGNJ.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x20005057, op: VFSGNJ_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFSGNJ.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x20001057, op: VFSGNJ_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFSLIDE1DOWN.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x3c005057, op: VFSLIDE1DOWN_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFSLIDE1UP.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x38005057, op: VFSLIDE1UP_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFSQRT.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x4c001057, op: VFSQRT_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFSUB.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x08005057, op: VFSUB_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFSUB.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x08001057, op: VFSUB_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWADD.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xc0005057, op: VFWADD_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFWADD.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xc0001057, op: VFWADD_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWADD.WF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xd0005057, op: VFWADD_WF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFWADD.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xd0001057, op: VFWADD_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWCVT.F.F.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48061057, op: VFWCVT_F_F_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFWCVT.F.XU.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48051057, op: VFWCVT_F_XU_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFWCVT.F.X.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48059057, op: VFWCVT_F_X_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFWCVT.RTZ.XU.F.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48071057, op: VFWCVT_RTZ_XU_F_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFWCVT.RTZ.X.F.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48079057, op: VFWCVT_RTZ_X_F_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFWCVT.XU.F.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48041057, op: VFWCVT_XU_F_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFWCVT.X.F.V vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48049057, op: VFWCVT_X_F_V, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VFWMACC.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xf0005057, op: VFWMACC_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFWMACC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xf0001057, op: VFWMACC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWMSAC.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xf8005057, op: VFWMSAC_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFWMSAC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xf8001057, op: VFWMSAC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWMUL.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xe0005057, op: VFWMUL_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFWMUL.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xe0001057, op: VFWMUL_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWNMACC.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xf4005057, op: VFWNMACC_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFWNMACC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xf4001057, op: VFWNMACC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWNMSAC.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xfc005057, op: VFWNMSAC_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFWNMSAC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xfc001057, op: VFWNMSAC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWREDOSUM.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xcc001057, op: VFWREDOSUM_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWREDUSUM.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xc4001057, op: VFWREDUSUM_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWSUB.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xc8005057, op: VFWSUB_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFWSUB.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xc8001057, op: VFWSUB_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VFWSUB.WF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0xd8005057, op: VFWSUB_WF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VFWSUB.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xd8001057, op: VFWSUB_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VID.V vm, vd + {mask: 0xfdfff07f, value: 0x5008a057, op: VID_V, args: argTypeList{arg_vm, arg_vd}}, + // VIOTA.M vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x50082057, op: VIOTA_M, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VL1RE16.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x02805007, op: VL1RE16_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL1RE32.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x02806007, op: VL1RE32_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL1RE64.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x02807007, op: VL1RE64_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL1RE8.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x02800007, op: VL1RE8_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL2RE16.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x22805007, op: VL2RE16_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL2RE32.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x22806007, op: VL2RE32_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL2RE64.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x22807007, op: VL2RE64_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL2RE8.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x22800007, op: VL2RE8_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL4RE16.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x62805007, op: VL4RE16_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL4RE32.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x62806007, op: VL4RE32_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL4RE64.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x62807007, op: VL4RE64_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL4RE8.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x62800007, op: VL4RE8_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL8RE16.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0xe2805007, op: VL8RE16_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL8RE32.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0xe2806007, op: VL8RE32_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL8RE64.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0xe2807007, op: VL8RE64_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VL8RE8.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0xe2800007, op: VL8RE8_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VLE16FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x01005007, op: VLE16FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLE16.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x00005007, op: VLE16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLE32FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x01006007, op: VLE32FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLE32.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x00006007, op: VLE32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLE64FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x01007007, op: VLE64FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLE64.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x00007007, op: VLE64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLE8FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x01000007, op: VLE8FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLE8.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x00000007, op: VLE8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLM.V rs1_ptr, vd + {mask: 0xfff0707f, value: 0x02b00007, op: VLM_V, args: argTypeList{arg_rs1_ptr, arg_vd}}, + // VLOXEI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x0c005007, op: VLOXEI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXEI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x0c006007, op: VLOXEI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXEI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x0c007007, op: VLOXEI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXEI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x0c000007, op: VLOXEI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG2EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x2c005007, op: VLOXSEG2EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG2EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x2c006007, op: VLOXSEG2EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG2EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x2c007007, op: VLOXSEG2EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG2EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x2c000007, op: VLOXSEG2EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG3EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x4c005007, op: VLOXSEG3EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG3EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x4c006007, op: VLOXSEG3EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG3EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x4c007007, op: VLOXSEG3EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG3EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x4c000007, op: VLOXSEG3EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG4EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x6c005007, op: VLOXSEG4EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG4EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x6c006007, op: VLOXSEG4EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG4EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x6c007007, op: VLOXSEG4EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG4EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x6c000007, op: VLOXSEG4EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG5EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x8c005007, op: VLOXSEG5EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG5EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x8c006007, op: VLOXSEG5EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG5EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x8c007007, op: VLOXSEG5EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG5EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x8c000007, op: VLOXSEG5EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG6EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xac005007, op: VLOXSEG6EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG6EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xac006007, op: VLOXSEG6EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG6EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xac007007, op: VLOXSEG6EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG6EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xac000007, op: VLOXSEG6EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG7EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xcc005007, op: VLOXSEG7EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG7EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xcc006007, op: VLOXSEG7EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG7EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xcc007007, op: VLOXSEG7EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG7EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xcc000007, op: VLOXSEG7EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG8EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xec005007, op: VLOXSEG8EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG8EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xec006007, op: VLOXSEG8EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG8EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xec007007, op: VLOXSEG8EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLOXSEG8EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xec000007, op: VLOXSEG8EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLSE16.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x08005007, op: VLSE16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSE32.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x08006007, op: VLSE32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSE64.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x08007007, op: VLSE64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSE8.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x08000007, op: VLSE8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSEG2E16FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x21005007, op: VLSEG2E16FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG2E16.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x20005007, op: VLSEG2E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG2E32FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x21006007, op: VLSEG2E32FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG2E32.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x20006007, op: VLSEG2E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG2E64FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x21007007, op: VLSEG2E64FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG2E64.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x20007007, op: VLSEG2E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG2E8FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x21000007, op: VLSEG2E8FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG2E8.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x20000007, op: VLSEG2E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG3E16FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x41005007, op: VLSEG3E16FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG3E16.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x40005007, op: VLSEG3E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG3E32FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x41006007, op: VLSEG3E32FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG3E32.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x40006007, op: VLSEG3E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG3E64FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x41007007, op: VLSEG3E64FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG3E64.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x40007007, op: VLSEG3E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG3E8FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x41000007, op: VLSEG3E8FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG3E8.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x40000007, op: VLSEG3E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG4E16FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x61005007, op: VLSEG4E16FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG4E16.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x60005007, op: VLSEG4E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG4E32FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x61006007, op: VLSEG4E32FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG4E32.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x60006007, op: VLSEG4E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG4E64FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x61007007, op: VLSEG4E64FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG4E64.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x60007007, op: VLSEG4E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG4E8FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x61000007, op: VLSEG4E8FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG4E8.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x60000007, op: VLSEG4E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG5E16FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x81005007, op: VLSEG5E16FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG5E16.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x80005007, op: VLSEG5E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG5E32FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x81006007, op: VLSEG5E32FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG5E32.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x80006007, op: VLSEG5E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG5E64FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x81007007, op: VLSEG5E64FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG5E64.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x80007007, op: VLSEG5E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG5E8FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x81000007, op: VLSEG5E8FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG5E8.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0x80000007, op: VLSEG5E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG6E16FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xa1005007, op: VLSEG6E16FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG6E16.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xa0005007, op: VLSEG6E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG6E32FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xa1006007, op: VLSEG6E32FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG6E32.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xa0006007, op: VLSEG6E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG6E64FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xa1007007, op: VLSEG6E64FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG6E64.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xa0007007, op: VLSEG6E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG6E8FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xa1000007, op: VLSEG6E8FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG6E8.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xa0000007, op: VLSEG6E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG7E16FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xc1005007, op: VLSEG7E16FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG7E16.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xc0005007, op: VLSEG7E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG7E32FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xc1006007, op: VLSEG7E32FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG7E32.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xc0006007, op: VLSEG7E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG7E64FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xc1007007, op: VLSEG7E64FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG7E64.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xc0007007, op: VLSEG7E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG7E8FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xc1000007, op: VLSEG7E8FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG7E8.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xc0000007, op: VLSEG7E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG8E16FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xe1005007, op: VLSEG8E16FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG8E16.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xe0005007, op: VLSEG8E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG8E32FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xe1006007, op: VLSEG8E32FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG8E32.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xe0006007, op: VLSEG8E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG8E64FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xe1007007, op: VLSEG8E64FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG8E64.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xe0007007, op: VLSEG8E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG8E8FF.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xe1000007, op: VLSEG8E8FF_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSEG8E8.V vm, rs1_ptr, vd + {mask: 0xfdf0707f, value: 0xe0000007, op: VLSEG8E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vd}}, + // VLSSEG2E16.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x28005007, op: VLSSEG2E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG2E32.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x28006007, op: VLSSEG2E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG2E64.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x28007007, op: VLSSEG2E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG2E8.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x28000007, op: VLSSEG2E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG3E16.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x48005007, op: VLSSEG3E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG3E32.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x48006007, op: VLSSEG3E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG3E64.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x48007007, op: VLSSEG3E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG3E8.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x48000007, op: VLSSEG3E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG4E16.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x68005007, op: VLSSEG4E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG4E32.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x68006007, op: VLSSEG4E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG4E64.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x68007007, op: VLSSEG4E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG4E8.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x68000007, op: VLSSEG4E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG5E16.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x88005007, op: VLSSEG5E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG5E32.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x88006007, op: VLSSEG5E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG5E64.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x88007007, op: VLSSEG5E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG5E8.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x88000007, op: VLSSEG5E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG6E16.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xa8005007, op: VLSSEG6E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG6E32.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xa8006007, op: VLSSEG6E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG6E64.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xa8007007, op: VLSSEG6E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG6E8.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xa8000007, op: VLSSEG6E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG7E16.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xc8005007, op: VLSSEG7E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG7E32.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xc8006007, op: VLSSEG7E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG7E64.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xc8007007, op: VLSSEG7E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG7E8.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xc8000007, op: VLSSEG7E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG8E16.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xe8005007, op: VLSSEG8E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG8E32.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xe8006007, op: VLSSEG8E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG8E64.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xe8007007, op: VLSSEG8E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLSSEG8E8.V vm, rs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xe8000007, op: VLSSEG8E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vd}}, + // VLUXEI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x04005007, op: VLUXEI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXEI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x04006007, op: VLUXEI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXEI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x04007007, op: VLUXEI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXEI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x04000007, op: VLUXEI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG2EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x24005007, op: VLUXSEG2EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG2EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x24006007, op: VLUXSEG2EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG2EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x24007007, op: VLUXSEG2EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG2EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x24000007, op: VLUXSEG2EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG3EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x44005007, op: VLUXSEG3EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG3EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x44006007, op: VLUXSEG3EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG3EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x44007007, op: VLUXSEG3EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG3EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x44000007, op: VLUXSEG3EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG4EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x64005007, op: VLUXSEG4EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG4EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x64006007, op: VLUXSEG4EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG4EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x64007007, op: VLUXSEG4EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG4EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x64000007, op: VLUXSEG4EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG5EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x84005007, op: VLUXSEG5EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG5EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x84006007, op: VLUXSEG5EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG5EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x84007007, op: VLUXSEG5EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG5EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0x84000007, op: VLUXSEG5EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG6EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xa4005007, op: VLUXSEG6EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG6EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xa4006007, op: VLUXSEG6EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG6EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xa4007007, op: VLUXSEG6EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG6EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xa4000007, op: VLUXSEG6EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG7EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xc4005007, op: VLUXSEG7EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG7EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xc4006007, op: VLUXSEG7EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG7EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xc4007007, op: VLUXSEG7EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG7EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xc4000007, op: VLUXSEG7EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG8EI16.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xe4005007, op: VLUXSEG8EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG8EI32.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xe4006007, op: VLUXSEG8EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG8EI64.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xe4007007, op: VLUXSEG8EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VLUXSEG8EI8.V vm, vs2, rs1_ptr, vd + {mask: 0xfc00707f, value: 0xe4000007, op: VLUXSEG8EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vd}}, + // VMACC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xb4002057, op: VMACC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMACC.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xb4006057, op: VMACC_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMADC.VI vs2, simm5, vd + {mask: 0xfe00707f, value: 0x46003057, op: VMADC_VI, args: argTypeList{arg_vs2, arg_simm5, arg_vd}}, + // VMADC.VIM vs2, simm5, vd + {mask: 0xfe00707f, value: 0x44003057, op: VMADC_VIM, args: argTypeList{arg_vs2, arg_simm5, arg_vd}}, + // VMADC.VV vs2, vs1, vd + {mask: 0xfe00707f, value: 0x46000057, op: VMADC_VV, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMADC.VVM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x44000057, op: VMADC_VVM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMADC.VX vs2, rs1, vd + {mask: 0xfe00707f, value: 0x46004057, op: VMADC_VX, args: argTypeList{arg_vs2, arg_rs1, arg_vd}}, + // VMADC.VXM vs2, rs1, vd + {mask: 0xfe00707f, value: 0x44004057, op: VMADC_VXM, args: argTypeList{arg_vs2, arg_rs1, arg_vd}}, + // VMADD.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xa4002057, op: VMADD_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMADD.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xa4006057, op: VMADD_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMANDN.MM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x62002057, op: VMANDN_MM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMAND.MM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x66002057, op: VMAND_MM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMAXU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x18000057, op: VMAXU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMAXU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x18004057, op: VMAXU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMAX.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x1c000057, op: VMAX_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMAX.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x1c004057, op: VMAX_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMERGE.VIM vs2, simm5, vd + {mask: 0xfe00707f, value: 0x5c003057, op: VMERGE_VIM, args: argTypeList{arg_vs2, arg_simm5, arg_vd}}, + // VMERGE.VVM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x5c000057, op: VMERGE_VVM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMERGE.VXM vs2, rs1, vd + {mask: 0xfe00707f, value: 0x5c004057, op: VMERGE_VXM, args: argTypeList{arg_vs2, arg_rs1, arg_vd}}, + // VMFEQ.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x60005057, op: VMFEQ_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VMFEQ.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x60001057, op: VMFEQ_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMFGE.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x7c005057, op: VMFGE_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VMFGT.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x74005057, op: VMFGT_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VMFLE.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x64005057, op: VMFLE_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VMFLE.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x64001057, op: VMFLE_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMFLT.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x6c005057, op: VMFLT_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VMFLT.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x6c001057, op: VMFLT_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMFNE.VF vm, vs2, fs1, vd + {mask: 0xfc00707f, value: 0x70005057, op: VMFNE_VF, args: argTypeList{arg_vm, arg_vs2, arg_fs1, arg_vd}}, + // VMFNE.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x70001057, op: VMFNE_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMINU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x10000057, op: VMINU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMINU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x10004057, op: VMINU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMIN.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x14000057, op: VMIN_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMIN.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x14004057, op: VMIN_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMNAND.MM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x76002057, op: VMNAND_MM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMNOR.MM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x7a002057, op: VMNOR_MM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMORN.MM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x72002057, op: VMORN_MM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMOR.MM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x6a002057, op: VMOR_MM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMSBC.VV vs2, vs1, vd + {mask: 0xfe00707f, value: 0x4e000057, op: VMSBC_VV, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMSBC.VVM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x4c000057, op: VMSBC_VVM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMSBC.VX vs2, rs1, vd + {mask: 0xfe00707f, value: 0x4e004057, op: VMSBC_VX, args: argTypeList{arg_vs2, arg_rs1, arg_vd}}, + // VMSBC.VXM vs2, rs1, vd + {mask: 0xfe00707f, value: 0x4c004057, op: VMSBC_VXM, args: argTypeList{arg_vs2, arg_rs1, arg_vd}}, + // VMSBF.M vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x5000a057, op: VMSBF_M, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VMSEQ.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x60003057, op: VMSEQ_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VMSEQ.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x60000057, op: VMSEQ_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMSEQ.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x60004057, op: VMSEQ_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMSGTU.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x78003057, op: VMSGTU_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VMSGTU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x78004057, op: VMSGTU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMSGT.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x7c003057, op: VMSGT_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VMSGT.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x7c004057, op: VMSGT_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMSIF.M vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x5001a057, op: VMSIF_M, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VMSLEU.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x70003057, op: VMSLEU_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VMSLEU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x70000057, op: VMSLEU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMSLEU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x70004057, op: VMSLEU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMSLE.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x74003057, op: VMSLE_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VMSLE.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x74000057, op: VMSLE_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMSLE.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x74004057, op: VMSLE_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMSLTU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x68000057, op: VMSLTU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMSLTU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x68004057, op: VMSLTU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMSLT.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x6c000057, op: VMSLT_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMSLT.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x6c004057, op: VMSLT_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMSNE.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x64003057, op: VMSNE_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VMSNE.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x64000057, op: VMSNE_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMSNE.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x64004057, op: VMSNE_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMSOF.M vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x50012057, op: VMSOF_M, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VMULHSU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x98002057, op: VMULHSU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMULHSU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x98006057, op: VMULHSU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMULHU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x90002057, op: VMULHU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMULHU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x90006057, op: VMULHU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMULH.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x9c002057, op: VMULH_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMULH.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x9c006057, op: VMULH_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMUL.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x94002057, op: VMUL_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VMUL.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x94006057, op: VMUL_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VMV1R.V vs2, vd + {mask: 0xfe0ff07f, value: 0x9e003057, op: VMV1R_V, args: argTypeList{arg_vs2, arg_vd}}, + // VMV2R.V vs2, vd + {mask: 0xfe0ff07f, value: 0x9e00b057, op: VMV2R_V, args: argTypeList{arg_vs2, arg_vd}}, + // VMV4R.V vs2, vd + {mask: 0xfe0ff07f, value: 0x9e01b057, op: VMV4R_V, args: argTypeList{arg_vs2, arg_vd}}, + // VMV8R.V vs2, vd + {mask: 0xfe0ff07f, value: 0x9e03b057, op: VMV8R_V, args: argTypeList{arg_vs2, arg_vd}}, + // VMV.S.X rs1, vd + {mask: 0xfff0707f, value: 0x42006057, op: VMV_S_X, args: argTypeList{arg_rs1, arg_vd}}, + // VMV.V.I simm5, vd + {mask: 0xfff0707f, value: 0x5e003057, op: VMV_V_I, args: argTypeList{arg_simm5, arg_vd}}, + // VMV.V.V vs1, vd + {mask: 0xfff0707f, value: 0x5e000057, op: VMV_V_V, args: argTypeList{arg_vs1, arg_vd}}, + // VMV.V.X rs1, vd + {mask: 0xfff0707f, value: 0x5e004057, op: VMV_V_X, args: argTypeList{arg_rs1, arg_vd}}, + // VMV.X.S vs2, rd + {mask: 0xfe0ff07f, value: 0x42002057, op: VMV_X_S, args: argTypeList{arg_vs2, arg_rd}}, + // VMXNOR.MM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x7e002057, op: VMXNOR_MM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VMXOR.MM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x6e002057, op: VMXOR_MM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VNCLIPU.WI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0xb8003057, op: VNCLIPU_WI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VNCLIPU.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xb8000057, op: VNCLIPU_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VNCLIPU.WX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xb8004057, op: VNCLIPU_WX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VNCLIP.WI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0xbc003057, op: VNCLIP_WI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VNCLIP.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xbc000057, op: VNCLIP_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VNCLIP.WX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xbc004057, op: VNCLIP_WX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VNMSAC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xbc002057, op: VNMSAC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VNMSAC.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xbc006057, op: VNMSAC_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VNMSUB.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xac002057, op: VNMSUB_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VNMSUB.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xac006057, op: VNMSUB_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VNSRA.WI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0xb4003057, op: VNSRA_WI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VNSRA.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xb4000057, op: VNSRA_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VNSRA.WX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xb4004057, op: VNSRA_WX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VNSRL.WI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0xb0003057, op: VNSRL_WI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VNSRL.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xb0000057, op: VNSRL_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VNSRL.WX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xb0004057, op: VNSRL_WX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VOR.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x28003057, op: VOR_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VOR.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x28000057, op: VOR_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VOR.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x28004057, op: VOR_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VREDAND.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x04002057, op: VREDAND_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREDMAXU.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x18002057, op: VREDMAXU_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREDMAX.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x1c002057, op: VREDMAX_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREDMINU.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x10002057, op: VREDMINU_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREDMIN.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x14002057, op: VREDMIN_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREDOR.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x08002057, op: VREDOR_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREDSUM.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x00002057, op: VREDSUM_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREDXOR.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x0c002057, op: VREDXOR_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREMU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x88002057, op: VREMU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREMU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x88006057, op: VREMU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VREM.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x8c002057, op: VREM_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VREM.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x8c006057, op: VREM_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VRGATHEREI16.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x38000057, op: VRGATHEREI16_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VRGATHER.VI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0x30003057, op: VRGATHER_VI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VRGATHER.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x30000057, op: VRGATHER_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VRGATHER.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x30004057, op: VRGATHER_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VRSUB.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x0c003057, op: VRSUB_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VRSUB.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x0c004057, op: VRSUB_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VS1R.V rs1_ptr, vs3 + {mask: 0xfff0707f, value: 0x02800027, op: VS1R_V, args: argTypeList{arg_rs1_ptr, arg_vs3}}, + // VS2R.V rs1_ptr, vs3 + {mask: 0xfff0707f, value: 0x22800027, op: VS2R_V, args: argTypeList{arg_rs1_ptr, arg_vs3}}, + // VS4R.V rs1_ptr, vs3 + {mask: 0xfff0707f, value: 0x62800027, op: VS4R_V, args: argTypeList{arg_rs1_ptr, arg_vs3}}, + // VS8R.V rs1_ptr, vs3 + {mask: 0xfff0707f, value: 0xe2800027, op: VS8R_V, args: argTypeList{arg_rs1_ptr, arg_vs3}}, + // VSADDU.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x80003057, op: VSADDU_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VSADDU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x80000057, op: VSADDU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSADDU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x80004057, op: VSADDU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSADD.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x84003057, op: VSADD_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VSADD.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x84000057, op: VSADD_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSADD.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x84004057, op: VSADD_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSBC.VVM vs2, vs1, vd + {mask: 0xfe00707f, value: 0x48000057, op: VSBC_VVM, args: argTypeList{arg_vs2, arg_vs1, arg_vd}}, + // VSBC.VXM vs2, rs1, vd + {mask: 0xfe00707f, value: 0x48004057, op: VSBC_VXM, args: argTypeList{arg_vs2, arg_rs1, arg_vd}}, + // VSE16.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x00005027, op: VSE16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSE32.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x00006027, op: VSE32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSE64.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x00007027, op: VSE64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSE8.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x00000027, op: VSE8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSETIVLI vtype_zimm10, zimm, rd + {mask: 0xc000707f, value: 0xc0007057, op: VSETIVLI, args: argTypeList{arg_vtype_zimm10, arg_zimm, arg_rd}}, + // VSETVL rs2, rs1, rd + {mask: 0xfe00707f, value: 0x80007057, op: VSETVL, args: argTypeList{arg_rs2, arg_rs1, arg_rd}}, + // VSETVLI vtype_zimm11, rs1, rd + {mask: 0x8000707f, value: 0x00007057, op: VSETVLI, args: argTypeList{arg_vtype_zimm11, arg_rs1, arg_rd}}, + // VSEXT.VF2 vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x4803a057, op: VSEXT_VF2, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VSEXT.VF4 vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x4802a057, op: VSEXT_VF4, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VSEXT.VF8 vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x4801a057, op: VSEXT_VF8, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VSLIDE1DOWN.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x3c006057, op: VSLIDE1DOWN_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSLIDE1UP.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x38006057, op: VSLIDE1UP_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSLIDEDOWN.VI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0x3c003057, op: VSLIDEDOWN_VI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VSLIDEDOWN.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x3c004057, op: VSLIDEDOWN_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSLIDEUP.VI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0x38003057, op: VSLIDEUP_VI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VSLIDEUP.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x38004057, op: VSLIDEUP_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSLL.VI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0x94003057, op: VSLL_VI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VSLL.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x94000057, op: VSLL_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSLL.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x94004057, op: VSLL_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSMUL.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x9c000057, op: VSMUL_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSMUL.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x9c004057, op: VSMUL_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSM.V rs1_ptr, vs3 + {mask: 0xfff0707f, value: 0x02b00027, op: VSM_V, args: argTypeList{arg_rs1_ptr, arg_vs3}}, + // VSOXEI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x0c005027, op: VSOXEI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXEI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x0c006027, op: VSOXEI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXEI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x0c007027, op: VSOXEI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXEI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x0c000027, op: VSOXEI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG2EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x2c005027, op: VSOXSEG2EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG2EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x2c006027, op: VSOXSEG2EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG2EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x2c007027, op: VSOXSEG2EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG2EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x2c000027, op: VSOXSEG2EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG3EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x4c005027, op: VSOXSEG3EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG3EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x4c006027, op: VSOXSEG3EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG3EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x4c007027, op: VSOXSEG3EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG3EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x4c000027, op: VSOXSEG3EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG4EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x6c005027, op: VSOXSEG4EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG4EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x6c006027, op: VSOXSEG4EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG4EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x6c007027, op: VSOXSEG4EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG4EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x6c000027, op: VSOXSEG4EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG5EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x8c005027, op: VSOXSEG5EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG5EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x8c006027, op: VSOXSEG5EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG5EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x8c007027, op: VSOXSEG5EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG5EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x8c000027, op: VSOXSEG5EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG6EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xac005027, op: VSOXSEG6EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG6EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xac006027, op: VSOXSEG6EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG6EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xac007027, op: VSOXSEG6EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG6EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xac000027, op: VSOXSEG6EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG7EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xcc005027, op: VSOXSEG7EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG7EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xcc006027, op: VSOXSEG7EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG7EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xcc007027, op: VSOXSEG7EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG7EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xcc000027, op: VSOXSEG7EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG8EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xec005027, op: VSOXSEG8EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG8EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xec006027, op: VSOXSEG8EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG8EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xec007027, op: VSOXSEG8EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSOXSEG8EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xec000027, op: VSOXSEG8EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSRA.VI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0xa4003057, op: VSRA_VI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VSRA.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xa4000057, op: VSRA_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSRA.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xa4004057, op: VSRA_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSRL.VI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0xa0003057, op: VSRL_VI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VSRL.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xa0000057, op: VSRL_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSRL.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xa0004057, op: VSRL_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSSE16.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x08005027, op: VSSE16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSE32.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x08006027, op: VSSE32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSE64.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x08007027, op: VSSE64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSE8.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x08000027, op: VSSE8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSEG2E16.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x20005027, op: VSSEG2E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG2E32.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x20006027, op: VSSEG2E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG2E64.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x20007027, op: VSSEG2E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG2E8.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x20000027, op: VSSEG2E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG3E16.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x40005027, op: VSSEG3E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG3E32.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x40006027, op: VSSEG3E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG3E64.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x40007027, op: VSSEG3E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG3E8.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x40000027, op: VSSEG3E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG4E16.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x60005027, op: VSSEG4E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG4E32.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x60006027, op: VSSEG4E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG4E64.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x60007027, op: VSSEG4E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG4E8.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x60000027, op: VSSEG4E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG5E16.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x80005027, op: VSSEG5E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG5E32.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x80006027, op: VSSEG5E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG5E64.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x80007027, op: VSSEG5E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG5E8.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0x80000027, op: VSSEG5E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG6E16.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xa0005027, op: VSSEG6E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG6E32.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xa0006027, op: VSSEG6E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG6E64.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xa0007027, op: VSSEG6E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG6E8.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xa0000027, op: VSSEG6E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG7E16.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xc0005027, op: VSSEG7E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG7E32.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xc0006027, op: VSSEG7E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG7E64.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xc0007027, op: VSSEG7E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG7E8.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xc0000027, op: VSSEG7E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG8E16.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xe0005027, op: VSSEG8E16_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG8E32.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xe0006027, op: VSSEG8E32_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG8E64.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xe0007027, op: VSSEG8E64_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSEG8E8.V vm, rs1_ptr, vs3 + {mask: 0xfdf0707f, value: 0xe0000027, op: VSSEG8E8_V, args: argTypeList{arg_vm, arg_rs1_ptr, arg_vs3}}, + // VSSRA.VI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0xac003057, op: VSSRA_VI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VSSRA.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xac000057, op: VSSRA_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSSRA.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xac004057, op: VSSRA_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSSRL.VI vm, vs2, zimm5, vd + {mask: 0xfc00707f, value: 0xa8003057, op: VSSRL_VI, args: argTypeList{arg_vm, arg_vs2, arg_zimm5, arg_vd}}, + // VSSRL.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xa8000057, op: VSSRL_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSSRL.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xa8004057, op: VSSRL_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSSSEG2E16.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x28005027, op: VSSSEG2E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG2E32.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x28006027, op: VSSSEG2E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG2E64.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x28007027, op: VSSSEG2E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG2E8.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x28000027, op: VSSSEG2E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG3E16.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x48005027, op: VSSSEG3E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG3E32.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x48006027, op: VSSSEG3E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG3E64.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x48007027, op: VSSSEG3E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG3E8.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x48000027, op: VSSSEG3E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG4E16.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x68005027, op: VSSSEG4E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG4E32.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x68006027, op: VSSSEG4E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG4E64.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x68007027, op: VSSSEG4E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG4E8.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x68000027, op: VSSSEG4E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG5E16.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x88005027, op: VSSSEG5E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG5E32.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x88006027, op: VSSSEG5E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG5E64.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x88007027, op: VSSSEG5E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG5E8.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x88000027, op: VSSSEG5E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG6E16.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xa8005027, op: VSSSEG6E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG6E32.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xa8006027, op: VSSSEG6E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG6E64.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xa8007027, op: VSSSEG6E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG6E8.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xa8000027, op: VSSSEG6E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG7E16.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xc8005027, op: VSSSEG7E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG7E32.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xc8006027, op: VSSSEG7E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG7E64.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xc8007027, op: VSSSEG7E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG7E8.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xc8000027, op: VSSSEG7E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG8E16.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xe8005027, op: VSSSEG8E16_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG8E32.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xe8006027, op: VSSSEG8E32_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG8E64.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xe8007027, op: VSSSEG8E64_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSSEG8E8.V vm, rs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xe8000027, op: VSSSEG8E8_V, args: argTypeList{arg_vm, arg_rs2, arg_rs1_ptr, arg_vs3}}, + // VSSUBU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x88000057, op: VSSUBU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSSUBU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x88004057, op: VSSUBU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSSUB.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x8c000057, op: VSSUB_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSSUB.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x8c004057, op: VSSUB_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSUB.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x08000057, op: VSUB_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VSUB.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x08004057, op: VSUB_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VSUXEI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x04005027, op: VSUXEI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXEI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x04006027, op: VSUXEI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXEI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x04007027, op: VSUXEI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXEI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x04000027, op: VSUXEI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG2EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x24005027, op: VSUXSEG2EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG2EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x24006027, op: VSUXSEG2EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG2EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x24007027, op: VSUXSEG2EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG2EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x24000027, op: VSUXSEG2EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG3EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x44005027, op: VSUXSEG3EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG3EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x44006027, op: VSUXSEG3EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG3EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x44007027, op: VSUXSEG3EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG3EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x44000027, op: VSUXSEG3EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG4EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x64005027, op: VSUXSEG4EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG4EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x64006027, op: VSUXSEG4EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG4EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x64007027, op: VSUXSEG4EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG4EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x64000027, op: VSUXSEG4EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG5EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x84005027, op: VSUXSEG5EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG5EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x84006027, op: VSUXSEG5EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG5EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x84007027, op: VSUXSEG5EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG5EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0x84000027, op: VSUXSEG5EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG6EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xa4005027, op: VSUXSEG6EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG6EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xa4006027, op: VSUXSEG6EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG6EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xa4007027, op: VSUXSEG6EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG6EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xa4000027, op: VSUXSEG6EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG7EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xc4005027, op: VSUXSEG7EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG7EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xc4006027, op: VSUXSEG7EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG7EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xc4007027, op: VSUXSEG7EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG7EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xc4000027, op: VSUXSEG7EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG8EI16.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xe4005027, op: VSUXSEG8EI16_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG8EI32.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xe4006027, op: VSUXSEG8EI32_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG8EI64.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xe4007027, op: VSUXSEG8EI64_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VSUXSEG8EI8.V vm, vs2, rs1_ptr, vs3 + {mask: 0xfc00707f, value: 0xe4000027, op: VSUXSEG8EI8_V, args: argTypeList{arg_vm, arg_vs2, arg_rs1_ptr, arg_vs3}}, + // VWADDU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xc0002057, op: VWADDU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWADDU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xc0006057, op: VWADDU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWADDU.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xd0002057, op: VWADDU_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWADDU.WX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xd0006057, op: VWADDU_WX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWADD.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xc4002057, op: VWADD_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWADD.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xc4006057, op: VWADD_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWADD.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xd4002057, op: VWADD_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWADD.WX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xd4006057, op: VWADD_WX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWMACCSU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xfc002057, op: VWMACCSU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWMACCSU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xfc006057, op: VWMACCSU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWMACCUS.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xf8006057, op: VWMACCUS_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWMACCU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xf0002057, op: VWMACCU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWMACCU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xf0006057, op: VWMACCU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWMACC.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xf4002057, op: VWMACC_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWMACC.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xf4006057, op: VWMACC_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWMULSU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xe8002057, op: VWMULSU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWMULSU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xe8006057, op: VWMULSU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWMULU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xe0002057, op: VWMULU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWMULU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xe0006057, op: VWMULU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWMUL.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xec002057, op: VWMUL_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWMUL.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xec006057, op: VWMUL_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWREDSUMU.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xc0000057, op: VWREDSUMU_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWREDSUM.VS vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xc4000057, op: VWREDSUM_VS, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWSUBU.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xc8002057, op: VWSUBU_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWSUBU.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xc8006057, op: VWSUBU_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWSUBU.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xd8002057, op: VWSUBU_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWSUBU.WX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xd8006057, op: VWSUBU_WX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWSUB.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xcc002057, op: VWSUB_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWSUB.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xcc006057, op: VWSUB_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VWSUB.WV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0xdc002057, op: VWSUB_WV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VWSUB.WX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0xdc006057, op: VWSUB_WX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VXOR.VI vm, vs2, simm5, vd + {mask: 0xfc00707f, value: 0x2c003057, op: VXOR_VI, args: argTypeList{arg_vm, arg_vs2, arg_simm5, arg_vd}}, + // VXOR.VV vm, vs2, vs1, vd + {mask: 0xfc00707f, value: 0x2c000057, op: VXOR_VV, args: argTypeList{arg_vm, arg_vs2, arg_vs1, arg_vd}}, + // VXOR.VX vm, vs2, rs1, vd + {mask: 0xfc00707f, value: 0x2c004057, op: VXOR_VX, args: argTypeList{arg_vm, arg_vs2, arg_rs1, arg_vd}}, + // VZEXT.VF2 vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48032057, op: VZEXT_VF2, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VZEXT.VF4 vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48022057, op: VZEXT_VF4, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, + // VZEXT.VF8 vm, vs2, vd + {mask: 0xfc0ff07f, value: 0x48012057, op: VZEXT_VF8, args: argTypeList{arg_vm, arg_vs2, arg_vd}}, // XNOR rd, rs1, rs2 {mask: 0xfe00707f, value: 0x40004033, op: XNOR, args: argTypeList{arg_rd, arg_rs1, arg_rs2}}, // XOR rd, rs1, rs2 diff --git a/vendor/golang.org/x/arch/riscv64/riscv64asm/vector.go b/vendor/golang.org/x/arch/riscv64/riscv64asm/vector.go new file mode 100644 index 0000000000..ee370c795b --- /dev/null +++ b/vendor/golang.org/x/arch/riscv64/riscv64asm/vector.go @@ -0,0 +1,142 @@ +// Copyright 2025 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package riscv64asm + +// This file contains some utility functions that can be used to decode +// vector instructions into both gnu and plan9 assembly. + +func implicitMask(instOp Op) bool { + switch instOp { + case VADC_VIM, VADC_VVM, VADC_VXM, VFMERGE_VFM, VMADC_VIM, VMADC_VVM, + VMADC_VXM, VMERGE_VIM, VMERGE_VVM, VMERGE_VXM, VMSBC_VVM, VMSBC_VXM, + VSBC_VVM, VSBC_VXM: + return true + + default: + return false + } +} + +func imaOrFma(instOp Op) bool { + switch instOp { + case VFMACC_VF, VFMACC_VV, VFMADD_VF, VFMADD_VV, VFMSAC_VF, VFMSAC_VV, + VFMSUB_VF, VFMSUB_VV, VFNMACC_VF, VFNMACC_VV, VFNMADD_VF, VFNMADD_VV, + VFNMSAC_VF, VFNMSAC_VV, VFNMSUB_VF, VFNMSUB_VV, VFWMACC_VF, VFWMACC_VV, + VFWMSAC_VF, VFWMSAC_VV, VFWNMACC_VF, VFWNMACC_VV, VFWNMSAC_VF, + VFWNMSAC_VV, VMACC_VV, VMACC_VX, VMADD_VV, VMADD_VX, VNMSAC_VV, + VNMSAC_VX, VNMSUB_VV, VNMSUB_VX, VWMACCSU_VV, VWMACCSU_VX, VWMACCUS_VX, + VWMACCU_VV, VWMACCU_VX, VWMACC_VV, VWMACC_VX: + return true + + default: + return false + } +} + +func pseudoRVVLoad(instOp Op) string { + switch instOp { + case VL1RE8_V: + return "VL1R.V" + + case VL2RE8_V: + return "VL2R.V" + + case VL4RE8_V: + return "VL4R.V" + + case VL8RE8_V: + return "VL8R.V" + } + + return "" +} + +func pseudoRVVArith(instOp Op, rawArgs []Arg, args []string) (string, []string) { + var op string + + switch instOp { + case VRSUB_VX: + if v, ok := rawArgs[1].(Reg); ok && v == X0 { + op = "VNEG.V" + args = append(args[:1], args[2:]...) + } + + case VWADD_VX: + if v, ok := rawArgs[1].(Reg); ok && v == X0 { + op = "VWCVT.X.X.V" + args = append(args[:1], args[2:]...) + } + + case VWADDU_VX: + if v, ok := rawArgs[1].(Reg); ok && v == X0 { + op = "VWCVTU.X.X.V" + args = append(args[:1], args[2:]...) + } + + case VXOR_VI: + if v, ok := rawArgs[1].(Simm); ok && v.Imm == -1 { + op = "VNOT.V" + args = append(args[:1], args[2:]...) + } + + case VNSRL_WX: + if v, ok := rawArgs[1].(Reg); ok && v == X0 { + op = "VNCVT.X.X.W" + args = append(args[:1], args[2:]...) + } + + case VFSGNJN_VV: + vs2, ok1 := rawArgs[0].(Reg) + vs1, ok2 := rawArgs[1].(Reg) + if ok1 && ok2 && vs1 == vs2 { + op = "VFNEG.V" + args = args[1:] + } + + case VFSGNJX_VV: + vs2, ok1 := rawArgs[0].(Reg) + vs1, ok2 := rawArgs[1].(Reg) + if ok1 && ok2 && vs1 == vs2 { + op = "VFABS.V" + args = args[1:] + } + + case VMAND_MM: + vs2, ok1 := rawArgs[0].(Reg) + vs1, ok2 := rawArgs[1].(Reg) + if ok1 && ok2 && vs1 == vs2 { + op = "VMMV.M" + args = args[1:] + } + + case VMXOR_MM: + vs2, ok1 := rawArgs[0].(Reg) + vs1, ok2 := rawArgs[1].(Reg) + vd, ok3 := rawArgs[2].(Reg) + if ok1 && ok2 && ok3 && vs1 == vs2 && vd == vs1 { + op = "VMCLR.M" + args = args[2:] + } + + case VMXNOR_MM: + vs2, ok1 := rawArgs[0].(Reg) + vs1, ok2 := rawArgs[1].(Reg) + vd, ok3 := rawArgs[2].(Reg) + if ok1 && ok2 && ok3 && vs1 == vs2 && vd == vs1 { + op = "VMSET.M" + args = args[2:] + } + + case VMNAND_MM: + vs2, ok1 := rawArgs[0].(Reg) + vs1, ok2 := rawArgs[1].(Reg) + if ok1 && ok2 && vs1 == vs2 { + op = "VMNOT.M" + args = args[1:] + } + } + + return op, args +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/avx.go b/vendor/golang.org/x/arch/x86/x86asm/avx.go new file mode 100644 index 0000000000..148f72bf2d --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/avx.go @@ -0,0 +1,653 @@ +// Copyright 2026 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +package x86asm + +import ( + "encoding/binary" + "errors" +) + +// This file contains the handling of AVX instructions, based on +// tables (avx_tables.go) generated from the XED data. + +//go:generate go run _gen/genavx.go -o avx_tables.go + +// decodeAVX decodes AVX/AVX2/AVX-512 instructions. +// It is called from decode1 when a VEX or EVEX prefix is detected. +func decodeAVX(src []byte, pos int, vex Prefix, vexIndex int, inst Inst, mode int) (Inst, error) { + var vexP, vexL, vexW uint8 + var mapSelect uint8 + var vvvv uint8 + var vexR, vexX, vexB uint8 // Inverted from VEX/EVEX + var evex bool + var evexR_prime, evexV_prime uint8 // Inverted + var evex_aaa, evex_z uint8 + var evex_b uint8 + + vexR = 1 + vexX = 1 + vexB = 1 // Default to 1 (inactive inverted) + evexR_prime = 1 + evexV_prime = 1 + + if vex == 0xC5 { // 2-byte VEX + b1 := uint8(inst.Prefix[vexIndex+1]) + vexR = (b1 >> 7) & 1 + vvvv = (b1 >> 3) & 0xF + vexL = (b1 >> 2) & 1 + vexP = b1 & 3 + mapSelect = 1 // 0F + } else if vex == 0xC4 { // 3-byte VEX + b1 := uint8(inst.Prefix[vexIndex+1]) + b2 := uint8(inst.Prefix[vexIndex+2]) + vexR = (b1 >> 7) & 1 + vexX = (b1 >> 6) & 1 + vexB = (b1 >> 5) & 1 + mapSelect = b1 & 0x1F + + vexW = (b2 >> 7) & 1 + vvvv = (b2 >> 3) & 0xF + vexL = (b2 >> 2) & 1 + vexP = b2 & 3 + } else if vex == 0x62 { // EVEX + evex = true + b1 := uint8(inst.Prefix[vexIndex+1]) + b2 := uint8(inst.Prefix[vexIndex+2]) + b3 := uint8(inst.Prefix[vexIndex+3]) + + vexR = (b1 >> 7) & 1 + vexX = (b1 >> 6) & 1 + vexB = (b1 >> 5) & 1 + evexR_prime = (b1 >> 4) & 1 + mapSelect = b1 & 3 + + vexW = (b2 >> 7) & 1 + vvvv = (b2 >> 3) & 0xF + vexP = b2 & 3 + + evex_z = (b3 >> 7) & 1 + vexL = (b3 >> 5) & 3 + evex_b = (b3 >> 4) & 1 + evexV_prime = (b3 >> 3) & 1 + evex_aaa = b3 & 7 + } + + _ = evex_z // TODO: use zeroing mask if needed for output + + opbyte := src[pos] + pos++ + + var candidates []*avxOptab + switch mapSelect { + case 1: + candidates = avxMap0F[opbyte] + case 2: + candidates = avxMap0F38[opbyte] + case 3: + candidates = avxMap0F3A[opbyte] + } + + if len(candidates) == 0 { + return inst, errors.New("unknown AVX Opcode") + } + + var modrm uint8 + var haveModRM bool + if pos < len(src) { + modrm = src[pos] + haveModRM = true + } + + var match *avxOptab + + for i := range candidates { + c := candidates[i] + if evex != c.evex { + continue + } + c_vexP := c.vexP + p_match := false + switch c_vexP { + case 0: + p_match = vexP == 0 + case 1: + p_match = vexP == 1 + case 2: + p_match = vexP == 3 + case 3: + p_match = vexP == 2 + } + if !p_match { + continue + } + + match_vexL := vexL + if evex && evex_b != 0 && haveModRM && (modrm>>6) == 3 { + hasZmm := false + for j := range candidates { + if candidates[j].evex == c.evex && candidates[j].vexP == c.vexP && candidates[j].vexW == c.vexW && candidates[j].vexL == 2 { + hasZmm = true + break + } + } + if hasZmm { + match_vexL = 2 + } else { + match_vexL = 0 + } + } + if c.vexL != match_vexL { + continue + } + if c.vexW != vexW { + continue + } + + if haveModRM { + mod := modrm >> 6 + reg := (modrm >> 3) & 7 + if c.opdigit != -1 && reg != uint8(c.opdigit) { + continue + } + if c.ismem == 1 && mod == 3 { + continue + } + if c.ismem == 0 && mod != 3 { + continue + } + } + match = c + break + } + + if match == nil { + return Inst{Len: 1}, ErrUnrecognized + } + + inst.Op = match.op + + var mod, reg, rm uint8 + var sib uint8 + var haveSIB bool + var mem Mem + var addrMode = mode + + if haveModRM { + mod = modrm >> 6 + reg = (modrm >> 3) & 7 + rm = modrm & 7 + pos++ + + if mod != 3 && rm == 4 { + if pos >= len(src) { + return inst, errors.New("truncated") + } + sib = src[pos] + haveSIB = true + pos++ + } + + var disp int64 + if mod == 0 && (rm == 5 || (haveSIB && (sib&7) == 5)) || mod == 2 { + if pos+4 > len(src) { + return inst, errors.New("truncated") + } + disp = int64(int32(binary.LittleEndian.Uint32(src[pos:]))) + pos += 4 + } else if mod == 1 { + if pos >= len(src) { + return inst, errors.New("truncated") + } + disp = int64(int8(src[pos])) + pos++ + if evex && match.dispScale > 0 { + scale := match.dispScale + if evex_b != 0 && match.bcstScale > 0 { + scale = match.bcstScale + } + disp *= int64(scale) + } + } + mem.Disp = disp + + if haveSIB { + scale := sib >> 6 + index := (sib >> 3) & 7 + base := sib & 7 + + if vexX == 0 { + index |= 8 + } + if vexB == 0 { + base |= 8 + } + + mem.Scale = 1 << uint(scale) + if index != 4 { + mem.Index = baseRegForBits(addrMode) + Reg(index) + } + if base&7 != 5 || mod != 0 { + mem.Base = baseRegForBits(addrMode) + Reg(base) + } + } else { + if vexB == 0 { + rm |= 8 + } + + if mod != 3 { + if !(mod == 0 && rm&7 == 5) { + mem.Base = baseRegForBits(addrMode) + Reg(rm) + } + } + } + } + + // Decode Args + for i, argType := range match.args { + if argType == argNone { + continue + } + var arg Arg + + switch argType { + case argImm8: + if pos >= len(src) { + return inst, errors.New("truncated") + } + arg = Imm(src[pos]) + pos++ + case argImm8u: + if pos >= len(src) { + return inst, errors.New("truncated") + } + arg = Imm(src[pos]) + pos++ + case argXmm_SE, argYmm_SE: + if pos >= len(src) { + return inst, errors.New("truncated") + } + idx := (src[pos] >> 4) & 0xF + if argType == argXmm_SE { + arg = X0 + Reg(idx) + } else { + arg = Y0 + Reg(idx) + } + pos++ + case argGPR_R, argGPR32_R, argGPR64_R: + idx := reg + if vexR == 0 { + idx |= 8 + } + base := baseRegForBits(mode) + if argType == argGPR32_R { + base = EAX + } else if argType == argGPR64_R { + base = RAX + } + arg = base + Reg(idx) + case argGPR_N, argGPR32_N, argGPR64_N: + idx := ^vvvv & 15 // 1s complement + base := baseRegForBits(mode) + if argType == argGPR32_N { + base = EAX + } else if argType == argGPR64_N { + base = RAX + } else if vexW == 1 { + base = RAX + } + arg = base + Reg(idx) + case argGPR_B, argGPR32_B, argGPR64_B: + idx := rm + if vexB == 0 { + idx |= 8 + } + base := baseRegForBits(mode) + if argType == argGPR32_B { + base = EAX + } else if argType == argGPR64_B { + base = RAX + } + arg = base + Reg(idx) + // VEX/EVEX encoding uses inverted bits for register specifiers (0 means bit is set). + case argXmm_R, argXmmEvex_R: + idx := reg + if vexR == 0 { + idx |= 8 + } + if evex && evexR_prime == 0 { + idx |= 16 + } + arg = X0 + Reg(idx) + case argXmm_B, argXmmEvex_B: + idx := rm + if vexB == 0 { + idx |= 8 + } + if evex && vexX == 0 { + idx |= 16 + } + arg = X0 + Reg(idx) + case argXmm_N, argXmmEvex_N: + idx := 15 - vvvv + if evex && evexV_prime == 0 { + idx |= 16 + } + arg = X0 + Reg(idx) + case argYmm_R, argYmmEvex_R: + idx := reg + if vexR == 0 { + idx |= 8 + } + if evex && evexR_prime == 0 { + idx |= 16 + } + arg = Y0 + Reg(idx) + case argYmm_B, argYmmEvex_B: + idx := rm + if vexB == 0 { + idx |= 8 + } + if evex && vexX == 0 { + idx |= 16 + } + arg = Y0 + Reg(idx) + case argYmm_N, argYmmEvex_N: + idx := 15 - vvvv + if evex && evexV_prime == 0 { + idx |= 16 + } + arg = Y0 + Reg(idx) + case argZmm_R: + vl := vexL + if evex && evex_b != 0 && match.ismem == 0 { + vl = 2 // RC / SAE implies 512-bit vector length + } + idx := reg + if vexR == 0 { + idx |= 8 + } + if evexR_prime == 0 { + idx |= 16 + } + if vl == 0 { + arg = X0 + Reg(idx) + } else if vl == 1 { + arg = Y0 + Reg(idx) + } else { + arg = Z0 + Reg(idx) + } + case argZmm_B: + vl := vexL + if evex && evex_b != 0 && match.ismem == 0 { + vl = 2 + } + if match.ismem != 0 { + arg = mem + } else { + idx := rm + if vexB == 0 { + idx |= 8 + } + if vexX == 0 { + idx |= 16 + } + if vl == 0 { + arg = X0 + Reg(idx) + } else if vl == 1 { + arg = Y0 + Reg(idx) + } else { + arg = Z0 + Reg(idx) + } + } + case argZmm_N: + vl := vexL + if evex && evex_b != 0 && match.ismem == 0 { + vl = 2 + } + idx := 15 - vvvv + if evexV_prime == 0 { + idx |= 16 + } + if vl == 0 { + arg = X0 + Reg(idx) + } else if vl == 1 { + arg = Y0 + Reg(idx) + } else { + arg = Z0 + Reg(idx) + } + case argK_R: + arg = K0 + Reg(reg&7) + case argK_B: + arg = K0 + Reg(rm&7) + case argK_N: + arg = K0 + Reg((15-vvvv)&7) + case argKmask: + if evex_aaa != 0 { + arg = K0 + Reg(evex_aaa) + } + case argKnot0: + if evex_aaa == 0 { + return inst, errors.New("k0 mask not allowed") + } + arg = K0 + Reg(evex_aaa) + case argM: + arg = mem + } + + if arg != nil { + inst.Args[i] = arg + } + } + + n := 0 + for i := range len(inst.Args) { + if inst.Args[i] != nil { + if n != i { + inst.Args[n] = inst.Args[i] + inst.Args[i] = nil + } + n++ + } + } + inst.MemBytes = int(match.memBytes) + if inst.MemBytes == 0 && match.ismem != 0 && match.dispScale != 0 { + inst.MemBytes = int(match.dispScale) + } + if evex { + inst.Zeroing = evex_z != 0 + if evex_b != 0 { + if match.bcstScale > 0 { + inst.Broadcast = true + inst.MemBytes = int(match.bcstScale) + } else if match.ismem == 0 { + inst.SAE = true + inst.Rounding = int8(vexL) + } + } + } + inst.Len = pos + + if match.vsib && haveSIB { + fixVSIB(&inst, vexL, evex, evexV_prime, vexX, sib) + } + + return inst, nil +} + +// fixVSIB calculates the correct vector register size based on data and index element sizes. +func fixVSIB(inst *Inst, vexL uint8, evex bool, evexV_prime uint8, vexX uint8, sib uint8) { + var indexElemBits, dataElemBits int + switch inst.Op { + case VPGATHERDD, VGATHERDPS, VPSCATTERDD, VSCATTERDPS: + indexElemBits = 32 + dataElemBits = 32 + case VPGATHERDQ, VGATHERDPD, VPSCATTERDQ, VSCATTERDPD: + indexElemBits = 32 + dataElemBits = 64 + case VPGATHERQD, VGATHERQPS, VPSCATTERQD, VSCATTERQPS: + indexElemBits = 64 + dataElemBits = 32 + case VPGATHERQQ, VGATHERQPD, VPSCATTERQQ, VSCATTERQPD: + indexElemBits = 64 + dataElemBits = 64 + case VGATHERPF0DPS, VGATHERPF1DPS, VSCATTERPF0DPS, VSCATTERPF1DPS: + indexElemBits = 32 + dataElemBits = 32 + case VGATHERPF0DPD, VGATHERPF1DPD, VSCATTERPF0DPD, VSCATTERPF1DPD: + indexElemBits = 32 + dataElemBits = 64 + case VGATHERPF0QPS, VGATHERPF1QPS, VSCATTERPF0QPS, VSCATTERPF1QPS: + indexElemBits = 64 + dataElemBits = 32 + case VGATHERPF0QPD, VGATHERPF1QPD, VSCATTERPF0QPD, VSCATTERPF1QPD: + indexElemBits = 64 + dataElemBits = 64 + default: + return + } + + maxBits := 128 << vexL + + var destBits, indexVectorBits int + if indexElemBits > dataElemBits { + indexVectorBits = maxBits + numElements := indexVectorBits / indexElemBits + destBits = numElements * dataElemBits + } else if dataElemBits > indexElemBits { + destBits = maxBits + numElements := destBits / dataElemBits + indexVectorBits = numElements * indexElemBits + } else { + indexVectorBits = maxBits + destBits = maxBits + } + + // Override MemBytes to match objdump's output expectation (memory accessed is based on dest size) + inst.MemBytes = destBits / 8 + + if indexVectorBits < 128 { + indexVectorBits = 128 + } + + var baseReg Reg + switch indexVectorBits { + case 128: + baseReg = X0 + case 256: + baseReg = Y0 + case 512: + baseReg = Z0 + default: + baseReg = X0 + } + + for i, arg := range inst.Args { + if mem, ok := arg.(Mem); ok { + idx := (sib >> 3) & 7 + if vexX == 0 { + idx |= 8 + } + if evex && evexV_prime == 0 { + idx |= 16 + } + mem.Index = baseReg + Reg(idx) + inst.Args[i] = mem + break + } + } +} + +// argType defines how to decode an argument. +// It corresponds to the arg type notation in XED. +type argType uint8 + +const ( + argNone argType = iota + argImm8 + argImm8u + argImm16 + argImm32 + argImm64 + + // GPRs + argGPR_R // ModRM.reg (default mode size) + argGPR_B // ModRM.rm (default mode size) + argGPR_N // VEX.vvvv (default mode size) + argGPR32_R // ModRM.reg (32-bit forced) + argGPR32_B // ModRM.rm (32-bit forced) + argGPR32_N // VEX.vvvv (32-bit forced) + argGPR64_R // ModRM.reg (64-bit forced) + argGPR64_B // ModRM.rm (64-bit forced) + argGPR64_N // VEX.vvvv (64-bit forced) + + // XMM + argXmm_R + argXmm_B + argXmm_N + argXmmEvex_R + argXmmEvex_B + argXmmEvex_N + argXmm_SE // is4 immediate + + // YMM + argYmm_R + argYmm_B + argYmm_N + argYmmEvex_R + argYmmEvex_B + argYmmEvex_N + argYmm_SE + + // ZMM + argZmm_R + argZmm_B + argZmm_N + + // Mask + argK_R + argK_B + argK_N + + argM // Memory operand (ModRM.rm) + argKnot0 // Mask register k1-k7 + argKmask // Mask register k0-k7 +) + +// hasRC returns true if the instruction supports static rounding control in AVX-512. +func hasRC(op Op) bool { + switch op { + case VADDPD, VADDPS, VADDSD, VADDSS, + VSUBPD, VSUBPS, VSUBSD, VSUBSS, + VMULPD, VMULPS, VMULSD, VMULSS, + VDIVPD, VDIVPS, VDIVSD, VDIVSS, + VSQRTPD, VSQRTPS, VSQRTSD, VSQRTSS, + VSCALEFPD, VSCALEFPS, VSCALEFSD, VSCALEFSS, + VFMADD132PD, VFMADD132PS, VFMADD132SD, VFMADD132SS, + VFMADD213PD, VFMADD213PS, VFMADD213SD, VFMADD213SS, + VFMADD231PD, VFMADD231PS, VFMADD231SD, VFMADD231SS, + VFMSUB132PD, VFMSUB132PS, VFMSUB132SD, VFMSUB132SS, + VFMSUB213PD, VFMSUB213PS, VFMSUB213SD, VFMSUB213SS, + VFMSUB231PD, VFMSUB231PS, VFMSUB231SD, VFMSUB231SS, + VFNMADD132PD, VFNMADD132PS, VFNMADD132SD, VFNMADD132SS, + VFNMADD213PD, VFNMADD213PS, VFNMADD213SD, VFNMADD213SS, + VFNMADD231PD, VFNMADD231PS, VFNMADD231SD, VFNMADD231SS, + VFNMSUB132PD, VFNMSUB132PS, VFNMSUB132SD, VFNMSUB132SS, + VFNMSUB213PD, VFNMSUB213PS, VFNMSUB213SD, VFNMSUB213SS, + VFNMSUB231PD, VFNMSUB231PS, VFNMSUB231SD, VFNMSUB231SS, + VFMADDSUB132PD, VFMADDSUB132PS, VFMADDSUB213PD, VFMADDSUB213PS, + VFMADDSUB231PD, VFMADDSUB231PS, VFMSUBADD132PD, VFMSUBADD132PS, + VFMSUBADD213PD, VFMSUBADD213PS, VFMSUBADD231PD, VFMSUBADD231PS, + VCVTPS2DQ, VCVTPD2DQ, VCVTPS2UDQ, VCVTPD2UDQ, + VCVTPS2QQ, VCVTPD2QQ, VCVTPS2UQQ, VCVTPD2UQQ, + VCVTUDQ2PS, VCVTUDQ2PD, VCVTQQ2PS, VCVTQQ2PD, + VCVTUQQ2PS, VCVTUQQ2PD, VCVTDQ2PS, VCVTDQ2PD, + VCVTPS2PD, VCVTPD2PS, VCVTSS2SD, VCVTSD2SS, + VCVTUSI2SS, VCVTUSI2SD, VCVTSI2SS, VCVTSI2SD, + VCVTSS2USI, VCVTSD2USI, VCVTSS2SI, VCVTSD2SI, + VPERMT2PD, VPERMT2PS, VPERMI2PD, VPERMI2PS: + return true + } + return false +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/avx_tables.go b/vendor/golang.org/x/arch/x86/x86asm/avx_tables.go new file mode 100644 index 0000000000..f68bd54fcf --- /dev/null +++ b/vendor/golang.org/x/arch/x86/x86asm/avx_tables.go @@ -0,0 +1,7382 @@ +// Code generated by genavx. DO NOT EDIT. + +package x86asm + +const ( + _ Op = iota + maxNonAVXOp + KADDB + KADDD + KADDQ + KADDW + KANDB + KANDD + KANDNB + KANDND + KANDNQ + KANDNW + KANDQ + KANDW + KMOVB + KMOVD + KMOVQ + KMOVW + KNOTB + KNOTD + KNOTQ + KNOTW + KORB + KORD + KORQ + KORTESTB + KORTESTD + KORTESTQ + KORTESTW + KORW + KSHIFTLB + KSHIFTLD + KSHIFTLQ + KSHIFTLW + KSHIFTRB + KSHIFTRD + KSHIFTRQ + KSHIFTRW + KTESTB + KTESTD + KTESTQ + KTESTW + KUNPCKBW + KUNPCKDQ + KUNPCKWD + KXNORB + KXNORD + KXNORQ + KXNORW + KXORB + KXORD + KXORQ + KXORW + V4FMADDPS + V4FMADDSS + V4FNMADDPS + V4FNMADDSS + VADDBF16 + VADDPD + VADDPH + VADDPS + VADDSD + VADDSH + VADDSS + VADDSUBPD + VADDSUBPS + VAESDEC + VAESDECLAST + VAESENC + VAESENCLAST + VAESIMC + VAESKEYGENASSIST + VALIGND + VALIGNQ + VANDNPD + VANDNPS + VANDPD + VANDPS + VBCSTNEBF162PS + VBCSTNESH2PS + VBLENDMPD + VBLENDMPS + VBLENDPD + VBLENDPS + VBLENDVPD + VBLENDVPS + VBROADCASTF128 + VBROADCASTF32X2 + VBROADCASTF32X4 + VBROADCASTF32X8 + VBROADCASTF64X2 + VBROADCASTF64X4 + VBROADCASTI128 + VBROADCASTI32X2 + VBROADCASTI32X4 + VBROADCASTI32X8 + VBROADCASTI64X2 + VBROADCASTI64X4 + VBROADCASTSD + VBROADCASTSS + VCMPBF16 + VCMPPD + VCMPPH + VCMPPS + VCMPSD + VCMPSH + VCMPSS + VCOMISBF16 + VCOMISD + VCOMISH + VCOMISS + VCOMPRESSPD + VCOMPRESSPS + VCOMXSD + VCOMXSH + VCOMXSS + VCVT2PH2BF8 + VCVT2PH2BF8S + VCVT2PH2HF8 + VCVT2PH2HF8S + VCVT2PS2PHX + VCVTBF162IBS + VCVTBF162IUBS + VCVTBIASPH2BF8 + VCVTBIASPH2BF8S + VCVTBIASPH2HF8 + VCVTBIASPH2HF8S + VCVTDQ2PD + VCVTDQ2PH + VCVTDQ2PS + VCVTHF82PH + VCVTNE2PS2BF16 + VCVTNEEBF162PS + VCVTNEEPH2PS + VCVTNEOBF162PS + VCVTNEOPH2PS + VCVTNEPS2BF16 + VCVTPD2DQ + VCVTPD2PH + VCVTPD2PS + VCVTPD2QQ + VCVTPD2UDQ + VCVTPD2UQQ + VCVTPH2BF8 + VCVTPH2BF8S + VCVTPH2DQ + VCVTPH2HF8 + VCVTPH2HF8S + VCVTPH2IBS + VCVTPH2IUBS + VCVTPH2PD + VCVTPH2PS + VCVTPH2PSX + VCVTPH2QQ + VCVTPH2UDQ + VCVTPH2UQQ + VCVTPH2UW + VCVTPH2W + VCVTPS2DQ + VCVTPS2IBS + VCVTPS2IUBS + VCVTPS2PD + VCVTPS2PH + VCVTPS2PHX + VCVTPS2QQ + VCVTPS2UDQ + VCVTPS2UQQ + VCVTQQ2PD + VCVTQQ2PH + VCVTQQ2PS + VCVTSD2SH + VCVTSD2SI + VCVTSD2SS + VCVTSD2USI + VCVTSH2SD + VCVTSH2SI + VCVTSH2SS + VCVTSH2USI + VCVTSI2SD + VCVTSI2SH + VCVTSI2SS + VCVTSS2SD + VCVTSS2SH + VCVTSS2SI + VCVTSS2USI + VCVTTBF162IBS + VCVTTBF162IUBS + VCVTTPD2DQ + VCVTTPD2DQS + VCVTTPD2QQ + VCVTTPD2QQS + VCVTTPD2UDQ + VCVTTPD2UDQS + VCVTTPD2UQQ + VCVTTPD2UQQS + VCVTTPH2DQ + VCVTTPH2IBS + VCVTTPH2IUBS + VCVTTPH2QQ + VCVTTPH2UDQ + VCVTTPH2UQQ + VCVTTPH2UW + VCVTTPH2W + VCVTTPS2DQ + VCVTTPS2DQS + VCVTTPS2IBS + VCVTTPS2IUBS + VCVTTPS2QQ + VCVTTPS2QQS + VCVTTPS2UDQ + VCVTTPS2UDQS + VCVTTPS2UQQ + VCVTTPS2UQQS + VCVTTSD2SI + VCVTTSD2SIS + VCVTTSD2USI + VCVTTSD2USIS + VCVTTSH2SI + VCVTTSH2USI + VCVTTSS2SI + VCVTTSS2SIS + VCVTTSS2USI + VCVTTSS2USIS + VCVTUDQ2PD + VCVTUDQ2PH + VCVTUDQ2PS + VCVTUQQ2PD + VCVTUQQ2PH + VCVTUQQ2PS + VCVTUSI2SD + VCVTUSI2SH + VCVTUSI2SS + VCVTUW2PH + VCVTW2PH + VDBPSADBW + VDIVBF16 + VDIVPD + VDIVPH + VDIVPS + VDIVSD + VDIVSH + VDIVSS + VDPBF16PS + VDPPD + VDPPHPS + VDPPS + VEXP2PD + VEXP2PS + VEXPANDPD + VEXPANDPS + VEXTRACTF128 + VEXTRACTF32X4 + VEXTRACTF32X8 + VEXTRACTF64X2 + VEXTRACTF64X4 + VEXTRACTI128 + VEXTRACTI32X4 + VEXTRACTI32X8 + VEXTRACTI64X2 + VEXTRACTI64X4 + VEXTRACTPS + VFCMADDCPH + VFCMADDCSH + VFCMULCPH + VFCMULCSH + VFIXUPIMMPD + VFIXUPIMMPS + VFIXUPIMMSD + VFIXUPIMMSS + VFMADD132BF16 + VFMADD132PD + VFMADD132PH + VFMADD132PS + VFMADD132SD + VFMADD132SH + VFMADD132SS + VFMADD213BF16 + VFMADD213PD + VFMADD213PH + VFMADD213PS + VFMADD213SD + VFMADD213SH + VFMADD213SS + VFMADD231BF16 + VFMADD231PD + VFMADD231PH + VFMADD231PS + VFMADD231SD + VFMADD231SH + VFMADD231SS + VFMADDCPH + VFMADDCSH + VFMADDSUB132PD + VFMADDSUB132PH + VFMADDSUB132PS + VFMADDSUB213PD + VFMADDSUB213PH + VFMADDSUB213PS + VFMADDSUB231PD + VFMADDSUB231PH + VFMADDSUB231PS + VFMSUB132BF16 + VFMSUB132PD + VFMSUB132PH + VFMSUB132PS + VFMSUB132SD + VFMSUB132SH + VFMSUB132SS + VFMSUB213BF16 + VFMSUB213PD + VFMSUB213PH + VFMSUB213PS + VFMSUB213SD + VFMSUB213SH + VFMSUB213SS + VFMSUB231BF16 + VFMSUB231PD + VFMSUB231PH + VFMSUB231PS + VFMSUB231SD + VFMSUB231SH + VFMSUB231SS + VFMSUBADD132PD + VFMSUBADD132PH + VFMSUBADD132PS + VFMSUBADD213PD + VFMSUBADD213PH + VFMSUBADD213PS + VFMSUBADD231PD + VFMSUBADD231PH + VFMSUBADD231PS + VFMULCPH + VFMULCSH + VFNMADD132BF16 + VFNMADD132PD + VFNMADD132PH + VFNMADD132PS + VFNMADD132SD + VFNMADD132SH + VFNMADD132SS + VFNMADD213BF16 + VFNMADD213PD + VFNMADD213PH + VFNMADD213PS + VFNMADD213SD + VFNMADD213SH + VFNMADD213SS + VFNMADD231BF16 + VFNMADD231PD + VFNMADD231PH + VFNMADD231PS + VFNMADD231SD + VFNMADD231SH + VFNMADD231SS + VFNMSUB132BF16 + VFNMSUB132PD + VFNMSUB132PH + VFNMSUB132PS + VFNMSUB132SD + VFNMSUB132SH + VFNMSUB132SS + VFNMSUB213BF16 + VFNMSUB213PD + VFNMSUB213PH + VFNMSUB213PS + VFNMSUB213SD + VFNMSUB213SH + VFNMSUB213SS + VFNMSUB231BF16 + VFNMSUB231PD + VFNMSUB231PH + VFNMSUB231PS + VFNMSUB231SD + VFNMSUB231SH + VFNMSUB231SS + VFPCLASSBF16 + VFPCLASSPD + VFPCLASSPH + VFPCLASSPS + VFPCLASSSD + VFPCLASSSH + VFPCLASSSS + VGATHERDPD + VGATHERDPS + VGATHERPF0DPD + VGATHERPF0DPS + VGATHERPF0QPD + VGATHERPF0QPS + VGATHERPF1DPD + VGATHERPF1DPS + VGATHERPF1QPD + VGATHERPF1QPS + VGATHERQPD + VGATHERQPS + VGETEXPBF16 + VGETEXPPD + VGETEXPPH + VGETEXPPS + VGETEXPSD + VGETEXPSH + VGETEXPSS + VGETMANTBF16 + VGETMANTPD + VGETMANTPH + VGETMANTPS + VGETMANTSD + VGETMANTSH + VGETMANTSS + VGF2P8AFFINEINVQB + VGF2P8AFFINEQB + VGF2P8MULB + VHADDPD + VHADDPS + VHSUBPD + VHSUBPS + VINSERTF128 + VINSERTF32X4 + VINSERTF32X8 + VINSERTF64X2 + VINSERTF64X4 + VINSERTI128 + VINSERTI32X4 + VINSERTI32X8 + VINSERTI64X2 + VINSERTI64X4 + VINSERTPS + VLDDQU + VLDMXCSR + VMASKMOVDQU + VMASKMOVPD + VMASKMOVPS + VMAXBF16 + VMAXPD + VMAXPH + VMAXPS + VMAXSD + VMAXSH + VMAXSS + VMINBF16 + VMINMAXBF16 + VMINMAXPD + VMINMAXPH + VMINMAXPS + VMINMAXSD + VMINMAXSH + VMINMAXSS + VMINPD + VMINPH + VMINPS + VMINSD + VMINSH + VMINSS + VMOVAPD + VMOVAPS + VMOVD + VMOVDDUP + VMOVDQA + VMOVDQA32 + VMOVDQA64 + VMOVDQU + VMOVDQU16 + VMOVDQU32 + VMOVDQU64 + VMOVDQU8 + VMOVHLPS + VMOVHPD + VMOVHPS + VMOVLHPS + VMOVLPD + VMOVLPS + VMOVMSKPD + VMOVMSKPS + VMOVNTDQ + VMOVNTDQA + VMOVNTPD + VMOVNTPS + VMOVQ + VMOVRSB + VMOVRSD + VMOVRSQ + VMOVRSW + VMOVSD + VMOVSH + VMOVSHDUP + VMOVSLDUP + VMOVSS + VMOVUPD + VMOVUPS + VMOVW + VMPSADBW + VMULBF16 + VMULPD + VMULPH + VMULPS + VMULSD + VMULSH + VMULSS + VORPD + VORPS + VP2INTERSECTD + VP2INTERSECTQ + VP4DPWSSD + VP4DPWSSDS + VPABSB + VPABSD + VPABSQ + VPABSW + VPACKSSDW + VPACKSSWB + VPACKUSDW + VPACKUSWB + VPADDB + VPADDD + VPADDQ + VPADDSB + VPADDSW + VPADDUSB + VPADDUSW + VPADDW + VPALIGNR + VPAND + VPANDD + VPANDN + VPANDND + VPANDNQ + VPANDQ + VPAVGB + VPAVGW + VPBLENDD + VPBLENDMB + VPBLENDMD + VPBLENDMQ + VPBLENDMW + VPBLENDVB + VPBLENDW + VPBROADCASTB + VPBROADCASTD + VPBROADCASTMB2Q + VPBROADCASTMW2D + VPBROADCASTQ + VPBROADCASTW + VPCLMULQDQ + VPCMPB + VPCMPD + VPCMPEQB + VPCMPEQD + VPCMPEQQ + VPCMPEQW + VPCMPESTRI + VPCMPESTRI64 + VPCMPESTRM + VPCMPESTRM64 + VPCMPGTB + VPCMPGTD + VPCMPGTQ + VPCMPGTW + VPCMPISTRI + VPCMPISTRI64 + VPCMPISTRM + VPCMPQ + VPCMPUB + VPCMPUD + VPCMPUQ + VPCMPUW + VPCMPW + VPCOMPRESSB + VPCOMPRESSD + VPCOMPRESSQ + VPCOMPRESSW + VPCONFLICTD + VPCONFLICTQ + VPDPBSSD + VPDPBSSDS + VPDPBSUD + VPDPBSUDS + VPDPBUSD + VPDPBUSDS + VPDPBUUD + VPDPBUUDS + VPDPWSSD + VPDPWSSDS + VPDPWSUD + VPDPWSUDS + VPDPWUSD + VPDPWUSDS + VPDPWUUD + VPDPWUUDS + VPERM2F128 + VPERM2I128 + VPERMB + VPERMD + VPERMI2B + VPERMI2D + VPERMI2PD + VPERMI2PS + VPERMI2Q + VPERMI2W + VPERMILPD + VPERMILPS + VPERMPD + VPERMPS + VPERMQ + VPERMT2B + VPERMT2D + VPERMT2PD + VPERMT2PS + VPERMT2Q + VPERMT2W + VPERMW + VPEXPANDB + VPEXPANDD + VPEXPANDQ + VPEXPANDW + VPEXTRB + VPEXTRD + VPEXTRQ + VPEXTRW + VPEXTRW_C5 + VPGATHERDD + VPGATHERDQ + VPGATHERQD + VPGATHERQQ + VPHADDD + VPHADDSW + VPHADDW + VPHMINPOSUW + VPHSUBD + VPHSUBSW + VPHSUBW + VPINSRB + VPINSRD + VPINSRQ + VPINSRW + VPLZCNTD + VPLZCNTQ + VPMADD52HUQ + VPMADD52LUQ + VPMADDUBSW + VPMADDWD + VPMASKMOVD + VPMASKMOVQ + VPMAXSB + VPMAXSD + VPMAXSQ + VPMAXSW + VPMAXUB + VPMAXUD + VPMAXUQ + VPMAXUW + VPMINSB + VPMINSD + VPMINSQ + VPMINSW + VPMINUB + VPMINUD + VPMINUQ + VPMINUW + VPMOVB2M + VPMOVD2M + VPMOVDB + VPMOVDW + VPMOVM2B + VPMOVM2D + VPMOVM2Q + VPMOVM2W + VPMOVMSKB + VPMOVQ2M + VPMOVQB + VPMOVQD + VPMOVQW + VPMOVSDB + VPMOVSDW + VPMOVSQB + VPMOVSQD + VPMOVSQW + VPMOVSWB + VPMOVSXBD + VPMOVSXBQ + VPMOVSXBW + VPMOVSXDQ + VPMOVSXWD + VPMOVSXWQ + VPMOVUSDB + VPMOVUSDW + VPMOVUSQB + VPMOVUSQD + VPMOVUSQW + VPMOVUSWB + VPMOVW2M + VPMOVWB + VPMOVZXBD + VPMOVZXBQ + VPMOVZXBW + VPMOVZXDQ + VPMOVZXWD + VPMOVZXWQ + VPMULDQ + VPMULHRSW + VPMULHUW + VPMULHW + VPMULLD + VPMULLQ + VPMULLW + VPMULTISHIFTQB + VPMULUDQ + VPOPCNTB + VPOPCNTD + VPOPCNTQ + VPOPCNTW + VPOR + VPORD + VPORQ + VPROLD + VPROLQ + VPROLVD + VPROLVQ + VPRORD + VPRORQ + VPRORVD + VPRORVQ + VPSADBW + VPSCATTERDD + VPSCATTERDQ + VPSCATTERQD + VPSCATTERQQ + VPSHLDD + VPSHLDQ + VPSHLDVD + VPSHLDVQ + VPSHLDVW + VPSHLDW + VPSHRDD + VPSHRDQ + VPSHRDVD + VPSHRDVQ + VPSHRDVW + VPSHRDW + VPSHUFB + VPSHUFBITQMB + VPSHUFD + VPSHUFHW + VPSHUFLW + VPSIGNB + VPSIGND + VPSIGNW + VPSLLD + VPSLLDQ + VPSLLQ + VPSLLVD + VPSLLVQ + VPSLLVW + VPSLLW + VPSRAD + VPSRAQ + VPSRAVD + VPSRAVQ + VPSRAVW + VPSRAW + VPSRLD + VPSRLDQ + VPSRLQ + VPSRLVD + VPSRLVQ + VPSRLVW + VPSRLW + VPSUBB + VPSUBD + VPSUBQ + VPSUBSB + VPSUBSW + VPSUBUSB + VPSUBUSW + VPSUBW + VPTERNLOGD + VPTERNLOGQ + VPTEST + VPTESTMB + VPTESTMD + VPTESTMQ + VPTESTMW + VPTESTNMB + VPTESTNMD + VPTESTNMQ + VPTESTNMW + VPUNPCKHBW + VPUNPCKHDQ + VPUNPCKHQDQ + VPUNPCKHWD + VPUNPCKLBW + VPUNPCKLDQ + VPUNPCKLQDQ + VPUNPCKLWD + VPXOR + VPXORD + VPXORQ + VRANGEPD + VRANGEPS + VRANGESD + VRANGESS + VRCP14PD + VRCP14PS + VRCP14SD + VRCP14SS + VRCP28PD + VRCP28PS + VRCP28SD + VRCP28SS + VRCPBF16 + VRCPPH + VRCPPS + VRCPSH + VRCPSS + VREDUCEBF16 + VREDUCEPD + VREDUCEPH + VREDUCEPS + VREDUCESD + VREDUCESH + VREDUCESS + VRNDSCALEBF16 + VRNDSCALEPD + VRNDSCALEPH + VRNDSCALEPS + VRNDSCALESD + VRNDSCALESH + VRNDSCALESS + VROUNDPD + VROUNDPS + VROUNDSD + VROUNDSS + VRSQRT14PD + VRSQRT14PS + VRSQRT14SD + VRSQRT14SS + VRSQRT28PD + VRSQRT28PS + VRSQRT28SD + VRSQRT28SS + VRSQRTBF16 + VRSQRTPH + VRSQRTPS + VRSQRTSH + VRSQRTSS + VSCALEFBF16 + VSCALEFPD + VSCALEFPH + VSCALEFPS + VSCALEFSD + VSCALEFSH + VSCALEFSS + VSCATTERDPD + VSCATTERDPS + VSCATTERPF0DPD + VSCATTERPF0DPS + VSCATTERPF0QPD + VSCATTERPF0QPS + VSCATTERPF1DPD + VSCATTERPF1DPS + VSCATTERPF1QPD + VSCATTERPF1QPS + VSCATTERQPD + VSCATTERQPS + VSHA512MSG1 + VSHA512MSG2 + VSHA512RNDS2 + VSHUFF32X4 + VSHUFF64X2 + VSHUFI32X4 + VSHUFI64X2 + VSHUFPD + VSHUFPS + VSM3MSG1 + VSM3MSG2 + VSM3RNDS2 + VSM4KEY4 + VSM4RNDS4 + VSQRTBF16 + VSQRTPD + VSQRTPH + VSQRTPS + VSQRTSD + VSQRTSH + VSQRTSS + VSTMXCSR + VSUBBF16 + VSUBPD + VSUBPH + VSUBPS + VSUBSD + VSUBSH + VSUBSS + VTESTPD + VTESTPS + VUCOMISD + VUCOMISH + VUCOMISS + VUCOMXSD + VUCOMXSH + VUCOMXSS + VUNPCKHPD + VUNPCKHPS + VUNPCKLPD + VUNPCKLPS + VXORPD + VXORPS + VZEROALL + VZEROUPPER +) + +var avxOpNames = []string{ + KADDB: "KADDB", + KADDD: "KADDD", + KADDQ: "KADDQ", + KADDW: "KADDW", + KANDB: "KANDB", + KANDD: "KANDD", + KANDNB: "KANDNB", + KANDND: "KANDND", + KANDNQ: "KANDNQ", + KANDNW: "KANDNW", + KANDQ: "KANDQ", + KANDW: "KANDW", + KMOVB: "KMOVB", + KMOVD: "KMOVD", + KMOVQ: "KMOVQ", + KMOVW: "KMOVW", + KNOTB: "KNOTB", + KNOTD: "KNOTD", + KNOTQ: "KNOTQ", + KNOTW: "KNOTW", + KORB: "KORB", + KORD: "KORD", + KORQ: "KORQ", + KORTESTB: "KORTESTB", + KORTESTD: "KORTESTD", + KORTESTQ: "KORTESTQ", + KORTESTW: "KORTESTW", + KORW: "KORW", + KSHIFTLB: "KSHIFTLB", + KSHIFTLD: "KSHIFTLD", + KSHIFTLQ: "KSHIFTLQ", + KSHIFTLW: "KSHIFTLW", + KSHIFTRB: "KSHIFTRB", + KSHIFTRD: "KSHIFTRD", + KSHIFTRQ: "KSHIFTRQ", + KSHIFTRW: "KSHIFTRW", + KTESTB: "KTESTB", + KTESTD: "KTESTD", + KTESTQ: "KTESTQ", + KTESTW: "KTESTW", + KUNPCKBW: "KUNPCKBW", + KUNPCKDQ: "KUNPCKDQ", + KUNPCKWD: "KUNPCKWD", + KXNORB: "KXNORB", + KXNORD: "KXNORD", + KXNORQ: "KXNORQ", + KXNORW: "KXNORW", + KXORB: "KXORB", + KXORD: "KXORD", + KXORQ: "KXORQ", + KXORW: "KXORW", + V4FMADDPS: "V4FMADDPS", + V4FMADDSS: "V4FMADDSS", + V4FNMADDPS: "V4FNMADDPS", + V4FNMADDSS: "V4FNMADDSS", + VADDBF16: "VADDBF16", + VADDPD: "VADDPD", + VADDPH: "VADDPH", + VADDPS: "VADDPS", + VADDSD: "VADDSD", + VADDSH: "VADDSH", + VADDSS: "VADDSS", + VADDSUBPD: "VADDSUBPD", + VADDSUBPS: "VADDSUBPS", + VAESDEC: "VAESDEC", + VAESDECLAST: "VAESDECLAST", + VAESENC: "VAESENC", + VAESENCLAST: "VAESENCLAST", + VAESIMC: "VAESIMC", + VAESKEYGENASSIST: "VAESKEYGENASSIST", + VALIGND: "VALIGND", + VALIGNQ: "VALIGNQ", + VANDNPD: "VANDNPD", + VANDNPS: "VANDNPS", + VANDPD: "VANDPD", + VANDPS: "VANDPS", + VBCSTNEBF162PS: "VBCSTNEBF162PS", + VBCSTNESH2PS: "VBCSTNESH2PS", + VBLENDMPD: "VBLENDMPD", + VBLENDMPS: "VBLENDMPS", + VBLENDPD: "VBLENDPD", + VBLENDPS: "VBLENDPS", + VBLENDVPD: "VBLENDVPD", + VBLENDVPS: "VBLENDVPS", + VBROADCASTF128: "VBROADCASTF128", + VBROADCASTF32X2: "VBROADCASTF32X2", + VBROADCASTF32X4: "VBROADCASTF32X4", + VBROADCASTF32X8: "VBROADCASTF32X8", + VBROADCASTF64X2: "VBROADCASTF64X2", + VBROADCASTF64X4: "VBROADCASTF64X4", + VBROADCASTI128: "VBROADCASTI128", + VBROADCASTI32X2: "VBROADCASTI32X2", + VBROADCASTI32X4: "VBROADCASTI32X4", + VBROADCASTI32X8: "VBROADCASTI32X8", + VBROADCASTI64X2: "VBROADCASTI64X2", + VBROADCASTI64X4: "VBROADCASTI64X4", + VBROADCASTSD: "VBROADCASTSD", + VBROADCASTSS: "VBROADCASTSS", + VCMPBF16: "VCMPBF16", + VCMPPD: "VCMPPD", + VCMPPH: "VCMPPH", + VCMPPS: "VCMPPS", + VCMPSD: "VCMPSD", + VCMPSH: "VCMPSH", + VCMPSS: "VCMPSS", + VCOMISBF16: "VCOMISBF16", + VCOMISD: "VCOMISD", + VCOMISH: "VCOMISH", + VCOMISS: "VCOMISS", + VCOMPRESSPD: "VCOMPRESSPD", + VCOMPRESSPS: "VCOMPRESSPS", + VCOMXSD: "VCOMXSD", + VCOMXSH: "VCOMXSH", + VCOMXSS: "VCOMXSS", + VCVT2PH2BF8: "VCVT2PH2BF8", + VCVT2PH2BF8S: "VCVT2PH2BF8S", + VCVT2PH2HF8: "VCVT2PH2HF8", + VCVT2PH2HF8S: "VCVT2PH2HF8S", + VCVT2PS2PHX: "VCVT2PS2PHX", + VCVTBF162IBS: "VCVTBF162IBS", + VCVTBF162IUBS: "VCVTBF162IUBS", + VCVTBIASPH2BF8: "VCVTBIASPH2BF8", + VCVTBIASPH2BF8S: "VCVTBIASPH2BF8S", + VCVTBIASPH2HF8: "VCVTBIASPH2HF8", + VCVTBIASPH2HF8S: "VCVTBIASPH2HF8S", + VCVTDQ2PD: "VCVTDQ2PD", + VCVTDQ2PH: "VCVTDQ2PH", + VCVTDQ2PS: "VCVTDQ2PS", + VCVTHF82PH: "VCVTHF82PH", + VCVTNE2PS2BF16: "VCVTNE2PS2BF16", + VCVTNEEBF162PS: "VCVTNEEBF162PS", + VCVTNEEPH2PS: "VCVTNEEPH2PS", + VCVTNEOBF162PS: "VCVTNEOBF162PS", + VCVTNEOPH2PS: "VCVTNEOPH2PS", + VCVTNEPS2BF16: "VCVTNEPS2BF16", + VCVTPD2DQ: "VCVTPD2DQ", + VCVTPD2PH: "VCVTPD2PH", + VCVTPD2PS: "VCVTPD2PS", + VCVTPD2QQ: "VCVTPD2QQ", + VCVTPD2UDQ: "VCVTPD2UDQ", + VCVTPD2UQQ: "VCVTPD2UQQ", + VCVTPH2BF8: "VCVTPH2BF8", + VCVTPH2BF8S: "VCVTPH2BF8S", + VCVTPH2DQ: "VCVTPH2DQ", + VCVTPH2HF8: "VCVTPH2HF8", + VCVTPH2HF8S: "VCVTPH2HF8S", + VCVTPH2IBS: "VCVTPH2IBS", + VCVTPH2IUBS: "VCVTPH2IUBS", + VCVTPH2PD: "VCVTPH2PD", + VCVTPH2PS: "VCVTPH2PS", + VCVTPH2PSX: "VCVTPH2PSX", + VCVTPH2QQ: "VCVTPH2QQ", + VCVTPH2UDQ: "VCVTPH2UDQ", + VCVTPH2UQQ: "VCVTPH2UQQ", + VCVTPH2UW: "VCVTPH2UW", + VCVTPH2W: "VCVTPH2W", + VCVTPS2DQ: "VCVTPS2DQ", + VCVTPS2IBS: "VCVTPS2IBS", + VCVTPS2IUBS: "VCVTPS2IUBS", + VCVTPS2PD: "VCVTPS2PD", + VCVTPS2PH: "VCVTPS2PH", + VCVTPS2PHX: "VCVTPS2PHX", + VCVTPS2QQ: "VCVTPS2QQ", + VCVTPS2UDQ: "VCVTPS2UDQ", + VCVTPS2UQQ: "VCVTPS2UQQ", + VCVTQQ2PD: "VCVTQQ2PD", + VCVTQQ2PH: "VCVTQQ2PH", + VCVTQQ2PS: "VCVTQQ2PS", + VCVTSD2SH: "VCVTSD2SH", + VCVTSD2SI: "VCVTSD2SI", + VCVTSD2SS: "VCVTSD2SS", + VCVTSD2USI: "VCVTSD2USI", + VCVTSH2SD: "VCVTSH2SD", + VCVTSH2SI: "VCVTSH2SI", + VCVTSH2SS: "VCVTSH2SS", + VCVTSH2USI: "VCVTSH2USI", + VCVTSI2SD: "VCVTSI2SD", + VCVTSI2SH: "VCVTSI2SH", + VCVTSI2SS: "VCVTSI2SS", + VCVTSS2SD: "VCVTSS2SD", + VCVTSS2SH: "VCVTSS2SH", + VCVTSS2SI: "VCVTSS2SI", + VCVTSS2USI: "VCVTSS2USI", + VCVTTBF162IBS: "VCVTTBF162IBS", + VCVTTBF162IUBS: "VCVTTBF162IUBS", + VCVTTPD2DQ: "VCVTTPD2DQ", + VCVTTPD2DQS: "VCVTTPD2DQS", + VCVTTPD2QQ: "VCVTTPD2QQ", + VCVTTPD2QQS: "VCVTTPD2QQS", + VCVTTPD2UDQ: "VCVTTPD2UDQ", + VCVTTPD2UDQS: "VCVTTPD2UDQS", + VCVTTPD2UQQ: "VCVTTPD2UQQ", + VCVTTPD2UQQS: "VCVTTPD2UQQS", + VCVTTPH2DQ: "VCVTTPH2DQ", + VCVTTPH2IBS: "VCVTTPH2IBS", + VCVTTPH2IUBS: "VCVTTPH2IUBS", + VCVTTPH2QQ: "VCVTTPH2QQ", + VCVTTPH2UDQ: "VCVTTPH2UDQ", + VCVTTPH2UQQ: "VCVTTPH2UQQ", + VCVTTPH2UW: "VCVTTPH2UW", + VCVTTPH2W: "VCVTTPH2W", + VCVTTPS2DQ: "VCVTTPS2DQ", + VCVTTPS2DQS: "VCVTTPS2DQS", + VCVTTPS2IBS: "VCVTTPS2IBS", + VCVTTPS2IUBS: "VCVTTPS2IUBS", + VCVTTPS2QQ: "VCVTTPS2QQ", + VCVTTPS2QQS: "VCVTTPS2QQS", + VCVTTPS2UDQ: "VCVTTPS2UDQ", + VCVTTPS2UDQS: "VCVTTPS2UDQS", + VCVTTPS2UQQ: "VCVTTPS2UQQ", + VCVTTPS2UQQS: "VCVTTPS2UQQS", + VCVTTSD2SI: "VCVTTSD2SI", + VCVTTSD2SIS: "VCVTTSD2SIS", + VCVTTSD2USI: "VCVTTSD2USI", + VCVTTSD2USIS: "VCVTTSD2USIS", + VCVTTSH2SI: "VCVTTSH2SI", + VCVTTSH2USI: "VCVTTSH2USI", + VCVTTSS2SI: "VCVTTSS2SI", + VCVTTSS2SIS: "VCVTTSS2SIS", + VCVTTSS2USI: "VCVTTSS2USI", + VCVTTSS2USIS: "VCVTTSS2USIS", + VCVTUDQ2PD: "VCVTUDQ2PD", + VCVTUDQ2PH: "VCVTUDQ2PH", + VCVTUDQ2PS: "VCVTUDQ2PS", + VCVTUQQ2PD: "VCVTUQQ2PD", + VCVTUQQ2PH: "VCVTUQQ2PH", + VCVTUQQ2PS: "VCVTUQQ2PS", + VCVTUSI2SD: "VCVTUSI2SD", + VCVTUSI2SH: "VCVTUSI2SH", + VCVTUSI2SS: "VCVTUSI2SS", + VCVTUW2PH: "VCVTUW2PH", + VCVTW2PH: "VCVTW2PH", + VDBPSADBW: "VDBPSADBW", + VDIVBF16: "VDIVBF16", + VDIVPD: "VDIVPD", + VDIVPH: "VDIVPH", + VDIVPS: "VDIVPS", + VDIVSD: "VDIVSD", + VDIVSH: "VDIVSH", + VDIVSS: "VDIVSS", + VDPBF16PS: "VDPBF16PS", + VDPPD: "VDPPD", + VDPPHPS: "VDPPHPS", + VDPPS: "VDPPS", + VEXP2PD: "VEXP2PD", + VEXP2PS: "VEXP2PS", + VEXPANDPD: "VEXPANDPD", + VEXPANDPS: "VEXPANDPS", + VEXTRACTF128: "VEXTRACTF128", + VEXTRACTF32X4: "VEXTRACTF32X4", + VEXTRACTF32X8: "VEXTRACTF32X8", + VEXTRACTF64X2: "VEXTRACTF64X2", + VEXTRACTF64X4: "VEXTRACTF64X4", + VEXTRACTI128: "VEXTRACTI128", + VEXTRACTI32X4: "VEXTRACTI32X4", + VEXTRACTI32X8: "VEXTRACTI32X8", + VEXTRACTI64X2: "VEXTRACTI64X2", + VEXTRACTI64X4: "VEXTRACTI64X4", + VEXTRACTPS: "VEXTRACTPS", + VFCMADDCPH: "VFCMADDCPH", + VFCMADDCSH: "VFCMADDCSH", + VFCMULCPH: "VFCMULCPH", + VFCMULCSH: "VFCMULCSH", + VFIXUPIMMPD: "VFIXUPIMMPD", + VFIXUPIMMPS: "VFIXUPIMMPS", + VFIXUPIMMSD: "VFIXUPIMMSD", + VFIXUPIMMSS: "VFIXUPIMMSS", + VFMADD132BF16: "VFMADD132BF16", + VFMADD132PD: "VFMADD132PD", + VFMADD132PH: "VFMADD132PH", + VFMADD132PS: "VFMADD132PS", + VFMADD132SD: "VFMADD132SD", + VFMADD132SH: "VFMADD132SH", + VFMADD132SS: "VFMADD132SS", + VFMADD213BF16: "VFMADD213BF16", + VFMADD213PD: "VFMADD213PD", + VFMADD213PH: "VFMADD213PH", + VFMADD213PS: "VFMADD213PS", + VFMADD213SD: "VFMADD213SD", + VFMADD213SH: "VFMADD213SH", + VFMADD213SS: "VFMADD213SS", + VFMADD231BF16: "VFMADD231BF16", + VFMADD231PD: "VFMADD231PD", + VFMADD231PH: "VFMADD231PH", + VFMADD231PS: "VFMADD231PS", + VFMADD231SD: "VFMADD231SD", + VFMADD231SH: "VFMADD231SH", + VFMADD231SS: "VFMADD231SS", + VFMADDCPH: "VFMADDCPH", + VFMADDCSH: "VFMADDCSH", + VFMADDSUB132PD: "VFMADDSUB132PD", + VFMADDSUB132PH: "VFMADDSUB132PH", + VFMADDSUB132PS: "VFMADDSUB132PS", + VFMADDSUB213PD: "VFMADDSUB213PD", + VFMADDSUB213PH: "VFMADDSUB213PH", + VFMADDSUB213PS: "VFMADDSUB213PS", + VFMADDSUB231PD: "VFMADDSUB231PD", + VFMADDSUB231PH: "VFMADDSUB231PH", + VFMADDSUB231PS: "VFMADDSUB231PS", + VFMSUB132BF16: "VFMSUB132BF16", + VFMSUB132PD: "VFMSUB132PD", + VFMSUB132PH: "VFMSUB132PH", + VFMSUB132PS: "VFMSUB132PS", + VFMSUB132SD: "VFMSUB132SD", + VFMSUB132SH: "VFMSUB132SH", + VFMSUB132SS: "VFMSUB132SS", + VFMSUB213BF16: "VFMSUB213BF16", + VFMSUB213PD: "VFMSUB213PD", + VFMSUB213PH: "VFMSUB213PH", + VFMSUB213PS: "VFMSUB213PS", + VFMSUB213SD: "VFMSUB213SD", + VFMSUB213SH: "VFMSUB213SH", + VFMSUB213SS: "VFMSUB213SS", + VFMSUB231BF16: "VFMSUB231BF16", + VFMSUB231PD: "VFMSUB231PD", + VFMSUB231PH: "VFMSUB231PH", + VFMSUB231PS: "VFMSUB231PS", + VFMSUB231SD: "VFMSUB231SD", + VFMSUB231SH: "VFMSUB231SH", + VFMSUB231SS: "VFMSUB231SS", + VFMSUBADD132PD: "VFMSUBADD132PD", + VFMSUBADD132PH: "VFMSUBADD132PH", + VFMSUBADD132PS: "VFMSUBADD132PS", + VFMSUBADD213PD: "VFMSUBADD213PD", + VFMSUBADD213PH: "VFMSUBADD213PH", + VFMSUBADD213PS: "VFMSUBADD213PS", + VFMSUBADD231PD: "VFMSUBADD231PD", + VFMSUBADD231PH: "VFMSUBADD231PH", + VFMSUBADD231PS: "VFMSUBADD231PS", + VFMULCPH: "VFMULCPH", + VFMULCSH: "VFMULCSH", + VFNMADD132BF16: "VFNMADD132BF16", + VFNMADD132PD: "VFNMADD132PD", + VFNMADD132PH: "VFNMADD132PH", + VFNMADD132PS: "VFNMADD132PS", + VFNMADD132SD: "VFNMADD132SD", + VFNMADD132SH: "VFNMADD132SH", + VFNMADD132SS: "VFNMADD132SS", + VFNMADD213BF16: "VFNMADD213BF16", + VFNMADD213PD: "VFNMADD213PD", + VFNMADD213PH: "VFNMADD213PH", + VFNMADD213PS: "VFNMADD213PS", + VFNMADD213SD: "VFNMADD213SD", + VFNMADD213SH: "VFNMADD213SH", + VFNMADD213SS: "VFNMADD213SS", + VFNMADD231BF16: "VFNMADD231BF16", + VFNMADD231PD: "VFNMADD231PD", + VFNMADD231PH: "VFNMADD231PH", + VFNMADD231PS: "VFNMADD231PS", + VFNMADD231SD: "VFNMADD231SD", + VFNMADD231SH: "VFNMADD231SH", + VFNMADD231SS: "VFNMADD231SS", + VFNMSUB132BF16: "VFNMSUB132BF16", + VFNMSUB132PD: "VFNMSUB132PD", + VFNMSUB132PH: "VFNMSUB132PH", + VFNMSUB132PS: "VFNMSUB132PS", + VFNMSUB132SD: "VFNMSUB132SD", + VFNMSUB132SH: "VFNMSUB132SH", + VFNMSUB132SS: "VFNMSUB132SS", + VFNMSUB213BF16: "VFNMSUB213BF16", + VFNMSUB213PD: "VFNMSUB213PD", + VFNMSUB213PH: "VFNMSUB213PH", + VFNMSUB213PS: "VFNMSUB213PS", + VFNMSUB213SD: "VFNMSUB213SD", + VFNMSUB213SH: "VFNMSUB213SH", + VFNMSUB213SS: "VFNMSUB213SS", + VFNMSUB231BF16: "VFNMSUB231BF16", + VFNMSUB231PD: "VFNMSUB231PD", + VFNMSUB231PH: "VFNMSUB231PH", + VFNMSUB231PS: "VFNMSUB231PS", + VFNMSUB231SD: "VFNMSUB231SD", + VFNMSUB231SH: "VFNMSUB231SH", + VFNMSUB231SS: "VFNMSUB231SS", + VFPCLASSBF16: "VFPCLASSBF16", + VFPCLASSPD: "VFPCLASSPD", + VFPCLASSPH: "VFPCLASSPH", + VFPCLASSPS: "VFPCLASSPS", + VFPCLASSSD: "VFPCLASSSD", + VFPCLASSSH: "VFPCLASSSH", + VFPCLASSSS: "VFPCLASSSS", + VGATHERDPD: "VGATHERDPD", + VGATHERDPS: "VGATHERDPS", + VGATHERPF0DPD: "VGATHERPF0DPD", + VGATHERPF0DPS: "VGATHERPF0DPS", + VGATHERPF0QPD: "VGATHERPF0QPD", + VGATHERPF0QPS: "VGATHERPF0QPS", + VGATHERPF1DPD: "VGATHERPF1DPD", + VGATHERPF1DPS: "VGATHERPF1DPS", + VGATHERPF1QPD: "VGATHERPF1QPD", + VGATHERPF1QPS: "VGATHERPF1QPS", + VGATHERQPD: "VGATHERQPD", + VGATHERQPS: "VGATHERQPS", + VGETEXPBF16: "VGETEXPBF16", + VGETEXPPD: "VGETEXPPD", + VGETEXPPH: "VGETEXPPH", + VGETEXPPS: "VGETEXPPS", + VGETEXPSD: "VGETEXPSD", + VGETEXPSH: "VGETEXPSH", + VGETEXPSS: "VGETEXPSS", + VGETMANTBF16: "VGETMANTBF16", + VGETMANTPD: "VGETMANTPD", + VGETMANTPH: "VGETMANTPH", + VGETMANTPS: "VGETMANTPS", + VGETMANTSD: "VGETMANTSD", + VGETMANTSH: "VGETMANTSH", + VGETMANTSS: "VGETMANTSS", + VGF2P8AFFINEINVQB: "VGF2P8AFFINEINVQB", + VGF2P8AFFINEQB: "VGF2P8AFFINEQB", + VGF2P8MULB: "VGF2P8MULB", + VHADDPD: "VHADDPD", + VHADDPS: "VHADDPS", + VHSUBPD: "VHSUBPD", + VHSUBPS: "VHSUBPS", + VINSERTF128: "VINSERTF128", + VINSERTF32X4: "VINSERTF32X4", + VINSERTF32X8: "VINSERTF32X8", + VINSERTF64X2: "VINSERTF64X2", + VINSERTF64X4: "VINSERTF64X4", + VINSERTI128: "VINSERTI128", + VINSERTI32X4: "VINSERTI32X4", + VINSERTI32X8: "VINSERTI32X8", + VINSERTI64X2: "VINSERTI64X2", + VINSERTI64X4: "VINSERTI64X4", + VINSERTPS: "VINSERTPS", + VLDDQU: "VLDDQU", + VLDMXCSR: "VLDMXCSR", + VMASKMOVDQU: "VMASKMOVDQU", + VMASKMOVPD: "VMASKMOVPD", + VMASKMOVPS: "VMASKMOVPS", + VMAXBF16: "VMAXBF16", + VMAXPD: "VMAXPD", + VMAXPH: "VMAXPH", + VMAXPS: "VMAXPS", + VMAXSD: "VMAXSD", + VMAXSH: "VMAXSH", + VMAXSS: "VMAXSS", + VMINBF16: "VMINBF16", + VMINMAXBF16: "VMINMAXBF16", + VMINMAXPD: "VMINMAXPD", + VMINMAXPH: "VMINMAXPH", + VMINMAXPS: "VMINMAXPS", + VMINMAXSD: "VMINMAXSD", + VMINMAXSH: "VMINMAXSH", + VMINMAXSS: "VMINMAXSS", + VMINPD: "VMINPD", + VMINPH: "VMINPH", + VMINPS: "VMINPS", + VMINSD: "VMINSD", + VMINSH: "VMINSH", + VMINSS: "VMINSS", + VMOVAPD: "VMOVAPD", + VMOVAPS: "VMOVAPS", + VMOVD: "VMOVD", + VMOVDDUP: "VMOVDDUP", + VMOVDQA: "VMOVDQA", + VMOVDQA32: "VMOVDQA32", + VMOVDQA64: "VMOVDQA64", + VMOVDQU: "VMOVDQU", + VMOVDQU16: "VMOVDQU16", + VMOVDQU32: "VMOVDQU32", + VMOVDQU64: "VMOVDQU64", + VMOVDQU8: "VMOVDQU8", + VMOVHLPS: "VMOVHLPS", + VMOVHPD: "VMOVHPD", + VMOVHPS: "VMOVHPS", + VMOVLHPS: "VMOVLHPS", + VMOVLPD: "VMOVLPD", + VMOVLPS: "VMOVLPS", + VMOVMSKPD: "VMOVMSKPD", + VMOVMSKPS: "VMOVMSKPS", + VMOVNTDQ: "VMOVNTDQ", + VMOVNTDQA: "VMOVNTDQA", + VMOVNTPD: "VMOVNTPD", + VMOVNTPS: "VMOVNTPS", + VMOVQ: "VMOVQ", + VMOVRSB: "VMOVRSB", + VMOVRSD: "VMOVRSD", + VMOVRSQ: "VMOVRSQ", + VMOVRSW: "VMOVRSW", + VMOVSD: "VMOVSD", + VMOVSH: "VMOVSH", + VMOVSHDUP: "VMOVSHDUP", + VMOVSLDUP: "VMOVSLDUP", + VMOVSS: "VMOVSS", + VMOVUPD: "VMOVUPD", + VMOVUPS: "VMOVUPS", + VMOVW: "VMOVW", + VMPSADBW: "VMPSADBW", + VMULBF16: "VMULBF16", + VMULPD: "VMULPD", + VMULPH: "VMULPH", + VMULPS: "VMULPS", + VMULSD: "VMULSD", + VMULSH: "VMULSH", + VMULSS: "VMULSS", + VORPD: "VORPD", + VORPS: "VORPS", + VP2INTERSECTD: "VP2INTERSECTD", + VP2INTERSECTQ: "VP2INTERSECTQ", + VP4DPWSSD: "VP4DPWSSD", + VP4DPWSSDS: "VP4DPWSSDS", + VPABSB: "VPABSB", + VPABSD: "VPABSD", + VPABSQ: "VPABSQ", + VPABSW: "VPABSW", + VPACKSSDW: "VPACKSSDW", + VPACKSSWB: "VPACKSSWB", + VPACKUSDW: "VPACKUSDW", + VPACKUSWB: "VPACKUSWB", + VPADDB: "VPADDB", + VPADDD: "VPADDD", + VPADDQ: "VPADDQ", + VPADDSB: "VPADDSB", + VPADDSW: "VPADDSW", + VPADDUSB: "VPADDUSB", + VPADDUSW: "VPADDUSW", + VPADDW: "VPADDW", + VPALIGNR: "VPALIGNR", + VPAND: "VPAND", + VPANDD: "VPANDD", + VPANDN: "VPANDN", + VPANDND: "VPANDND", + VPANDNQ: "VPANDNQ", + VPANDQ: "VPANDQ", + VPAVGB: "VPAVGB", + VPAVGW: "VPAVGW", + VPBLENDD: "VPBLENDD", + VPBLENDMB: "VPBLENDMB", + VPBLENDMD: "VPBLENDMD", + VPBLENDMQ: "VPBLENDMQ", + VPBLENDMW: "VPBLENDMW", + VPBLENDVB: "VPBLENDVB", + VPBLENDW: "VPBLENDW", + VPBROADCASTB: "VPBROADCASTB", + VPBROADCASTD: "VPBROADCASTD", + VPBROADCASTMB2Q: "VPBROADCASTMB2Q", + VPBROADCASTMW2D: "VPBROADCASTMW2D", + VPBROADCASTQ: "VPBROADCASTQ", + VPBROADCASTW: "VPBROADCASTW", + VPCLMULQDQ: "VPCLMULQDQ", + VPCMPB: "VPCMPB", + VPCMPD: "VPCMPD", + VPCMPEQB: "VPCMPEQB", + VPCMPEQD: "VPCMPEQD", + VPCMPEQQ: "VPCMPEQQ", + VPCMPEQW: "VPCMPEQW", + VPCMPESTRI: "VPCMPESTRI", + VPCMPESTRI64: "VPCMPESTRI64", + VPCMPESTRM: "VPCMPESTRM", + VPCMPESTRM64: "VPCMPESTRM64", + VPCMPGTB: "VPCMPGTB", + VPCMPGTD: "VPCMPGTD", + VPCMPGTQ: "VPCMPGTQ", + VPCMPGTW: "VPCMPGTW", + VPCMPISTRI: "VPCMPISTRI", + VPCMPISTRI64: "VPCMPISTRI64", + VPCMPISTRM: "VPCMPISTRM", + VPCMPQ: "VPCMPQ", + VPCMPUB: "VPCMPUB", + VPCMPUD: "VPCMPUD", + VPCMPUQ: "VPCMPUQ", + VPCMPUW: "VPCMPUW", + VPCMPW: "VPCMPW", + VPCOMPRESSB: "VPCOMPRESSB", + VPCOMPRESSD: "VPCOMPRESSD", + VPCOMPRESSQ: "VPCOMPRESSQ", + VPCOMPRESSW: "VPCOMPRESSW", + VPCONFLICTD: "VPCONFLICTD", + VPCONFLICTQ: "VPCONFLICTQ", + VPDPBSSD: "VPDPBSSD", + VPDPBSSDS: "VPDPBSSDS", + VPDPBSUD: "VPDPBSUD", + VPDPBSUDS: "VPDPBSUDS", + VPDPBUSD: "VPDPBUSD", + VPDPBUSDS: "VPDPBUSDS", + VPDPBUUD: "VPDPBUUD", + VPDPBUUDS: "VPDPBUUDS", + VPDPWSSD: "VPDPWSSD", + VPDPWSSDS: "VPDPWSSDS", + VPDPWSUD: "VPDPWSUD", + VPDPWSUDS: "VPDPWSUDS", + VPDPWUSD: "VPDPWUSD", + VPDPWUSDS: "VPDPWUSDS", + VPDPWUUD: "VPDPWUUD", + VPDPWUUDS: "VPDPWUUDS", + VPERM2F128: "VPERM2F128", + VPERM2I128: "VPERM2I128", + VPERMB: "VPERMB", + VPERMD: "VPERMD", + VPERMI2B: "VPERMI2B", + VPERMI2D: "VPERMI2D", + VPERMI2PD: "VPERMI2PD", + VPERMI2PS: "VPERMI2PS", + VPERMI2Q: "VPERMI2Q", + VPERMI2W: "VPERMI2W", + VPERMILPD: "VPERMILPD", + VPERMILPS: "VPERMILPS", + VPERMPD: "VPERMPD", + VPERMPS: "VPERMPS", + VPERMQ: "VPERMQ", + VPERMT2B: "VPERMT2B", + VPERMT2D: "VPERMT2D", + VPERMT2PD: "VPERMT2PD", + VPERMT2PS: "VPERMT2PS", + VPERMT2Q: "VPERMT2Q", + VPERMT2W: "VPERMT2W", + VPERMW: "VPERMW", + VPEXPANDB: "VPEXPANDB", + VPEXPANDD: "VPEXPANDD", + VPEXPANDQ: "VPEXPANDQ", + VPEXPANDW: "VPEXPANDW", + VPEXTRB: "VPEXTRB", + VPEXTRD: "VPEXTRD", + VPEXTRQ: "VPEXTRQ", + VPEXTRW: "VPEXTRW", + VPEXTRW_C5: "VPEXTRW_C5", + VPGATHERDD: "VPGATHERDD", + VPGATHERDQ: "VPGATHERDQ", + VPGATHERQD: "VPGATHERQD", + VPGATHERQQ: "VPGATHERQQ", + VPHADDD: "VPHADDD", + VPHADDSW: "VPHADDSW", + VPHADDW: "VPHADDW", + VPHMINPOSUW: "VPHMINPOSUW", + VPHSUBD: "VPHSUBD", + VPHSUBSW: "VPHSUBSW", + VPHSUBW: "VPHSUBW", + VPINSRB: "VPINSRB", + VPINSRD: "VPINSRD", + VPINSRQ: "VPINSRQ", + VPINSRW: "VPINSRW", + VPLZCNTD: "VPLZCNTD", + VPLZCNTQ: "VPLZCNTQ", + VPMADD52HUQ: "VPMADD52HUQ", + VPMADD52LUQ: "VPMADD52LUQ", + VPMADDUBSW: "VPMADDUBSW", + VPMADDWD: "VPMADDWD", + VPMASKMOVD: "VPMASKMOVD", + VPMASKMOVQ: "VPMASKMOVQ", + VPMAXSB: "VPMAXSB", + VPMAXSD: "VPMAXSD", + VPMAXSQ: "VPMAXSQ", + VPMAXSW: "VPMAXSW", + VPMAXUB: "VPMAXUB", + VPMAXUD: "VPMAXUD", + VPMAXUQ: "VPMAXUQ", + VPMAXUW: "VPMAXUW", + VPMINSB: "VPMINSB", + VPMINSD: "VPMINSD", + VPMINSQ: "VPMINSQ", + VPMINSW: "VPMINSW", + VPMINUB: "VPMINUB", + VPMINUD: "VPMINUD", + VPMINUQ: "VPMINUQ", + VPMINUW: "VPMINUW", + VPMOVB2M: "VPMOVB2M", + VPMOVD2M: "VPMOVD2M", + VPMOVDB: "VPMOVDB", + VPMOVDW: "VPMOVDW", + VPMOVM2B: "VPMOVM2B", + VPMOVM2D: "VPMOVM2D", + VPMOVM2Q: "VPMOVM2Q", + VPMOVM2W: "VPMOVM2W", + VPMOVMSKB: "VPMOVMSKB", + VPMOVQ2M: "VPMOVQ2M", + VPMOVQB: "VPMOVQB", + VPMOVQD: "VPMOVQD", + VPMOVQW: "VPMOVQW", + VPMOVSDB: "VPMOVSDB", + VPMOVSDW: "VPMOVSDW", + VPMOVSQB: "VPMOVSQB", + VPMOVSQD: "VPMOVSQD", + VPMOVSQW: "VPMOVSQW", + VPMOVSWB: "VPMOVSWB", + VPMOVSXBD: "VPMOVSXBD", + VPMOVSXBQ: "VPMOVSXBQ", + VPMOVSXBW: "VPMOVSXBW", + VPMOVSXDQ: "VPMOVSXDQ", + VPMOVSXWD: "VPMOVSXWD", + VPMOVSXWQ: "VPMOVSXWQ", + VPMOVUSDB: "VPMOVUSDB", + VPMOVUSDW: "VPMOVUSDW", + VPMOVUSQB: "VPMOVUSQB", + VPMOVUSQD: "VPMOVUSQD", + VPMOVUSQW: "VPMOVUSQW", + VPMOVUSWB: "VPMOVUSWB", + VPMOVW2M: "VPMOVW2M", + VPMOVWB: "VPMOVWB", + VPMOVZXBD: "VPMOVZXBD", + VPMOVZXBQ: "VPMOVZXBQ", + VPMOVZXBW: "VPMOVZXBW", + VPMOVZXDQ: "VPMOVZXDQ", + VPMOVZXWD: "VPMOVZXWD", + VPMOVZXWQ: "VPMOVZXWQ", + VPMULDQ: "VPMULDQ", + VPMULHRSW: "VPMULHRSW", + VPMULHUW: "VPMULHUW", + VPMULHW: "VPMULHW", + VPMULLD: "VPMULLD", + VPMULLQ: "VPMULLQ", + VPMULLW: "VPMULLW", + VPMULTISHIFTQB: "VPMULTISHIFTQB", + VPMULUDQ: "VPMULUDQ", + VPOPCNTB: "VPOPCNTB", + VPOPCNTD: "VPOPCNTD", + VPOPCNTQ: "VPOPCNTQ", + VPOPCNTW: "VPOPCNTW", + VPOR: "VPOR", + VPORD: "VPORD", + VPORQ: "VPORQ", + VPROLD: "VPROLD", + VPROLQ: "VPROLQ", + VPROLVD: "VPROLVD", + VPROLVQ: "VPROLVQ", + VPRORD: "VPRORD", + VPRORQ: "VPRORQ", + VPRORVD: "VPRORVD", + VPRORVQ: "VPRORVQ", + VPSADBW: "VPSADBW", + VPSCATTERDD: "VPSCATTERDD", + VPSCATTERDQ: "VPSCATTERDQ", + VPSCATTERQD: "VPSCATTERQD", + VPSCATTERQQ: "VPSCATTERQQ", + VPSHLDD: "VPSHLDD", + VPSHLDQ: "VPSHLDQ", + VPSHLDVD: "VPSHLDVD", + VPSHLDVQ: "VPSHLDVQ", + VPSHLDVW: "VPSHLDVW", + VPSHLDW: "VPSHLDW", + VPSHRDD: "VPSHRDD", + VPSHRDQ: "VPSHRDQ", + VPSHRDVD: "VPSHRDVD", + VPSHRDVQ: "VPSHRDVQ", + VPSHRDVW: "VPSHRDVW", + VPSHRDW: "VPSHRDW", + VPSHUFB: "VPSHUFB", + VPSHUFBITQMB: "VPSHUFBITQMB", + VPSHUFD: "VPSHUFD", + VPSHUFHW: "VPSHUFHW", + VPSHUFLW: "VPSHUFLW", + VPSIGNB: "VPSIGNB", + VPSIGND: "VPSIGND", + VPSIGNW: "VPSIGNW", + VPSLLD: "VPSLLD", + VPSLLDQ: "VPSLLDQ", + VPSLLQ: "VPSLLQ", + VPSLLVD: "VPSLLVD", + VPSLLVQ: "VPSLLVQ", + VPSLLVW: "VPSLLVW", + VPSLLW: "VPSLLW", + VPSRAD: "VPSRAD", + VPSRAQ: "VPSRAQ", + VPSRAVD: "VPSRAVD", + VPSRAVQ: "VPSRAVQ", + VPSRAVW: "VPSRAVW", + VPSRAW: "VPSRAW", + VPSRLD: "VPSRLD", + VPSRLDQ: "VPSRLDQ", + VPSRLQ: "VPSRLQ", + VPSRLVD: "VPSRLVD", + VPSRLVQ: "VPSRLVQ", + VPSRLVW: "VPSRLVW", + VPSRLW: "VPSRLW", + VPSUBB: "VPSUBB", + VPSUBD: "VPSUBD", + VPSUBQ: "VPSUBQ", + VPSUBSB: "VPSUBSB", + VPSUBSW: "VPSUBSW", + VPSUBUSB: "VPSUBUSB", + VPSUBUSW: "VPSUBUSW", + VPSUBW: "VPSUBW", + VPTERNLOGD: "VPTERNLOGD", + VPTERNLOGQ: "VPTERNLOGQ", + VPTEST: "VPTEST", + VPTESTMB: "VPTESTMB", + VPTESTMD: "VPTESTMD", + VPTESTMQ: "VPTESTMQ", + VPTESTMW: "VPTESTMW", + VPTESTNMB: "VPTESTNMB", + VPTESTNMD: "VPTESTNMD", + VPTESTNMQ: "VPTESTNMQ", + VPTESTNMW: "VPTESTNMW", + VPUNPCKHBW: "VPUNPCKHBW", + VPUNPCKHDQ: "VPUNPCKHDQ", + VPUNPCKHQDQ: "VPUNPCKHQDQ", + VPUNPCKHWD: "VPUNPCKHWD", + VPUNPCKLBW: "VPUNPCKLBW", + VPUNPCKLDQ: "VPUNPCKLDQ", + VPUNPCKLQDQ: "VPUNPCKLQDQ", + VPUNPCKLWD: "VPUNPCKLWD", + VPXOR: "VPXOR", + VPXORD: "VPXORD", + VPXORQ: "VPXORQ", + VRANGEPD: "VRANGEPD", + VRANGEPS: "VRANGEPS", + VRANGESD: "VRANGESD", + VRANGESS: "VRANGESS", + VRCP14PD: "VRCP14PD", + VRCP14PS: "VRCP14PS", + VRCP14SD: "VRCP14SD", + VRCP14SS: "VRCP14SS", + VRCP28PD: "VRCP28PD", + VRCP28PS: "VRCP28PS", + VRCP28SD: "VRCP28SD", + VRCP28SS: "VRCP28SS", + VRCPBF16: "VRCPBF16", + VRCPPH: "VRCPPH", + VRCPPS: "VRCPPS", + VRCPSH: "VRCPSH", + VRCPSS: "VRCPSS", + VREDUCEBF16: "VREDUCEBF16", + VREDUCEPD: "VREDUCEPD", + VREDUCEPH: "VREDUCEPH", + VREDUCEPS: "VREDUCEPS", + VREDUCESD: "VREDUCESD", + VREDUCESH: "VREDUCESH", + VREDUCESS: "VREDUCESS", + VRNDSCALEBF16: "VRNDSCALEBF16", + VRNDSCALEPD: "VRNDSCALEPD", + VRNDSCALEPH: "VRNDSCALEPH", + VRNDSCALEPS: "VRNDSCALEPS", + VRNDSCALESD: "VRNDSCALESD", + VRNDSCALESH: "VRNDSCALESH", + VRNDSCALESS: "VRNDSCALESS", + VROUNDPD: "VROUNDPD", + VROUNDPS: "VROUNDPS", + VROUNDSD: "VROUNDSD", + VROUNDSS: "VROUNDSS", + VRSQRT14PD: "VRSQRT14PD", + VRSQRT14PS: "VRSQRT14PS", + VRSQRT14SD: "VRSQRT14SD", + VRSQRT14SS: "VRSQRT14SS", + VRSQRT28PD: "VRSQRT28PD", + VRSQRT28PS: "VRSQRT28PS", + VRSQRT28SD: "VRSQRT28SD", + VRSQRT28SS: "VRSQRT28SS", + VRSQRTBF16: "VRSQRTBF16", + VRSQRTPH: "VRSQRTPH", + VRSQRTPS: "VRSQRTPS", + VRSQRTSH: "VRSQRTSH", + VRSQRTSS: "VRSQRTSS", + VSCALEFBF16: "VSCALEFBF16", + VSCALEFPD: "VSCALEFPD", + VSCALEFPH: "VSCALEFPH", + VSCALEFPS: "VSCALEFPS", + VSCALEFSD: "VSCALEFSD", + VSCALEFSH: "VSCALEFSH", + VSCALEFSS: "VSCALEFSS", + VSCATTERDPD: "VSCATTERDPD", + VSCATTERDPS: "VSCATTERDPS", + VSCATTERPF0DPD: "VSCATTERPF0DPD", + VSCATTERPF0DPS: "VSCATTERPF0DPS", + VSCATTERPF0QPD: "VSCATTERPF0QPD", + VSCATTERPF0QPS: "VSCATTERPF0QPS", + VSCATTERPF1DPD: "VSCATTERPF1DPD", + VSCATTERPF1DPS: "VSCATTERPF1DPS", + VSCATTERPF1QPD: "VSCATTERPF1QPD", + VSCATTERPF1QPS: "VSCATTERPF1QPS", + VSCATTERQPD: "VSCATTERQPD", + VSCATTERQPS: "VSCATTERQPS", + VSHA512MSG1: "VSHA512MSG1", + VSHA512MSG2: "VSHA512MSG2", + VSHA512RNDS2: "VSHA512RNDS2", + VSHUFF32X4: "VSHUFF32X4", + VSHUFF64X2: "VSHUFF64X2", + VSHUFI32X4: "VSHUFI32X4", + VSHUFI64X2: "VSHUFI64X2", + VSHUFPD: "VSHUFPD", + VSHUFPS: "VSHUFPS", + VSM3MSG1: "VSM3MSG1", + VSM3MSG2: "VSM3MSG2", + VSM3RNDS2: "VSM3RNDS2", + VSM4KEY4: "VSM4KEY4", + VSM4RNDS4: "VSM4RNDS4", + VSQRTBF16: "VSQRTBF16", + VSQRTPD: "VSQRTPD", + VSQRTPH: "VSQRTPH", + VSQRTPS: "VSQRTPS", + VSQRTSD: "VSQRTSD", + VSQRTSH: "VSQRTSH", + VSQRTSS: "VSQRTSS", + VSTMXCSR: "VSTMXCSR", + VSUBBF16: "VSUBBF16", + VSUBPD: "VSUBPD", + VSUBPH: "VSUBPH", + VSUBPS: "VSUBPS", + VSUBSD: "VSUBSD", + VSUBSH: "VSUBSH", + VSUBSS: "VSUBSS", + VTESTPD: "VTESTPD", + VTESTPS: "VTESTPS", + VUCOMISD: "VUCOMISD", + VUCOMISH: "VUCOMISH", + VUCOMISS: "VUCOMISS", + VUCOMXSD: "VUCOMXSD", + VUCOMXSH: "VUCOMXSH", + VUCOMXSS: "VUCOMXSS", + VUNPCKHPD: "VUNPCKHPD", + VUNPCKHPS: "VUNPCKHPS", + VUNPCKLPD: "VUNPCKLPD", + VUNPCKLPS: "VUNPCKLPS", + VXORPD: "VXORPD", + VXORPS: "VXORPS", + VZEROALL: "VZEROALL", + VZEROUPPER: "VZEROUPPER", +} + +const maxOp = VZEROUPPER + +func isVSIB(op Op) bool { + switch op { + case VGATHERDPD, VGATHERDPS, VGATHERPF0DPD, VGATHERPF0DPS, VGATHERPF0QPD, VGATHERPF0QPS, VGATHERPF1DPD, VGATHERPF1DPS, VGATHERPF1QPD, VGATHERPF1QPS, VGATHERQPD, VGATHERQPS, VPGATHERDD, VPGATHERDQ, VPGATHERQD, VPGATHERQQ, VPSCATTERDD, VPSCATTERDQ, VPSCATTERQD, VPSCATTERQQ, VSCATTERDPD, VSCATTERDPS, VSCATTERPF0DPD, VSCATTERPF0DPS, VSCATTERPF0QPD, VSCATTERPF0QPS, VSCATTERPF1DPD, VSCATTERPF1DPS, VSCATTERPF1QPD, VSCATTERPF1QPS, VSCATTERQPD, VSCATTERQPS: + return true + } + return false +} + +type avxOptab struct { + op Op + args [6]argType + vexP uint8 // 0=any, 1=none, 2=66, 3=F2, 4=F3 + vexL uint8 // 0=128, 1=256, 2=512 + vexW uint8 // 0=W0, 1=W1 + opdigit int8 // -1 if none + ismem int8 // -1 = any, 0 = reg, 1 = mem + evex bool + dispScale int8 + bcstScale int8 + memBytes uint8 + vsib bool +} + +var avxMap0F = [256][]*avxOptab{ + 16: { + {op: VMOVSS, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VMOVSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VMOVSD, args: [6]argType{argXmm_R, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VMOVUPD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVUPD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VMOVUPD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVUPD, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMOVUPS, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVUPS, args: [6]argType{argXmm_R, argXmm_B}, opdigit: -1}, + {op: VMOVUPS, args: [6]argType{argYmm_R, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVUPS, args: [6]argType{argYmm_R, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VMOVSD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVSS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VMOVSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMOVUPD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVUPD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVUPS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVUPS, args: [6]argType{argZmm_R, argKmask, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVUPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVUPD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVUPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVUPD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVUPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VMOVUPS, args: [6]argType{argXmmEvex_R, argKmask, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVUPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVUPS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 17: { + {op: VMOVSS, args: [6]argType{argM, argXmm_R}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VMOVSS, args: [6]argType{argXmm_B, argXmm_N, argXmm_R}, vexP: 3, opdigit: -1}, + {op: VMOVSD, args: [6]argType{argM, argXmm_R}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVSD, args: [6]argType{argXmm_B, argXmm_N, argXmm_R}, vexP: 2, opdigit: -1}, + {op: VMOVUPD, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVUPD, args: [6]argType{argXmm_B, argXmm_R}, vexP: 1, opdigit: -1}, + {op: VMOVUPD, args: [6]argType{argM, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVUPD, args: [6]argType{argYmm_B, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMOVUPS, args: [6]argType{argM, argXmm_R}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVUPS, args: [6]argType{argXmm_B, argXmm_R}, opdigit: -1}, + {op: VMOVUPS, args: [6]argType{argM, argYmm_R}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVUPS, args: [6]argType{argYmm_B, argYmm_R}, vexL: 1, opdigit: -1}, + {op: VMOVSD, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVSD, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_N, argXmmEvex_R}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVSS, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VMOVSS, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_N, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VMOVUPD, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVUPD, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVUPS, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVUPS, args: [6]argType{argM, argKmask, argZmm_R}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVUPD, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVUPD, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVUPD, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVUPD, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVUPS, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, opdigit: -1, evex: true}, + {op: VMOVUPS, args: [6]argType{argM, argKmask, argXmmEvex_R}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVUPS, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVUPS, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 18: { + {op: VMOVDDUP, args: [6]argType{argXmm_R, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVDDUP, args: [6]argType{argXmm_R, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VMOVDDUP, args: [6]argType{argYmm_R, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVDDUP, args: [6]argType{argYmm_R, argYmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + {op: VMOVSLDUP, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVSLDUP, args: [6]argType{argXmm_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VMOVSLDUP, args: [6]argType{argYmm_R, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVSLDUP, args: [6]argType{argYmm_R, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VMOVHLPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VMOVLPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVLPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVDDUP, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDDUP, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVHLPS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VMOVLPD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVLPS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVSLDUP, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVSLDUP, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDDUP, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDDUP, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVDDUP, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDDUP, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVSLDUP, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMOVSLDUP, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVSLDUP, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVSLDUP, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 19: { + {op: VMOVLPD, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVLPS, args: [6]argType{argM, argXmm_R}, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVLPD, args: [6]argType{argM, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVLPS, args: [6]argType{argM, argXmmEvex_R}, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 20: { + {op: VUNPCKLPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VUNPCKLPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VUNPCKLPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VUNPCKLPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VUNPCKLPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VUNPCKLPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VUNPCKLPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VUNPCKLPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VUNPCKLPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VUNPCKLPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VUNPCKLPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VUNPCKLPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VUNPCKLPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VUNPCKLPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VUNPCKLPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VUNPCKLPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VUNPCKLPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VUNPCKLPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VUNPCKLPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VUNPCKLPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 21: { + {op: VUNPCKHPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VUNPCKHPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VUNPCKHPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VUNPCKHPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VUNPCKHPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VUNPCKHPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VUNPCKHPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VUNPCKHPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VUNPCKHPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VUNPCKHPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VUNPCKHPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VUNPCKHPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VUNPCKHPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VUNPCKHPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VUNPCKHPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VUNPCKHPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VUNPCKHPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VUNPCKHPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VUNPCKHPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VUNPCKHPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 22: { + {op: VMOVSHDUP, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVSHDUP, args: [6]argType{argXmm_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VMOVSHDUP, args: [6]argType{argYmm_R, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVSHDUP, args: [6]argType{argYmm_R, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VMOVLHPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VMOVHPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVHPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVHPD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVHPS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVLHPS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VMOVSHDUP, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVSHDUP, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVSHDUP, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMOVSHDUP, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVSHDUP, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVSHDUP, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 23: { + {op: VMOVHPD, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVHPS, args: [6]argType{argM, argXmm_R}, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVHPD, args: [6]argType{argM, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVHPS, args: [6]argType{argM, argXmmEvex_R}, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 40: { + {op: VMOVAPD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVAPD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VMOVAPD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVAPD, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMOVAPS, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVAPS, args: [6]argType{argXmm_R, argXmm_B}, opdigit: -1}, + {op: VMOVAPS, args: [6]argType{argYmm_R, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVAPS, args: [6]argType{argYmm_R, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VMOVAPD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVAPD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVAPS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVAPS, args: [6]argType{argZmm_R, argKmask, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVAPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVAPD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVAPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVAPD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVAPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VMOVAPS, args: [6]argType{argXmmEvex_R, argKmask, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVAPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVAPS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 41: { + {op: VMOVAPD, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVAPD, args: [6]argType{argXmm_B, argXmm_R}, vexP: 1, opdigit: -1}, + {op: VMOVAPD, args: [6]argType{argM, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVAPD, args: [6]argType{argYmm_B, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMOVAPS, args: [6]argType{argM, argXmm_R}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVAPS, args: [6]argType{argXmm_B, argXmm_R}, opdigit: -1}, + {op: VMOVAPS, args: [6]argType{argM, argYmm_R}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVAPS, args: [6]argType{argYmm_B, argYmm_R}, vexL: 1, opdigit: -1}, + {op: VMOVAPD, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVAPD, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVAPS, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVAPS, args: [6]argType{argM, argKmask, argZmm_R}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVAPD, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVAPD, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVAPD, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVAPD, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVAPS, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, opdigit: -1, evex: true}, + {op: VMOVAPS, args: [6]argType{argM, argKmask, argXmmEvex_R}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVAPS, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVAPS, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 42: { + {op: VCVTSI2SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTSI2SD, args: [6]argType{argXmm_R, argXmm_N, argGPR32_B}, vexP: 2, opdigit: -1}, + {op: VCVTSI2SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTSI2SD, args: [6]argType{argXmm_R, argXmm_N, argGPR32_B}, vexP: 2, opdigit: -1}, + {op: VCVTSI2SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTSI2SD, args: [6]argType{argXmm_R, argXmm_N, argGPR64_B}, vexP: 2, vexW: 1, opdigit: -1}, + {op: VCVTSI2SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTSI2SS, args: [6]argType{argXmm_R, argXmm_N, argGPR32_B}, vexP: 3, opdigit: -1}, + {op: VCVTSI2SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTSI2SS, args: [6]argType{argXmm_R, argXmm_N, argGPR32_B}, vexP: 3, opdigit: -1}, + {op: VCVTSI2SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTSI2SS, args: [6]argType{argXmm_R, argXmm_N, argGPR64_B}, vexP: 3, vexW: 1, opdigit: -1}, + {op: VCVTSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR64_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR64_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR64_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR64_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 43: { + {op: VMOVNTPD, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVNTPS, args: [6]argType{argM, argXmm_R}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVNTPD, args: [6]argType{argM, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVNTPS, args: [6]argType{argM, argYmm_R}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVNTPD, args: [6]argType{argM, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVNTPS, args: [6]argType{argM, argZmm_R}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVNTPD, args: [6]argType{argM, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVNTPD, args: [6]argType{argM, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVNTPS, args: [6]argType{argM, argXmmEvex_R}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVNTPS, args: [6]argType{argM, argYmmEvex_R}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 44: { + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VCVTTSD2SI, args: [6]argType{argGPR64_R, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTTSD2SI, args: [6]argType{argGPR64_R, argXmm_B}, vexP: 2, vexW: 1, opdigit: -1}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VCVTTSS2SI, args: [6]argType{argGPR64_R, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTTSS2SI, args: [6]argType{argGPR64_R, argXmm_B}, vexP: 3, vexW: 1, opdigit: -1}, + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTTSD2SI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTTSD2SI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTSD2SI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTSD2SI, args: [6]argType{argGPR64_R, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTTSS2SI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTTSS2SI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTSS2SI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTSS2SI, args: [6]argType{argGPR64_R, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 45: { + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VCVTSD2SI, args: [6]argType{argGPR64_R, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTSD2SI, args: [6]argType{argGPR64_R, argXmm_B}, vexP: 2, vexW: 1, opdigit: -1}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VCVTSS2SI, args: [6]argType{argGPR64_R, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTSS2SI, args: [6]argType{argGPR64_R, argXmm_B}, vexP: 3, vexW: 1, opdigit: -1}, + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTSD2SI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTSD2SI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSD2SI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSD2SI, args: [6]argType{argGPR64_R, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTSS2SI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTSS2SI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSS2SI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSS2SI, args: [6]argType{argGPR64_R, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 46: { + {op: VUCOMISD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VUCOMISD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VUCOMISS, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VUCOMISS, args: [6]argType{argXmm_R, argXmm_B}, opdigit: -1}, + {op: VUCOMISD, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VUCOMISD, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VUCOMISD, args: [6]argType{argXmmEvex_R, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VUCOMISS, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VUCOMISS, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VUCOMISS, args: [6]argType{argXmmEvex_R, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VUCOMXSD, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VUCOMXSD, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VUCOMXSD, args: [6]argType{argXmmEvex_R, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VUCOMXSS, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VUCOMXSS, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VUCOMXSS, args: [6]argType{argXmmEvex_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 47: { + {op: VCOMISD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCOMISD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VCOMISS, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCOMISS, args: [6]argType{argXmm_R, argXmm_B}, opdigit: -1}, + {op: VCOMISD, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCOMISD, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCOMISD, args: [6]argType{argXmmEvex_R, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCOMISS, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VCOMISS, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VCOMISS, args: [6]argType{argXmmEvex_R, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCOMXSD, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCOMXSD, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCOMXSD, args: [6]argType{argXmmEvex_R, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCOMXSS, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCOMXSS, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCOMXSS, args: [6]argType{argXmmEvex_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 65: { + {op: KANDW, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, opdigit: -1}, + {op: KANDB, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: KANDD, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: KANDQ, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, vexW: 1, opdigit: -1}, + }, + 66: { + {op: KANDNW, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, opdigit: -1}, + {op: KANDNB, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: KANDND, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: KANDNQ, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, vexW: 1, opdigit: -1}, + }, + 68: { + {op: KNOTW, args: [6]argType{argK_R, argK_B}, opdigit: -1}, + {op: KNOTB, args: [6]argType{argK_R, argK_B}, vexP: 1, opdigit: -1}, + {op: KNOTD, args: [6]argType{argK_R, argK_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: KNOTQ, args: [6]argType{argK_R, argK_B}, vexW: 1, opdigit: -1}, + }, + 69: { + {op: KORW, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, opdigit: -1}, + {op: KORB, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: KORD, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: KORQ, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, vexW: 1, opdigit: -1}, + }, + 70: { + {op: KXNORW, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, opdigit: -1}, + {op: KXNORB, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: KXNORD, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: KXNORQ, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, vexW: 1, opdigit: -1}, + }, + 71: { + {op: KXORW, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, opdigit: -1}, + {op: KXORB, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: KXORD, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: KXORQ, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, vexW: 1, opdigit: -1}, + }, + 74: { + {op: KADDB, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: KADDD, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: KADDQ, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, vexW: 1, opdigit: -1}, + {op: KADDW, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, opdigit: -1}, + }, + 75: { + {op: KUNPCKBW, args: [6]argType{argK_R, argK_N, argK_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: KUNPCKDQ, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, vexW: 1, opdigit: -1}, + {op: KUNPCKWD, args: [6]argType{argK_R, argK_N, argK_B}, vexL: 1, opdigit: -1}, + }, + 80: { + {op: VMOVMSKPD, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VMOVMSKPD, args: [6]argType{argGPR32_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMOVMSKPS, args: [6]argType{argGPR32_R, argXmm_B}, opdigit: -1}, + {op: VMOVMSKPS, args: [6]argType{argGPR32_R, argYmm_B}, vexL: 1, opdigit: -1}, + }, + 81: { + {op: VSQRTPD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSQRTPD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VSQRTPD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VSQRTPD, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VSQRTPS, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSQRTPS, args: [6]argType{argXmm_R, argXmm_B}, opdigit: -1}, + {op: VSQRTPS, args: [6]argType{argYmm_R, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VSQRTPS, args: [6]argType{argYmm_R, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VSQRTSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VSQRTSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VSQRTSS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VSQRTSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VSQRTPD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSQRTPD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSQRTPD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VSQRTPS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VSQRTPS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, opdigit: -1, evex: true}, + {op: VSQRTPS, args: [6]argType{argZmm_R, argKmask, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VSQRTSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSQRTSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSQRTSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VSQRTSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VSQRTSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VSQRTSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VSQRTPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSQRTPD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VSQRTPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSQRTPD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VSQRTPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VSQRTPS, args: [6]argType{argXmmEvex_R, argKmask, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VSQRTPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VSQRTPS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 82: { + {op: VRSQRTPS, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VRSQRTPS, args: [6]argType{argXmm_R, argXmm_B}, opdigit: -1}, + {op: VRSQRTPS, args: [6]argType{argYmm_R, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VRSQRTPS, args: [6]argType{argYmm_R, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VRSQRTSS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VRSQRTSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + }, + 83: { + {op: VRCPPS, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VRCPPS, args: [6]argType{argXmm_R, argXmm_B}, opdigit: -1}, + {op: VRCPPS, args: [6]argType{argYmm_R, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VRCPPS, args: [6]argType{argYmm_R, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VRCPSS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VRCPSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + }, + 84: { + {op: VANDPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VANDPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VANDPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VANDPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VANDPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VANDPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VANDPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VANDPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VANDPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VANDPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VANDPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VANDPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VANDPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VANDPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VANDPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VANDPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VANDPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VANDPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VANDPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VANDPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 85: { + {op: VANDNPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VANDNPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VANDNPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VANDNPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VANDNPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VANDNPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VANDNPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VANDNPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VANDNPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VANDNPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VANDNPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VANDNPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VANDNPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VANDNPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VANDNPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VANDNPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VANDNPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VANDNPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VANDNPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VANDNPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 86: { + {op: VORPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VORPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VORPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VORPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VORPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VORPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VORPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VORPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VORPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VORPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VORPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VORPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VORPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VORPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VORPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VORPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VORPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VORPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VORPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VORPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 87: { + {op: VXORPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VXORPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VXORPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VXORPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VXORPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VXORPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VXORPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VXORPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VXORPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VXORPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VXORPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VXORPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VXORPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VXORPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VXORPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VXORPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VXORPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VXORPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VXORPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VXORPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 88: { + {op: VADDPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VADDPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VADDPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VADDPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VADDPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VADDPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VADDPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VADDPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VADDSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VADDSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VADDSS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VADDSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VADDPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VADDPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VADDPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VADDPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VADDPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, opdigit: -1, evex: true}, + {op: VADDPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VADDSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VADDSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VADDSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VADDSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VADDSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VADDSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VADDPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VADDPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VADDPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VADDPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VADDPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VADDPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VADDPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VADDPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 89: { + {op: VMULPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMULPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VMULPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMULPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMULPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMULPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VMULPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMULPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VMULSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMULSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VMULSS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VMULSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VMULPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMULPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMULPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VMULPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VMULPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, opdigit: -1, evex: true}, + {op: VMULPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VMULSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMULSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMULSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMULSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMULSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMULSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VMULPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMULPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VMULPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMULPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VMULPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VMULPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VMULPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VMULPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 90: { + {op: VCVTPD2PS, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTPD2PS, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VCVTPD2PS, args: [6]argType{argXmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCVTPD2PS, args: [6]argType{argXmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VCVTPS2PD, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTPS2PD, args: [6]argType{argXmm_R, argXmm_B}, opdigit: -1}, + {op: VCVTPS2PD, args: [6]argType{argYmm_R, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTPS2PD, args: [6]argType{argYmm_R, argXmm_B}, vexL: 1, opdigit: -1}, + {op: VCVTSD2SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTSD2SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VCVTSS2SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCVTSS2SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VCVTPD2PS, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2PS, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2PS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTPS2PD, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTPS2PD, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, opdigit: -1, evex: true}, + {op: VCVTPS2PD, args: [6]argType{argZmm_R, argKmask, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTSD2SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSD2SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSD2SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTSS2SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTPD2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTPD2PS, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTPS2PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VCVTPS2PD, args: [6]argType{argXmmEvex_R, argKmask, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 8, bcstScale: 4}, + {op: VCVTPS2PD, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTPS2PD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + }, + 91: { + {op: VCVTDQ2PS, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTDQ2PS, args: [6]argType{argXmm_R, argXmm_B}, opdigit: -1}, + {op: VCVTDQ2PS, args: [6]argType{argYmm_R, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCVTDQ2PS, args: [6]argType{argYmm_R, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VCVTPS2DQ, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTPS2DQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VCVTPS2DQ, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCVTPS2DQ, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VCVTTPS2DQ, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTTPS2DQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VCVTTPS2DQ, args: [6]argType{argYmm_R, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCVTTPS2DQ, args: [6]argType{argYmm_R, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VCVTDQ2PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTDQ2PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, opdigit: -1, evex: true}, + {op: VCVTDQ2PS, args: [6]argType{argZmm_R, argKmask, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VCVTPS2DQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTPS2DQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPS2DQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VCVTTPS2DQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTTPS2DQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTPS2DQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VCVTDQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VCVTDQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTDQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTDQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTPS2DQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPS2DQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTPS2DQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTPS2DQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTQQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTQQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTQQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_B}, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTQQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTQQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTQQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTQQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTTPS2DQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTPS2DQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTTPS2DQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTTPS2DQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 92: { + {op: VSUBPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSUBPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VSUBPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VSUBPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VSUBPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSUBPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VSUBPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VSUBPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VSUBSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VSUBSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VSUBSS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VSUBSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VSUBPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSUBPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSUBPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VSUBPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VSUBPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, opdigit: -1, evex: true}, + {op: VSUBPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VSUBSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSUBSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSUBSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VSUBSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VSUBSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VSUBSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VSUBPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSUBPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VSUBPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSUBPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VSUBPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VSUBPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VSUBPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VSUBPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 93: { + {op: VMINPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMINPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VMINPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMINPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMINPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMINPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VMINPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMINPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VMINSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMINSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VMINSS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VMINSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VMINPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMINPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMINPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VMINPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VMINPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, opdigit: -1, evex: true}, + {op: VMINPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VMINSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMINSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMINSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMINSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMINSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMINSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VMINPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMINPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VMINPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMINPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VMINPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VMINPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VMINPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VMINPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 94: { + {op: VDIVPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VDIVPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VDIVPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VDIVPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VDIVPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VDIVPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VDIVPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VDIVPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VDIVSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VDIVSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VDIVSS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VDIVSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VDIVPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VDIVPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VDIVPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VDIVPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VDIVPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, opdigit: -1, evex: true}, + {op: VDIVPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VDIVSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VDIVSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VDIVSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VDIVSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VDIVSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VDIVSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VDIVPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VDIVPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VDIVPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VDIVPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VDIVPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VDIVPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VDIVPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VDIVPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 95: { + {op: VMAXPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMAXPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VMAXPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMAXPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMAXPS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMAXPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VMAXPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMAXPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VMAXSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMAXSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VMAXSS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VMAXSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VMAXPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMAXPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMAXPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VMAXPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VMAXPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, opdigit: -1, evex: true}, + {op: VMAXPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VMAXSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMAXSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMAXSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMAXSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMAXSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMAXSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VMAXPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMAXPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VMAXPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMAXPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VMAXPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VMAXPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VMAXPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VMAXPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 96: { + {op: VPUNPCKLBW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPUNPCKLBW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPUNPCKLBW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPUNPCKLBW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPUNPCKLBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPUNPCKLBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPUNPCKLBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPUNPCKLBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPUNPCKLBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPUNPCKLBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 97: { + {op: VPUNPCKLWD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPUNPCKLWD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPUNPCKLWD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPUNPCKLWD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPUNPCKLWD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPUNPCKLWD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPUNPCKLWD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPUNPCKLWD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPUNPCKLWD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPUNPCKLWD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 98: { + {op: VPUNPCKLDQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPUNPCKLDQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPUNPCKLDQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPUNPCKLDQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPUNPCKLDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPUNPCKLDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPUNPCKLDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPUNPCKLDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPUNPCKLDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPUNPCKLDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 99: { + {op: VPACKSSWB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPACKSSWB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPACKSSWB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPACKSSWB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPACKSSWB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPACKSSWB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPACKSSWB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPACKSSWB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPACKSSWB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPACKSSWB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 100: { + {op: VPCMPGTB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPGTB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPCMPGTB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPCMPGTB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPCMPGTB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPGTB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPCMPGTB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPGTB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPCMPGTB, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPGTB, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 101: { + {op: VPCMPGTW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPGTW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPCMPGTW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPCMPGTW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPCMPGTW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPGTW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPCMPGTW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPGTW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPCMPGTW, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPGTW, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 102: { + {op: VPCMPGTD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPGTD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPCMPGTD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPCMPGTD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPCMPGTD, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPGTD, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPCMPGTD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPGTD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPCMPGTD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPGTD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 103: { + {op: VPACKUSWB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPACKUSWB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPACKUSWB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPACKUSWB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPACKUSWB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPACKUSWB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPACKUSWB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPACKUSWB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPACKUSWB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPACKUSWB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 104: { + {op: VPUNPCKHBW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPUNPCKHBW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPUNPCKHBW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPUNPCKHBW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPUNPCKHBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPUNPCKHBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPUNPCKHBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPUNPCKHBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPUNPCKHBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPUNPCKHBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 105: { + {op: VPUNPCKHWD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPUNPCKHWD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPUNPCKHWD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPUNPCKHWD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPUNPCKHWD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPUNPCKHWD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPUNPCKHWD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPUNPCKHWD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPUNPCKHWD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPUNPCKHWD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 106: { + {op: VPUNPCKHDQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPUNPCKHDQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPUNPCKHDQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPUNPCKHDQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPUNPCKHDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPUNPCKHDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPUNPCKHDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPUNPCKHDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPUNPCKHDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPUNPCKHDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 107: { + {op: VPACKSSDW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPACKSSDW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPACKSSDW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPACKSSDW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPACKSSDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPACKSSDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPACKSSDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPACKSSDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPACKSSDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPACKSSDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 108: { + {op: VPUNPCKLQDQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPUNPCKLQDQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPUNPCKLQDQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPUNPCKLQDQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPUNPCKLQDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPUNPCKLQDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPUNPCKLQDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPUNPCKLQDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPUNPCKLQDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPUNPCKLQDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 109: { + {op: VPUNPCKHQDQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPUNPCKHQDQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPUNPCKHQDQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPUNPCKHQDQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPUNPCKHQDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPUNPCKHQDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPUNPCKHQDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPUNPCKHQDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPUNPCKHQDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPUNPCKHQDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 110: { + {op: VMOVD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VMOVD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VMOVD, args: [6]argType{argXmm_R, argGPR32_B}, vexP: 1, opdigit: -1}, + {op: VMOVD, args: [6]argType{argXmm_R, argGPR32_B}, vexP: 1, opdigit: -1}, + {op: VMOVQ, args: [6]argType{argXmm_R, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVQ, args: [6]argType{argXmm_R, argGPR64_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VMOVD, args: [6]argType{argXmmEvex_R, argGPR32_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VMOVD, args: [6]argType{argXmmEvex_R, argGPR32_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VMOVD, args: [6]argType{argXmmEvex_R, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VMOVD, args: [6]argType{argXmmEvex_R, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VMOVQ, args: [6]argType{argXmmEvex_R, argGPR64_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVQ, args: [6]argType{argXmmEvex_R, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 111: { + {op: VMOVDQA, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVDQA, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VMOVDQA, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVDQA, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMOVDQU, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVDQU, args: [6]argType{argXmm_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VMOVDQU, args: [6]argType{argYmm_R, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVDQU, args: [6]argType{argYmm_R, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VMOVDQA32, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVDQA32, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQA64, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQA64, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQU32, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVDQU32, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQU64, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU64, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQA32, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VMOVDQA32, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQA32, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVDQA32, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQA64, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQA64, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQA64, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQA64, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU16, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU16, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQU16, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU16, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU16, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU16, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQU32, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMOVDQU32, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQU32, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVDQU32, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU64, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU64, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQU64, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU64, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU8, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VMOVDQU8, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQU8, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVDQU8, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU8, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVDQU8, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 112: { + {op: VPSHUFD, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSHUFD, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPSHUFHW, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSHUFHW, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 3, opdigit: -1}, + {op: VPSHUFLW, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSHUFLW, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 2, opdigit: -1}, + {op: VPSHUFD, args: [6]argType{argYmm_R, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSHUFD, args: [6]argType{argYmm_R, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSHUFHW, args: [6]argType{argYmm_R, argM, argImm8u}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSHUFHW, args: [6]argType{argYmm_R, argYmm_B, argImm8u}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VPSHUFLW, args: [6]argType{argYmm_R, argM, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSHUFLW, args: [6]argType{argYmm_R, argYmm_B, argImm8u}, vexP: 2, vexL: 1, opdigit: -1}, + {op: VPSHUFD, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSHUFD, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSHUFD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSHUFD, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSHUFD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSHUFD, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSHUFHW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 3, opdigit: -1, evex: true}, + {op: VPSHUFHW, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSHUFHW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPSHUFHW, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSHUFHW, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPSHUFHW, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPSHUFLW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 2, opdigit: -1, evex: true}, + {op: VPSHUFLW, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSHUFLW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VPSHUFLW, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSHUFLW, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VPSHUFLW, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 113: { + {op: VPSLLW, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 6}, + {op: VPSRAW, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 4}, + {op: VPSRLW, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 2}, + {op: VPSLLW, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 6}, + {op: VPSRAW, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 4}, + {op: VPSRLW, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 2}, + {op: VPSLLW, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: 6, evex: true}, + {op: VPSLLW, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, opdigit: 6, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSLLW, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 6, evex: true}, + {op: VPSLLW, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: 6, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSLLW, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: 6, evex: true}, + {op: VPSLLW, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: 6, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPSRAW, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: 4, evex: true}, + {op: VPSRAW, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, opdigit: 4, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRAW, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 4, evex: true}, + {op: VPSRAW, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: 4, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSRAW, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: 4, evex: true}, + {op: VPSRAW, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: 4, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPSRLW, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: 2, evex: true}, + {op: VPSRLW, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, opdigit: 2, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRLW, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 2, evex: true}, + {op: VPSRLW, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: 2, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSRLW, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: 2, evex: true}, + {op: VPSRLW, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: 2, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 114: { + {op: VPSLLD, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 6}, + {op: VPSRAD, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 4}, + {op: VPSRLD, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 2}, + {op: VPSLLD, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 6}, + {op: VPSRAD, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 4}, + {op: VPSRLD, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 2}, + {op: VPROLD, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: 1, evex: true}, + {op: VPROLD, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: 1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPROLQ, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: 1, evex: true}, + {op: VPROLQ, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: 1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPRORD, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, evex: true}, + {op: VPRORD, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPRORQ, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, evex: true}, + {op: VPRORQ, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPSLLD, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: 6, evex: true}, + {op: VPSLLD, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: 6, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSRAD, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: 4, evex: true}, + {op: VPSRAD, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: 4, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSRAQ, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: 4, evex: true}, + {op: VPSRAQ, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: 4, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPSRLD, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: 2, evex: true}, + {op: VPSRLD, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: 2, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPROLD, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: 1, evex: true}, + {op: VPROLD, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, opdigit: 1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPROLD, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 1, evex: true}, + {op: VPROLD, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: 1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPROLQ, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: 1, evex: true}, + {op: VPROLQ, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: 1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPROLQ, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: 1, evex: true}, + {op: VPROLQ, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: 1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPRORD, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, evex: true}, + {op: VPRORD, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPRORD, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, evex: true}, + {op: VPRORD, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPRORQ, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, evex: true}, + {op: VPRORQ, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPRORQ, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, evex: true}, + {op: VPRORQ, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPSLLD, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: 6, evex: true}, + {op: VPSLLD, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, opdigit: 6, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSLLD, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 6, evex: true}, + {op: VPSLLD, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: 6, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSRAD, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: 4, evex: true}, + {op: VPSRAD, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, opdigit: 4, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSRAD, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 4, evex: true}, + {op: VPSRAD, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: 4, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSRAQ, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: 4, evex: true}, + {op: VPSRAQ, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: 4, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSRAQ, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: 4, evex: true}, + {op: VPSRAQ, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: 4, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPSRLD, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: 2, evex: true}, + {op: VPSRLD, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, opdigit: 2, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSRLD, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 2, evex: true}, + {op: VPSRLD, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: 2, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 115: { + {op: VPSRLDQ, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 3}, + {op: VPSLLDQ, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 7}, + {op: VPSLLQ, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 6}, + {op: VPSRLQ, args: [6]argType{argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: 2}, + {op: VPSRLDQ, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 3}, + {op: VPSLLDQ, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 7}, + {op: VPSLLQ, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 6}, + {op: VPSRLQ, args: [6]argType{argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 2}, + {op: VPSLLQ, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: 6, evex: true}, + {op: VPSLLQ, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: 6, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPSRLQ, args: [6]argType{argZmm_N, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: 2, evex: true}, + {op: VPSRLQ, args: [6]argType{argZmm_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: 2, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPSLLDQ, args: [6]argType{argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: 7, evex: true}, + {op: VPSLLDQ, args: [6]argType{argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: 7, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSLLDQ, args: [6]argType{argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 7, evex: true}, + {op: VPSLLDQ, args: [6]argType{argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: 7, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSLLDQ, args: [6]argType{argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: 7, evex: true}, + {op: VPSLLDQ, args: [6]argType{argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: 7, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPSLLQ, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: 6, evex: true}, + {op: VPSLLQ, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: 6, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSLLQ, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: 6, evex: true}, + {op: VPSLLQ, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: 6, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPSRLDQ, args: [6]argType{argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: 3, evex: true}, + {op: VPSRLDQ, args: [6]argType{argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: 3, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRLDQ, args: [6]argType{argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: 3, evex: true}, + {op: VPSRLDQ, args: [6]argType{argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: 3, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSRLDQ, args: [6]argType{argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: 3, evex: true}, + {op: VPSRLDQ, args: [6]argType{argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: 3, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPSRLQ, args: [6]argType{argXmmEvex_N, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: 2, evex: true}, + {op: VPSRLQ, args: [6]argType{argXmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: 2, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSRLQ, args: [6]argType{argYmmEvex_N, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: 2, evex: true}, + {op: VPSRLQ, args: [6]argType{argYmmEvex_N, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: 2, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 116: { + {op: VPCMPEQB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPEQB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPCMPEQB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPCMPEQB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPCMPEQB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPEQB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPCMPEQB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPEQB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPCMPEQB, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPEQB, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 117: { + {op: VPCMPEQW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPEQW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPCMPEQW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPCMPEQW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPCMPEQW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPEQW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPCMPEQW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPEQW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPCMPEQW, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPEQW, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 118: { + {op: VPCMPEQD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPEQD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPCMPEQD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPCMPEQD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPCMPEQD, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPEQD, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPCMPEQD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPEQD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPCMPEQD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPEQD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 119: { + {op: VZEROALL, vexL: 1, opdigit: -1, ismem: -1}, + {op: VZEROUPPER, opdigit: -1, ismem: -1}, + }, + 120: { + {op: VCVTTPD2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTTPS2UDQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTTPS2UDQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, opdigit: -1, evex: true}, + {op: VCVTTPS2UDQ, args: [6]argType{argZmm_R, argKmask, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VCVTTSD2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTTSD2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTTSD2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTTSD2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTTSD2USI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTTSD2USI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTTSD2USI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTSD2USI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTSD2USI, args: [6]argType{argGPR64_R, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTTSS2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTSS2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTSS2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTSS2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTTSS2USI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTTSS2USI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTTSS2USI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTSS2USI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTSS2USI, args: [6]argType{argGPR64_R, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTTPD2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTTPD2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_B}, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTTPD2UQQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2UQQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTTPD2UQQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2UQQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTTPD2UQQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2UQQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2UQQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTTPS2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VCVTTPS2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTTPS2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTTPS2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTTPS2UQQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTTPS2UQQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, bcstScale: 4}, + {op: VCVTTPS2UQQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTTPS2UQQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTTPS2UQQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTTPS2UQQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTTPS2UQQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 121: { + {op: VCVTPD2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTPS2UDQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTPS2UDQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, opdigit: -1, evex: true}, + {op: VCVTPS2UDQ, args: [6]argType{argZmm_R, argKmask, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VCVTSD2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSD2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSD2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSD2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTSD2USI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTSD2USI, args: [6]argType{argGPR32_R, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTSD2USI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSD2USI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSD2USI, args: [6]argType{argGPR64_R, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTSS2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2USI, args: [6]argType{argGPR32_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTSS2USI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTSS2USI, args: [6]argType{argGPR32_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTSS2USI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSS2USI, args: [6]argType{argGPR64_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTSS2USI, args: [6]argType{argGPR64_R, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTPD2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTPD2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_B}, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTPD2UQQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2UQQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTPD2UQQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2UQQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTPD2UQQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2UQQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2UQQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTPS2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VCVTPS2UDQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTPS2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTPS2UDQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTPS2UQQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPS2UQQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, bcstScale: 4}, + {op: VCVTPS2UQQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTPS2UQQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTPS2UQQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTPS2UQQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPS2UQQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 122: { + {op: VCVTUDQ2PD, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTUDQ2PD, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTUDQ2PD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTUDQ2PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTUDQ2PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTUDQ2PS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VCVTTPD2QQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2QQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTTPD2QQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2QQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTTPD2QQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2QQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2QQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTTPS2QQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTTPS2QQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, bcstScale: 4}, + {op: VCVTTPS2QQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTTPS2QQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTTPS2QQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTTPS2QQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTTPS2QQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTUDQ2PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTUDQ2PD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, bcstScale: 4}, + {op: VCVTUDQ2PD, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTUDQ2PD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTUDQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTUDQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTUDQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTUDQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTUQQ2PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUQQ2PD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTUQQ2PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUQQ2PD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTUQQ2PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUQQ2PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUQQ2PD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTUQQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUQQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTUQQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_B}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUQQ2PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTUQQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUQQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUQQ2PS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 123: { + {op: VCVTUSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTUSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTUSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTUSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTUSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR64_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR64_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUSI2SD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTUSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTUSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTUSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTUSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTUSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTUSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCVTUSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR64_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR64_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTUSI2SS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTPD2QQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2QQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTPD2QQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2QQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTPD2QQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2QQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2QQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTPS2QQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPS2QQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, bcstScale: 4}, + {op: VCVTPS2QQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTPS2QQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTPS2QQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTPS2QQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPS2QQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 124: { + {op: VHADDPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VHADDPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VHADDPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VHADDPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VHADDPS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VHADDPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VHADDPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VHADDPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + }, + 125: { + {op: VHSUBPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VHSUBPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VHSUBPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VHSUBPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VHSUBPS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VHSUBPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VHSUBPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VHSUBPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + }, + 126: { + {op: VMOVD, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VMOVD, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VMOVD, args: [6]argType{argGPR32_B, argXmm_R}, vexP: 1, opdigit: -1}, + {op: VMOVD, args: [6]argType{argGPR32_B, argXmm_R}, vexP: 1, opdigit: -1}, + {op: VMOVQ, args: [6]argType{argM, argXmm_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVQ, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVQ, args: [6]argType{argGPR64_B, argXmm_R}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VMOVQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VMOVD, args: [6]argType{argGPR32_B, argXmmEvex_R}, vexP: 1, opdigit: -1, evex: true}, + {op: VMOVD, args: [6]argType{argGPR32_B, argXmmEvex_R}, vexP: 1, opdigit: -1, evex: true}, + {op: VMOVD, args: [6]argType{argM, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VMOVD, args: [6]argType{argM, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VMOVQ, args: [6]argType{argGPR64_B, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVQ, args: [6]argType{argM, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVQ, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVQ, args: [6]argType{argXmmEvex_R, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVD, args: [6]argType{argXmmEvex_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VMOVD, args: [6]argType{argXmmEvex_R, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 127: { + {op: VMOVDQA, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVDQA, args: [6]argType{argXmm_B, argXmm_R}, vexP: 1, opdigit: -1}, + {op: VMOVDQA, args: [6]argType{argM, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVDQA, args: [6]argType{argYmm_B, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VMOVDQU, args: [6]argType{argM, argXmm_R}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVDQU, args: [6]argType{argXmm_B, argXmm_R}, vexP: 3, opdigit: -1}, + {op: VMOVDQU, args: [6]argType{argM, argYmm_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVDQU, args: [6]argType{argYmm_B, argYmm_R}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VMOVDQA32, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVDQA32, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQA64, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQA64, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQU32, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVDQU32, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQU64, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU64, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQA32, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, opdigit: -1, evex: true}, + {op: VMOVDQA32, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQA32, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVDQA32, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQA64, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQA64, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQA64, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQA64, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU16, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU16, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQU16, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU16, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU16, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU16, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVDQU32, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VMOVDQU32, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQU32, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVDQU32, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU64, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU64, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQU64, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVDQU64, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU8, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 2, opdigit: -1, evex: true}, + {op: VMOVDQU8, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVDQU8, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VMOVDQU8, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMOVDQU8, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VMOVDQU8, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 144: { + {op: KMOVW, args: [6]argType{argK_R, argK_B}, opdigit: -1}, + {op: KMOVW, args: [6]argType{argK_R, argM}, opdigit: -1, ismem: 1, memBytes: 2}, + {op: KMOVB, args: [6]argType{argK_R, argK_B}, vexP: 1, opdigit: -1}, + {op: KMOVB, args: [6]argType{argK_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 1}, + {op: KMOVD, args: [6]argType{argK_R, argK_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: KMOVD, args: [6]argType{argK_R, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: KMOVQ, args: [6]argType{argK_R, argK_B}, vexW: 1, opdigit: -1}, + {op: KMOVQ, args: [6]argType{argK_R, argM}, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: KMOVB, args: [6]argType{argK_R, argK_B}, vexP: 1, opdigit: -1, evex: true}, + {op: KMOVB, args: [6]argType{argK_R, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, memBytes: 1}, + {op: KMOVD, args: [6]argType{argK_R, argK_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: KMOVD, args: [6]argType{argK_R, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, memBytes: 4}, + {op: KMOVQ, args: [6]argType{argK_R, argK_B}, vexW: 1, opdigit: -1, evex: true}, + {op: KMOVQ, args: [6]argType{argK_R, argM}, vexW: 1, opdigit: -1, ismem: 1, evex: true, memBytes: 8}, + {op: KMOVW, args: [6]argType{argK_R, argK_B}, opdigit: -1, evex: true}, + {op: KMOVW, args: [6]argType{argK_R, argM}, opdigit: -1, ismem: 1, evex: true, memBytes: 2}, + }, + 145: { + {op: KMOVW, args: [6]argType{argM, argK_R}, opdigit: -1, ismem: 1, memBytes: 2}, + {op: KMOVB, args: [6]argType{argM, argK_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 1}, + {op: KMOVD, args: [6]argType{argM, argK_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: KMOVQ, args: [6]argType{argM, argK_R}, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: KMOVB, args: [6]argType{argM, argK_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, memBytes: 1}, + {op: KMOVD, args: [6]argType{argM, argK_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, memBytes: 4}, + {op: KMOVQ, args: [6]argType{argM, argK_R}, vexW: 1, opdigit: -1, ismem: 1, evex: true, memBytes: 8}, + {op: KMOVW, args: [6]argType{argM, argK_R}, opdigit: -1, ismem: 1, evex: true, memBytes: 2}, + }, + 146: { + {op: KMOVW, args: [6]argType{argK_R, argGPR32_B}, opdigit: -1}, + {op: KMOVB, args: [6]argType{argK_R, argGPR32_B}, vexP: 1, opdigit: -1}, + {op: KMOVD, args: [6]argType{argK_R, argGPR32_B}, vexP: 2, opdigit: -1}, + {op: KMOVD, args: [6]argType{argK_R, argGPR32_B}, vexP: 2, opdigit: -1}, + {op: KMOVQ, args: [6]argType{argK_R, argGPR64_B}, vexP: 2, vexW: 1, opdigit: -1}, + {op: KMOVB, args: [6]argType{argK_R, argGPR32_B}, vexP: 1, opdigit: -1, evex: true}, + {op: KMOVD, args: [6]argType{argK_R, argGPR32_B}, vexP: 2, opdigit: -1, evex: true}, + {op: KMOVQ, args: [6]argType{argK_R, argGPR64_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: KMOVW, args: [6]argType{argK_R, argGPR32_B}, opdigit: -1, evex: true}, + }, + 147: { + {op: KMOVW, args: [6]argType{argGPR32_R, argK_B}, opdigit: -1}, + {op: KMOVB, args: [6]argType{argGPR32_R, argK_B}, vexP: 1, opdigit: -1}, + {op: KMOVD, args: [6]argType{argGPR32_R, argK_B}, vexP: 2, opdigit: -1}, + {op: KMOVD, args: [6]argType{argGPR32_R, argK_B}, vexP: 2, opdigit: -1}, + {op: KMOVQ, args: [6]argType{argGPR64_R, argK_B}, vexP: 2, vexW: 1, opdigit: -1}, + {op: KMOVB, args: [6]argType{argGPR32_R, argK_B}, vexP: 1, opdigit: -1, evex: true}, + {op: KMOVD, args: [6]argType{argGPR32_R, argK_B}, vexP: 2, opdigit: -1, evex: true}, + {op: KMOVQ, args: [6]argType{argGPR64_R, argK_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: KMOVW, args: [6]argType{argGPR32_R, argK_B}, opdigit: -1, evex: true}, + }, + 152: { + {op: KORTESTW, args: [6]argType{argK_R, argK_B}, opdigit: -1}, + {op: KORTESTB, args: [6]argType{argK_R, argK_B}, vexP: 1, opdigit: -1}, + {op: KORTESTD, args: [6]argType{argK_R, argK_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: KORTESTQ, args: [6]argType{argK_R, argK_B}, vexW: 1, opdigit: -1}, + }, + 153: { + {op: KTESTB, args: [6]argType{argK_R, argK_B}, vexP: 1, opdigit: -1}, + {op: KTESTD, args: [6]argType{argK_R, argK_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: KTESTQ, args: [6]argType{argK_R, argK_B}, vexW: 1, opdigit: -1}, + {op: KTESTW, args: [6]argType{argK_R, argK_B}, opdigit: -1}, + }, + 174: { + {op: VLDMXCSR, args: [6]argType{argM}, opdigit: 2, ismem: 1, memBytes: 4}, + {op: VSTMXCSR, args: [6]argType{argM}, opdigit: 3, ismem: 1, memBytes: 4}, + }, + 194: { + {op: VCMPPD, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCMPPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VCMPPD, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCMPPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VCMPPS, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCMPPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, opdigit: -1}, + {op: VCMPPS, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCMPPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexL: 1, opdigit: -1}, + {op: VCMPSD, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCMPSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 2, opdigit: -1}, + {op: VCMPSS, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VCMPSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 3, opdigit: -1}, + {op: VCMPPD, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCMPPD, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCMPPD, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCMPPS, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexL: 2, opdigit: -1, evex: true}, + {op: VCMPPS, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, opdigit: -1, evex: true}, + {op: VCMPPS, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VCMPSD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCMPSD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCMPSD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCMPSS, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 3, opdigit: -1, evex: true}, + {op: VCMPSS, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 3, opdigit: -1, evex: true}, + {op: VCMPSS, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VCMPPD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCMPPD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCMPPD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCMPPD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCMPPS, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VCMPPS, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCMPPS, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexL: 1, opdigit: -1, evex: true}, + {op: VCMPPS, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 196: { + {op: VPINSRW, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 2}, + {op: VPINSRW, args: [6]argType{argXmm_R, argXmm_N, argGPR32_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPINSRW, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPINSRW, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + }, + 197: { + {op: VPEXTRW, args: [6]argType{argGPR32_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPEXTRW_C5, args: [6]argType{argGPR32_R, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPEXTRW_C5, args: [6]argType{argGPR32_R, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + }, + 198: { + {op: VSHUFPD, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSHUFPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VSHUFPD, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VSHUFPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VSHUFPS, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSHUFPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, opdigit: -1}, + {op: VSHUFPS, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VSHUFPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexL: 1, opdigit: -1}, + {op: VSHUFPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSHUFPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VSHUFPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexL: 2, opdigit: -1, evex: true}, + {op: VSHUFPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VSHUFPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSHUFPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VSHUFPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSHUFPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VSHUFPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VSHUFPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VSHUFPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexL: 1, opdigit: -1, evex: true}, + {op: VSHUFPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 208: { + {op: VADDSUBPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VADDSUBPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VADDSUBPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VADDSUBPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VADDSUBPS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VADDSUBPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VADDSUBPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VADDSUBPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + }, + 209: { + {op: VPSRLW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRLW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSRLW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRLW, args: [6]argType{argYmm_R, argYmm_N, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSRLW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSRLW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRLW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSRLW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRLW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSRLW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 210: { + {op: VPSRLD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRLD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSRLD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRLD, args: [6]argType{argYmm_R, argYmm_N, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSRLD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSRLD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRLD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSRLD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRLD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSRLD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 211: { + {op: VPSRLQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRLQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSRLQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRLQ, args: [6]argType{argYmm_R, argYmm_N, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSRLQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRLQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRLQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRLQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRLQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRLQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 212: { + {op: VPADDQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPADDQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPADDQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPADDQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPADDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPADDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPADDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPADDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPADDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPADDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 213: { + {op: VPMULLW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMULLW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMULLW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMULLW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMULLW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMULLW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMULLW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMULLW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMULLW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMULLW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 214: { + {op: VMOVQ, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VMOVQ, args: [6]argType{argXmm_B, argXmm_R}, vexP: 1, opdigit: -1}, + {op: VMOVQ, args: [6]argType{argXmmEvex_B, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVQ, args: [6]argType{argM, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMOVD, args: [6]argType{argXmmEvex_B, argXmmEvex_R}, vexP: 1, opdigit: -1, evex: true}, + {op: VMOVD, args: [6]argType{argM, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 215: { + {op: VPMOVMSKB, args: [6]argType{argGPR32_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVMSKB, args: [6]argType{argGPR32_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 216: { + {op: VPSUBUSB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSUBUSB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSUBUSB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSUBUSB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSUBUSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSUBUSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSUBUSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSUBUSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSUBUSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSUBUSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 217: { + {op: VPSUBUSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSUBUSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSUBUSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSUBUSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSUBUSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSUBUSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSUBUSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSUBUSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSUBUSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSUBUSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 218: { + {op: VPMINUB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMINUB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMINUB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMINUB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMINUB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMINUB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMINUB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMINUB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMINUB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMINUB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 219: { + {op: VPAND, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPAND, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPAND, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPAND, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPANDD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPANDD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPANDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPANDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPANDD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPANDD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPANDD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPANDD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPANDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPANDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPANDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPANDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 220: { + {op: VPADDUSB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPADDUSB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPADDUSB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPADDUSB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPADDUSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPADDUSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPADDUSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPADDUSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPADDUSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPADDUSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 221: { + {op: VPADDUSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPADDUSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPADDUSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPADDUSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPADDUSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPADDUSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPADDUSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPADDUSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPADDUSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPADDUSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 222: { + {op: VPMAXUB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMAXUB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMAXUB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMAXUB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMAXUB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMAXUB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMAXUB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMAXUB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMAXUB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMAXUB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 223: { + {op: VPANDN, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPANDN, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPANDN, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPANDN, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPANDND, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPANDND, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPANDNQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPANDNQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPANDND, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPANDND, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPANDND, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPANDND, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPANDNQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPANDNQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPANDNQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPANDNQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 224: { + {op: VPAVGB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPAVGB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPAVGB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPAVGB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPAVGB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPAVGB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPAVGB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPAVGB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPAVGB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPAVGB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 225: { + {op: VPSRAW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRAW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSRAW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRAW, args: [6]argType{argYmm_R, argYmm_N, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSRAW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSRAW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRAW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSRAW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRAW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSRAW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 226: { + {op: VPSRAD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRAD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSRAD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRAD, args: [6]argType{argYmm_R, argYmm_N, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSRAD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSRAD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRAQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRAQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRAD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSRAD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRAD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSRAD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRAQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRAQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRAQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRAQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 227: { + {op: VPAVGW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPAVGW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPAVGW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPAVGW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPAVGW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPAVGW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPAVGW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPAVGW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPAVGW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPAVGW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 228: { + {op: VPMULHUW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMULHUW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMULHUW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMULHUW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMULHUW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMULHUW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMULHUW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMULHUW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMULHUW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMULHUW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 229: { + {op: VPMULHW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMULHW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMULHW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMULHW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMULHW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMULHW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMULHW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMULHW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMULHW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMULHW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 230: { + {op: VCVTDQ2PD, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTDQ2PD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VCVTDQ2PD, args: [6]argType{argYmm_R, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTDQ2PD, args: [6]argType{argYmm_R, argXmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VCVTPD2DQ, args: [6]argType{argXmm_R, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTPD2DQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VCVTPD2DQ, args: [6]argType{argXmm_R, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCVTPD2DQ, args: [6]argType{argXmm_R, argYmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + {op: VCVTTPD2DQ, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTTPD2DQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VCVTTPD2DQ, args: [6]argType{argXmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCVTTPD2DQ, args: [6]argType{argXmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VCVTDQ2PD, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTDQ2PD, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTDQ2PD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTPD2DQ, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2DQ, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2DQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTTPD2DQ, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2DQ, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2DQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTDQ2PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTDQ2PD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, bcstScale: 4}, + {op: VCVTDQ2PD, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTDQ2PD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTPD2DQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2DQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTPD2DQ, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_B}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTPD2DQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTQQ2PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTQQ2PD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTQQ2PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTQQ2PD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VCVTQQ2PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTQQ2PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTQQ2PD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VCVTTPD2DQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2DQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VCVTTPD2DQ, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCVTTPD2DQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 231: { + {op: VMOVNTDQ, args: [6]argType{argM, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVNTDQ, args: [6]argType{argM, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVNTDQ, args: [6]argType{argM, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMOVNTDQ, args: [6]argType{argM, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVNTDQ, args: [6]argType{argM, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 232: { + {op: VPSUBSB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSUBSB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSUBSB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSUBSB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSUBSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSUBSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSUBSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSUBSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSUBSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSUBSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 233: { + {op: VPSUBSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSUBSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSUBSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSUBSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSUBSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSUBSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSUBSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSUBSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSUBSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSUBSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 234: { + {op: VPMINSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMINSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMINSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMINSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMINSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMINSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMINSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMINSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMINSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMINSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 235: { + {op: VPOR, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPOR, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPOR, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPOR, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPORD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPORD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPORQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPORQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPORD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPORD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPORD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPORD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPORQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPORQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPORQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPORQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 236: { + {op: VPADDSB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPADDSB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPADDSB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPADDSB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPADDSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPADDSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPADDSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPADDSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPADDSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPADDSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 237: { + {op: VPADDSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPADDSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPADDSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPADDSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPADDSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPADDSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPADDSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPADDSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPADDSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPADDSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 238: { + {op: VPMAXSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMAXSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMAXSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMAXSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMAXSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMAXSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMAXSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMAXSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMAXSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMAXSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 239: { + {op: VPXOR, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPXOR, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPXOR, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPXOR, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPXORD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPXORD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPXORQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPXORQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPXORD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPXORD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPXORD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPXORD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPXORQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPXORQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPXORQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPXORQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 240: { + {op: VLDDQU, args: [6]argType{argXmm_R, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VLDDQU, args: [6]argType{argYmm_R, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 241: { + {op: VPSLLW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSLLW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSLLW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSLLW, args: [6]argType{argYmm_R, argYmm_N, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSLLW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSLLW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSLLW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSLLW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSLLW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSLLW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 242: { + {op: VPSLLD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSLLD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSLLD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSLLD, args: [6]argType{argYmm_R, argYmm_N, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSLLD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSLLD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSLLD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSLLD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSLLD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSLLD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 243: { + {op: VPSLLQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSLLQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSLLQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSLLQ, args: [6]argType{argYmm_R, argYmm_N, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSLLQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSLLQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSLLQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSLLQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSLLQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSLLQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 244: { + {op: VPMULUDQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMULUDQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMULUDQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMULUDQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMULUDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULUDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMULUDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULUDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMULUDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULUDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 245: { + {op: VPMADDWD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMADDWD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMADDWD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMADDWD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMADDWD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMADDWD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMADDWD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMADDWD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMADDWD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMADDWD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 246: { + {op: VPSADBW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSADBW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSADBW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSADBW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSADBW, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSADBW, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSADBW, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSADBW, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSADBW, args: [6]argType{argZmm_R, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSADBW, args: [6]argType{argZmm_R, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 247: { + {op: VMASKMOVDQU, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + }, + 248: { + {op: VPSUBB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSUBB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSUBB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSUBB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSUBB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSUBB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSUBB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSUBB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSUBB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSUBB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 249: { + {op: VPSUBW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSUBW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSUBW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSUBW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSUBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSUBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSUBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSUBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSUBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSUBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 250: { + {op: VPSUBD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSUBD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSUBD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSUBD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSUBD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSUBD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSUBD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSUBD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSUBD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSUBD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 251: { + {op: VPSUBQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSUBQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSUBQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSUBQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSUBQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSUBQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPSUBQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSUBQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSUBQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSUBQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 252: { + {op: VPADDB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPADDB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPADDB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPADDB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPADDB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPADDB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPADDB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPADDB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPADDB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPADDB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 253: { + {op: VPADDW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPADDW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPADDW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPADDW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPADDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPADDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPADDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPADDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPADDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPADDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 254: { + {op: VPADDD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPADDD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPADDD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPADDD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPADDD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPADDD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPADDD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPADDD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPADDD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPADDD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, +} + +var avxMap0F38 = [256][]*avxOptab{ + 0: { + {op: VPSHUFB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSHUFB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSHUFB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSHUFB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSHUFB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSHUFB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSHUFB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSHUFB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSHUFB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSHUFB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 1: { + {op: VPHADDW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPHADDW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPHADDW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPHADDW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 2: { + {op: VPHADDD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPHADDD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPHADDD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPHADDD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 3: { + {op: VPHADDSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPHADDSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPHADDSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPHADDSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 4: { + {op: VPMADDUBSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMADDUBSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMADDUBSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMADDUBSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMADDUBSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMADDUBSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMADDUBSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMADDUBSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMADDUBSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMADDUBSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 5: { + {op: VPHSUBW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPHSUBW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPHSUBW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPHSUBW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 6: { + {op: VPHSUBD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPHSUBD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPHSUBD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPHSUBD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 7: { + {op: VPHSUBSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPHSUBSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPHSUBSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPHSUBSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 8: { + {op: VPSIGNB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSIGNB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSIGNB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSIGNB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 9: { + {op: VPSIGNW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSIGNW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSIGNW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSIGNW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 10: { + {op: VPSIGND, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSIGND, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSIGND, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSIGND, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 11: { + {op: VPMULHRSW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMULHRSW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMULHRSW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMULHRSW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMULHRSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMULHRSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMULHRSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMULHRSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMULHRSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMULHRSW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 12: { + {op: VPERMILPS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPERMILPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPERMILPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERMILPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPERMILPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMILPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPERMILPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPERMILPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPERMILPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMILPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 13: { + {op: VPERMILPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPERMILPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPERMILPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERMILPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPERMILPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMILPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMILPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMILPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPERMILPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMILPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 14: { + {op: VTESTPS, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VTESTPS, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VTESTPS, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VTESTPS, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 15: { + {op: VTESTPD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VTESTPD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VTESTPD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VTESTPD, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 16: { + {op: VPMOVUSWB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVUSWB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVUSWB, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVUSWB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVUSWB, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVUSWB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSRLVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRLVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRLVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRLVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSRLVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRLVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 17: { + {op: VPMOVUSDB, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVUSDB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVUSDB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVUSDB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVUSDB, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVUSDB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPSRAVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRAVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSRAVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRAVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSRAVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRAVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 18: { + {op: VPMOVUSQB, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVUSQB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVUSQB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVUSQB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + {op: VPMOVUSQB, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVUSQB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPSLLVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSLLVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSLLVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSLLVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSLLVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSLLVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 19: { + {op: VCVTPH2PS, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTPH2PS, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VCVTPH2PS, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTPH2PS, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VCVTPH2PS, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTPH2PS, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPH2PS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVUSDW, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVUSDW, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VCVTPH2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPH2PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTPH2PS, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTPH2PS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVUSDW, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVUSDW, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVUSDW, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVUSDW, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 20: { + {op: VPMOVUSQW, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVUSQW, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPRORVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPRORVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPRORVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPRORVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMOVUSQW, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVUSQW, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVUSQW, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVUSQW, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPRORVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPRORVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPRORVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPRORVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPRORVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPRORVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPRORVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPRORVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 21: { + {op: VPMOVUSQD, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVUSQD, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPROLVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPROLVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPROLVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPROLVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMOVUSQD, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVUSQD, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVUSQD, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVUSQD, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPROLVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPROLVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPROLVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPROLVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPROLVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPROLVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPROLVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPROLVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 22: { + {op: VPERMPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERMPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPERMPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPERMPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPERMPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 23: { + {op: VPTEST, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPTEST, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPTEST, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPTEST, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 24: { + {op: VBROADCASTSS, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VBROADCASTSS, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VBROADCASTSS, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VBROADCASTSS, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VBROADCASTSS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VBROADCASTSS, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VBROADCASTSS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VBROADCASTSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VBROADCASTSS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VBROADCASTSS, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + }, + 25: { + {op: VBROADCASTSD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VBROADCASTSD, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VBROADCASTSD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VBROADCASTSD, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VBROADCASTF32X2, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VBROADCASTF32X2, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VBROADCASTF32X2, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VBROADCASTF32X2, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VBROADCASTSD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VBROADCASTSD, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + }, + 26: { + {op: VBROADCASTF128, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VBROADCASTF32X4, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VBROADCASTF32X4, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VBROADCASTF64X2, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VBROADCASTF64X2, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 27: { + {op: VBROADCASTF64X4, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VBROADCASTF32X8, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 28: { + {op: VPABSB, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPABSB, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPABSB, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPABSB, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPABSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPABSB, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPABSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPABSB, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPABSB, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPABSB, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 29: { + {op: VPABSW, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPABSW, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPABSW, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPABSW, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPABSW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPABSW, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPABSW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPABSW, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPABSW, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPABSW, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 30: { + {op: VPABSD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPABSD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPABSD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPABSD, args: [6]argType{argYmm_R, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPABSD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPABSD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPABSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPABSD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPABSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPABSD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 31: { + {op: VPABSQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPABSQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPABSQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPABSQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPABSQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPABSQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 32: { + {op: VPMOVSXBW, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVSXBW, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVSXBW, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVSXBW, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMOVSWB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVSWB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSWB, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSWB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVSWB, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSWB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVSXBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVSXBW, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSXBW, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSXBW, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVSXBW, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSXBW, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 33: { + {op: VPMOVSXBD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVSXBD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPMOVSXBD, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVSXBD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVSDB, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSDB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVSXBD, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSXBD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVSDB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVSDB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVSDB, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSDB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSXBD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVSXBD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVSXBD, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSXBD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 34: { + {op: VPMOVSXBQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVSXBQ, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 2}, + {op: VPMOVSXBQ, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVSXBQ, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPMOVSQB, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSQB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSXBQ, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSXBQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSQB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVSQB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + {op: VPMOVSQB, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSQB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVSXBQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVSXBQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + {op: VPMOVSXBQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSXBQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 35: { + {op: VPMOVSXWD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVSXWD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVSXWD, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVSXWD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMOVSDW, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSDW, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVSXWD, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSXWD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVSDW, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVSDW, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSDW, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSDW, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVSXWD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVSXWD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSXWD, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSXWD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 36: { + {op: VPMOVSXWQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVSXWQ, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPMOVSXWQ, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVSXWQ, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVSQW, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSQW, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVSXWQ, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSXWQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVSQW, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVSQW, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVSQW, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSQW, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSXWQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVSXWQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVSXWQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSXWQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 37: { + {op: VPMOVSXDQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVSXDQ, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVSXDQ, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVSXDQ, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMOVSQD, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSQD, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVSXDQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVSXDQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVSQD, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVSQD, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSQD, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSQD, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVSXDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVSXDQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVSXDQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVSXDQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 38: { + {op: VPTESTMB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPTESTMB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPTESTMB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPTESTMB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPTESTMB, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPTESTMB, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPTESTMW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTMW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPTESTMW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTMW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPTESTMW, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTMW, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPTESTNMB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPTESTNMB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPTESTNMB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPTESTNMB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPTESTNMB, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPTESTNMB, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPTESTNMW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTNMW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPTESTNMW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTNMW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPTESTNMW, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTNMW, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 39: { + {op: VPTESTMD, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPTESTMD, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPTESTMQ, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTMQ, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPTESTNMD, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPTESTNMD, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPTESTNMQ, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTNMQ, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPTESTMD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPTESTMD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPTESTMD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPTESTMD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPTESTMQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTMQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPTESTMQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTMQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPTESTNMD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPTESTNMD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPTESTNMD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPTESTNMD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPTESTNMQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTNMQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 3, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPTESTNMQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPTESTNMQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 40: { + {op: VPMULDQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMULDQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMULDQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMULDQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMULDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMOVM2B, args: [6]argType{argXmmEvex_R, argK_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVM2B, args: [6]argType{argYmmEvex_R, argK_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVM2B, args: [6]argType{argZmm_R, argK_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVM2W, args: [6]argType{argXmmEvex_R, argK_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VPMOVM2W, args: [6]argType{argYmmEvex_R, argK_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMOVM2W, args: [6]argType{argZmm_R, argK_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMULDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 41: { + {op: VPCMPEQQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPEQQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPCMPEQQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPCMPEQQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPCMPEQQ, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPEQQ, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPCMPEQQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPEQQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPCMPEQQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPEQQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPMOVB2M, args: [6]argType{argK_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVB2M, args: [6]argType{argK_R, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVB2M, args: [6]argType{argK_R, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVW2M, args: [6]argType{argK_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VPMOVW2M, args: [6]argType{argK_R, argYmmEvex_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMOVW2M, args: [6]argType{argK_R, argZmm_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + }, + 42: { + {op: VMOVNTDQA, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMOVNTDQA, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMOVNTDQA, args: [6]argType{argZmm_R, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPBROADCASTMB2Q, args: [6]argType{argZmm_R, argK_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMOVNTDQA, args: [6]argType{argXmmEvex_R, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMOVNTDQA, args: [6]argType{argYmmEvex_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPBROADCASTMB2Q, args: [6]argType{argXmmEvex_R, argK_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTMB2Q, args: [6]argType{argYmmEvex_R, argK_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + }, + 43: { + {op: VPACKUSDW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPACKUSDW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPACKUSDW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPACKUSDW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPACKUSDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPACKUSDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPACKUSDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPACKUSDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPACKUSDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPACKUSDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 44: { + {op: VMASKMOVPS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMASKMOVPS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VSCALEFPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSCALEFPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSCALEFPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VSCALEFPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VSCALEFPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VSCALEFPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VSCALEFPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSCALEFPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VSCALEFPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSCALEFPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VSCALEFPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VSCALEFPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VSCALEFPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VSCALEFPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 45: { + {op: VMASKMOVPD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMASKMOVPD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VSCALEFSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSCALEFSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSCALEFSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VSCALEFSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VSCALEFSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VSCALEFSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 46: { + {op: VMASKMOVPS, args: [6]argType{argM, argXmm_N, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMASKMOVPS, args: [6]argType{argM, argYmm_N, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 47: { + {op: VMASKMOVPD, args: [6]argType{argM, argXmm_N, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMASKMOVPD, args: [6]argType{argM, argYmm_N, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 48: { + {op: VPMOVZXBW, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVZXBW, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVZXBW, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVZXBW, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMOVWB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVWB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVWB, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVWB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVWB, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVWB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVZXBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVZXBW, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVZXBW, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVZXBW, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVZXBW, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVZXBW, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 49: { + {op: VPMOVZXBD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVZXBD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPMOVZXBD, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVZXBD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVDB, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVDB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVZXBD, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVZXBD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVDB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVDB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVDB, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVDB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVZXBD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVZXBD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVZXBD, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVZXBD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 50: { + {op: VPMOVZXBQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVZXBQ, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 2}, + {op: VPMOVZXBQ, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVZXBQ, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPMOVQB, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVQB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVZXBQ, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVZXBQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVQB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVQB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + {op: VPMOVQB, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVQB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVZXBQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVZXBQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + {op: VPMOVZXBQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVZXBQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 51: { + {op: VPMOVZXWD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVZXWD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVZXWD, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVZXWD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMOVDW, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVDW, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVZXWD, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVZXWD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVDW, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVDW, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVDW, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVDW, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVZXWD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVZXWD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVZXWD, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVZXWD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 52: { + {op: VPMOVZXWQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVZXWQ, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPMOVZXWQ, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVZXWQ, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVQW, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVQW, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVZXWQ, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVZXWQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVQW, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVQW, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVQW, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVQW, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVZXWQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVZXWQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPMOVZXWQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVZXWQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 53: { + {op: VPMOVZXDQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMOVZXDQ, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPMOVZXDQ, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMOVZXDQ, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMOVQD, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVQD, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVZXDQ, args: [6]argType{argZmm_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVZXDQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMOVQD, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVQD, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVQD, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVQD, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMOVZXDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMOVZXDQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPMOVZXDQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVZXDQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 54: { + {op: VPERMD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERMD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPERMD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPERMQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPERMQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 55: { + {op: VPCMPGTQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPGTQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPCMPGTQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPCMPGTQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPCMPGTQ, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPGTQ, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPCMPGTQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPGTQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPCMPGTQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPGTQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 56: { + {op: VPMINSB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMINSB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMINSB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMINSB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMINSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMINSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMINSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMINSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMINSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMINSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPMOVM2D, args: [6]argType{argXmmEvex_R, argK_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVM2D, args: [6]argType{argYmmEvex_R, argK_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVM2D, args: [6]argType{argZmm_R, argK_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVM2Q, args: [6]argType{argXmmEvex_R, argK_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VPMOVM2Q, args: [6]argType{argYmmEvex_R, argK_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMOVM2Q, args: [6]argType{argZmm_R, argK_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + }, + 57: { + {op: VPMINSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMINSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMINSD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMINSD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMINSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMINSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPMINSQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMINSQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMINSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMINSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPMINSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMINSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPMINSQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMINSQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMINSQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMINSQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPMOVD2M, args: [6]argType{argK_R, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPMOVD2M, args: [6]argType{argK_R, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMOVD2M, args: [6]argType{argK_R, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPMOVQ2M, args: [6]argType{argK_R, argXmmEvex_B}, vexP: 3, vexW: 1, opdigit: -1, evex: true}, + {op: VPMOVQ2M, args: [6]argType{argK_R, argYmmEvex_B}, vexP: 3, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMOVQ2M, args: [6]argType{argK_R, argZmm_B}, vexP: 3, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + }, + 58: { + {op: VPMINUW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMINUW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMINUW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMINUW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPBROADCASTMW2D, args: [6]argType{argZmm_R, argK_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPBROADCASTMW2D, args: [6]argType{argXmmEvex_R, argK_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPBROADCASTMW2D, args: [6]argType{argYmmEvex_R, argK_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPMINUW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMINUW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMINUW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMINUW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMINUW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMINUW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 59: { + {op: VPMINUD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMINUD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMINUD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMINUD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMINUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMINUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPMINUQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMINUQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMINUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMINUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPMINUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMINUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPMINUQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMINUQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMINUQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMINUQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 60: { + {op: VPMAXSB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMAXSB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMAXSB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMAXSB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMAXSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMAXSB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMAXSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMAXSB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMAXSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMAXSB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 61: { + {op: VPMAXSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMAXSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMAXSD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMAXSD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMAXSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMAXSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPMAXSQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMAXSQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMAXSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMAXSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPMAXSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMAXSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPMAXSQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMAXSQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMAXSQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMAXSQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 62: { + {op: VPMAXUW, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMAXUW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMAXUW, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMAXUW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMAXUW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMAXUW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPMAXUW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMAXUW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPMAXUW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMAXUW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 63: { + {op: VPMAXUD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMAXUD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMAXUD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMAXUD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMAXUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMAXUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPMAXUQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMAXUQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMAXUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMAXUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPMAXUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMAXUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPMAXUQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMAXUQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMAXUQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMAXUQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 64: { + {op: VPMULLD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMULLD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPMULLD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMULLD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPMULLD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPMULLD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPMULLD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPMULLD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPMULLD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPMULLD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPMULLQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULLQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMULLQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULLQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPMULLQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULLQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 65: { + {op: VPHMINPOSUW, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPHMINPOSUW, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + }, + 66: { + {op: VGETEXPPD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VGETEXPPD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETEXPPD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VGETEXPPS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VGETEXPPS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VGETEXPPS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VGETEXPPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETEXPPD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VGETEXPPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETEXPPD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VGETEXPPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VGETEXPPS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VGETEXPPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VGETEXPPS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 67: { + {op: VGETEXPSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETEXPSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETEXPSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VGETEXPSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VGETEXPSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VGETEXPSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 68: { + {op: VPLZCNTD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPLZCNTD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPLZCNTQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPLZCNTQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPLZCNTD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPLZCNTD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPLZCNTD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPLZCNTD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPLZCNTQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPLZCNTQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPLZCNTQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPLZCNTQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 69: { + {op: VPSRLVD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRLVD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSRLVD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSRLVD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSRLVQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRLVQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VPSRLVQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSRLVQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VPSRLVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSRLVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSRLVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRLVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPSRLVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSRLVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSRLVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSRLVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSRLVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRLVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSRLVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRLVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 70: { + {op: VPSRAVD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSRAVD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSRAVD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSRAVD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSRAVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSRAVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSRAVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRAVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPSRAVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSRAVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSRAVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSRAVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSRAVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRAVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSRAVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSRAVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 71: { + {op: VPSLLVD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSLLVD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPSLLVD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSLLVD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPSLLVQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPSLLVQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VPSLLVQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPSLLVQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VPSLLVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSLLVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSLLVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSLLVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPSLLVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSLLVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSLLVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSLLVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSLLVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSLLVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSLLVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSLLVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 76: { + {op: VRCP14PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VRCP14PD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VRCP14PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VRCP14PS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VRCP14PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRCP14PD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VRCP14PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRCP14PD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VRCP14PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRCP14PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VRCP14PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VRCP14PS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 77: { + {op: VRCP14SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRCP14SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VRCP14SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRCP14SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 78: { + {op: VRSQRT14PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VRSQRT14PD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VRSQRT14PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VRSQRT14PS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VRSQRT14PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRSQRT14PD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VRSQRT14PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRSQRT14PD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VRSQRT14PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRSQRT14PS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VRSQRT14PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VRSQRT14PS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 79: { + {op: VRSQRT14SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRSQRT14SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VRSQRT14SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRSQRT14SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 80: { + {op: VPDPBUSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPDPBUSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPBUSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPBUSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPBUSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPBUSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPBUSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPDPBUSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPBUSD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPDPBUSD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPBSSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VPDPBSSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPBSSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPBSSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPBSSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPBSSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPBSUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPDPBSUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPBSUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPBSUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPBSUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPBSUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPBUUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VPDPBUUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPBUUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPBUUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPBUUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPBUUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPBSSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VPDPBSSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPBSSD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + {op: VPDPBSSD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPBSUD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VPDPBSUD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPBSUD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VPDPBSUD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPBUUD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VPDPBUUD, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPBUUD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VPDPBUUD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 81: { + {op: VPDPBUSDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPDPBUSDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPBUSDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPBUSDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPBUSDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPBUSDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPBUSDS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPDPBUSDS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPBUSDS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPDPBUSDS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPBSSDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VPDPBSSDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPBSSDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPBSSDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPBSSDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPBSSDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPBSUDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPDPBSUDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPBSUDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPBSUDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPBSUDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPBSUDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPBUUDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VPDPBUUDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPBUUDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPBUUDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPBUUDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPBUUDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPBSSDS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VPDPBSSDS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPBSSDS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + {op: VPDPBSSDS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPBSUDS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VPDPBSUDS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPBSUDS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VPDPBSUDS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPBUUDS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VPDPBUUDS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPBUUDS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VPDPBUUDS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 82: { + {op: VPDPWSSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPDPWSSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPWSSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPWSSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPWSSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPWSSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VDPBF16PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VDPBF16PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VDPBF16PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VDPBF16PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VDPBF16PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VDPBF16PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VP4DPWSSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPDPWSSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPDPWSSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPWSSD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPDPWSSD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VDPPHPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VDPPHPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VDPPHPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VDPPHPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VDPPHPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VDPPHPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 83: { + {op: VPDPWSSDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPDPWSSDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPWSSDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPWSSDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPWSSDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPWSSDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VP4DPWSSDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPDPWSSDS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPDPWSSDS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPWSSDS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPDPWSSDS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 84: { + {op: VPOPCNTB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPOPCNTB, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPOPCNTB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPOPCNTB, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPOPCNTB, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPOPCNTB, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPOPCNTW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPOPCNTW, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPOPCNTW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPOPCNTW, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPOPCNTW, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPOPCNTW, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 85: { + {op: VPOPCNTD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPOPCNTD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPOPCNTQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPOPCNTQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPOPCNTD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPOPCNTD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPOPCNTD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPOPCNTD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPOPCNTQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPOPCNTQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPOPCNTQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPOPCNTQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 88: { + {op: VPBROADCASTD, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPBROADCASTD, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPBROADCASTD, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPBROADCASTD, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPBROADCASTD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPBROADCASTD, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPBROADCASTD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPBROADCASTD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPBROADCASTD, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + }, + 89: { + {op: VPBROADCASTQ, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPBROADCASTQ, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPBROADCASTQ, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPBROADCASTQ, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPBROADCASTQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPBROADCASTQ, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VBROADCASTI32X2, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VBROADCASTI32X2, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VBROADCASTI32X2, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VBROADCASTI32X2, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VBROADCASTI32X2, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VBROADCASTI32X2, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPBROADCASTQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPBROADCASTQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VPBROADCASTQ, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + }, + 90: { + {op: VBROADCASTI128, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VBROADCASTI32X4, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VBROADCASTI32X4, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VBROADCASTI64X2, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VBROADCASTI64X2, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 91: { + {op: VBROADCASTI64X4, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VBROADCASTI32X8, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 98: { + {op: VPEXPANDB, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 16}, + {op: VPEXPANDB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPEXPANDB, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 32}, + {op: VPEXPANDB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPEXPANDB, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 64}, + {op: VPEXPANDB, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPEXPANDW, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 16}, + {op: VPEXPANDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPEXPANDW, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 32}, + {op: VPEXPANDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPEXPANDW, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 64}, + {op: VPEXPANDW, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + }, + 99: { + {op: VPCOMPRESSB, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 16}, + {op: VPCOMPRESSB, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCOMPRESSB, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 32}, + {op: VPCOMPRESSB, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCOMPRESSB, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 64}, + {op: VPCOMPRESSB, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCOMPRESSW, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 16}, + {op: VPCOMPRESSW, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCOMPRESSW, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 32}, + {op: VPCOMPRESSW, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCOMPRESSW, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 64}, + {op: VPCOMPRESSW, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + }, + 100: { + {op: VPBLENDMD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPBLENDMD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPBLENDMQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPBLENDMQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPBLENDMD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPBLENDMD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPBLENDMD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPBLENDMD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPBLENDMQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPBLENDMQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPBLENDMQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPBLENDMQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 101: { + {op: VBLENDMPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VBLENDMPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VBLENDMPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VBLENDMPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VBLENDMPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VBLENDMPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VBLENDMPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VBLENDMPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VBLENDMPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VBLENDMPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VBLENDMPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VBLENDMPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 102: { + {op: VPBLENDMB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPBLENDMB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPBLENDMB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPBLENDMB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPBLENDMB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPBLENDMB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPBLENDMW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPBLENDMW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPBLENDMW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPBLENDMW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPBLENDMW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPBLENDMW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 103: { + {op: VCVT2PS2PHX, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVT2PS2PHX, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVT2PS2PHX, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VCVT2PS2PHX, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVT2PS2PHX, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VCVT2PS2PHX, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVT2PS2PHX, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 104: { + {op: VP2INTERSECTD, args: [6]argType{argK_R, argXmmEvex_N, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VP2INTERSECTD, args: [6]argType{argK_R, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VP2INTERSECTD, args: [6]argType{argK_R, argYmmEvex_N, argYmmEvex_B}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VP2INTERSECTD, args: [6]argType{argK_R, argYmmEvex_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VP2INTERSECTD, args: [6]argType{argK_R, argZmm_N, argZmm_B}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VP2INTERSECTD, args: [6]argType{argK_R, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VP2INTERSECTQ, args: [6]argType{argK_R, argXmmEvex_N, argXmmEvex_B}, vexP: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VP2INTERSECTQ, args: [6]argType{argK_R, argXmmEvex_N, argM}, vexP: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VP2INTERSECTQ, args: [6]argType{argK_R, argYmmEvex_N, argYmmEvex_B}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VP2INTERSECTQ, args: [6]argType{argK_R, argYmmEvex_N, argM}, vexP: 2, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VP2INTERSECTQ, args: [6]argType{argK_R, argZmm_N, argZmm_B}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VP2INTERSECTQ, args: [6]argType{argK_R, argZmm_N, argM}, vexP: 2, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 112: { + {op: VPSHLDVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSHLDVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSHLDVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 113: { + {op: VPSHLDVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSHLDVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSHLDVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSHLDVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSHLDVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSHLDVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSHLDVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSHLDVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPSHLDVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 114: { + {op: VCVTNE2PS2BF16, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVTNE2PS2BF16, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTNE2PS2BF16, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTNE2PS2BF16, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTNE2PS2BF16, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTNE2PS2BF16, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VCVTNEPS2BF16, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTNEPS2BF16, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VCVTNEPS2BF16, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTNEPS2BF16, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VCVTNEPS2BF16, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTNEPS2BF16, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSHRDVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDVW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSHRDVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDVW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSHRDVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDVW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VCVTNEPS2BF16, args: [6]argType{argXmm_R, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VCVTNEPS2BF16, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTNEPS2BF16, args: [6]argType{argXmm_R, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VCVTNEPS2BF16, args: [6]argType{argXmm_R, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 115: { + {op: VPSHRDVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSHRDVD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSHRDVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSHRDVD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSHRDVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSHRDVD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSHRDVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDVQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSHRDVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDVQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPSHRDVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDVQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 116: { + {op: VCVT2PH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VCVT2PH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VCVT2PH2BF8, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VCVT2PH2BF8, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VCVT2PH2BF8, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VCVT2PH2BF8, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + {op: VCVTBIASPH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VCVTBIASPH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VCVTBIASPH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTBIASPH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VCVTBIASPH2BF8, args: [6]argType{argYmmEvex_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTBIASPH2BF8, args: [6]argType{argYmmEvex_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + {op: VCVTPH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VCVTPH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VCVTPH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTPH2BF8, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VCVTPH2BF8, args: [6]argType{argYmmEvex_R, argKmask, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTPH2BF8, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + }, + 117: { + {op: VPERMI2W, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMI2W, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPERMI2W, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMI2W, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPERMI2W, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMI2W, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPERMI2B, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPERMI2B, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPERMI2B, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMI2B, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPERMI2B, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMI2B, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 118: { + {op: VPERMI2D, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMI2D, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPERMI2Q, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMI2Q, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMI2D, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPERMI2D, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPERMI2D, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMI2D, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPERMI2Q, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMI2Q, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPERMI2Q, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMI2Q, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 119: { + {op: VPERMI2PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMI2PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMI2PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMI2PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPERMI2PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMI2PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPERMI2PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMI2PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPERMI2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPERMI2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPERMI2PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMI2PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 120: { + {op: VPBROADCASTB, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 1}, + {op: VPBROADCASTB, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPBROADCASTB, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 1}, + {op: VPBROADCASTB, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPBROADCASTB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTB, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 1}, + {op: VPBROADCASTB, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTB, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 1}, + {op: VPBROADCASTB, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPBROADCASTB, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 1}, + }, + 121: { + {op: VPBROADCASTW, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 2}, + {op: VPBROADCASTW, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPBROADCASTW, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 2}, + {op: VPBROADCASTW, args: [6]argType{argYmm_R, argXmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPBROADCASTW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTW, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + {op: VPBROADCASTW, args: [6]argType{argYmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTW, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + {op: VPBROADCASTW, args: [6]argType{argZmm_R, argKmask, argXmmEvex_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPBROADCASTW, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + }, + 122: { + {op: VPBROADCASTB, args: [6]argType{argXmmEvex_R, argKmask, argGPR32_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTB, args: [6]argType{argYmmEvex_R, argKmask, argGPR32_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTB, args: [6]argType{argZmm_R, argKmask, argGPR32_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + }, + 123: { + {op: VPBROADCASTW, args: [6]argType{argXmmEvex_R, argKmask, argGPR32_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTW, args: [6]argType{argYmmEvex_R, argKmask, argGPR32_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTW, args: [6]argType{argZmm_R, argKmask, argGPR32_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + }, + 124: { + {op: VPBROADCASTD, args: [6]argType{argZmm_R, argKmask, argGPR32_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPBROADCASTD, args: [6]argType{argZmm_R, argKmask, argGPR32_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPBROADCASTQ, args: [6]argType{argZmm_R, argKmask, argGPR64_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTD, args: [6]argType{argXmmEvex_R, argKmask, argGPR32_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTD, args: [6]argType{argXmmEvex_R, argKmask, argGPR32_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTD, args: [6]argType{argYmmEvex_R, argKmask, argGPR32_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTD, args: [6]argType{argYmmEvex_R, argKmask, argGPR32_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTQ, args: [6]argType{argXmmEvex_R, argKmask, argGPR64_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPBROADCASTQ, args: [6]argType{argYmmEvex_R, argKmask, argGPR64_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + }, + 125: { + {op: VPERMT2W, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMT2W, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPERMT2W, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMT2W, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPERMT2W, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMT2W, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPERMT2B, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPERMT2B, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPERMT2B, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMT2B, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPERMT2B, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMT2B, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 126: { + {op: VPERMT2D, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMT2D, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPERMT2Q, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMT2Q, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMT2D, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPERMT2D, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPERMT2D, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMT2D, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPERMT2Q, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMT2Q, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPERMT2Q, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMT2Q, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 127: { + {op: VPERMT2PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMT2PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMT2PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMT2PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPERMT2PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMT2PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPERMT2PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMT2PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPERMT2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPERMT2PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPERMT2PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMT2PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 131: { + {op: VPMULTISHIFTQB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULTISHIFTQB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMULTISHIFTQB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULTISHIFTQB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPMULTISHIFTQB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMULTISHIFTQB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 136: { + {op: VEXPANDPD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 64}, + {op: VEXPANDPD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VEXPANDPS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 64}, + {op: VEXPANDPS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VEXPANDPD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 16}, + {op: VEXPANDPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VEXPANDPD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 32}, + {op: VEXPANDPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VEXPANDPS, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 16}, + {op: VEXPANDPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VEXPANDPS, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 32}, + {op: VEXPANDPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + }, + 137: { + {op: VPEXPANDD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 64}, + {op: VPEXPANDD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPEXPANDQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 64}, + {op: VPEXPANDQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPEXPANDD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 16}, + {op: VPEXPANDD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPEXPANDD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 32}, + {op: VPEXPANDD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPEXPANDQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 16}, + {op: VPEXPANDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPEXPANDQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 32}, + {op: VPEXPANDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + }, + 138: { + {op: VCOMPRESSPD, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 64}, + {op: VCOMPRESSPD, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VCOMPRESSPS, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 64}, + {op: VCOMPRESSPS, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VCOMPRESSPD, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 16}, + {op: VCOMPRESSPD, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCOMPRESSPD, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 32}, + {op: VCOMPRESSPD, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VCOMPRESSPS, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 16}, + {op: VCOMPRESSPS, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, opdigit: -1, evex: true}, + {op: VCOMPRESSPS, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 32}, + {op: VCOMPRESSPS, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + }, + 139: { + {op: VPCOMPRESSD, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 64}, + {op: VPCOMPRESSD, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCOMPRESSQ, args: [6]argType{argM, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 64}, + {op: VPCOMPRESSQ, args: [6]argType{argZmm_B, argKmask, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPCOMPRESSD, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 16}, + {op: VPCOMPRESSD, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCOMPRESSD, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 32}, + {op: VPCOMPRESSD, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCOMPRESSQ, args: [6]argType{argM, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 16}, + {op: VPCOMPRESSQ, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCOMPRESSQ, args: [6]argType{argM, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 32}, + {op: VPCOMPRESSQ, args: [6]argType{argYmmEvex_B, argKmask, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + }, + 140: { + {op: VPMASKMOVD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMASKMOVD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMASKMOVQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMASKMOVQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 141: { + {op: VPERMW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPERMW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPERMW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPERMB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPERMB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPERMB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPERMB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 142: { + {op: VPMASKMOVD, args: [6]argType{argM, argXmm_N, argXmm_R}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMASKMOVD, args: [6]argType{argM, argYmm_N, argYmm_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPMASKMOVQ, args: [6]argType{argM, argXmm_N, argXmm_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMASKMOVQ, args: [6]argType{argM, argYmm_N, argYmm_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 143: { + {op: VPSHUFBITQMB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSHUFBITQMB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSHUFBITQMB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSHUFBITQMB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSHUFBITQMB, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSHUFBITQMB, args: [6]argType{argK_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 144: { + {op: VPGATHERDQ, args: [6]argType{argYmm_R, argM, argYmm_N}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8, vsib: true}, + {op: VPGATHERDQ, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8, vsib: true}, + {op: VPGATHERDD, args: [6]argType{argYmm_R, argM, argYmm_N}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 4, vsib: true}, + {op: VPGATHERDD, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4, vsib: true}, + {op: VPGATHERDD, args: [6]argType{argZmm_R, argKnot0, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPGATHERDQ, args: [6]argType{argZmm_R, argKnot0, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VPGATHERDD, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPGATHERDD, args: [6]argType{argYmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPGATHERDQ, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VPGATHERDQ, args: [6]argType{argYmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + }, + 145: { + {op: VPGATHERQQ, args: [6]argType{argYmm_R, argM, argYmm_N}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8, vsib: true}, + {op: VPGATHERQQ, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8, vsib: true}, + {op: VPGATHERQD, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 4, vsib: true}, + {op: VPGATHERQD, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4, vsib: true}, + {op: VPGATHERQD, args: [6]argType{argYmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPGATHERQQ, args: [6]argType{argZmm_R, argKnot0, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VPGATHERQD, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPGATHERQD, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPGATHERQQ, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VPGATHERQQ, args: [6]argType{argYmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + }, + 146: { + {op: VGATHERDPD, args: [6]argType{argYmm_R, argM, argYmm_N}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8, vsib: true}, + {op: VGATHERDPD, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8, vsib: true}, + {op: VGATHERDPS, args: [6]argType{argYmm_R, argM, argYmm_N}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 4, vsib: true}, + {op: VGATHERDPS, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4, vsib: true}, + {op: VGATHERDPD, args: [6]argType{argZmm_R, argKnot0, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERDPS, args: [6]argType{argZmm_R, argKnot0, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VGATHERDPD, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERDPD, args: [6]argType{argYmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERDPS, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VGATHERDPS, args: [6]argType{argYmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + }, + 147: { + {op: VGATHERQPD, args: [6]argType{argYmm_R, argM, argYmm_N}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8, vsib: true}, + {op: VGATHERQPD, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8, vsib: true}, + {op: VGATHERQPS, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 4, vsib: true}, + {op: VGATHERQPS, args: [6]argType{argXmm_R, argM, argXmm_N}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4, vsib: true}, + {op: VGATHERQPD, args: [6]argType{argZmm_R, argKnot0, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERQPS, args: [6]argType{argYmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VGATHERQPD, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERQPD, args: [6]argType{argYmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERQPS, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VGATHERQPS, args: [6]argType{argXmmEvex_R, argKnot0, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + }, + 150: { + {op: VFMADDSUB132PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADDSUB132PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMADDSUB132PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADDSUB132PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMADDSUB132PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADDSUB132PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMADDSUB132PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADDSUB132PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMADDSUB132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMADDSUB132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMADDSUB132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMADDSUB132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMADDSUB132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMADDSUB132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMADDSUB132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 151: { + {op: VFMSUBADD132PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUBADD132PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMSUBADD132PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUBADD132PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMSUBADD132PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUBADD132PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMSUBADD132PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUBADD132PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMSUBADD132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMSUBADD132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMSUBADD132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMSUBADD132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMSUBADD132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMSUBADD132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMSUBADD132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 152: { + {op: VFMADD132PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADD132PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMADD132PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADD132PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMADD132PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADD132PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMADD132PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADD132PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMADD132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMADD132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMADD132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMADD132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMADD132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMADD132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMADD132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMADD132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 153: { + {op: VFMADD132SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFMADD132SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMADD132SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFMADD132SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMADD132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFMADD132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 154: { + {op: VFMSUB132PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUB132PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMSUB132PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUB132PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMSUB132PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUB132PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMSUB132PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUB132PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMSUB132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMSUB132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMSUB132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMSUB132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMSUB132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMSUB132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMSUB132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMSUB132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: V4FMADDPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 155: { + {op: VFMSUB132SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFMSUB132SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMSUB132SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFMSUB132SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMSUB132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFMSUB132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: V4FMADDSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 156: { + {op: VFNMADD132PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMADD132PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMADD132PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMADD132PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFNMADD132PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMADD132PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMADD132PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMADD132PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFNMADD132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFNMADD132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFNMADD132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFNMADD132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFNMADD132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFNMADD132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFNMADD132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFNMADD132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 157: { + {op: VFNMADD132SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFNMADD132SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMADD132SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFNMADD132SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMADD132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFNMADD132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 158: { + {op: VFNMSUB132PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMSUB132PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMSUB132PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMSUB132PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFNMSUB132PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMSUB132PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMSUB132PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMSUB132PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFNMSUB132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFNMSUB132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFNMSUB132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFNMSUB132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFNMSUB132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFNMSUB132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFNMSUB132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 159: { + {op: VFNMSUB132SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFNMSUB132SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMSUB132SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFNMSUB132SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMSUB132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFNMSUB132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB132SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 160: { + {op: VPSCATTERDD, args: [6]argType{argM, argKnot0, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPSCATTERDQ, args: [6]argType{argM, argKnot0, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VPSCATTERDD, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPSCATTERDD, args: [6]argType{argM, argKnot0, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPSCATTERDQ, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VPSCATTERDQ, args: [6]argType{argM, argKnot0, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + }, + 161: { + {op: VPSCATTERQD, args: [6]argType{argM, argKnot0, argYmmEvex_R}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPSCATTERQQ, args: [6]argType{argM, argKnot0, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VPSCATTERQD, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPSCATTERQD, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VPSCATTERQQ, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VPSCATTERQQ, args: [6]argType{argM, argKnot0, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + }, + 162: { + {op: VSCATTERDPD, args: [6]argType{argM, argKnot0, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERDPS, args: [6]argType{argM, argKnot0, argZmm_R}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VSCATTERDPD, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERDPD, args: [6]argType{argM, argKnot0, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERDPS, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VSCATTERDPS, args: [6]argType{argM, argKnot0, argYmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + }, + 163: { + {op: VSCATTERQPD, args: [6]argType{argM, argKnot0, argZmm_R}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERQPS, args: [6]argType{argM, argKnot0, argYmmEvex_R}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VSCATTERQPD, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERQPD, args: [6]argType{argM, argKnot0, argYmmEvex_R}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERQPS, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VSCATTERQPS, args: [6]argType{argM, argKnot0, argXmmEvex_R}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + }, + 166: { + {op: VFMADDSUB213PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADDSUB213PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMADDSUB213PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADDSUB213PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMADDSUB213PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADDSUB213PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMADDSUB213PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADDSUB213PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMADDSUB213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMADDSUB213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMADDSUB213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMADDSUB213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMADDSUB213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMADDSUB213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMADDSUB213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 167: { + {op: VFMSUBADD213PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUBADD213PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMSUBADD213PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUBADD213PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMSUBADD213PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUBADD213PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMSUBADD213PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUBADD213PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMSUBADD213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMSUBADD213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMSUBADD213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMSUBADD213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMSUBADD213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMSUBADD213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMSUBADD213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 168: { + {op: VFMADD213PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADD213PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMADD213PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADD213PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMADD213PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADD213PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMADD213PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADD213PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMADD213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMADD213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMADD213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMADD213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMADD213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMADD213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMADD213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMADD213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 169: { + {op: VFMADD213SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFMADD213SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMADD213SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFMADD213SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMADD213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFMADD213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 170: { + {op: VFMSUB213PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUB213PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMSUB213PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUB213PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMSUB213PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUB213PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMSUB213PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUB213PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMSUB213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMSUB213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMSUB213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMSUB213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMSUB213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMSUB213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMSUB213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMSUB213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: V4FNMADDPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 171: { + {op: VFMSUB213SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFMSUB213SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMSUB213SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFMSUB213SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMSUB213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFMSUB213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: V4FNMADDSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 172: { + {op: VFNMADD213PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMADD213PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMADD213PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMADD213PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFNMADD213PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMADD213PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMADD213PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMADD213PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFNMADD213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFNMADD213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFNMADD213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFNMADD213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFNMADD213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFNMADD213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFNMADD213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFNMADD213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 173: { + {op: VFNMADD213SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFNMADD213SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMADD213SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFNMADD213SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMADD213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFNMADD213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 174: { + {op: VFNMSUB213PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMSUB213PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMSUB213PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMSUB213PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFNMSUB213PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMSUB213PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMSUB213PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMSUB213PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFNMSUB213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFNMSUB213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFNMSUB213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFNMSUB213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFNMSUB213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFNMSUB213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFNMSUB213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 175: { + {op: VFNMSUB213SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFNMSUB213SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMSUB213SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFNMSUB213SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMSUB213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFNMSUB213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB213SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 176: { + {op: VCVTNEEBF162PS, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTNEEBF162PS, args: [6]argType{argYmm_R, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCVTNEEPH2PS, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTNEEPH2PS, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCVTNEOBF162PS, args: [6]argType{argXmm_R, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTNEOBF162PS, args: [6]argType{argYmm_R, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VCVTNEOPH2PS, args: [6]argType{argXmm_R, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTNEOPH2PS, args: [6]argType{argYmm_R, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 177: { + {op: VBCSTNEBF162PS, args: [6]argType{argXmm_R, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 2}, + {op: VBCSTNEBF162PS, args: [6]argType{argYmm_R, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 2}, + {op: VBCSTNESH2PS, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 2}, + {op: VBCSTNESH2PS, args: [6]argType{argYmm_R, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 2}, + }, + 180: { + {op: VPMADD52LUQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMADD52LUQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMADD52LUQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMADD52LUQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPMADD52LUQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMADD52LUQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMADD52LUQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VPMADD52LUQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMADD52LUQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VPMADD52LUQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 181: { + {op: VPMADD52HUQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMADD52HUQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPMADD52HUQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPMADD52HUQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPMADD52HUQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPMADD52HUQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPMADD52HUQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VPMADD52HUQ, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPMADD52HUQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VPMADD52HUQ, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 182: { + {op: VFMADDSUB231PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADDSUB231PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMADDSUB231PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADDSUB231PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMADDSUB231PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADDSUB231PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMADDSUB231PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADDSUB231PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMADDSUB231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMADDSUB231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMADDSUB231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMADDSUB231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMADDSUB231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMADDSUB231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMADDSUB231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMADDSUB231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 183: { + {op: VFMSUBADD231PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUBADD231PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMSUBADD231PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUBADD231PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMSUBADD231PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUBADD231PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMSUBADD231PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUBADD231PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMSUBADD231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMSUBADD231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMSUBADD231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMSUBADD231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMSUBADD231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMSUBADD231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMSUBADD231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMSUBADD231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 184: { + {op: VFMADD231PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADD231PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMADD231PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADD231PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMADD231PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMADD231PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMADD231PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMADD231PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMADD231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMADD231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMADD231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMADD231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMADD231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMADD231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMADD231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMADD231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 185: { + {op: VFMADD231SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFMADD231SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMADD231SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFMADD231SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMADD231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMADD231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFMADD231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMADD231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 186: { + {op: VFMSUB231PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUB231PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMSUB231PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUB231PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFMSUB231PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFMSUB231PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMSUB231PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFMSUB231PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFMSUB231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFMSUB231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFMSUB231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFMSUB231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFMSUB231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFMSUB231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFMSUB231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFMSUB231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 187: { + {op: VFMSUB231SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFMSUB231SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFMSUB231SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFMSUB231SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFMSUB231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFMSUB231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFMSUB231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFMSUB231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 188: { + {op: VFNMADD231PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMADD231PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMADD231PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMADD231PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFNMADD231PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMADD231PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMADD231PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMADD231PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFNMADD231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFNMADD231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFNMADD231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFNMADD231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFNMADD231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFNMADD231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFNMADD231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFNMADD231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 189: { + {op: VFNMADD231SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFNMADD231SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMADD231SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFNMADD231SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMADD231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMADD231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFNMADD231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMADD231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 190: { + {op: VFNMSUB231PD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMSUB231PD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMSUB231PD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMSUB231PD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VFNMSUB231PS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VFNMSUB231PS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMSUB231PS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VFNMSUB231PS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VFNMSUB231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231PD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFNMSUB231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFNMSUB231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231PS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFNMSUB231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231PD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFNMSUB231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231PD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFNMSUB231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231PS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFNMSUB231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231PS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 191: { + {op: VFNMSUB231SD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VFNMSUB231SD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VFNMSUB231SS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VFNMSUB231SS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VFNMSUB231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFNMSUB231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VFNMSUB231SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 196: { + {op: VPCONFLICTD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCONFLICTD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPCONFLICTQ, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPCONFLICTQ, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPCONFLICTD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCONFLICTD, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPCONFLICTD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCONFLICTD, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPCONFLICTQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCONFLICTQ, args: [6]argType{argXmmEvex_R, argKmask, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPCONFLICTQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCONFLICTQ, args: [6]argType{argYmmEvex_R, argKmask, argM}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 198: { + {op: VGATHERPF0DPD, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, vexW: 1, opdigit: 1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERPF0DPS, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, opdigit: 1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VGATHERPF1DPD, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, vexW: 1, opdigit: 2, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERPF1DPS, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, opdigit: 2, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VSCATTERPF0DPD, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, vexW: 1, opdigit: 5, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERPF0DPS, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, opdigit: 5, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VSCATTERPF1DPD, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, vexW: 1, opdigit: 6, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERPF1DPS, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, opdigit: 6, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + }, + 199: { + {op: VGATHERPF0QPD, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, vexW: 1, opdigit: 1, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERPF0QPS, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, opdigit: 1, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VGATHERPF1QPD, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, vexW: 1, opdigit: 2, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VGATHERPF1QPS, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, opdigit: 2, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VSCATTERPF0QPD, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, vexW: 1, opdigit: 5, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERPF0QPS, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, opdigit: 5, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + {op: VSCATTERPF1QPD, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, vexW: 1, opdigit: 6, ismem: 1, evex: true, dispScale: 8, memBytes: 8, vsib: true}, + {op: VSCATTERPF1QPS, args: [6]argType{argM, argKnot0}, vexP: 1, vexL: 2, opdigit: 6, ismem: 1, evex: true, dispScale: 4, memBytes: 4, vsib: true}, + }, + 200: { + {op: VEXP2PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VEXP2PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VEXP2PD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VEXP2PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VEXP2PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VEXP2PS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 202: { + {op: VRCP28PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VRCP28PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRCP28PD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VRCP28PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VRCP28PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRCP28PS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 203: { + {op: VRCP28SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRCP28SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRCP28SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VRCP28SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRCP28SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRCP28SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VSHA512RNDS2, args: [6]argType{argYmm_R, argYmm_N, argXmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + }, + 204: { + {op: VRSQRT28PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VRSQRT28PD, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRSQRT28PD, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VRSQRT28PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VRSQRT28PS, args: [6]argType{argZmm_R, argKmask, argZmm_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRSQRT28PS, args: [6]argType{argZmm_R, argKmask, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VSHA512MSG1, args: [6]argType{argYmm_R, argXmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + }, + 205: { + {op: VRSQRT28SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRSQRT28SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRSQRT28SD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VRSQRT28SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRSQRT28SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VRSQRT28SS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VSHA512MSG2, args: [6]argType{argYmm_R, argYmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + }, + 207: { + {op: VGF2P8MULB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VGF2P8MULB, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VGF2P8MULB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VGF2P8MULB, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VGF2P8MULB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VGF2P8MULB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VGF2P8MULB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VGF2P8MULB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VGF2P8MULB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VGF2P8MULB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 210: { + {op: VPDPWSUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPDPWSUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPWSUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPWSUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPWSUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPWSUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPWUSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPDPWUSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPWUSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPWUSD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPWUSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPWUSD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPWUUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VPDPWUUD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPWUUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPWUUD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPWUUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPWUUD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPWSUD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VPDPWSUD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPWSUD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VPDPWSUD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPWUSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPDPWUSD, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPWUSD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPDPWUSD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPWUUD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VPDPWUUD, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPWUUD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VPDPWUUD, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 211: { + {op: VPDPWSUDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VPDPWSUDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPWSUDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPWSUDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPWSUDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPWSUDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPWUSDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VPDPWUSDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPWUSDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPWUSDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPWUSDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPWUSDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPWUUDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B}, opdigit: -1, evex: true}, + {op: VPDPWUUDS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM}, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPDPWUUDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B}, vexL: 1, opdigit: -1, evex: true}, + {op: VPDPWUUDS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPDPWUUDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B}, vexL: 2, opdigit: -1, evex: true}, + {op: VPDPWUUDS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPDPWSUDS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VPDPWSUDS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPWSUDS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VPDPWSUDS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPWUSDS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VPDPWUSDS, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPWUSDS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPDPWUSDS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPDPWUUDS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VPDPWUUDS, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPDPWUUDS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexL: 1, opdigit: -1}, + {op: VPDPWUUDS, args: [6]argType{argYmm_R, argYmm_N, argM}, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 218: { + {op: VSM4KEY4, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B}, vexP: 3, opdigit: -1, evex: true}, + {op: VSM4KEY4, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VSM4KEY4, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argYmmEvex_B}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VSM4KEY4, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VSM4KEY4, args: [6]argType{argZmm_R, argZmm_N, argZmm_B}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VSM4KEY4, args: [6]argType{argZmm_R, argZmm_N, argM}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VSM4RNDS4, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B}, vexP: 2, opdigit: -1, evex: true}, + {op: VSM4RNDS4, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VSM4RNDS4, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argYmmEvex_B}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VSM4RNDS4, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VSM4RNDS4, args: [6]argType{argZmm_R, argZmm_N, argZmm_B}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VSM4RNDS4, args: [6]argType{argZmm_R, argZmm_N, argM}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VSM3MSG1, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, opdigit: -1}, + {op: VSM3MSG1, args: [6]argType{argXmm_R, argXmm_N, argM}, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSM3MSG2, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VSM3MSG2, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSM4KEY4, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 3, opdigit: -1}, + {op: VSM4KEY4, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 3, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSM4KEY4, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 3, vexL: 1, opdigit: -1}, + {op: VSM4KEY4, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VSM4RNDS4, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 2, opdigit: -1}, + {op: VSM4RNDS4, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 2, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VSM4RNDS4, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 2, vexL: 1, opdigit: -1}, + {op: VSM4RNDS4, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + }, + 219: { + {op: VAESIMC, args: [6]argType{argXmm_R, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VAESIMC, args: [6]argType{argXmm_R, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + }, + 220: { + {op: VAESENC, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VAESENC, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VAESENC, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VAESENC, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VAESENC, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VAESENC, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VAESENC, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VAESENC, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VAESENC, args: [6]argType{argZmm_R, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VAESENC, args: [6]argType{argZmm_R, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 221: { + {op: VAESENCLAST, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VAESENCLAST, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VAESENCLAST, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VAESENCLAST, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VAESENCLAST, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VAESENCLAST, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VAESENCLAST, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VAESENCLAST, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VAESENCLAST, args: [6]argType{argZmm_R, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VAESENCLAST, args: [6]argType{argZmm_R, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 222: { + {op: VAESDEC, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VAESDEC, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VAESDEC, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VAESDEC, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VAESDEC, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VAESDEC, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VAESDEC, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VAESDEC, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VAESDEC, args: [6]argType{argZmm_R, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VAESDEC, args: [6]argType{argZmm_R, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 223: { + {op: VAESDECLAST, args: [6]argType{argXmm_R, argXmm_N, argXmm_B}, vexP: 1, opdigit: -1}, + {op: VAESDECLAST, args: [6]argType{argXmm_R, argXmm_N, argM}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VAESDECLAST, args: [6]argType{argYmm_R, argYmm_N, argYmm_B}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VAESDECLAST, args: [6]argType{argYmm_R, argYmm_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VAESDECLAST, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B}, vexP: 1, opdigit: -1, evex: true}, + {op: VAESDECLAST, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VAESDECLAST, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argYmmEvex_B}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VAESDECLAST, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argM}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VAESDECLAST, args: [6]argType{argZmm_R, argZmm_N, argZmm_B}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VAESDECLAST, args: [6]argType{argZmm_R, argZmm_N, argM}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, +} + +var avxMap0F3A = [256][]*avxOptab{ + 0: { + {op: VPERMQ, args: [6]argType{argYmm_R, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERMQ, args: [6]argType{argYmm_R, argYmm_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VPERMQ, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMQ, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMQ, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 1: { + {op: VPERMPD, args: [6]argType{argYmm_R, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERMPD, args: [6]argType{argYmm_R, argYmm_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VPERMPD, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMPD, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMPD, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 2: { + {op: VPBLENDD, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPBLENDD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPBLENDD, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPBLENDD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 3: { + {op: VALIGND, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VALIGND, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VALIGNQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VALIGNQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VALIGND, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VALIGND, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VALIGND, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VALIGND, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VALIGNQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VALIGNQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VALIGNQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VALIGNQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 4: { + {op: VPERMILPS, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPERMILPS, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPERMILPS, args: [6]argType{argYmm_R, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERMILPS, args: [6]argType{argYmm_R, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPERMILPS, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPERMILPS, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPERMILPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPERMILPS, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPERMILPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPERMILPS, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 5: { + {op: VPERMILPD, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPERMILPD, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPERMILPD, args: [6]argType{argYmm_R, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERMILPD, args: [6]argType{argYmm_R, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPERMILPD, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMILPD, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPERMILPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMILPD, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPERMILPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPERMILPD, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 6: { + {op: VPERM2F128, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERM2F128, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 8: { + {op: VROUNDPS, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VROUNDPS, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VROUNDPS, args: [6]argType{argYmm_R, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VROUNDPS, args: [6]argType{argYmm_R, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VRNDSCALEPS, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VRNDSCALEPS, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VRNDSCALEPS, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VRNDSCALEPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VRNDSCALEPS, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VRNDSCALEPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VRNDSCALEPS, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VRNDSCALEPH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VRNDSCALEPH, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VRNDSCALEPH, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexL: 1, opdigit: -1, evex: true}, + {op: VRNDSCALEPH, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VRNDSCALEPH, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexL: 2, opdigit: -1, evex: true}, + {op: VRNDSCALEPH, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, opdigit: -1, evex: true}, + {op: VRNDSCALEPH, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + {op: VRNDSCALEBF16, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 2, opdigit: -1, evex: true}, + {op: VRNDSCALEBF16, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VRNDSCALEBF16, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VRNDSCALEBF16, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VRNDSCALEBF16, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VRNDSCALEBF16, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + }, + 9: { + {op: VROUNDPD, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VROUNDPD, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VROUNDPD, args: [6]argType{argYmm_R, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VROUNDPD, args: [6]argType{argYmm_R, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VRNDSCALEPD, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VRNDSCALEPD, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRNDSCALEPD, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VRNDSCALEPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRNDSCALEPD, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VRNDSCALEPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRNDSCALEPD, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 10: { + {op: VROUNDSS, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VROUNDSS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VRNDSCALESS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VRNDSCALESS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VRNDSCALESS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VRNDSCALESH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VRNDSCALESH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VRNDSCALESH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + }, + 11: { + {op: VROUNDSD, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VROUNDSD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VRNDSCALESD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRNDSCALESD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRNDSCALESD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 12: { + {op: VBLENDPS, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VBLENDPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VBLENDPS, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VBLENDPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 13: { + {op: VBLENDPD, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VBLENDPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VBLENDPD, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VBLENDPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 14: { + {op: VPBLENDW, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPBLENDW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPBLENDW, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPBLENDW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 15: { + {op: VPALIGNR, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPALIGNR, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPALIGNR, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPALIGNR, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPALIGNR, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPALIGNR, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPALIGNR, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPALIGNR, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPALIGNR, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPALIGNR, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 20: { + {op: VPEXTRB, args: [6]argType{argM, argXmm_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 1}, + {op: VPEXTRB, args: [6]argType{argGPR32_B, argXmm_R, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPEXTRB, args: [6]argType{argGPR32_B, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPEXTRB, args: [6]argType{argM, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 1}, + }, + 21: { + {op: VPEXTRW, args: [6]argType{argM, argXmm_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 2}, + {op: VPEXTRW, args: [6]argType{argGPR32_B, argXmm_R, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPEXTRW, args: [6]argType{argGPR32_B, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPEXTRW, args: [6]argType{argM, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + }, + 22: { + {op: VPEXTRQ, args: [6]argType{argM, argXmm_R, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPEXTRQ, args: [6]argType{argGPR64_B, argXmm_R, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VPEXTRD, args: [6]argType{argM, argXmm_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPEXTRD, args: [6]argType{argGPR32_B, argXmm_R, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPEXTRD, args: [6]argType{argM, argXmm_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPEXTRD, args: [6]argType{argGPR32_B, argXmm_R, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPEXTRD, args: [6]argType{argGPR32_B, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPEXTRD, args: [6]argType{argM, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPEXTRD, args: [6]argType{argGPR32_B, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPEXTRD, args: [6]argType{argM, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPEXTRQ, args: [6]argType{argGPR64_B, argXmmEvex_R, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPEXTRQ, args: [6]argType{argM, argXmmEvex_R, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 23: { + {op: VEXTRACTPS, args: [6]argType{argM, argXmm_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VEXTRACTPS, args: [6]argType{argGPR32_B, argXmm_R, argImm8u}, vexP: 1, opdigit: -1}, + {op: VEXTRACTPS, args: [6]argType{argGPR32_B, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VEXTRACTPS, args: [6]argType{argM, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 24: { + {op: VINSERTF128, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VINSERTF128, args: [6]argType{argYmm_R, argYmm_N, argXmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VINSERTF32X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VINSERTF32X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VINSERTF32X4, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VINSERTF32X4, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VINSERTF64X2, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VINSERTF64X2, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VINSERTF64X2, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VINSERTF64X2, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 25: { + {op: VEXTRACTF128, args: [6]argType{argM, argYmm_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VEXTRACTF128, args: [6]argType{argXmm_B, argYmm_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VEXTRACTF32X4, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VEXTRACTF32X4, args: [6]argType{argM, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VEXTRACTF32X4, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VEXTRACTF32X4, args: [6]argType{argM, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VEXTRACTF64X2, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VEXTRACTF64X2, args: [6]argType{argM, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VEXTRACTF64X2, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VEXTRACTF64X2, args: [6]argType{argM, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 26: { + {op: VINSERTF64X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VINSERTF64X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VINSERTF32X8, args: [6]argType{argZmm_R, argKmask, argZmm_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VINSERTF32X8, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 27: { + {op: VEXTRACTF64X4, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VEXTRACTF64X4, args: [6]argType{argM, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VEXTRACTF32X8, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VEXTRACTF32X8, args: [6]argType{argM, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 29: { + {op: VCVTPS2PH, args: [6]argType{argM, argXmm_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VCVTPS2PH, args: [6]argType{argXmm_B, argXmm_R, argImm8u}, vexP: 1, opdigit: -1}, + {op: VCVTPS2PH, args: [6]argType{argM, argYmm_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VCVTPS2PH, args: [6]argType{argXmm_B, argYmm_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VCVTPS2PH, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VCVTPS2PH, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPS2PH, args: [6]argType{argM, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VCVTPS2PH, args: [6]argType{argXmmEvex_B, argKmask, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VCVTPS2PH, args: [6]argType{argM, argKmask, argXmmEvex_R, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VCVTPS2PH, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VCVTPS2PH, args: [6]argType{argM, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 30: { + {op: VPCMPUD, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPUD, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPCMPUQ, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPUQ, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPCMPUD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPUD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPCMPUD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPUD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPCMPUQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPUQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPCMPUQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPUQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 31: { + {op: VPCMPD, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPD, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPCMPQ, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPQ, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPCMPD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPD, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPCMPD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPD, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPCMPQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPQ, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPCMPQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPQ, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 32: { + {op: VPINSRB, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 1}, + {op: VPINSRB, args: [6]argType{argXmm_R, argXmm_N, argGPR32_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPINSRB, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPINSRB, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 1, memBytes: 1}, + }, + 33: { + {op: VINSERTPS, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VINSERTPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VINSERTPS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VINSERTPS, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 34: { + {op: VPINSRD, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPINSRD, args: [6]argType{argXmm_R, argXmm_N, argGPR32_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPINSRD, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 4}, + {op: VPINSRD, args: [6]argType{argXmm_R, argXmm_N, argGPR32_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPINSRQ, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 8}, + {op: VPINSRQ, args: [6]argType{argXmm_R, argXmm_N, argGPR64_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VPINSRD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPINSRD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPINSRD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR32_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPINSRD, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VPINSRQ, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argGPR64_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPINSRQ, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + }, + 35: { + {op: VSHUFF32X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VSHUFF32X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VSHUFF64X2, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSHUFF64X2, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VSHUFF32X4, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VSHUFF32X4, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VSHUFF64X2, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSHUFF64X2, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 37: { + {op: VPTERNLOGD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPTERNLOGD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPTERNLOGQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPTERNLOGQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VPTERNLOGD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPTERNLOGD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPTERNLOGD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPTERNLOGD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPTERNLOGQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPTERNLOGQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPTERNLOGQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPTERNLOGQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 38: { + {op: VGETMANTPD, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VGETMANTPD, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETMANTPD, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VGETMANTPS, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VGETMANTPS, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VGETMANTPS, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VGETMANTPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETMANTPD, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VGETMANTPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETMANTPD, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VGETMANTPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VGETMANTPS, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VGETMANTPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VGETMANTPS, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VGETMANTPH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VGETMANTPH, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VGETMANTPH, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexL: 1, opdigit: -1, evex: true}, + {op: VGETMANTPH, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VGETMANTPH, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexL: 2, opdigit: -1, evex: true}, + {op: VGETMANTPH, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, opdigit: -1, evex: true}, + {op: VGETMANTPH, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + {op: VGETMANTBF16, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 2, opdigit: -1, evex: true}, + {op: VGETMANTBF16, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VGETMANTBF16, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VGETMANTBF16, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VGETMANTBF16, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VGETMANTBF16, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + }, + 39: { + {op: VGETMANTSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETMANTSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGETMANTSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VGETMANTSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VGETMANTSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VGETMANTSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VGETMANTSH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VGETMANTSH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VGETMANTSH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + }, + 48: { + {op: KSHIFTRW, args: [6]argType{argK_R, argK_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + {op: KSHIFTRB, args: [6]argType{argK_R, argK_B, argImm8u}, vexP: 1, opdigit: -1}, + }, + 49: { + {op: KSHIFTRD, args: [6]argType{argK_R, argK_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: KSHIFTRQ, args: [6]argType{argK_R, argK_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + }, + 50: { + {op: KSHIFTLW, args: [6]argType{argK_R, argK_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + {op: KSHIFTLB, args: [6]argType{argK_R, argK_B, argImm8u}, vexP: 1, opdigit: -1}, + }, + 51: { + {op: KSHIFTLD, args: [6]argType{argK_R, argK_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: KSHIFTLQ, args: [6]argType{argK_R, argK_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + }, + 56: { + {op: VINSERTI128, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VINSERTI128, args: [6]argType{argYmm_R, argYmm_N, argXmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VINSERTI32X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VINSERTI32X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VINSERTI32X4, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VINSERTI32X4, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VINSERTI64X2, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VINSERTI64X2, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VINSERTI64X2, args: [6]argType{argZmm_R, argKmask, argZmm_N, argXmmEvex_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VINSERTI64X2, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 57: { + {op: VEXTRACTI128, args: [6]argType{argM, argYmm_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VEXTRACTI128, args: [6]argType{argXmm_B, argYmm_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VEXTRACTI32X4, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VEXTRACTI32X4, args: [6]argType{argM, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VEXTRACTI32X4, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VEXTRACTI32X4, args: [6]argType{argM, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VEXTRACTI64X2, args: [6]argType{argXmmEvex_B, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VEXTRACTI64X2, args: [6]argType{argM, argKmask, argYmmEvex_R, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VEXTRACTI64X2, args: [6]argType{argXmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VEXTRACTI64X2, args: [6]argType{argM, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + }, + 58: { + {op: VINSERTI64X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VINSERTI64X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VINSERTI32X8, args: [6]argType{argZmm_R, argKmask, argZmm_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VINSERTI32X8, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 59: { + {op: VEXTRACTI64X4, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VEXTRACTI64X4, args: [6]argType{argM, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VEXTRACTI32X8, args: [6]argType{argYmmEvex_B, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VEXTRACTI32X8, args: [6]argType{argM, argKmask, argZmm_R, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + }, + 62: { + {op: VPCMPUB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPUB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPCMPUB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPUB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPCMPUB, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPUB, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPCMPUW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPUW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPCMPUW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPUW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPCMPUW, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPUW, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 63: { + {op: VPCMPB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCMPB, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPCMPB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCMPB, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPCMPB, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCMPB, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VPCMPW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPW, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPCMPW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPW, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPCMPW, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPCMPW, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 64: { + {op: VDPPS, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VDPPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VDPPS, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VDPPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 65: { + {op: VDPPD, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VDPPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + }, + 66: { + {op: VMPSADBW, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VMPSADBW, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VMPSADBW, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VMPSADBW, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VDBPSADBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VDBPSADBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VDBPSADBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VDBPSADBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VDBPSADBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VDBPSADBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + {op: VMPSADBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 3, opdigit: -1, evex: true}, + {op: VMPSADBW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VMPSADBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 3, vexL: 1, opdigit: -1, evex: true}, + {op: VMPSADBW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 3, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VMPSADBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 3, vexL: 2, opdigit: -1, evex: true}, + {op: VMPSADBW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 3, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 67: { + {op: VSHUFI32X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VSHUFI32X4, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VSHUFI64X2, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VSHUFI64X2, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VSHUFI32X4, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VSHUFI32X4, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VSHUFI64X2, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VSHUFI64X2, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + }, + 68: { + {op: VPCLMULQDQ, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPCLMULQDQ, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCLMULQDQ, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + {op: VPCLMULQDQ, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPCLMULQDQ, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPCLMULQDQ, args: [6]argType{argXmmEvex_R, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPCLMULQDQ, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPCLMULQDQ, args: [6]argType{argYmmEvex_R, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPCLMULQDQ, args: [6]argType{argZmm_R, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPCLMULQDQ, args: [6]argType{argZmm_R, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 70: { + {op: VPERM2I128, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPERM2I128, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 74: { + {op: VBLENDVPS, args: [6]argType{argXmm_R, argXmm_N, argM, argXmm_SE}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VBLENDVPS, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argXmm_SE}, vexP: 1, opdigit: -1}, + {op: VBLENDVPS, args: [6]argType{argYmm_R, argYmm_N, argM, argYmm_SE}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VBLENDVPS, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argYmm_SE}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 75: { + {op: VBLENDVPD, args: [6]argType{argXmm_R, argXmm_N, argM, argXmm_SE}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VBLENDVPD, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argXmm_SE}, vexP: 1, opdigit: -1}, + {op: VBLENDVPD, args: [6]argType{argYmm_R, argYmm_N, argM, argYmm_SE}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VBLENDVPD, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argYmm_SE}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 76: { + {op: VPBLENDVB, args: [6]argType{argXmm_R, argXmm_N, argM, argXmm_SE}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPBLENDVB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argXmm_SE}, vexP: 1, opdigit: -1}, + {op: VPBLENDVB, args: [6]argType{argYmm_R, argYmm_N, argM, argYmm_SE}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VPBLENDVB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argYmm_SE}, vexP: 1, vexL: 1, opdigit: -1}, + }, + 80: { + {op: VRANGEPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRANGEPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VRANGEPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRANGEPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VRANGEPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VRANGEPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRANGEPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VRANGEPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VRANGEPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VRANGEPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VRANGEPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VRANGEPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VRANGEPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VRANGEPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 81: { + {op: VRANGESD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRANGESD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VRANGESD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VRANGESS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VRANGESS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VRANGESS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 82: { + {op: VMINMAXBF16, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 2, opdigit: -1, evex: true}, + {op: VMINMAXBF16, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VMINMAXBF16, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VMINMAXBF16, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VMINMAXBF16, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VMINMAXBF16, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + {op: VMINMAXPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMINMAXPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VMINMAXPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMINMAXPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VMINMAXPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VMINMAXPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMINMAXPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VMINMAXPH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VMINMAXPH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VMINMAXPH, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexL: 1, opdigit: -1, evex: true}, + {op: VMINMAXPH, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VMINMAXPH, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexL: 2, opdigit: -1, evex: true}, + {op: VMINMAXPH, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, opdigit: -1, evex: true}, + {op: VMINMAXPH, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + {op: VMINMAXPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VMINMAXPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VMINMAXPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VMINMAXPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VMINMAXPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VMINMAXPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VMINMAXPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + }, + 83: { + {op: VMINMAXSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMINMAXSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VMINMAXSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VMINMAXSH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VMINMAXSH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VMINMAXSH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + {op: VMINMAXSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VMINMAXSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VMINMAXSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 84: { + {op: VFIXUPIMMPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMPD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFIXUPIMMPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFIXUPIMMPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMPS, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFIXUPIMMPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFIXUPIMMPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFIXUPIMMPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFIXUPIMMPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + }, + 85: { + {op: VFIXUPIMMSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMSD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFIXUPIMMSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VFIXUPIMMSS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + }, + 86: { + {op: VREDUCEPD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VREDUCEPD, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VREDUCEPD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VREDUCEPD, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VREDUCEPD, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VREDUCEPD, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VREDUCEPD, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VREDUCEPS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VREDUCEPS, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VREDUCEPS, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VREDUCEPS, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VREDUCEPS, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VREDUCEPS, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VREDUCEPS, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VREDUCEPH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VREDUCEPH, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VREDUCEPH, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexL: 1, opdigit: -1, evex: true}, + {op: VREDUCEPH, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VREDUCEPH, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexL: 2, opdigit: -1, evex: true}, + {op: VREDUCEPH, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, opdigit: -1, evex: true}, + {op: VREDUCEPH, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + {op: VREDUCEBF16, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 2, opdigit: -1, evex: true}, + {op: VREDUCEBF16, args: [6]argType{argXmmEvex_R, argKmask, argM, argImm8u}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VREDUCEBF16, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VREDUCEBF16, args: [6]argType{argYmmEvex_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VREDUCEBF16, args: [6]argType{argZmm_R, argKmask, argZmm_B, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VREDUCEBF16, args: [6]argType{argZmm_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + }, + 87: { + {op: VREDUCESD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VREDUCESD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VREDUCESD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VREDUCESS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VREDUCESS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VREDUCESS, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VREDUCESH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VREDUCESH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VREDUCESH, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + }, + 96: { + {op: VPCMPESTRM, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPESTRM, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPCMPESTRM, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPESTRM, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPCMPESTRM64, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPESTRM64, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + }, + 97: { + {op: VPCMPESTRI, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPESTRI, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPCMPESTRI, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPESTRI, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPCMPESTRI64, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPESTRI64, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + }, + 98: { + {op: VPCMPISTRM, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPISTRM, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + }, + 99: { + {op: VPCMPISTRI, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPISTRI, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPCMPISTRI, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPISTRI, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VPCMPISTRI64, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VPCMPISTRI64, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + }, + 102: { + {op: VFPCLASSPD, args: [6]argType{argK_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFPCLASSPD, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VFPCLASSPD, args: [6]argType{argK_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFPCLASSPD, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VFPCLASSPD, args: [6]argType{argK_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VFPCLASSPD, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + {op: VFPCLASSPS, args: [6]argType{argK_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VFPCLASSPS, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VFPCLASSPS, args: [6]argType{argK_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VFPCLASSPS, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VFPCLASSPS, args: [6]argType{argK_R, argKmask, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VFPCLASSPS, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VFPCLASSPH, args: [6]argType{argK_R, argKmask, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VFPCLASSPH, args: [6]argType{argK_R, argKmask, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VFPCLASSPH, args: [6]argType{argK_R, argKmask, argYmmEvex_B, argImm8u}, vexL: 1, opdigit: -1, evex: true}, + {op: VFPCLASSPH, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VFPCLASSPH, args: [6]argType{argK_R, argKmask, argZmm_B, argImm8u}, vexL: 2, opdigit: -1, evex: true}, + {op: VFPCLASSPH, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + {op: VFPCLASSBF16, args: [6]argType{argK_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 2, opdigit: -1, evex: true}, + {op: VFPCLASSBF16, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VFPCLASSBF16, args: [6]argType{argK_R, argKmask, argYmmEvex_B, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VFPCLASSBF16, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VFPCLASSBF16, args: [6]argType{argK_R, argKmask, argZmm_B, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VFPCLASSBF16, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + }, + 103: { + {op: VFPCLASSSD, args: [6]argType{argK_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VFPCLASSSD, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 8, memBytes: 8}, + {op: VFPCLASSSS, args: [6]argType{argK_R, argKmask, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VFPCLASSSS, args: [6]argType{argK_R, argKmask, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 4, memBytes: 4}, + {op: VFPCLASSSH, args: [6]argType{argK_R, argKmask, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VFPCLASSSH, args: [6]argType{argK_R, argKmask, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + }, + 112: { + {op: VPSHLDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSHLDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSHLDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 113: { + {op: VPSHLDD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSHLDD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSHLDD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSHLDD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSHLDD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSHLDD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSHLDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSHLDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPSHLDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHLDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 114: { + {op: VPSHRDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDW, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, memBytes: 16}, + {op: VPSHRDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDW, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, memBytes: 32}, + {op: VPSHRDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDW, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, memBytes: 64}, + }, + 115: { + {op: VPSHRDD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, opdigit: -1, evex: true}, + {op: VPSHRDD, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 4}, + {op: VPSHRDD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, evex: true}, + {op: VPSHRDD, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 4}, + {op: VPSHRDD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, evex: true}, + {op: VPSHRDD, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 4}, + {op: VPSHRDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDQ, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VPSHRDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDQ, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VPSHRDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VPSHRDQ, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 194: { + {op: VCMPPH, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, opdigit: -1, evex: true}, + {op: VCMPPH, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VCMPPH, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexL: 1, opdigit: -1, evex: true}, + {op: VCMPPH, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VCMPPH, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexL: 2, opdigit: -1, evex: true}, + {op: VCMPPH, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, opdigit: -1, evex: true}, + {op: VCMPPH, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + {op: VCMPSH, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 3, opdigit: -1, evex: true}, + {op: VCMPSH, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 3, opdigit: -1, evex: true}, + {op: VCMPSH, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 3, opdigit: -1, ismem: 1, evex: true, dispScale: 2, memBytes: 2}, + {op: VCMPBF16, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 2, opdigit: -1, evex: true}, + {op: VCMPBF16, args: [6]argType{argK_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 16}, + {op: VCMPBF16, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, evex: true}, + {op: VCMPBF16, args: [6]argType{argK_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 2, vexL: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32}, + {op: VCMPBF16, args: [6]argType{argK_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, evex: true}, + {op: VCMPBF16, args: [6]argType{argK_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 2, vexL: 2, opdigit: -1, ismem: 1, evex: true, dispScale: 64}, + }, + 206: { + {op: VGF2P8AFFINEQB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VGF2P8AFFINEQB, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VGF2P8AFFINEQB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VGF2P8AFFINEQB, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VGF2P8AFFINEQB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGF2P8AFFINEQB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VGF2P8AFFINEQB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGF2P8AFFINEQB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VGF2P8AFFINEQB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VGF2P8AFFINEQB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 207: { + {op: VGF2P8AFFINEINVQB, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1}, + {op: VGF2P8AFFINEINVQB, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 16}, + {op: VGF2P8AFFINEINVQB, args: [6]argType{argYmm_R, argYmm_N, argYmm_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1}, + {op: VGF2P8AFFINEINVQB, args: [6]argType{argYmm_R, argYmm_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, memBytes: 32}, + {op: VGF2P8AFFINEINVQB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argXmmEvex_B, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGF2P8AFFINEINVQB, args: [6]argType{argXmmEvex_R, argKmask, argXmmEvex_N, argM, argImm8u}, vexP: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 16, bcstScale: 8}, + {op: VGF2P8AFFINEINVQB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argYmmEvex_B, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, evex: true}, + {op: VGF2P8AFFINEINVQB, args: [6]argType{argYmmEvex_R, argKmask, argYmmEvex_N, argM, argImm8u}, vexP: 1, vexL: 1, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 32, bcstScale: 8}, + {op: VGF2P8AFFINEINVQB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argZmm_B, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, evex: true}, + {op: VGF2P8AFFINEINVQB, args: [6]argType{argZmm_R, argKmask, argZmm_N, argM, argImm8u}, vexP: 1, vexL: 2, vexW: 1, opdigit: -1, ismem: 1, evex: true, dispScale: 64, bcstScale: 8}, + }, + 222: { + {op: VSM3RNDS2, args: [6]argType{argXmm_R, argXmm_N, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VSM3RNDS2, args: [6]argType{argXmm_R, argXmm_N, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + }, + 223: { + {op: VAESKEYGENASSIST, args: [6]argType{argXmm_R, argXmm_B, argImm8u}, vexP: 1, opdigit: -1}, + {op: VAESKEYGENASSIST, args: [6]argType{argXmm_R, argM, argImm8u}, vexP: 1, opdigit: -1, ismem: 1, memBytes: 16}, + }, +} diff --git a/vendor/golang.org/x/arch/x86/x86asm/decode.go b/vendor/golang.org/x/arch/x86/x86asm/decode.go index 059b73d3f1..0f689ea5d8 100644 --- a/vendor/golang.org/x/arch/x86/x86asm/decode.go +++ b/vendor/golang.org/x/arch/x86/x86asm/decode.go @@ -405,15 +405,16 @@ ReadPrefixes: } addrSizeIndex = pos - //Group 5 - Vex encoding + // Group 5 - Vex encoding case 0xC5: if pos == 0 && pos+1 < len(src) && (mode == 64 || (mode == 32 && src[pos+1]&0xc0 == 0xc0)) { vex = p vexIndex = pos inst.Prefix[pos] = p inst.Prefix[pos+1] = Prefix(src[pos+1]) - pos += 1 - continue + pos += 2 + nprefix = pos + break ReadPrefixes } else { nprefix = pos break ReadPrefixes @@ -425,8 +426,25 @@ ReadPrefixes: inst.Prefix[pos] = p inst.Prefix[pos+1] = Prefix(src[pos+1]) inst.Prefix[pos+2] = Prefix(src[pos+2]) - pos += 2 - continue + pos += 3 + nprefix = pos + break ReadPrefixes + } else { + nprefix = pos + break ReadPrefixes + } + // EVEX encoding + case 0x62: + if pos == 0 && pos+3 < len(src) && (mode == 64 || (mode == 32 && src[pos+1]&0xc0 == 0xc0)) { + vex = p + vexIndex = pos + inst.Prefix[pos] = p + inst.Prefix[pos+1] = Prefix(src[pos+1]) + inst.Prefix[pos+2] = Prefix(src[pos+2]) + inst.Prefix[pos+3] = Prefix(src[pos+3]) + pos += 4 + nprefix = pos + break ReadPrefixes } else { nprefix = pos break ReadPrefixes @@ -462,6 +480,10 @@ ReadPrefixes: // opcode byte into inst.Opcode. opshift = 24 + if vex != 0 { + return decodeAVX(src, pos, vex, vexIndex, inst, mode) + } + // Decode loop, executing decoder program. var oldPC, prevPC int Decode: diff --git a/vendor/golang.org/x/arch/x86/x86asm/gnu.go b/vendor/golang.org/x/arch/x86/x86asm/gnu.go index 8eba1fd0cf..9fa590c82a 100644 --- a/vendor/golang.org/x/arch/x86/x86asm/gnu.go +++ b/vendor/golang.org/x/arch/x86/x86asm/gnu.go @@ -268,7 +268,7 @@ SuffixLoop: } } - if AL <= a && a <= R15 || ES <= a && a <= GS || X0 <= a && a <= X15 || M0 <= a && a <= M7 { + if AL <= a && a <= R15 || ES <= a && a <= GS || X0 <= a && a <= Z31 || M0 <= a && a <= M7 || K0 <= a && a <= K7 { needSuffix = false break SuffixLoop } @@ -279,7 +279,7 @@ SuffixLoop: switch inst.Op { case CMPXCHG8B, FLDCW, FNSTCW, FNSTSW, LDMXCSR, LLDT, LMSW, LTR, PCLMULQDQ, SETA, SETAE, SETB, SETBE, SETE, SETG, SETGE, SETL, SETLE, SETNE, SETNO, SETNP, SETNS, SETO, SETP, SETS, - SLDT, SMSW, STMXCSR, STR, VERR, VERW: + SLDT, SMSW, STMXCSR, STR, VERR, VERW, VLDMXCSR, VSTMXCSR: // For various reasons, libopcodes emits no suffix for these instructions. case CRC32: @@ -354,6 +354,74 @@ SuffixLoop: } } + isVexOrEvex := false + for _, p := range inst.Prefix { + if p.IsVEX() || p&0xFF == 0x62 { + isVexOrEvex = true + break + } + } + if isVexOrEvex { + hasMem := false + for _, a := range inst.Args { + if _, ok := a.(Mem); ok { + hasMem = true + break + } + } + if hasMem { + if inst.Op == VFPCLASSPD || inst.Op == VFPCLASSPS || inst.Op == VCVTTPD2DQ || inst.Op == VCVTTPD2UDQ || inst.Op == VCVTTPD2QQ || inst.Op == VCVTTPD2UQQ || inst.Op == VCVTPD2DQ || inst.Op == VCVTPD2UDQ || inst.Op == VCVTPD2QQ || inst.Op == VCVTPD2UQQ || inst.Op == VCVTPD2PS { + vexL := 0 + isEvex := false + for i, p := range inst.Prefix { + if p.IsEVEX() && i+3 < len(inst.Prefix) && inst.Prefix[i+3] != 0 { + vexL = int((inst.Prefix[i+3]&0xFF)>>5) & 3 + isEvex = true + break + } else if p.IsVEX() && i+2 < len(inst.Prefix) { + if p&0xFF == 0xC4 { + vexL = int((inst.Prefix[i+2]&0xFF)>>2) & 1 + } else if p&0xFF == 0xC5 { + vexL = int((inst.Prefix[i+1]&0xFF)>>2) & 1 + } + break + } + } + if !isEvex || inst.Op == VFPCLASSPD || inst.Op == VFPCLASSPS || inst.Op == VCVTPD2DQ { + switch vexL { + case 0: + op += "x" + case 1: + if inst.Op != VCMPPD && inst.Op != VCMPPS && inst.Op != VCMPPH && inst.Op != VCMPBF16 { + op += "y" + } + case 2: + if inst.Op != VCMPPD && inst.Op != VCMPPS && inst.Op != VCMPPH && inst.Op != VCMPBF16 { + op += "z" + } + } + } + } else if inst.Op == VCVTSI2SD || inst.Op == VCVTSI2SS { + is64 := false + if (inst.Op == VCVTSI2SD || inst.Op == VCVTSI2SS) && inst.MemBytes == 8 { + is64 = true + } else { + for _, a := range inst.Args { + if r, ok := a.(Reg); ok && RAX <= r && r <= R15 { + is64 = true + break + } + } + } + if is64 { + op += "q" + } else { + op += "l" + } + } + } + } + // Adjust special case opcodes. switch inst.Op { case 0: @@ -374,6 +442,20 @@ SuffixLoop: op = cmppsOps[imm] + op[3:] } + case VCMPPD, VCMPPS, VCMPSD, VCMPSS, VCMPPH, VCMPSH, VCMPBF16: + for i := len(inst.Args) - 1; i >= 0; i-- { + if imm, ok := inst.Args[i].(Imm); ok { + if 0 <= imm && imm < 8 { + inst.Args[i] = nil + op = "v" + cmppsOps[imm] + op[4:] + } + break + } + if inst.Args[i] != nil { + break + } + } + case PCLMULQDQ: imm, ok := inst.Args[2].(Imm) if ok && imm&^0x11 == 0 { @@ -407,7 +489,64 @@ SuffixLoop: if a == Imm(1) && (inst.Opcode>>24)&^1 == 0xD0 { continue } - args = append(args, gnuArg(&inst, pc, symname, a, &usedPrefixes)) + argStr := gnuArg(&inst, pc, symname, a, &usedPrefixes) + if i == 1 { + r, ok := a.(Reg) + // In GNU syntax, the mask register usually appears as the second argument (index 1). + if ok && K1 <= r && r <= K7 { + if !strings.HasPrefix(inst.Op.String(), "K") { + if len(args) > 0 { + args[0] += fmt.Sprintf(" {%s}", argStr) + if inst.Zeroing { + args[0] += " {z}" + } + } + continue + } + } else if ok && r == K0 { + if !strings.HasPrefix(inst.Op.String(), "K") { + if inst.Zeroing && len(args) > 0 { + args[0] += "{z}" + } + continue + } + } + } + if _, ok := a.(Mem); ok && inst.Broadcast && len(args) > 0 { + if dstReg, ok := inst.Args[0].(Reg); ok { + var vBytes int + if X0 <= dstReg && dstReg <= X31 { + vBytes = 16 + } else if Y0 <= dstReg && dstReg <= Y31 { + vBytes = 32 + } else if Z0 <= dstReg && dstReg <= Z31 { + vBytes = 64 + } + if vBytes > 0 && inst.MemBytes > 0 { + argStr += fmt.Sprintf("{1to%d}", vBytes/inst.MemBytes) + } + } + } + args = append(args, argStr) + } + + if inst.SAE { + var sae string + if hasRC(inst.Op) { + switch inst.Rounding { + case 0: + sae = "{rn-sae}" + case 1: + sae = "{rd-sae}" + case 2: + sae = "{ru-sae}" + case 3: + sae = "{rz-sae}" + } + } else { + sae = "{sae}" + } + args = append(args, sae) } // The default is to print the arguments in reverse Intel order. @@ -436,7 +575,7 @@ SuffixLoop: } } for _, p := range inst.Prefix { - if p == 0 || p.IsVEX() { + if p == 0 || p.IsVEX() || p.IsEVEX() { break } if p&PrefixImplicit != 0 { @@ -534,8 +673,6 @@ func gnuArg(inst *Inst, pc uint64, symname SymLookup, x Arg, usedPrefixes *bool) if x == DX { return "(%dx)" } - case VMOVDQA, VMOVDQU, VMOVNTDQA, VMOVNTDQ: - return strings.Replace(gccRegName[x], "xmm", "ymm", -1) } return gccRegName[x] case Mem: @@ -566,6 +703,10 @@ func gnuArg(inst *Inst, pc uint64, symname SymLookup, x Arg, usedPrefixes *bool) case INSB, INSW, INSD, STOSB, STOSW, STOSD, STOSQ, SCASB, SCASW, SCASD, SCASQ: // These do not accept segment prefixes, at least in the GNU rendering. default: + if isVSIB(inst.Op) { + haveCS, haveDS, haveES, haveSS = false, false, false, false + break + } if *usedPrefixes { break } @@ -653,6 +794,14 @@ func gnuArg(inst *Inst, pc uint64, symname SymLookup, x Arg, usedPrefixes *bool) // 16-bit addressing - no scale return fmt.Sprintf("%s%s(%s,%s)", seg, disp, base, index) } + if x.Scale == 1 { + // Special case to match objdump output for explicit scale 1. + // XXX is this the only one? + if inst.Op.String() == "VMOVNTDQA" { + return fmt.Sprintf("%s%s(%s,%s,1)", seg, disp, base, index) + } + return fmt.Sprintf("%s%s(%s,%s)", seg, disp, base, index) + } return fmt.Sprintf("%s%s(%s,%s,%d)", seg, disp, base, index, x.Scale) case Rel: if pc == 0 { @@ -667,12 +816,14 @@ func gnuArg(inst *Inst, pc uint64, symname SymLookup, x Arg, usedPrefixes *bool) } } case Imm: - if s, base := symname(uint64(x)); s != "" { - suffix := "" - if uint64(x) != base { - suffix = fmt.Sprintf("%+d", uint64(x)-base) + if (inst.Op == MOV || inst.Op == PUSH) && inst.DataSize == 32 { // See comment in plan9x.go. + if s, base := symname(uint64(x)); s != "" { + suffix := "" + if uint64(x) != base { + suffix = fmt.Sprintf("%+d", uint64(x)-base) + } + return fmt.Sprintf("$%s%s", s, suffix) } - return fmt.Sprintf("$%s%s", s, suffix) } if inst.Mode == 32 { return fmt.Sprintf("$%#x", uint32(x)) @@ -787,6 +938,94 @@ var gccRegName = [...]string{ X13: "%xmm13", X14: "%xmm14", X15: "%xmm15", + X16: "%xmm16", + X17: "%xmm17", + X18: "%xmm18", + X19: "%xmm19", + X20: "%xmm20", + X21: "%xmm21", + X22: "%xmm22", + X23: "%xmm23", + X24: "%xmm24", + X25: "%xmm25", + X26: "%xmm26", + X27: "%xmm27", + X28: "%xmm28", + X29: "%xmm29", + X30: "%xmm30", + X31: "%xmm31", + Y0: "%ymm0", + Y1: "%ymm1", + Y2: "%ymm2", + Y3: "%ymm3", + Y4: "%ymm4", + Y5: "%ymm5", + Y6: "%ymm6", + Y7: "%ymm7", + Y8: "%ymm8", + Y9: "%ymm9", + Y10: "%ymm10", + Y11: "%ymm11", + Y12: "%ymm12", + Y13: "%ymm13", + Y14: "%ymm14", + Y15: "%ymm15", + Y16: "%ymm16", + Y17: "%ymm17", + Y18: "%ymm18", + Y19: "%ymm19", + Y20: "%ymm20", + Y21: "%ymm21", + Y22: "%ymm22", + Y23: "%ymm23", + Y24: "%ymm24", + Y25: "%ymm25", + Y26: "%ymm26", + Y27: "%ymm27", + Y28: "%ymm28", + Y29: "%ymm29", + Y30: "%ymm30", + Y31: "%ymm31", + Z0: "%zmm0", + Z1: "%zmm1", + Z2: "%zmm2", + Z3: "%zmm3", + Z4: "%zmm4", + Z5: "%zmm5", + Z6: "%zmm6", + Z7: "%zmm7", + Z8: "%zmm8", + Z9: "%zmm9", + Z10: "%zmm10", + Z11: "%zmm11", + Z12: "%zmm12", + Z13: "%zmm13", + Z14: "%zmm14", + Z15: "%zmm15", + Z16: "%zmm16", + Z17: "%zmm17", + Z18: "%zmm18", + Z19: "%zmm19", + Z20: "%zmm20", + Z21: "%zmm21", + Z22: "%zmm22", + Z23: "%zmm23", + Z24: "%zmm24", + Z25: "%zmm25", + Z26: "%zmm26", + Z27: "%zmm27", + Z28: "%zmm28", + Z29: "%zmm29", + Z30: "%zmm30", + Z31: "%zmm31", + K0: "%k0", + K1: "%k1", + K2: "%k2", + K3: "%k3", + K4: "%k4", + K5: "%k5", + K6: "%k6", + K7: "%k7", CS: "%cs", SS: "%ss", DS: "%ds", diff --git a/vendor/golang.org/x/arch/x86/x86asm/inst.go b/vendor/golang.org/x/arch/x86/x86asm/inst.go index e98f1a8418..0fedf4dc46 100644 --- a/vendor/golang.org/x/arch/x86/x86asm/inst.go +++ b/vendor/golang.org/x/arch/x86/x86asm/inst.go @@ -23,6 +23,11 @@ type Inst struct { Len int // length of encoded instruction in bytes PCRel int // length of PC-relative address in instruction encoding PCRelOff int // index of start of PC-relative address in instruction encoding + // AVX-512 flags + Broadcast bool // EVEX broadcast + Zeroing bool // EVEX zeroing + SAE bool // Suppress All Exceptions + Rounding int8 // Rounding control (0-3), valid only when SAE is true } // Prefixes is an array of prefixes associated with a single instruction. @@ -79,6 +84,7 @@ const ( PrefixREXB Prefix = 0x01 // extension bit B (r/m field in modrm or base field in sib) PrefixVEX2Bytes Prefix = 0xC5 // Short form of vex prefix PrefixVEX3Bytes Prefix = 0xC4 // Long form of vex prefix + PrefixEVEX Prefix = 0x62 // EVEX prefix ) // IsREX reports whether p is a REX prefix byte. @@ -90,6 +96,10 @@ func (p Prefix) IsVEX() bool { return p&0xFF == PrefixVEX2Bytes || p&0xFF == PrefixVEX3Bytes } +func (p Prefix) IsEVEX() bool { + return p&0xFF == PrefixEVEX +} + func (p Prefix) String() string { p &^= PrefixImplicit | PrefixIgnored | PrefixInvalid if s := prefixNames[p]; s != "" { @@ -122,6 +132,9 @@ type Op uint32 func (op Op) String() string { i := int(op) if i < 0 || i >= len(opNames) || opNames[i] == "" { + if i < len(avxOpNames) && avxOpNames[i] != "" { + return avxOpNames[i] + } return fmt.Sprintf("Op(%d)", i) } return opNames[i] @@ -130,7 +143,7 @@ func (op Op) String() string { // An Args holds the instruction arguments. // If an instruction has fewer than 4 arguments, // the final elements in the array are nil. -type Args [4]Arg +type Args [6]Arg // An Arg is a single instruction argument, // one of these types: Reg, Mem, Imm, Rel. @@ -268,6 +281,100 @@ const ( X13 X14 X15 + X16 + X17 + X18 + X19 + X20 + X21 + X22 + X23 + X24 + X25 + X26 + X27 + X28 + X29 + X30 + X31 + + // YMM registers. + Y0 + Y1 + Y2 + Y3 + Y4 + Y5 + Y6 + Y7 + Y8 + Y9 + Y10 + Y11 + Y12 + Y13 + Y14 + Y15 + Y16 + Y17 + Y18 + Y19 + Y20 + Y21 + Y22 + Y23 + Y24 + Y25 + Y26 + Y27 + Y28 + Y29 + Y30 + Y31 + + // ZMM registers. + Z0 + Z1 + Z2 + Z3 + Z4 + Z5 + Z6 + Z7 + Z8 + Z9 + Z10 + Z11 + Z12 + Z13 + Z14 + Z15 + Z16 + Z17 + Z18 + Z19 + Z20 + Z21 + Z22 + Z23 + Z24 + Z25 + Z26 + Z27 + Z28 + Z29 + Z30 + Z31 + + // Mask registers. + K0 + K1 + K2 + K3 + K4 + K5 + K6 + K7 // Segment registers. ES @@ -595,6 +702,94 @@ var regNames = [...]string{ X13: "X13", X14: "X14", X15: "X15", + X16: "X16", + X17: "X17", + X18: "X18", + X19: "X19", + X20: "X20", + X21: "X21", + X22: "X22", + X23: "X23", + X24: "X24", + X25: "X25", + X26: "X26", + X27: "X27", + X28: "X28", + X29: "X29", + X30: "X30", + X31: "X31", + Y0: "Y0", + Y1: "Y1", + Y2: "Y2", + Y3: "Y3", + Y4: "Y4", + Y5: "Y5", + Y6: "Y6", + Y7: "Y7", + Y8: "Y8", + Y9: "Y9", + Y10: "Y10", + Y11: "Y11", + Y12: "Y12", + Y13: "Y13", + Y14: "Y14", + Y15: "Y15", + Y16: "Y16", + Y17: "Y17", + Y18: "Y18", + Y19: "Y19", + Y20: "Y20", + Y21: "Y21", + Y22: "Y22", + Y23: "Y23", + Y24: "Y24", + Y25: "Y25", + Y26: "Y26", + Y27: "Y27", + Y28: "Y28", + Y29: "Y29", + Y30: "Y30", + Y31: "Y31", + Z0: "Z0", + Z1: "Z1", + Z2: "Z2", + Z3: "Z3", + Z4: "Z4", + Z5: "Z5", + Z6: "Z6", + Z7: "Z7", + Z8: "Z8", + Z9: "Z9", + Z10: "Z10", + Z11: "Z11", + Z12: "Z12", + Z13: "Z13", + Z14: "Z14", + Z15: "Z15", + Z16: "Z16", + Z17: "Z17", + Z18: "Z18", + Z19: "Z19", + Z20: "Z20", + Z21: "Z21", + Z22: "Z22", + Z23: "Z23", + Z24: "Z24", + Z25: "Z25", + Z26: "Z26", + Z27: "Z27", + Z28: "Z28", + Z29: "Z29", + Z30: "Z30", + Z31: "Z31", + K0: "K0", + K1: "K1", + K2: "K2", + K3: "K3", + K4: "K4", + K5: "K5", + K6: "K6", + K7: "K7", CS: "CS", SS: "SS", DS: "DS", diff --git a/vendor/golang.org/x/arch/x86/x86asm/intel.go b/vendor/golang.org/x/arch/x86/x86asm/intel.go index 472eabda80..5acea99442 100644 --- a/vendor/golang.org/x/arch/x86/x86asm/intel.go +++ b/vendor/golang.org/x/arch/x86/x86asm/intel.go @@ -99,6 +99,12 @@ func IntelSyntax(inst Inst, pc uint64, symname SymLookup) string { inst.Prefix[i] |= PrefixImplicit inst.Prefix[i+1] |= PrefixImplicit } + if p.IsEVEX() { + inst.Prefix[i] |= PrefixImplicit + inst.Prefix[i+1] |= PrefixImplicit + inst.Prefix[i+2] |= PrefixImplicit + inst.Prefix[i+3] |= PrefixImplicit + } } } @@ -256,11 +262,55 @@ func IntelSyntax(inst Inst, pc uint64, symname SymLookup) string { } var args []string - for _, a := range iargs { + for i, a := range iargs { if a == nil { break } - args = append(args, intelArg(&inst, pc, symname, a)) + argStr := intelArg(&inst, pc, symname, a) + if i == 1 { + r, ok := a.(Reg) + if ok && K1 <= r && r <= K7 { + if !strings.HasPrefix(inst.Op.String(), "K") { + isPF := strings.HasPrefix(inst.Op.String(), "VGATHERPF") || strings.HasPrefix(inst.Op.String(), "VSCATTERPF") + if isPF { + args = append([]string{fmt.Sprintf("{%s}", argStr)}, args...) + } else if len(args) > 0 { + args[len(args)-1] += fmt.Sprintf(" {%s}", argStr) + if inst.Zeroing { + args[len(args)-1] += " {z}" + } + } + continue + } + } else if ok && r == K0 { + if !strings.HasPrefix(inst.Op.String(), "K") { + isPF := strings.HasPrefix(inst.Op.String(), "VGATHERPF") || strings.HasPrefix(inst.Op.String(), "VSCATTERPF") + if isPF { + args = append([]string{fmt.Sprintf("{%s}", argStr)}, args...) + } else if inst.Zeroing && len(args) > 0 { + args[len(args)-1] += " {z}" + } + continue + } + } + } + if _, ok := a.(Mem); ok && inst.Broadcast && len(args) > 0 { + // Find vector size from first argument (destination) + if dstReg, ok := iargs[0].(Reg); ok { + var vBytes int + if X0 <= dstReg && dstReg <= X31 { + vBytes = 16 + } else if Y0 <= dstReg && dstReg <= Y31 { + vBytes = 32 + } else if Z0 <= dstReg && dstReg <= Z31 { + vBytes = 64 + } + if vBytes > 0 && inst.MemBytes > 0 { + argStr += fmt.Sprintf("{1to%d}", vBytes/inst.MemBytes) + } + } + } + args = append(args, argStr) } var op string @@ -288,6 +338,24 @@ func IntelSyntax(inst Inst, pc uint64, symname SymLookup) string { args[0], args[1] = args[1], args[0] } + case VCMPPD, VCMPPS, VCMPSD, VCMPSS, VCMPPH, VCMPSH, VCMPBF16: + for i := len(inst.Args) - 1; i >= 0; i-- { + if imm, ok := inst.Args[i].(Imm); ok { + if 0 <= imm && imm < 8 { + args = args[:len(args)-1] + baseOp := intelOp[inst.Op] + if baseOp == "" { + baseOp = strings.ToLower(inst.Op.String()) + } + op = "v" + cmppsOps[imm] + baseOp[4:] + } + break + } + if inst.Args[i] != nil { + break + } + } + case FCHS, FABS, FTST, FLDPI, FLDL2E, FLDLG2, F2XM1, FXAM, FLD1, FLDL2T, FSQRT, FRNDINT, FCOS, FSIN: if len(args) == 0 { args = append(args, "st0") @@ -326,6 +394,23 @@ func IntelSyntax(inst Inst, pc uint64, symname SymLookup) string { } } + if inst.SAE { + if hasRC(inst.Op) { + switch inst.Rounding { + case 0: + args = append(args, "{rn-sae}") + case 1: + args = append(args, "{rd-sae}") + case 2: + args = append(args, "{ru-sae}") + case 3: + args = append(args, "{rz-sae}") + } + } else { + args = append(args, "{sae}") + } + } + if op == "" { op = intelOp[inst.Op] } @@ -341,12 +426,14 @@ func IntelSyntax(inst Inst, pc uint64, symname SymLookup) string { func intelArg(inst *Inst, pc uint64, symname SymLookup, arg Arg) string { switch a := arg.(type) { case Imm: - if s, base := symname(uint64(a)); s != "" { - suffix := "" - if uint64(a) != base { - suffix = fmt.Sprintf("%+d", uint64(a)-base) + if (inst.Op == MOV || inst.Op == PUSH) && inst.DataSize == 32 { // See comment in plan9x.go. + if s, base := symname(uint64(a)); s != "" { + suffix := "" + if uint64(a) != base { + suffix = fmt.Sprintf("%+d", uint64(a)-base) + } + return fmt.Sprintf("$%s%s", s, suffix) } - return fmt.Sprintf("$%s%s", s, suffix) } if inst.Mode == 32 { return fmt.Sprintf("%#x", uint32(a)) @@ -373,6 +460,16 @@ func intelArg(inst *Inst, pc uint64, symname SymLookup, arg Arg) string { prefix = "xmmword " case 32: prefix = "ymmword " + case 64: + prefix = "zmmword " + } + if isVSIB(inst.Op) { + switch inst.Op { + case VPGATHERDD, VPSCATTERDD, VPGATHERQD, VPSCATTERQD, VGATHERDPS, VSCATTERDPS, VGATHERQPS, VSCATTERQPS, VGATHERPF0DPS, VGATHERPF1DPS, VSCATTERPF0DPS, VSCATTERPF1DPS, VGATHERPF0QPS, VGATHERPF1QPS, VSCATTERPF0QPS, VSCATTERPF1QPS: + prefix = "dword " + case VPGATHERDQ, VPSCATTERDQ, VPGATHERQQ, VPSCATTERQQ, VGATHERDPD, VSCATTERDPD, VGATHERQPD, VSCATTERQPD, VGATHERPF0DPD, VGATHERPF1DPD, VSCATTERPF0DPD, VSCATTERPF1DPD, VGATHERPF0QPD, VGATHERPF1QPD, VSCATTERPF0QPD, VSCATTERPF1QPD: + prefix = "qword " + } } switch inst.Op { case INVLPG: @@ -446,7 +543,17 @@ func intelArg(inst *Inst, pc uint64, symname SymLookup, arg Arg) string { if a.Base != 0 { prefix += "+" } - prefix += fmt.Sprintf("%s*%d", intelArg(inst, pc, symname, a.Index), a.Scale) + if a.Scale == 1 { + if inst.AddrSize == 16 || inst.Op.String() == "VMOVNTDQA" { + prefix += fmt.Sprintf("%s*1", intelArg(inst, pc, symname, a.Index)) + } else if a.Base == 0 && ((X0 <= a.Index && a.Index <= Z31) || (M0 <= a.Index && a.Index <= M7)) { + prefix += fmt.Sprintf("1*%s", intelArg(inst, pc, symname, a.Index)) + } else { + prefix += fmt.Sprintf("%s", intelArg(inst, pc, symname, a.Index)) + } + } else { + prefix += fmt.Sprintf("%d*%s", a.Scale, intelArg(inst, pc, symname, a.Index)) + } } if a.Disp != 0 { if prefix[len(prefix)-1] == '[' && (a.Disp >= 0 || int64(int32(a.Disp)) != a.Disp) { @@ -471,12 +578,7 @@ func intelArg(inst *Inst, pc uint64, symname SymLookup, arg Arg) string { } case Reg: if int(a) < len(intelReg) && intelReg[a] != "" { - switch inst.Op { - case VMOVDQA, VMOVDQU, VMOVNTDQA, VMOVNTDQ: - return strings.Replace(intelReg[a], "xmm", "ymm", -1) - default: - return intelReg[a] - } + return intelReg[a] } } return strings.ToLower(arg.String()) @@ -542,6 +644,94 @@ var intelReg = [...]string{ X13: "xmm13", X14: "xmm14", X15: "xmm15", + X16: "xmm16", + X17: "xmm17", + X18: "xmm18", + X19: "xmm19", + X20: "xmm20", + X21: "xmm21", + X22: "xmm22", + X23: "xmm23", + X24: "xmm24", + X25: "xmm25", + X26: "xmm26", + X27: "xmm27", + X28: "xmm28", + X29: "xmm29", + X30: "xmm30", + X31: "xmm31", + Y0: "ymm0", + Y1: "ymm1", + Y2: "ymm2", + Y3: "ymm3", + Y4: "ymm4", + Y5: "ymm5", + Y6: "ymm6", + Y7: "ymm7", + Y8: "ymm8", + Y9: "ymm9", + Y10: "ymm10", + Y11: "ymm11", + Y12: "ymm12", + Y13: "ymm13", + Y14: "ymm14", + Y15: "ymm15", + Y16: "ymm16", + Y17: "ymm17", + Y18: "ymm18", + Y19: "ymm19", + Y20: "ymm20", + Y21: "ymm21", + Y22: "ymm22", + Y23: "ymm23", + Y24: "ymm24", + Y25: "ymm25", + Y26: "ymm26", + Y27: "ymm27", + Y28: "ymm28", + Y29: "ymm29", + Y30: "ymm30", + Y31: "ymm31", + Z0: "zmm0", + Z1: "zmm1", + Z2: "zmm2", + Z3: "zmm3", + Z4: "zmm4", + Z5: "zmm5", + Z6: "zmm6", + Z7: "zmm7", + Z8: "zmm8", + Z9: "zmm9", + Z10: "zmm10", + Z11: "zmm11", + Z12: "zmm12", + Z13: "zmm13", + Z14: "zmm14", + Z15: "zmm15", + Z16: "zmm16", + Z17: "zmm17", + Z18: "zmm18", + Z19: "zmm19", + Z20: "zmm20", + Z21: "zmm21", + Z22: "zmm22", + Z23: "zmm23", + Z24: "zmm24", + Z25: "zmm25", + Z26: "zmm26", + Z27: "zmm27", + Z28: "zmm28", + Z29: "zmm29", + Z30: "zmm30", + Z31: "zmm31", + K0: "k0", + K1: "k1", + K2: "k2", + K3: "k3", + K4: "k4", + K5: "k5", + K6: "k6", + K7: "k7", // TODO: Maybe the constants are named wrong. SPB: "spl", diff --git a/vendor/golang.org/x/arch/x86/x86asm/plan9x.go b/vendor/golang.org/x/arch/x86/x86asm/plan9x.go index 9e866d87b6..59b7611dd3 100644 --- a/vendor/golang.org/x/arch/x86/x86asm/plan9x.go +++ b/vendor/golang.org/x/arch/x86/x86asm/plan9x.go @@ -34,7 +34,7 @@ func GoSyntax(inst Inst, pc uint64, symname SymLookup) string { var rep string var last Prefix for _, p := range inst.Prefix { - if p == 0 || p.IsREX() || p.IsVEX() { + if p == 0 || p.IsREX() || p.IsVEX() || p.IsEVEX() { break } @@ -62,7 +62,61 @@ func GoSyntax(inst Inst, pc uint64, symname SymLookup) string { } op := inst.Op.String() - if plan9Suffix[inst.Op] { + if inst.Op == VFPCLASSPD || inst.Op == VFPCLASSPS || inst.Op == VCVTTPD2DQ || inst.Op == VCVTTPD2UDQ || inst.Op == VCVTTPD2QQ || inst.Op == VCVTTPD2UQQ || inst.Op == VCVTPD2DQ || inst.Op == VCVTPD2UDQ || inst.Op == VCVTPD2QQ || inst.Op == VCVTPD2UQQ || inst.Op == VCVTPD2PS { + vexL := 0 + isEvex := false + for i, p := range inst.Prefix { + if p.IsEVEX() && i+3 < len(inst.Prefix) && inst.Prefix[i+3] != 0 { + vexL = int((inst.Prefix[i+3]&0xFF)>>5) & 3 + isEvex = true + break + } else if p.IsVEX() && i+2 < len(inst.Prefix) { + if p&0xFF == 0xC4 { + vexL = int((inst.Prefix[i+2]&0xFF)>>2) & 1 + } else if p&0xFF == 0xC5 { + vexL = int((inst.Prefix[i+1]&0xFF)>>2) & 1 + } + break + } + } + if !isEvex || inst.Op == VFPCLASSPD || inst.Op == VFPCLASSPS || inst.Op == VCVTPD2DQ { + switch vexL { + case 0: + op += "X" + case 1: + if inst.Op != VCMPPD && inst.Op != VCMPPS && inst.Op != VCMPPH && inst.Op != VCMPBF16 { + op += "Y" + } + case 2: + if inst.Op != VCMPPD && inst.Op != VCMPPS && inst.Op != VCMPPH && inst.Op != VCMPBF16 { + op += "Z" + } + } + } + } else if inst.Op == VCVTTSD2SI || inst.Op == VCVTTSS2SI || inst.Op == VCVTSD2SI || inst.Op == VCVTSS2SI || inst.Op == VCVTSI2SD || inst.Op == VCVTSI2SS { + is64 := false + if (inst.Op == VCVTSI2SD || inst.Op == VCVTSI2SS) && inst.MemBytes == 8 { + is64 = true + } else { + for _, a := range inst.Args { + if r, ok := a.(Reg); ok && RAX <= r && r <= R15 { + is64 = true + break + } + } + } + if inst.Op == VCVTSI2SD || inst.Op == VCVTSI2SS { + if is64 { + op += "Q" + } else { + op += "L" + } + } else { + if is64 { + op += "Q" + } + } + } else if plan9Suffix[inst.Op] { s := inst.DataSize if inst.MemBytes != 0 { s = inst.MemBytes * 8 @@ -83,6 +137,29 @@ func GoSyntax(inst Inst, pc uint64, symname SymLookup) string { } } + if inst.Broadcast { + op += ".BCST" + } + if inst.SAE { + if hasRC(inst.Op) { + switch inst.Rounding { + case 0: + op += ".RN_SAE" + case 1: + op += ".RD_SAE" + case 2: + op += ".RU_SAE" + case 3: + op += ".RZ_SAE" + } + } else { + op += ".SAE" + } + } + if inst.Zeroing { + op += ".Z" + } + if inst.Op == CMP { // Use reads-left-to-right ordering for comparisons. // See issue 60920. @@ -116,12 +193,23 @@ func plan9Arg(inst *Inst, pc uint64, symname func(uint64) (string, uint64), arg return fmt.Sprintf("%#x", addr) case Imm: - if s, base := symname(uint64(a)); s != "" { - suffix := "" - if uint64(a) != base { - suffix = fmt.Sprintf("%+d", uint64(a)-base) + if (inst.Op == MOV || inst.Op == PUSH) && inst.DataSize == 32 { + // Only try to convert an immediate to a symbol in certain + // special circumstances. See issue 72942. + // + // On 64-bit, symbol addresses always hit the Mem case below. + // Particularly, we use LEAQ to materialize the address of + // a global or function. + // + // On 32-bit, we sometimes use MOVL. Still try to symbolize + // those immediates. + if s, base := symname(uint64(a)); s != "" { + suffix := "" + if uint64(a) != base { + suffix = fmt.Sprintf("%+d", uint64(a)-base) + } + return fmt.Sprintf("$%s%s(SB)", s, suffix) } - return fmt.Sprintf("$%s%s(SB)", s, suffix) } if inst.Mode == 32 { return fmt.Sprintf("$%#x", uint32(a)) @@ -338,6 +426,94 @@ var plan9Reg = [...]string{ X13: "X13", X14: "X14", X15: "X15", + X16: "X16", + X17: "X17", + X18: "X18", + X19: "X19", + X20: "X20", + X21: "X21", + X22: "X22", + X23: "X23", + X24: "X24", + X25: "X25", + X26: "X26", + X27: "X27", + X28: "X28", + X29: "X29", + X30: "X30", + X31: "X31", + Y0: "Y0", + Y1: "Y1", + Y2: "Y2", + Y3: "Y3", + Y4: "Y4", + Y5: "Y5", + Y6: "Y6", + Y7: "Y7", + Y8: "Y8", + Y9: "Y9", + Y10: "Y10", + Y11: "Y11", + Y12: "Y12", + Y13: "Y13", + Y14: "Y14", + Y15: "Y15", + Y16: "Y16", + Y17: "Y17", + Y18: "Y18", + Y19: "Y19", + Y20: "Y20", + Y21: "Y21", + Y22: "Y22", + Y23: "Y23", + Y24: "Y24", + Y25: "Y25", + Y26: "Y26", + Y27: "Y27", + Y28: "Y28", + Y29: "Y29", + Y30: "Y30", + Y31: "Y31", + Z0: "Z0", + Z1: "Z1", + Z2: "Z2", + Z3: "Z3", + Z4: "Z4", + Z5: "Z5", + Z6: "Z6", + Z7: "Z7", + Z8: "Z8", + Z9: "Z9", + Z10: "Z10", + Z11: "Z11", + Z12: "Z12", + Z13: "Z13", + Z14: "Z14", + Z15: "Z15", + Z16: "Z16", + Z17: "Z17", + Z18: "Z18", + Z19: "Z19", + Z20: "Z20", + Z21: "Z21", + Z22: "Z22", + Z23: "Z23", + Z24: "Z24", + Z25: "Z25", + Z26: "Z26", + Z27: "Z27", + Z28: "Z28", + Z29: "Z29", + Z30: "Z30", + Z31: "Z31", + K0: "K0", + K1: "K1", + K2: "K2", + K3: "K3", + K4: "K4", + K5: "K5", + K6: "K6", + K7: "K7", CS: "CS", SS: "SS", DS: "DS", diff --git a/vendor/golang.org/x/arch/x86/x86asm/tables.go b/vendor/golang.org/x/arch/x86/x86asm/tables.go index 6f57c70bf1..c9d2ad1817 100644 --- a/vendor/golang.org/x/arch/x86/x86asm/tables.go +++ b/vendor/golang.org/x/arch/x86/x86asm/tables.go @@ -1,4 +1,4 @@ -// Code generated by x86map -fmt=decoder x86.csv DO NOT EDIT. +// Code generated by x86map -fmt=decoder ../x86.csv DO NOT EDIT. package x86asm @@ -21,233 +21,233 @@ var decoder = [...]uint16{ 0x0D, 685, 0x0E, 714, 0x0F, 721, - 0x10, 8045, - 0x11, 8051, - 0x12, 8080, - 0x13, 8086, - 0x14, 8115, - 0x15, 8121, - 0x16, 8150, - 0x17, 8157, - 0x18, 8164, - 0x19, 8170, - 0x1A, 8199, - 0x1B, 8205, - 0x1C, 8234, - 0x1D, 8240, - 0x1E, 8269, - 0x1F, 8276, - 0x20, 8283, - 0x21, 8289, - 0x22, 8318, - 0x23, 8324, - 0x24, 8353, - 0x25, 8359, - 0x27, 8388, - 0x28, 8394, - 0x29, 8400, - 0x2A, 8429, - 0x2B, 8471, - 0x2C, 8500, - 0x2D, 8506, - 0x2F, 8535, - 0x30, 8541, - 0x31, 8547, - 0x32, 8576, - 0x33, 8582, - 0x34, 8611, - 0x35, 8617, - 0x37, 8646, - 0x38, 8652, - 0x39, 8658, - 0x3A, 8687, - 0x3B, 8693, - 0x3C, 8722, - 0x3D, 8728, - 0x3F, 8757, - 0x40, 8763, - 0x41, 8763, - 0x42, 8763, - 0x43, 8763, - 0x44, 8763, - 0x45, 8763, - 0x46, 8763, - 0x47, 8763, - 0x48, 8778, - 0x49, 8778, - 0x4a, 8778, - 0x4b, 8778, - 0x4c, 8778, - 0x4d, 8778, - 0x4e, 8778, - 0x4f, 8778, - 0x50, 8793, - 0x51, 8793, - 0x52, 8793, - 0x53, 8793, - 0x54, 8793, - 0x55, 8793, - 0x56, 8793, - 0x57, 8793, - 0x58, 8820, - 0x59, 8820, - 0x5a, 8820, - 0x5b, 8820, - 0x5c, 8820, - 0x5d, 8820, - 0x5e, 8820, - 0x5f, 8820, - 0x60, 8847, - 0x61, 8860, - 0x62, 8873, - 0x63, 8892, - 0x68, 8923, - 0x69, 8942, - 0x6A, 8977, - 0x6B, 8982, - 0x6C, 9017, - 0x6D, 9020, - 0x6E, 9033, - 0x6F, 9036, - 0x70, 9109, - 0x71, 9114, - 0x72, 9119, - 0x73, 9124, - 0x74, 9129, - 0x75, 9134, - 0x76, 9139, - 0x77, 9144, - 0x78, 9171, - 0x79, 9176, - 0x7A, 9181, - 0x7B, 9186, - 0x7C, 9191, - 0x7D, 9196, - 0x7E, 9201, - 0x7F, 9206, - 0x80, 9271, - 0x81, 9328, - 0x83, 9569, - 0x84, 9810, - 0x85, 9816, - 0x86, 9845, - 0x87, 9851, - 0x88, 9880, - 0x89, 9886, - 0x8A, 9908, - 0x8B, 9914, - 0x8C, 9936, - 0x8D, 9965, - 0x8E, 9994, - 0x8F, 10023, - 0x90, 10059, - 0x91, 10059, - 0x92, 10059, - 0x93, 10059, - 0x94, 10059, - 0x95, 10059, - 0x96, 10059, - 0x97, 10059, - 0x98, 10085, - 0x99, 10105, - 0x9A, 10125, - 0x9B, 10142, - 0x9C, 10145, - 0x9D, 10168, - 0x9E, 10191, - 0x9F, 10194, - 0xA0, 10197, - 0xA1, 10216, - 0xA2, 10238, - 0xA3, 10257, - 0xA4, 10279, - 0xA5, 10282, - 0xA6, 10302, - 0xA7, 10305, - 0xA8, 10325, - 0xA9, 10331, - 0xAA, 10360, - 0xAB, 10363, - 0xAC, 10383, - 0xAD, 10386, - 0xAE, 10406, - 0xAF, 10409, - 0xb0, 10429, - 0xb1, 10429, - 0xb2, 10429, - 0xb3, 10429, - 0xb4, 10429, - 0xb5, 10429, - 0xb6, 10429, - 0xb7, 10429, - 0xb8, 10435, - 0xb9, 10435, - 0xba, 10435, - 0xbb, 10435, - 0xbc, 10435, - 0xbd, 10435, - 0xbe, 10435, - 0xbf, 10435, - 0xC0, 10464, - 0xC1, 10515, - 0xC2, 10713, - 0xC3, 10718, - 0xC4, 10721, - 0xC5, 10740, - 0xC6, 10759, - 0xC7, 10783, - 0xC8, 10844, - 0xC9, 10851, - 0xCA, 10874, - 0xCB, 10879, - 0xCC, 10882, - 0xCD, 10886, - 0xCE, 10891, - 0xCF, 10897, - 0xD0, 10917, - 0xD1, 10961, - 0xD2, 11152, - 0xD3, 11196, - 0xD4, 11387, - 0xD5, 11395, - 0xD7, 11403, - 0xD8, 11416, - 0xD9, 11625, - 0xDA, 11844, - 0xDB, 11976, - 0xDC, 12147, - 0xDD, 12316, - 0xDE, 12455, - 0xDF, 12629, - 0xE0, 12740, - 0xE1, 12745, - 0xE2, 12750, - 0xE3, 12755, - 0xE4, 12781, - 0xE5, 12787, - 0xE6, 12809, - 0xE7, 12815, - 0xE8, 12873, - 0xE9, 12904, - 0xEA, 12935, - 0xEB, 12952, - 0xEC, 12957, - 0xED, 12962, - 0xEE, 12981, - 0xEF, 12986, - 0xF1, 13005, - 0xF4, 13008, - 0xF5, 13011, - 0xF6, 13014, - 0xF7, 13053, - 0xF8, 13229, - 0xF9, 13232, - 0xFA, 13235, - 0xFB, 13238, - 0xFC, 13241, - 0xFD, 13244, - 0xFE, 13247, - 0xFF, 13264, + 0x10, 8104, + 0x11, 8110, + 0x12, 8139, + 0x13, 8145, + 0x14, 8174, + 0x15, 8180, + 0x16, 8209, + 0x17, 8216, + 0x18, 8223, + 0x19, 8229, + 0x1A, 8258, + 0x1B, 8264, + 0x1C, 8293, + 0x1D, 8299, + 0x1E, 8328, + 0x1F, 8335, + 0x20, 8342, + 0x21, 8348, + 0x22, 8377, + 0x23, 8383, + 0x24, 8412, + 0x25, 8418, + 0x27, 8447, + 0x28, 8453, + 0x29, 8459, + 0x2A, 8488, + 0x2B, 8494, + 0x2C, 8523, + 0x2D, 8529, + 0x2F, 8558, + 0x30, 8564, + 0x31, 8570, + 0x32, 8599, + 0x33, 8605, + 0x34, 8634, + 0x35, 8640, + 0x37, 8669, + 0x38, 8675, + 0x39, 8681, + 0x3A, 8710, + 0x3B, 8716, + 0x3C, 8745, + 0x3D, 8751, + 0x3F, 8780, + 0x40, 8786, + 0x41, 8786, + 0x42, 8786, + 0x43, 8786, + 0x44, 8786, + 0x45, 8786, + 0x46, 8786, + 0x47, 8786, + 0x48, 8801, + 0x49, 8801, + 0x4a, 8801, + 0x4b, 8801, + 0x4c, 8801, + 0x4d, 8801, + 0x4e, 8801, + 0x4f, 8801, + 0x50, 8816, + 0x51, 8816, + 0x52, 8816, + 0x53, 8816, + 0x54, 8816, + 0x55, 8816, + 0x56, 8816, + 0x57, 8816, + 0x58, 8843, + 0x59, 8843, + 0x5a, 8843, + 0x5b, 8843, + 0x5c, 8843, + 0x5d, 8843, + 0x5e, 8843, + 0x5f, 8843, + 0x60, 8870, + 0x61, 8883, + 0x62, 8896, + 0x63, 8915, + 0x68, 8946, + 0x69, 8965, + 0x6A, 9000, + 0x6B, 9005, + 0x6C, 9040, + 0x6D, 9043, + 0x6E, 9056, + 0x6F, 9059, + 0x70, 9072, + 0x71, 9077, + 0x72, 9082, + 0x73, 9087, + 0x74, 9092, + 0x75, 9097, + 0x76, 9102, + 0x77, 9107, + 0x78, 9112, + 0x79, 9117, + 0x7A, 9122, + 0x7B, 9127, + 0x7C, 9132, + 0x7D, 9137, + 0x7E, 9142, + 0x7F, 9147, + 0x80, 9152, + 0x81, 9209, + 0x83, 9450, + 0x84, 9691, + 0x85, 9697, + 0x86, 9726, + 0x87, 9732, + 0x88, 9761, + 0x89, 9767, + 0x8A, 9789, + 0x8B, 9795, + 0x8C, 9817, + 0x8D, 9846, + 0x8E, 9875, + 0x8F, 9904, + 0x90, 9940, + 0x91, 9940, + 0x92, 9940, + 0x93, 9940, + 0x94, 9940, + 0x95, 9940, + 0x96, 9940, + 0x97, 9940, + 0x98, 9966, + 0x99, 9986, + 0x9A, 10006, + 0x9B, 10023, + 0x9C, 10026, + 0x9D, 10049, + 0x9E, 10072, + 0x9F, 10075, + 0xA0, 10078, + 0xA1, 10097, + 0xA2, 10119, + 0xA3, 10138, + 0xA4, 10160, + 0xA5, 10163, + 0xA6, 10183, + 0xA7, 10186, + 0xA8, 10206, + 0xA9, 10212, + 0xAA, 10241, + 0xAB, 10244, + 0xAC, 10264, + 0xAD, 10267, + 0xAE, 10287, + 0xAF, 10290, + 0xb0, 10310, + 0xb1, 10310, + 0xb2, 10310, + 0xb3, 10310, + 0xb4, 10310, + 0xb5, 10310, + 0xb6, 10310, + 0xb7, 10310, + 0xb8, 10316, + 0xb9, 10316, + 0xba, 10316, + 0xbb, 10316, + 0xbc, 10316, + 0xbd, 10316, + 0xbe, 10316, + 0xbf, 10316, + 0xC0, 10345, + 0xC1, 10396, + 0xC2, 10594, + 0xC3, 10599, + 0xC4, 10602, + 0xC5, 10621, + 0xC6, 10640, + 0xC7, 10664, + 0xC8, 10725, + 0xC9, 10732, + 0xCA, 10755, + 0xCB, 10760, + 0xCC, 10763, + 0xCD, 10767, + 0xCE, 10772, + 0xCF, 10778, + 0xD0, 10798, + 0xD1, 10842, + 0xD2, 11033, + 0xD3, 11077, + 0xD4, 11268, + 0xD5, 11276, + 0xD7, 11284, + 0xD8, 11297, + 0xD9, 11506, + 0xDA, 11725, + 0xDB, 11857, + 0xDC, 12028, + 0xDD, 12197, + 0xDE, 12336, + 0xDF, 12510, + 0xE0, 12621, + 0xE1, 12626, + 0xE2, 12631, + 0xE3, 12636, + 0xE4, 12662, + 0xE5, 12668, + 0xE6, 12690, + 0xE7, 12696, + 0xE8, 12718, + 0xE9, 12749, + 0xEA, 12780, + 0xEB, 12797, + 0xEC, 12802, + 0xED, 12807, + 0xEE, 12826, + 0xEF, 12831, + 0xF1, 12850, + 0xF4, 12853, + 0xF5, 12856, + 0xF6, 12859, + 0xF7, 12898, + 0xF8, 13074, + 0xF9, 13077, + 0xFA, 13080, + 0xFB, 13083, + 0xFC, 13086, + 0xFD, 13089, + 0xFE, 13092, + 0xFF, 13109, uint16(xFail), /*490*/ uint16(xSetOp), uint16(ADD), /*492*/ uint16(xReadSlashR), @@ -442,193 +442,193 @@ var decoder = [...]uint16{ 0x34, 2161, 0x35, 2164, 0x38, 2174, - 0x3A, 3075, - 0x40, 3486, - 0x41, 3515, - 0x42, 3544, - 0x43, 3573, - 0x44, 3602, - 0x45, 3631, - 0x46, 3660, - 0x47, 3689, - 0x48, 3718, - 0x49, 3747, - 0x4A, 3776, - 0x4B, 3805, - 0x4C, 3834, - 0x4D, 3863, - 0x4E, 3892, - 0x4F, 3921, - 0x50, 3950, - 0x51, 3968, - 0x52, 4002, - 0x53, 4020, - 0x54, 4038, - 0x55, 4056, - 0x56, 4074, - 0x57, 4092, - 0x58, 4110, - 0x59, 4144, - 0x5A, 4178, - 0x5B, 4212, - 0x5C, 4238, - 0x5D, 4272, - 0x5E, 4306, - 0x5F, 4340, - 0x60, 4374, - 0x61, 4392, - 0x62, 4410, - 0x63, 4428, - 0x64, 4446, - 0x65, 4464, - 0x66, 4482, - 0x67, 4500, - 0x68, 4518, - 0x69, 4536, - 0x6A, 4554, - 0x6B, 4572, - 0x6C, 4590, - 0x6D, 4600, - 0x6E, 4610, - 0x6F, 4677, - 0x70, 4703, - 0x71, 4745, - 0x72, 4808, - 0x73, 4871, - 0x74, 4936, - 0x75, 4954, - 0x76, 4972, - 0x77, 4990, - 0x7C, 4993, - 0x7D, 5011, - 0x7E, 5029, - 0x7F, 5106, - 0x80, 5132, - 0x81, 5163, - 0x82, 5194, - 0x83, 5225, - 0x84, 5256, - 0x85, 5287, - 0x86, 5318, - 0x87, 5349, - 0x88, 5380, - 0x89, 5411, - 0x8A, 5442, - 0x8B, 5473, - 0x8C, 5504, - 0x8D, 5535, - 0x8E, 5566, - 0x8F, 5597, - 0x90, 5628, - 0x91, 5633, - 0x92, 5638, - 0x93, 5643, - 0x94, 5648, - 0x95, 5653, - 0x96, 5658, - 0x97, 5663, - 0x98, 5668, - 0x99, 5673, - 0x9A, 5678, - 0x9B, 5683, - 0x9C, 5688, - 0x9D, 5693, - 0x9E, 5698, - 0x9F, 5703, - 0xA0, 5708, - 0xA1, 5712, - 0xA2, 5739, - 0xA3, 5742, - 0xA4, 5771, - 0xA5, 5806, - 0xA8, 5838, - 0xA9, 5842, - 0xAA, 5869, - 0xAB, 5872, - 0xAC, 5901, - 0xAD, 5936, - 0xAE, 5968, - 0xAF, 6226, - 0xB0, 6255, - 0xB1, 6261, - 0xB2, 6290, - 0xB3, 6319, - 0xB4, 6348, - 0xB5, 6377, - 0xB6, 6406, - 0xB7, 6435, - 0xB8, 6464, - 0xB9, 6501, - 0xBA, 6511, - 0xBB, 6636, - 0xBC, 6665, - 0xBD, 6732, - 0xBE, 6799, - 0xBF, 6828, - 0xC0, 6857, - 0xC1, 6863, - 0xC2, 6892, - 0xC3, 6934, - 0xC4, 6963, - 0xC5, 6985, - 0xC6, 7007, - 0xC7, 7029, - 0xc8, 7158, - 0xc9, 7158, - 0xca, 7158, - 0xcb, 7158, - 0xcc, 7158, - 0xcd, 7158, - 0xce, 7158, - 0xcf, 7158, - 0xD0, 7181, - 0xD1, 7199, - 0xD2, 7217, - 0xD3, 7235, - 0xD4, 7253, - 0xD5, 7271, - 0xD6, 7289, - 0xD7, 7315, - 0xD8, 7333, - 0xD9, 7351, - 0xDA, 7369, - 0xDB, 7387, - 0xDC, 7405, - 0xDD, 7423, - 0xDE, 7441, - 0xDF, 7459, - 0xE0, 7477, - 0xE1, 7495, - 0xE2, 7513, - 0xE3, 7531, - 0xE4, 7549, - 0xE5, 7567, - 0xE6, 7585, - 0xE7, 7611, - 0xE8, 7629, - 0xE9, 7647, - 0xEA, 7665, - 0xEB, 7683, - 0xEC, 7701, - 0xED, 7719, - 0xEE, 7737, - 0xEF, 7755, - 0xF0, 7773, - 0xF1, 7783, - 0xF2, 7801, - 0xF3, 7819, - 0xF4, 7837, - 0xF5, 7855, - 0xF6, 7873, - 0xF7, 7891, - 0xF8, 7909, - 0xF9, 7927, - 0xFA, 7945, - 0xFB, 7963, - 0xFC, 7981, - 0xFD, 7999, - 0xFE, 8017, - 0xFF, 8035, + 0x3A, 3124, + 0x40, 3545, + 0x41, 3574, + 0x42, 3603, + 0x43, 3632, + 0x44, 3661, + 0x45, 3690, + 0x46, 3719, + 0x47, 3748, + 0x48, 3777, + 0x49, 3806, + 0x4A, 3835, + 0x4B, 3864, + 0x4C, 3893, + 0x4D, 3922, + 0x4E, 3951, + 0x4F, 3980, + 0x50, 4009, + 0x51, 4027, + 0x52, 4061, + 0x53, 4079, + 0x54, 4097, + 0x55, 4115, + 0x56, 4133, + 0x57, 4151, + 0x58, 4169, + 0x59, 4203, + 0x5A, 4237, + 0x5B, 4271, + 0x5C, 4297, + 0x5D, 4331, + 0x5E, 4365, + 0x5F, 4399, + 0x60, 4433, + 0x61, 4451, + 0x62, 4469, + 0x63, 4487, + 0x64, 4505, + 0x65, 4523, + 0x66, 4541, + 0x67, 4559, + 0x68, 4577, + 0x69, 4595, + 0x6A, 4613, + 0x6B, 4631, + 0x6C, 4649, + 0x6D, 4659, + 0x6E, 4669, + 0x6F, 4736, + 0x70, 4762, + 0x71, 4804, + 0x72, 4867, + 0x73, 4930, + 0x74, 4995, + 0x75, 5013, + 0x76, 5031, + 0x77, 5049, + 0x7C, 5052, + 0x7D, 5070, + 0x7E, 5088, + 0x7F, 5165, + 0x80, 5191, + 0x81, 5222, + 0x82, 5253, + 0x83, 5284, + 0x84, 5315, + 0x85, 5346, + 0x86, 5377, + 0x87, 5408, + 0x88, 5439, + 0x89, 5470, + 0x8A, 5501, + 0x8B, 5532, + 0x8C, 5563, + 0x8D, 5594, + 0x8E, 5625, + 0x8F, 5656, + 0x90, 5687, + 0x91, 5692, + 0x92, 5697, + 0x93, 5702, + 0x94, 5707, + 0x95, 5712, + 0x96, 5717, + 0x97, 5722, + 0x98, 5727, + 0x99, 5732, + 0x9A, 5737, + 0x9B, 5742, + 0x9C, 5747, + 0x9D, 5752, + 0x9E, 5757, + 0x9F, 5762, + 0xA0, 5767, + 0xA1, 5771, + 0xA2, 5798, + 0xA3, 5801, + 0xA4, 5830, + 0xA5, 5865, + 0xA8, 5897, + 0xA9, 5901, + 0xAA, 5928, + 0xAB, 5931, + 0xAC, 5960, + 0xAD, 5995, + 0xAE, 6027, + 0xAF, 6285, + 0xB0, 6314, + 0xB1, 6320, + 0xB2, 6349, + 0xB3, 6378, + 0xB4, 6407, + 0xB5, 6436, + 0xB6, 6465, + 0xB7, 6494, + 0xB8, 6523, + 0xB9, 6560, + 0xBA, 6570, + 0xBB, 6695, + 0xBC, 6724, + 0xBD, 6791, + 0xBE, 6858, + 0xBF, 6887, + 0xC0, 6916, + 0xC1, 6922, + 0xC2, 6951, + 0xC3, 6993, + 0xC4, 7022, + 0xC5, 7044, + 0xC6, 7066, + 0xC7, 7088, + 0xc8, 7217, + 0xc9, 7217, + 0xca, 7217, + 0xcb, 7217, + 0xcc, 7217, + 0xcd, 7217, + 0xce, 7217, + 0xcf, 7217, + 0xD0, 7240, + 0xD1, 7258, + 0xD2, 7276, + 0xD3, 7294, + 0xD4, 7312, + 0xD5, 7330, + 0xD6, 7348, + 0xD7, 7374, + 0xD8, 7392, + 0xD9, 7410, + 0xDA, 7428, + 0xDB, 7446, + 0xDC, 7464, + 0xDD, 7482, + 0xDE, 7500, + 0xDF, 7518, + 0xE0, 7536, + 0xE1, 7554, + 0xE2, 7572, + 0xE3, 7590, + 0xE4, 7608, + 0xE5, 7626, + 0xE6, 7644, + 0xE7, 7670, + 0xE8, 7688, + 0xE9, 7706, + 0xEA, 7724, + 0xEB, 7742, + 0xEC, 7760, + 0xED, 7778, + 0xEE, 7796, + 0xEF, 7814, + 0xF0, 7832, + 0xF1, 7842, + 0xF2, 7860, + 0xF3, 7878, + 0xF4, 7896, + 0xF5, 7914, + 0xF6, 7932, + 0xF7, 7950, + 0xF8, 7968, + 0xF9, 7986, + 0xFA, 8004, + 0xFB, 8022, + 0xFC, 8040, + 0xFD, 8058, + 0xFE, 8076, + 0xFF, 8094, uint16(xFail), /*1182*/ uint16(xCondSlashR), 1191, // 0 @@ -1318,5690 +1318,5625 @@ var decoder = [...]uint16{ /*2170*/ uint16(xMatch), /*2171*/ uint16(xSetOp), uint16(SYSEXIT), /*2173*/ uint16(xMatch), - /*2174*/ uint16(xCondByte), 54, - 0x00, 2285, - 0x01, 2303, - 0x02, 2321, - 0x03, 2339, - 0x04, 2357, - 0x05, 2375, - 0x06, 2393, - 0x07, 2411, - 0x08, 2429, - 0x09, 2447, - 0x0A, 2465, - 0x0B, 2483, - 0x10, 2501, - 0x14, 2512, - 0x15, 2523, - 0x17, 2534, - 0x1C, 2544, - 0x1D, 2562, - 0x1E, 2580, - 0x20, 2598, - 0x21, 2608, - 0x22, 2618, - 0x23, 2628, - 0x24, 2638, - 0x25, 2648, - 0x28, 2658, - 0x29, 2668, - 0x2A, 2678, - 0x2B, 2688, - 0x30, 2698, - 0x31, 2708, - 0x32, 2718, - 0x33, 2728, - 0x34, 2738, - 0x35, 2748, - 0x37, 2758, - 0x38, 2768, - 0x39, 2778, - 0x3A, 2788, - 0x3B, 2798, - 0x3C, 2808, - 0x3D, 2818, - 0x3E, 2828, - 0x3F, 2838, - 0x40, 2848, - 0x41, 2858, - 0x82, 2868, - 0xDB, 2891, - 0xDC, 2901, - 0xDD, 2911, - 0xDE, 2921, - 0xDF, 2931, - 0xF0, 2941, - 0xF1, 3008, + /*2174*/ uint16(xCondByte), 60, + 0x00, 2297, + 0x01, 2315, + 0x02, 2333, + 0x03, 2351, + 0x04, 2369, + 0x05, 2387, + 0x06, 2405, + 0x07, 2423, + 0x08, 2441, + 0x09, 2459, + 0x0A, 2477, + 0x0B, 2495, + 0x10, 2513, + 0x14, 2524, + 0x15, 2535, + 0x17, 2546, + 0x1C, 2556, + 0x1D, 2574, + 0x1E, 2592, + 0x20, 2610, + 0x21, 2620, + 0x22, 2630, + 0x23, 2640, + 0x24, 2650, + 0x25, 2660, + 0x28, 2670, + 0x29, 2680, + 0x2A, 2690, + 0x2B, 2700, + 0x30, 2710, + 0x31, 2720, + 0x32, 2730, + 0x33, 2740, + 0x34, 2750, + 0x35, 2760, + 0x37, 2770, + 0x38, 2780, + 0x39, 2790, + 0x3A, 2800, + 0x3B, 2810, + 0x3C, 2820, + 0x3D, 2830, + 0x3E, 2840, + 0x3F, 2850, + 0x40, 2860, + 0x41, 2870, + 0x82, 2880, + 0xC8, 2903, + 0xC9, 2909, + 0xCA, 2915, + 0xCB, 2921, + 0xCC, 2928, + 0xCD, 2934, + 0xDB, 2940, + 0xDC, 2950, + 0xDD, 2960, + 0xDE, 2970, + 0xDF, 2980, + 0xF0, 2990, + 0xF1, 3057, uint16(xFail), - /*2285*/ uint16(xCondPrefix), 2, - 0x66, 2297, - 0x0, 2291, - /*2291*/ uint16(xSetOp), uint16(PSHUFB), - /*2293*/ uint16(xReadSlashR), - /*2294*/ uint16(xArgMm1), - /*2295*/ uint16(xArgMm2M64), - /*2296*/ uint16(xMatch), - /*2297*/ uint16(xSetOp), uint16(PSHUFB), - /*2299*/ uint16(xReadSlashR), - /*2300*/ uint16(xArgXmm1), - /*2301*/ uint16(xArgXmm2M128), - /*2302*/ uint16(xMatch), - /*2303*/ uint16(xCondPrefix), 2, - 0x66, 2315, - 0x0, 2309, - /*2309*/ uint16(xSetOp), uint16(PHADDW), + /*2297*/ uint16(xCondPrefix), 2, + 0x66, 2309, + 0x0, 2303, + /*2303*/ uint16(xSetOp), uint16(PSHUFB), + /*2305*/ uint16(xReadSlashR), + /*2306*/ uint16(xArgMm1), + /*2307*/ uint16(xArgMm2M64), + /*2308*/ uint16(xMatch), + /*2309*/ uint16(xSetOp), uint16(PSHUFB), /*2311*/ uint16(xReadSlashR), - /*2312*/ uint16(xArgMm1), - /*2313*/ uint16(xArgMm2M64), + /*2312*/ uint16(xArgXmm1), + /*2313*/ uint16(xArgXmm2M128), /*2314*/ uint16(xMatch), - /*2315*/ uint16(xSetOp), uint16(PHADDW), - /*2317*/ uint16(xReadSlashR), - /*2318*/ uint16(xArgXmm1), - /*2319*/ uint16(xArgXmm2M128), - /*2320*/ uint16(xMatch), - /*2321*/ uint16(xCondPrefix), 2, - 0x66, 2333, - 0x0, 2327, - /*2327*/ uint16(xSetOp), uint16(PHADDD), + /*2315*/ uint16(xCondPrefix), 2, + 0x66, 2327, + 0x0, 2321, + /*2321*/ uint16(xSetOp), uint16(PHADDW), + /*2323*/ uint16(xReadSlashR), + /*2324*/ uint16(xArgMm1), + /*2325*/ uint16(xArgMm2M64), + /*2326*/ uint16(xMatch), + /*2327*/ uint16(xSetOp), uint16(PHADDW), /*2329*/ uint16(xReadSlashR), - /*2330*/ uint16(xArgMm1), - /*2331*/ uint16(xArgMm2M64), + /*2330*/ uint16(xArgXmm1), + /*2331*/ uint16(xArgXmm2M128), /*2332*/ uint16(xMatch), - /*2333*/ uint16(xSetOp), uint16(PHADDD), - /*2335*/ uint16(xReadSlashR), - /*2336*/ uint16(xArgXmm1), - /*2337*/ uint16(xArgXmm2M128), - /*2338*/ uint16(xMatch), - /*2339*/ uint16(xCondPrefix), 2, - 0x66, 2351, - 0x0, 2345, - /*2345*/ uint16(xSetOp), uint16(PHADDSW), + /*2333*/ uint16(xCondPrefix), 2, + 0x66, 2345, + 0x0, 2339, + /*2339*/ uint16(xSetOp), uint16(PHADDD), + /*2341*/ uint16(xReadSlashR), + /*2342*/ uint16(xArgMm1), + /*2343*/ uint16(xArgMm2M64), + /*2344*/ uint16(xMatch), + /*2345*/ uint16(xSetOp), uint16(PHADDD), /*2347*/ uint16(xReadSlashR), - /*2348*/ uint16(xArgMm1), - /*2349*/ uint16(xArgMm2M64), + /*2348*/ uint16(xArgXmm1), + /*2349*/ uint16(xArgXmm2M128), /*2350*/ uint16(xMatch), - /*2351*/ uint16(xSetOp), uint16(PHADDSW), - /*2353*/ uint16(xReadSlashR), - /*2354*/ uint16(xArgXmm1), - /*2355*/ uint16(xArgXmm2M128), - /*2356*/ uint16(xMatch), - /*2357*/ uint16(xCondPrefix), 2, - 0x66, 2369, - 0x0, 2363, - /*2363*/ uint16(xSetOp), uint16(PMADDUBSW), + /*2351*/ uint16(xCondPrefix), 2, + 0x66, 2363, + 0x0, 2357, + /*2357*/ uint16(xSetOp), uint16(PHADDSW), + /*2359*/ uint16(xReadSlashR), + /*2360*/ uint16(xArgMm1), + /*2361*/ uint16(xArgMm2M64), + /*2362*/ uint16(xMatch), + /*2363*/ uint16(xSetOp), uint16(PHADDSW), /*2365*/ uint16(xReadSlashR), - /*2366*/ uint16(xArgMm1), - /*2367*/ uint16(xArgMm2M64), + /*2366*/ uint16(xArgXmm1), + /*2367*/ uint16(xArgXmm2M128), /*2368*/ uint16(xMatch), - /*2369*/ uint16(xSetOp), uint16(PMADDUBSW), - /*2371*/ uint16(xReadSlashR), - /*2372*/ uint16(xArgXmm1), - /*2373*/ uint16(xArgXmm2M128), - /*2374*/ uint16(xMatch), - /*2375*/ uint16(xCondPrefix), 2, - 0x66, 2387, - 0x0, 2381, - /*2381*/ uint16(xSetOp), uint16(PHSUBW), + /*2369*/ uint16(xCondPrefix), 2, + 0x66, 2381, + 0x0, 2375, + /*2375*/ uint16(xSetOp), uint16(PMADDUBSW), + /*2377*/ uint16(xReadSlashR), + /*2378*/ uint16(xArgMm1), + /*2379*/ uint16(xArgMm2M64), + /*2380*/ uint16(xMatch), + /*2381*/ uint16(xSetOp), uint16(PMADDUBSW), /*2383*/ uint16(xReadSlashR), - /*2384*/ uint16(xArgMm1), - /*2385*/ uint16(xArgMm2M64), + /*2384*/ uint16(xArgXmm1), + /*2385*/ uint16(xArgXmm2M128), /*2386*/ uint16(xMatch), - /*2387*/ uint16(xSetOp), uint16(PHSUBW), - /*2389*/ uint16(xReadSlashR), - /*2390*/ uint16(xArgXmm1), - /*2391*/ uint16(xArgXmm2M128), - /*2392*/ uint16(xMatch), - /*2393*/ uint16(xCondPrefix), 2, - 0x66, 2405, - 0x0, 2399, - /*2399*/ uint16(xSetOp), uint16(PHSUBD), + /*2387*/ uint16(xCondPrefix), 2, + 0x66, 2399, + 0x0, 2393, + /*2393*/ uint16(xSetOp), uint16(PHSUBW), + /*2395*/ uint16(xReadSlashR), + /*2396*/ uint16(xArgMm1), + /*2397*/ uint16(xArgMm2M64), + /*2398*/ uint16(xMatch), + /*2399*/ uint16(xSetOp), uint16(PHSUBW), /*2401*/ uint16(xReadSlashR), - /*2402*/ uint16(xArgMm1), - /*2403*/ uint16(xArgMm2M64), + /*2402*/ uint16(xArgXmm1), + /*2403*/ uint16(xArgXmm2M128), /*2404*/ uint16(xMatch), - /*2405*/ uint16(xSetOp), uint16(PHSUBD), - /*2407*/ uint16(xReadSlashR), - /*2408*/ uint16(xArgXmm1), - /*2409*/ uint16(xArgXmm2M128), - /*2410*/ uint16(xMatch), - /*2411*/ uint16(xCondPrefix), 2, - 0x66, 2423, - 0x0, 2417, - /*2417*/ uint16(xSetOp), uint16(PHSUBSW), + /*2405*/ uint16(xCondPrefix), 2, + 0x66, 2417, + 0x0, 2411, + /*2411*/ uint16(xSetOp), uint16(PHSUBD), + /*2413*/ uint16(xReadSlashR), + /*2414*/ uint16(xArgMm1), + /*2415*/ uint16(xArgMm2M64), + /*2416*/ uint16(xMatch), + /*2417*/ uint16(xSetOp), uint16(PHSUBD), /*2419*/ uint16(xReadSlashR), - /*2420*/ uint16(xArgMm1), - /*2421*/ uint16(xArgMm2M64), + /*2420*/ uint16(xArgXmm1), + /*2421*/ uint16(xArgXmm2M128), /*2422*/ uint16(xMatch), - /*2423*/ uint16(xSetOp), uint16(PHSUBSW), - /*2425*/ uint16(xReadSlashR), - /*2426*/ uint16(xArgXmm1), - /*2427*/ uint16(xArgXmm2M128), - /*2428*/ uint16(xMatch), - /*2429*/ uint16(xCondPrefix), 2, - 0x66, 2441, - 0x0, 2435, - /*2435*/ uint16(xSetOp), uint16(PSIGNB), + /*2423*/ uint16(xCondPrefix), 2, + 0x66, 2435, + 0x0, 2429, + /*2429*/ uint16(xSetOp), uint16(PHSUBSW), + /*2431*/ uint16(xReadSlashR), + /*2432*/ uint16(xArgMm1), + /*2433*/ uint16(xArgMm2M64), + /*2434*/ uint16(xMatch), + /*2435*/ uint16(xSetOp), uint16(PHSUBSW), /*2437*/ uint16(xReadSlashR), - /*2438*/ uint16(xArgMm1), - /*2439*/ uint16(xArgMm2M64), + /*2438*/ uint16(xArgXmm1), + /*2439*/ uint16(xArgXmm2M128), /*2440*/ uint16(xMatch), - /*2441*/ uint16(xSetOp), uint16(PSIGNB), - /*2443*/ uint16(xReadSlashR), - /*2444*/ uint16(xArgXmm1), - /*2445*/ uint16(xArgXmm2M128), - /*2446*/ uint16(xMatch), - /*2447*/ uint16(xCondPrefix), 2, - 0x66, 2459, - 0x0, 2453, - /*2453*/ uint16(xSetOp), uint16(PSIGNW), + /*2441*/ uint16(xCondPrefix), 2, + 0x66, 2453, + 0x0, 2447, + /*2447*/ uint16(xSetOp), uint16(PSIGNB), + /*2449*/ uint16(xReadSlashR), + /*2450*/ uint16(xArgMm1), + /*2451*/ uint16(xArgMm2M64), + /*2452*/ uint16(xMatch), + /*2453*/ uint16(xSetOp), uint16(PSIGNB), /*2455*/ uint16(xReadSlashR), - /*2456*/ uint16(xArgMm1), - /*2457*/ uint16(xArgMm2M64), + /*2456*/ uint16(xArgXmm1), + /*2457*/ uint16(xArgXmm2M128), /*2458*/ uint16(xMatch), - /*2459*/ uint16(xSetOp), uint16(PSIGNW), - /*2461*/ uint16(xReadSlashR), - /*2462*/ uint16(xArgXmm1), - /*2463*/ uint16(xArgXmm2M128), - /*2464*/ uint16(xMatch), - /*2465*/ uint16(xCondPrefix), 2, - 0x66, 2477, - 0x0, 2471, - /*2471*/ uint16(xSetOp), uint16(PSIGND), + /*2459*/ uint16(xCondPrefix), 2, + 0x66, 2471, + 0x0, 2465, + /*2465*/ uint16(xSetOp), uint16(PSIGNW), + /*2467*/ uint16(xReadSlashR), + /*2468*/ uint16(xArgMm1), + /*2469*/ uint16(xArgMm2M64), + /*2470*/ uint16(xMatch), + /*2471*/ uint16(xSetOp), uint16(PSIGNW), /*2473*/ uint16(xReadSlashR), - /*2474*/ uint16(xArgMm1), - /*2475*/ uint16(xArgMm2M64), + /*2474*/ uint16(xArgXmm1), + /*2475*/ uint16(xArgXmm2M128), /*2476*/ uint16(xMatch), - /*2477*/ uint16(xSetOp), uint16(PSIGND), - /*2479*/ uint16(xReadSlashR), - /*2480*/ uint16(xArgXmm1), - /*2481*/ uint16(xArgXmm2M128), - /*2482*/ uint16(xMatch), - /*2483*/ uint16(xCondPrefix), 2, - 0x66, 2495, - 0x0, 2489, - /*2489*/ uint16(xSetOp), uint16(PMULHRSW), + /*2477*/ uint16(xCondPrefix), 2, + 0x66, 2489, + 0x0, 2483, + /*2483*/ uint16(xSetOp), uint16(PSIGND), + /*2485*/ uint16(xReadSlashR), + /*2486*/ uint16(xArgMm1), + /*2487*/ uint16(xArgMm2M64), + /*2488*/ uint16(xMatch), + /*2489*/ uint16(xSetOp), uint16(PSIGND), /*2491*/ uint16(xReadSlashR), - /*2492*/ uint16(xArgMm1), - /*2493*/ uint16(xArgMm2M64), + /*2492*/ uint16(xArgXmm1), + /*2493*/ uint16(xArgXmm2M128), /*2494*/ uint16(xMatch), - /*2495*/ uint16(xSetOp), uint16(PMULHRSW), - /*2497*/ uint16(xReadSlashR), - /*2498*/ uint16(xArgXmm1), - /*2499*/ uint16(xArgXmm2M128), - /*2500*/ uint16(xMatch), - /*2501*/ uint16(xCondPrefix), 1, - 0x66, 2505, - /*2505*/ uint16(xSetOp), uint16(PBLENDVB), - /*2507*/ uint16(xReadSlashR), - /*2508*/ uint16(xArgXmm1), - /*2509*/ uint16(xArgXmm2M128), - /*2510*/ uint16(xArgXMM0), - /*2511*/ uint16(xMatch), - /*2512*/ uint16(xCondPrefix), 1, - 0x66, 2516, - /*2516*/ uint16(xSetOp), uint16(BLENDVPS), - /*2518*/ uint16(xReadSlashR), - /*2519*/ uint16(xArgXmm1), - /*2520*/ uint16(xArgXmm2M128), - /*2521*/ uint16(xArgXMM0), - /*2522*/ uint16(xMatch), - /*2523*/ uint16(xCondPrefix), 1, - 0x66, 2527, - /*2527*/ uint16(xSetOp), uint16(BLENDVPD), - /*2529*/ uint16(xReadSlashR), - /*2530*/ uint16(xArgXmm1), - /*2531*/ uint16(xArgXmm2M128), - /*2532*/ uint16(xArgXMM0), - /*2533*/ uint16(xMatch), - /*2534*/ uint16(xCondPrefix), 1, - 0x66, 2538, - /*2538*/ uint16(xSetOp), uint16(PTEST), - /*2540*/ uint16(xReadSlashR), - /*2541*/ uint16(xArgXmm1), - /*2542*/ uint16(xArgXmm2M128), - /*2543*/ uint16(xMatch), - /*2544*/ uint16(xCondPrefix), 2, - 0x66, 2556, - 0x0, 2550, - /*2550*/ uint16(xSetOp), uint16(PABSB), + /*2495*/ uint16(xCondPrefix), 2, + 0x66, 2507, + 0x0, 2501, + /*2501*/ uint16(xSetOp), uint16(PMULHRSW), + /*2503*/ uint16(xReadSlashR), + /*2504*/ uint16(xArgMm1), + /*2505*/ uint16(xArgMm2M64), + /*2506*/ uint16(xMatch), + /*2507*/ uint16(xSetOp), uint16(PMULHRSW), + /*2509*/ uint16(xReadSlashR), + /*2510*/ uint16(xArgXmm1), + /*2511*/ uint16(xArgXmm2M128), + /*2512*/ uint16(xMatch), + /*2513*/ uint16(xCondPrefix), 1, + 0x66, 2517, + /*2517*/ uint16(xSetOp), uint16(PBLENDVB), + /*2519*/ uint16(xReadSlashR), + /*2520*/ uint16(xArgXmm1), + /*2521*/ uint16(xArgXmm2M128), + /*2522*/ uint16(xArgXMM0), + /*2523*/ uint16(xMatch), + /*2524*/ uint16(xCondPrefix), 1, + 0x66, 2528, + /*2528*/ uint16(xSetOp), uint16(BLENDVPS), + /*2530*/ uint16(xReadSlashR), + /*2531*/ uint16(xArgXmm1), + /*2532*/ uint16(xArgXmm2M128), + /*2533*/ uint16(xArgXMM0), + /*2534*/ uint16(xMatch), + /*2535*/ uint16(xCondPrefix), 1, + 0x66, 2539, + /*2539*/ uint16(xSetOp), uint16(BLENDVPD), + /*2541*/ uint16(xReadSlashR), + /*2542*/ uint16(xArgXmm1), + /*2543*/ uint16(xArgXmm2M128), + /*2544*/ uint16(xArgXMM0), + /*2545*/ uint16(xMatch), + /*2546*/ uint16(xCondPrefix), 1, + 0x66, 2550, + /*2550*/ uint16(xSetOp), uint16(PTEST), /*2552*/ uint16(xReadSlashR), - /*2553*/ uint16(xArgMm1), - /*2554*/ uint16(xArgMm2M64), + /*2553*/ uint16(xArgXmm1), + /*2554*/ uint16(xArgXmm2M128), /*2555*/ uint16(xMatch), - /*2556*/ uint16(xSetOp), uint16(PABSB), - /*2558*/ uint16(xReadSlashR), - /*2559*/ uint16(xArgXmm1), - /*2560*/ uint16(xArgXmm2M128), - /*2561*/ uint16(xMatch), - /*2562*/ uint16(xCondPrefix), 2, - 0x66, 2574, - 0x0, 2568, - /*2568*/ uint16(xSetOp), uint16(PABSW), + /*2556*/ uint16(xCondPrefix), 2, + 0x66, 2568, + 0x0, 2562, + /*2562*/ uint16(xSetOp), uint16(PABSB), + /*2564*/ uint16(xReadSlashR), + /*2565*/ uint16(xArgMm1), + /*2566*/ uint16(xArgMm2M64), + /*2567*/ uint16(xMatch), + /*2568*/ uint16(xSetOp), uint16(PABSB), /*2570*/ uint16(xReadSlashR), - /*2571*/ uint16(xArgMm1), - /*2572*/ uint16(xArgMm2M64), + /*2571*/ uint16(xArgXmm1), + /*2572*/ uint16(xArgXmm2M128), /*2573*/ uint16(xMatch), - /*2574*/ uint16(xSetOp), uint16(PABSW), - /*2576*/ uint16(xReadSlashR), - /*2577*/ uint16(xArgXmm1), - /*2578*/ uint16(xArgXmm2M128), - /*2579*/ uint16(xMatch), - /*2580*/ uint16(xCondPrefix), 2, - 0x66, 2592, - 0x0, 2586, - /*2586*/ uint16(xSetOp), uint16(PABSD), + /*2574*/ uint16(xCondPrefix), 2, + 0x66, 2586, + 0x0, 2580, + /*2580*/ uint16(xSetOp), uint16(PABSW), + /*2582*/ uint16(xReadSlashR), + /*2583*/ uint16(xArgMm1), + /*2584*/ uint16(xArgMm2M64), + /*2585*/ uint16(xMatch), + /*2586*/ uint16(xSetOp), uint16(PABSW), /*2588*/ uint16(xReadSlashR), - /*2589*/ uint16(xArgMm1), - /*2590*/ uint16(xArgMm2M64), + /*2589*/ uint16(xArgXmm1), + /*2590*/ uint16(xArgXmm2M128), /*2591*/ uint16(xMatch), - /*2592*/ uint16(xSetOp), uint16(PABSD), - /*2594*/ uint16(xReadSlashR), - /*2595*/ uint16(xArgXmm1), - /*2596*/ uint16(xArgXmm2M128), - /*2597*/ uint16(xMatch), - /*2598*/ uint16(xCondPrefix), 1, - 0x66, 2602, - /*2602*/ uint16(xSetOp), uint16(PMOVSXBW), - /*2604*/ uint16(xReadSlashR), - /*2605*/ uint16(xArgXmm1), - /*2606*/ uint16(xArgXmm2M64), - /*2607*/ uint16(xMatch), - /*2608*/ uint16(xCondPrefix), 1, - 0x66, 2612, - /*2612*/ uint16(xSetOp), uint16(PMOVSXBD), - /*2614*/ uint16(xReadSlashR), - /*2615*/ uint16(xArgXmm1), - /*2616*/ uint16(xArgXmm2M32), - /*2617*/ uint16(xMatch), - /*2618*/ uint16(xCondPrefix), 1, - 0x66, 2622, - /*2622*/ uint16(xSetOp), uint16(PMOVSXBQ), - /*2624*/ uint16(xReadSlashR), - /*2625*/ uint16(xArgXmm1), - /*2626*/ uint16(xArgXmm2M16), - /*2627*/ uint16(xMatch), - /*2628*/ uint16(xCondPrefix), 1, - 0x66, 2632, - /*2632*/ uint16(xSetOp), uint16(PMOVSXWD), - /*2634*/ uint16(xReadSlashR), - /*2635*/ uint16(xArgXmm1), - /*2636*/ uint16(xArgXmm2M64), - /*2637*/ uint16(xMatch), - /*2638*/ uint16(xCondPrefix), 1, - 0x66, 2642, - /*2642*/ uint16(xSetOp), uint16(PMOVSXWQ), - /*2644*/ uint16(xReadSlashR), - /*2645*/ uint16(xArgXmm1), - /*2646*/ uint16(xArgXmm2M32), - /*2647*/ uint16(xMatch), - /*2648*/ uint16(xCondPrefix), 1, - 0x66, 2652, - /*2652*/ uint16(xSetOp), uint16(PMOVSXDQ), - /*2654*/ uint16(xReadSlashR), - /*2655*/ uint16(xArgXmm1), - /*2656*/ uint16(xArgXmm2M64), - /*2657*/ uint16(xMatch), - /*2658*/ uint16(xCondPrefix), 1, - 0x66, 2662, - /*2662*/ uint16(xSetOp), uint16(PMULDQ), - /*2664*/ uint16(xReadSlashR), - /*2665*/ uint16(xArgXmm1), - /*2666*/ uint16(xArgXmm2M128), - /*2667*/ uint16(xMatch), - /*2668*/ uint16(xCondPrefix), 1, - 0x66, 2672, - /*2672*/ uint16(xSetOp), uint16(PCMPEQQ), - /*2674*/ uint16(xReadSlashR), - /*2675*/ uint16(xArgXmm1), - /*2676*/ uint16(xArgXmm2M128), - /*2677*/ uint16(xMatch), - /*2678*/ uint16(xCondPrefix), 1, - 0x66, 2682, - /*2682*/ uint16(xSetOp), uint16(MOVNTDQA), - /*2684*/ uint16(xReadSlashR), - /*2685*/ uint16(xArgXmm1), - /*2686*/ uint16(xArgM128), - /*2687*/ uint16(xMatch), - /*2688*/ uint16(xCondPrefix), 1, - 0x66, 2692, - /*2692*/ uint16(xSetOp), uint16(PACKUSDW), - /*2694*/ uint16(xReadSlashR), - /*2695*/ uint16(xArgXmm1), - /*2696*/ uint16(xArgXmm2M128), - /*2697*/ uint16(xMatch), - /*2698*/ uint16(xCondPrefix), 1, - 0x66, 2702, - /*2702*/ uint16(xSetOp), uint16(PMOVZXBW), - /*2704*/ uint16(xReadSlashR), - /*2705*/ uint16(xArgXmm1), - /*2706*/ uint16(xArgXmm2M64), - /*2707*/ uint16(xMatch), - /*2708*/ uint16(xCondPrefix), 1, - 0x66, 2712, - /*2712*/ uint16(xSetOp), uint16(PMOVZXBD), - /*2714*/ uint16(xReadSlashR), - /*2715*/ uint16(xArgXmm1), - /*2716*/ uint16(xArgXmm2M32), - /*2717*/ uint16(xMatch), - /*2718*/ uint16(xCondPrefix), 1, - 0x66, 2722, - /*2722*/ uint16(xSetOp), uint16(PMOVZXBQ), - /*2724*/ uint16(xReadSlashR), - /*2725*/ uint16(xArgXmm1), - /*2726*/ uint16(xArgXmm2M16), - /*2727*/ uint16(xMatch), - /*2728*/ uint16(xCondPrefix), 1, - 0x66, 2732, - /*2732*/ uint16(xSetOp), uint16(PMOVZXWD), - /*2734*/ uint16(xReadSlashR), - /*2735*/ uint16(xArgXmm1), - /*2736*/ uint16(xArgXmm2M64), - /*2737*/ uint16(xMatch), - /*2738*/ uint16(xCondPrefix), 1, - 0x66, 2742, - /*2742*/ uint16(xSetOp), uint16(PMOVZXWQ), - /*2744*/ uint16(xReadSlashR), - /*2745*/ uint16(xArgXmm1), - /*2746*/ uint16(xArgXmm2M32), - /*2747*/ uint16(xMatch), - /*2748*/ uint16(xCondPrefix), 1, - 0x66, 2752, - /*2752*/ uint16(xSetOp), uint16(PMOVZXDQ), - /*2754*/ uint16(xReadSlashR), - /*2755*/ uint16(xArgXmm1), - /*2756*/ uint16(xArgXmm2M64), - /*2757*/ uint16(xMatch), - /*2758*/ uint16(xCondPrefix), 1, - 0x66, 2762, - /*2762*/ uint16(xSetOp), uint16(PCMPGTQ), - /*2764*/ uint16(xReadSlashR), - /*2765*/ uint16(xArgXmm1), - /*2766*/ uint16(xArgXmm2M128), - /*2767*/ uint16(xMatch), - /*2768*/ uint16(xCondPrefix), 1, - 0x66, 2772, - /*2772*/ uint16(xSetOp), uint16(PMINSB), - /*2774*/ uint16(xReadSlashR), - /*2775*/ uint16(xArgXmm1), - /*2776*/ uint16(xArgXmm2M128), - /*2777*/ uint16(xMatch), - /*2778*/ uint16(xCondPrefix), 1, - 0x66, 2782, - /*2782*/ uint16(xSetOp), uint16(PMINSD), - /*2784*/ uint16(xReadSlashR), - /*2785*/ uint16(xArgXmm1), - /*2786*/ uint16(xArgXmm2M128), - /*2787*/ uint16(xMatch), - /*2788*/ uint16(xCondPrefix), 1, - 0x66, 2792, - /*2792*/ uint16(xSetOp), uint16(PMINUW), - /*2794*/ uint16(xReadSlashR), - /*2795*/ uint16(xArgXmm1), - /*2796*/ uint16(xArgXmm2M128), - /*2797*/ uint16(xMatch), - /*2798*/ uint16(xCondPrefix), 1, - 0x66, 2802, - /*2802*/ uint16(xSetOp), uint16(PMINUD), - /*2804*/ uint16(xReadSlashR), - /*2805*/ uint16(xArgXmm1), - /*2806*/ uint16(xArgXmm2M128), - /*2807*/ uint16(xMatch), - /*2808*/ uint16(xCondPrefix), 1, - 0x66, 2812, - /*2812*/ uint16(xSetOp), uint16(PMAXSB), - /*2814*/ uint16(xReadSlashR), - /*2815*/ uint16(xArgXmm1), - /*2816*/ uint16(xArgXmm2M128), - /*2817*/ uint16(xMatch), - /*2818*/ uint16(xCondPrefix), 1, - 0x66, 2822, - /*2822*/ uint16(xSetOp), uint16(PMAXSD), - /*2824*/ uint16(xReadSlashR), - /*2825*/ uint16(xArgXmm1), - /*2826*/ uint16(xArgXmm2M128), - /*2827*/ uint16(xMatch), - /*2828*/ uint16(xCondPrefix), 1, - 0x66, 2832, - /*2832*/ uint16(xSetOp), uint16(PMAXUW), - /*2834*/ uint16(xReadSlashR), - /*2835*/ uint16(xArgXmm1), - /*2836*/ uint16(xArgXmm2M128), - /*2837*/ uint16(xMatch), - /*2838*/ uint16(xCondPrefix), 1, - 0x66, 2842, - /*2842*/ uint16(xSetOp), uint16(PMAXUD), - /*2844*/ uint16(xReadSlashR), - /*2845*/ uint16(xArgXmm1), - /*2846*/ uint16(xArgXmm2M128), - /*2847*/ uint16(xMatch), - /*2848*/ uint16(xCondPrefix), 1, - 0x66, 2852, - /*2852*/ uint16(xSetOp), uint16(PMULLD), - /*2854*/ uint16(xReadSlashR), - /*2855*/ uint16(xArgXmm1), - /*2856*/ uint16(xArgXmm2M128), - /*2857*/ uint16(xMatch), - /*2858*/ uint16(xCondPrefix), 1, - 0x66, 2862, - /*2862*/ uint16(xSetOp), uint16(PHMINPOSUW), - /*2864*/ uint16(xReadSlashR), - /*2865*/ uint16(xArgXmm1), - /*2866*/ uint16(xArgXmm2M128), - /*2867*/ uint16(xMatch), - /*2868*/ uint16(xCondIs64), 2871, 2881, - /*2871*/ uint16(xCondPrefix), 1, - 0x66, 2875, - /*2875*/ uint16(xSetOp), uint16(INVPCID), - /*2877*/ uint16(xReadSlashR), - /*2878*/ uint16(xArgR32), - /*2879*/ uint16(xArgM128), - /*2880*/ uint16(xMatch), - /*2881*/ uint16(xCondPrefix), 1, - 0x66, 2885, - /*2885*/ uint16(xSetOp), uint16(INVPCID), - /*2887*/ uint16(xReadSlashR), - /*2888*/ uint16(xArgR64), - /*2889*/ uint16(xArgM128), - /*2890*/ uint16(xMatch), - /*2891*/ uint16(xCondPrefix), 1, - 0x66, 2895, - /*2895*/ uint16(xSetOp), uint16(AESIMC), - /*2897*/ uint16(xReadSlashR), - /*2898*/ uint16(xArgXmm1), - /*2899*/ uint16(xArgXmm2M128), - /*2900*/ uint16(xMatch), - /*2901*/ uint16(xCondPrefix), 1, - 0x66, 2905, - /*2905*/ uint16(xSetOp), uint16(AESENC), - /*2907*/ uint16(xReadSlashR), - /*2908*/ uint16(xArgXmm1), - /*2909*/ uint16(xArgXmm2M128), - /*2910*/ uint16(xMatch), - /*2911*/ uint16(xCondPrefix), 1, - 0x66, 2915, - /*2915*/ uint16(xSetOp), uint16(AESENCLAST), + /*2592*/ uint16(xCondPrefix), 2, + 0x66, 2604, + 0x0, 2598, + /*2598*/ uint16(xSetOp), uint16(PABSD), + /*2600*/ uint16(xReadSlashR), + /*2601*/ uint16(xArgMm1), + /*2602*/ uint16(xArgMm2M64), + /*2603*/ uint16(xMatch), + /*2604*/ uint16(xSetOp), uint16(PABSD), + /*2606*/ uint16(xReadSlashR), + /*2607*/ uint16(xArgXmm1), + /*2608*/ uint16(xArgXmm2M128), + /*2609*/ uint16(xMatch), + /*2610*/ uint16(xCondPrefix), 1, + 0x66, 2614, + /*2614*/ uint16(xSetOp), uint16(PMOVSXBW), + /*2616*/ uint16(xReadSlashR), + /*2617*/ uint16(xArgXmm1), + /*2618*/ uint16(xArgXmm2M64), + /*2619*/ uint16(xMatch), + /*2620*/ uint16(xCondPrefix), 1, + 0x66, 2624, + /*2624*/ uint16(xSetOp), uint16(PMOVSXBD), + /*2626*/ uint16(xReadSlashR), + /*2627*/ uint16(xArgXmm1), + /*2628*/ uint16(xArgXmm2M32), + /*2629*/ uint16(xMatch), + /*2630*/ uint16(xCondPrefix), 1, + 0x66, 2634, + /*2634*/ uint16(xSetOp), uint16(PMOVSXBQ), + /*2636*/ uint16(xReadSlashR), + /*2637*/ uint16(xArgXmm1), + /*2638*/ uint16(xArgXmm2M16), + /*2639*/ uint16(xMatch), + /*2640*/ uint16(xCondPrefix), 1, + 0x66, 2644, + /*2644*/ uint16(xSetOp), uint16(PMOVSXWD), + /*2646*/ uint16(xReadSlashR), + /*2647*/ uint16(xArgXmm1), + /*2648*/ uint16(xArgXmm2M64), + /*2649*/ uint16(xMatch), + /*2650*/ uint16(xCondPrefix), 1, + 0x66, 2654, + /*2654*/ uint16(xSetOp), uint16(PMOVSXWQ), + /*2656*/ uint16(xReadSlashR), + /*2657*/ uint16(xArgXmm1), + /*2658*/ uint16(xArgXmm2M32), + /*2659*/ uint16(xMatch), + /*2660*/ uint16(xCondPrefix), 1, + 0x66, 2664, + /*2664*/ uint16(xSetOp), uint16(PMOVSXDQ), + /*2666*/ uint16(xReadSlashR), + /*2667*/ uint16(xArgXmm1), + /*2668*/ uint16(xArgXmm2M64), + /*2669*/ uint16(xMatch), + /*2670*/ uint16(xCondPrefix), 1, + 0x66, 2674, + /*2674*/ uint16(xSetOp), uint16(PMULDQ), + /*2676*/ uint16(xReadSlashR), + /*2677*/ uint16(xArgXmm1), + /*2678*/ uint16(xArgXmm2M128), + /*2679*/ uint16(xMatch), + /*2680*/ uint16(xCondPrefix), 1, + 0x66, 2684, + /*2684*/ uint16(xSetOp), uint16(PCMPEQQ), + /*2686*/ uint16(xReadSlashR), + /*2687*/ uint16(xArgXmm1), + /*2688*/ uint16(xArgXmm2M128), + /*2689*/ uint16(xMatch), + /*2690*/ uint16(xCondPrefix), 1, + 0x66, 2694, + /*2694*/ uint16(xSetOp), uint16(MOVNTDQA), + /*2696*/ uint16(xReadSlashR), + /*2697*/ uint16(xArgXmm1), + /*2698*/ uint16(xArgM128), + /*2699*/ uint16(xMatch), + /*2700*/ uint16(xCondPrefix), 1, + 0x66, 2704, + /*2704*/ uint16(xSetOp), uint16(PACKUSDW), + /*2706*/ uint16(xReadSlashR), + /*2707*/ uint16(xArgXmm1), + /*2708*/ uint16(xArgXmm2M128), + /*2709*/ uint16(xMatch), + /*2710*/ uint16(xCondPrefix), 1, + 0x66, 2714, + /*2714*/ uint16(xSetOp), uint16(PMOVZXBW), + /*2716*/ uint16(xReadSlashR), + /*2717*/ uint16(xArgXmm1), + /*2718*/ uint16(xArgXmm2M64), + /*2719*/ uint16(xMatch), + /*2720*/ uint16(xCondPrefix), 1, + 0x66, 2724, + /*2724*/ uint16(xSetOp), uint16(PMOVZXBD), + /*2726*/ uint16(xReadSlashR), + /*2727*/ uint16(xArgXmm1), + /*2728*/ uint16(xArgXmm2M32), + /*2729*/ uint16(xMatch), + /*2730*/ uint16(xCondPrefix), 1, + 0x66, 2734, + /*2734*/ uint16(xSetOp), uint16(PMOVZXBQ), + /*2736*/ uint16(xReadSlashR), + /*2737*/ uint16(xArgXmm1), + /*2738*/ uint16(xArgXmm2M16), + /*2739*/ uint16(xMatch), + /*2740*/ uint16(xCondPrefix), 1, + 0x66, 2744, + /*2744*/ uint16(xSetOp), uint16(PMOVZXWD), + /*2746*/ uint16(xReadSlashR), + /*2747*/ uint16(xArgXmm1), + /*2748*/ uint16(xArgXmm2M64), + /*2749*/ uint16(xMatch), + /*2750*/ uint16(xCondPrefix), 1, + 0x66, 2754, + /*2754*/ uint16(xSetOp), uint16(PMOVZXWQ), + /*2756*/ uint16(xReadSlashR), + /*2757*/ uint16(xArgXmm1), + /*2758*/ uint16(xArgXmm2M32), + /*2759*/ uint16(xMatch), + /*2760*/ uint16(xCondPrefix), 1, + 0x66, 2764, + /*2764*/ uint16(xSetOp), uint16(PMOVZXDQ), + /*2766*/ uint16(xReadSlashR), + /*2767*/ uint16(xArgXmm1), + /*2768*/ uint16(xArgXmm2M64), + /*2769*/ uint16(xMatch), + /*2770*/ uint16(xCondPrefix), 1, + 0x66, 2774, + /*2774*/ uint16(xSetOp), uint16(PCMPGTQ), + /*2776*/ uint16(xReadSlashR), + /*2777*/ uint16(xArgXmm1), + /*2778*/ uint16(xArgXmm2M128), + /*2779*/ uint16(xMatch), + /*2780*/ uint16(xCondPrefix), 1, + 0x66, 2784, + /*2784*/ uint16(xSetOp), uint16(PMINSB), + /*2786*/ uint16(xReadSlashR), + /*2787*/ uint16(xArgXmm1), + /*2788*/ uint16(xArgXmm2M128), + /*2789*/ uint16(xMatch), + /*2790*/ uint16(xCondPrefix), 1, + 0x66, 2794, + /*2794*/ uint16(xSetOp), uint16(PMINSD), + /*2796*/ uint16(xReadSlashR), + /*2797*/ uint16(xArgXmm1), + /*2798*/ uint16(xArgXmm2M128), + /*2799*/ uint16(xMatch), + /*2800*/ uint16(xCondPrefix), 1, + 0x66, 2804, + /*2804*/ uint16(xSetOp), uint16(PMINUW), + /*2806*/ uint16(xReadSlashR), + /*2807*/ uint16(xArgXmm1), + /*2808*/ uint16(xArgXmm2M128), + /*2809*/ uint16(xMatch), + /*2810*/ uint16(xCondPrefix), 1, + 0x66, 2814, + /*2814*/ uint16(xSetOp), uint16(PMINUD), + /*2816*/ uint16(xReadSlashR), + /*2817*/ uint16(xArgXmm1), + /*2818*/ uint16(xArgXmm2M128), + /*2819*/ uint16(xMatch), + /*2820*/ uint16(xCondPrefix), 1, + 0x66, 2824, + /*2824*/ uint16(xSetOp), uint16(PMAXSB), + /*2826*/ uint16(xReadSlashR), + /*2827*/ uint16(xArgXmm1), + /*2828*/ uint16(xArgXmm2M128), + /*2829*/ uint16(xMatch), + /*2830*/ uint16(xCondPrefix), 1, + 0x66, 2834, + /*2834*/ uint16(xSetOp), uint16(PMAXSD), + /*2836*/ uint16(xReadSlashR), + /*2837*/ uint16(xArgXmm1), + /*2838*/ uint16(xArgXmm2M128), + /*2839*/ uint16(xMatch), + /*2840*/ uint16(xCondPrefix), 1, + 0x66, 2844, + /*2844*/ uint16(xSetOp), uint16(PMAXUW), + /*2846*/ uint16(xReadSlashR), + /*2847*/ uint16(xArgXmm1), + /*2848*/ uint16(xArgXmm2M128), + /*2849*/ uint16(xMatch), + /*2850*/ uint16(xCondPrefix), 1, + 0x66, 2854, + /*2854*/ uint16(xSetOp), uint16(PMAXUD), + /*2856*/ uint16(xReadSlashR), + /*2857*/ uint16(xArgXmm1), + /*2858*/ uint16(xArgXmm2M128), + /*2859*/ uint16(xMatch), + /*2860*/ uint16(xCondPrefix), 1, + 0x66, 2864, + /*2864*/ uint16(xSetOp), uint16(PMULLD), + /*2866*/ uint16(xReadSlashR), + /*2867*/ uint16(xArgXmm1), + /*2868*/ uint16(xArgXmm2M128), + /*2869*/ uint16(xMatch), + /*2870*/ uint16(xCondPrefix), 1, + 0x66, 2874, + /*2874*/ uint16(xSetOp), uint16(PHMINPOSUW), + /*2876*/ uint16(xReadSlashR), + /*2877*/ uint16(xArgXmm1), + /*2878*/ uint16(xArgXmm2M128), + /*2879*/ uint16(xMatch), + /*2880*/ uint16(xCondIs64), 2883, 2893, + /*2883*/ uint16(xCondPrefix), 1, + 0x66, 2887, + /*2887*/ uint16(xSetOp), uint16(INVPCID), + /*2889*/ uint16(xReadSlashR), + /*2890*/ uint16(xArgR32), + /*2891*/ uint16(xArgM128), + /*2892*/ uint16(xMatch), + /*2893*/ uint16(xCondPrefix), 1, + 0x66, 2897, + /*2897*/ uint16(xSetOp), uint16(INVPCID), + /*2899*/ uint16(xReadSlashR), + /*2900*/ uint16(xArgR64), + /*2901*/ uint16(xArgM128), + /*2902*/ uint16(xMatch), + /*2903*/ uint16(xSetOp), uint16(SHA1NEXTE), + /*2905*/ uint16(xReadSlashR), + /*2906*/ uint16(xArgXmm1), + /*2907*/ uint16(xArgXmm2M128), + /*2908*/ uint16(xMatch), + /*2909*/ uint16(xSetOp), uint16(SHA1MSG1), + /*2911*/ uint16(xReadSlashR), + /*2912*/ uint16(xArgXmm1), + /*2913*/ uint16(xArgXmm2M128), + /*2914*/ uint16(xMatch), + /*2915*/ uint16(xSetOp), uint16(SHA1MSG2), /*2917*/ uint16(xReadSlashR), /*2918*/ uint16(xArgXmm1), /*2919*/ uint16(xArgXmm2M128), /*2920*/ uint16(xMatch), - /*2921*/ uint16(xCondPrefix), 1, - 0x66, 2925, - /*2925*/ uint16(xSetOp), uint16(AESDEC), - /*2927*/ uint16(xReadSlashR), - /*2928*/ uint16(xArgXmm1), - /*2929*/ uint16(xArgXmm2M128), - /*2930*/ uint16(xMatch), - /*2931*/ uint16(xCondPrefix), 1, - 0x66, 2935, - /*2935*/ uint16(xSetOp), uint16(AESDECLAST), - /*2937*/ uint16(xReadSlashR), - /*2938*/ uint16(xArgXmm1), - /*2939*/ uint16(xArgXmm2M128), - /*2940*/ uint16(xMatch), - /*2941*/ uint16(xCondIs64), 2944, 2982, - /*2944*/ uint16(xCondPrefix), 2, - 0xF2, 2966, - 0x0, 2950, - /*2950*/ uint16(xCondDataSize), 2954, 2960, 0, - /*2954*/ uint16(xSetOp), uint16(MOVBE), + /*2921*/ uint16(xSetOp), uint16(SHA256RNDS2), + /*2923*/ uint16(xReadSlashR), + /*2924*/ uint16(xArgXmm1), + /*2925*/ uint16(xArgXmm2M128), + /*2926*/ uint16(xArgXMM0), + /*2927*/ uint16(xMatch), + /*2928*/ uint16(xSetOp), uint16(SHA256MSG1), + /*2930*/ uint16(xReadSlashR), + /*2931*/ uint16(xArgXmm1), + /*2932*/ uint16(xArgXmm2M128), + /*2933*/ uint16(xMatch), + /*2934*/ uint16(xSetOp), uint16(SHA256MSG2), + /*2936*/ uint16(xReadSlashR), + /*2937*/ uint16(xArgXmm1), + /*2938*/ uint16(xArgXmm2M128), + /*2939*/ uint16(xMatch), + /*2940*/ uint16(xCondPrefix), 1, + 0x66, 2944, + /*2944*/ uint16(xSetOp), uint16(AESIMC), + /*2946*/ uint16(xReadSlashR), + /*2947*/ uint16(xArgXmm1), + /*2948*/ uint16(xArgXmm2M128), + /*2949*/ uint16(xMatch), + /*2950*/ uint16(xCondPrefix), 1, + 0x66, 2954, + /*2954*/ uint16(xSetOp), uint16(AESENC), /*2956*/ uint16(xReadSlashR), - /*2957*/ uint16(xArgR16), - /*2958*/ uint16(xArgM16), + /*2957*/ uint16(xArgXmm1), + /*2958*/ uint16(xArgXmm2M128), /*2959*/ uint16(xMatch), - /*2960*/ uint16(xSetOp), uint16(MOVBE), - /*2962*/ uint16(xReadSlashR), - /*2963*/ uint16(xArgR32), - /*2964*/ uint16(xArgM32), - /*2965*/ uint16(xMatch), - /*2966*/ uint16(xCondDataSize), 2970, 2976, 0, - /*2970*/ uint16(xSetOp), uint16(CRC32), - /*2972*/ uint16(xReadSlashR), - /*2973*/ uint16(xArgR32), - /*2974*/ uint16(xArgRM8), - /*2975*/ uint16(xMatch), - /*2976*/ uint16(xSetOp), uint16(CRC32), - /*2978*/ uint16(xReadSlashR), - /*2979*/ uint16(xArgR32), - /*2980*/ uint16(xArgRM8), - /*2981*/ uint16(xMatch), - /*2982*/ uint16(xCondPrefix), 2, - 0xF2, 2998, - 0x0, 2988, - /*2988*/ uint16(xCondDataSize), 2954, 2960, 2992, - /*2992*/ uint16(xSetOp), uint16(MOVBE), - /*2994*/ uint16(xReadSlashR), - /*2995*/ uint16(xArgR64), - /*2996*/ uint16(xArgM64), - /*2997*/ uint16(xMatch), - /*2998*/ uint16(xCondDataSize), 2970, 2976, 3002, - /*3002*/ uint16(xSetOp), uint16(CRC32), - /*3004*/ uint16(xReadSlashR), - /*3005*/ uint16(xArgR64), - /*3006*/ uint16(xArgRM8), - /*3007*/ uint16(xMatch), - /*3008*/ uint16(xCondIs64), 3011, 3049, - /*3011*/ uint16(xCondPrefix), 2, - 0xF2, 3033, - 0x0, 3017, - /*3017*/ uint16(xCondDataSize), 3021, 3027, 0, - /*3021*/ uint16(xSetOp), uint16(MOVBE), - /*3023*/ uint16(xReadSlashR), - /*3024*/ uint16(xArgM16), - /*3025*/ uint16(xArgR16), - /*3026*/ uint16(xMatch), - /*3027*/ uint16(xSetOp), uint16(MOVBE), - /*3029*/ uint16(xReadSlashR), - /*3030*/ uint16(xArgM32), - /*3031*/ uint16(xArgR32), - /*3032*/ uint16(xMatch), - /*3033*/ uint16(xCondDataSize), 3037, 3043, 0, - /*3037*/ uint16(xSetOp), uint16(CRC32), - /*3039*/ uint16(xReadSlashR), - /*3040*/ uint16(xArgR32), - /*3041*/ uint16(xArgRM16), - /*3042*/ uint16(xMatch), - /*3043*/ uint16(xSetOp), uint16(CRC32), - /*3045*/ uint16(xReadSlashR), - /*3046*/ uint16(xArgR32), - /*3047*/ uint16(xArgRM32), - /*3048*/ uint16(xMatch), - /*3049*/ uint16(xCondPrefix), 2, - 0xF2, 3065, - 0x0, 3055, - /*3055*/ uint16(xCondDataSize), 3021, 3027, 3059, - /*3059*/ uint16(xSetOp), uint16(MOVBE), - /*3061*/ uint16(xReadSlashR), - /*3062*/ uint16(xArgM64), - /*3063*/ uint16(xArgR64), - /*3064*/ uint16(xMatch), - /*3065*/ uint16(xCondDataSize), 3037, 3043, 3069, - /*3069*/ uint16(xSetOp), uint16(CRC32), - /*3071*/ uint16(xReadSlashR), - /*3072*/ uint16(xArgR64), - /*3073*/ uint16(xArgRM64), - /*3074*/ uint16(xMatch), - /*3075*/ uint16(xCondByte), 24, - 0x08, 3126, - 0x09, 3138, - 0x0A, 3150, - 0x0B, 3162, - 0x0C, 3174, - 0x0D, 3186, - 0x0E, 3198, - 0x0F, 3210, - 0x14, 3232, - 0x15, 3244, - 0x16, 3256, - 0x17, 3299, - 0x20, 3311, - 0x21, 3323, - 0x22, 3335, - 0x40, 3378, - 0x41, 3390, - 0x42, 3402, - 0x44, 3414, - 0x60, 3426, - 0x61, 3438, - 0x62, 3450, - 0x63, 3462, - 0xDF, 3474, + /*2960*/ uint16(xCondPrefix), 1, + 0x66, 2964, + /*2964*/ uint16(xSetOp), uint16(AESENCLAST), + /*2966*/ uint16(xReadSlashR), + /*2967*/ uint16(xArgXmm1), + /*2968*/ uint16(xArgXmm2M128), + /*2969*/ uint16(xMatch), + /*2970*/ uint16(xCondPrefix), 1, + 0x66, 2974, + /*2974*/ uint16(xSetOp), uint16(AESDEC), + /*2976*/ uint16(xReadSlashR), + /*2977*/ uint16(xArgXmm1), + /*2978*/ uint16(xArgXmm2M128), + /*2979*/ uint16(xMatch), + /*2980*/ uint16(xCondPrefix), 1, + 0x66, 2984, + /*2984*/ uint16(xSetOp), uint16(AESDECLAST), + /*2986*/ uint16(xReadSlashR), + /*2987*/ uint16(xArgXmm1), + /*2988*/ uint16(xArgXmm2M128), + /*2989*/ uint16(xMatch), + /*2990*/ uint16(xCondIs64), 2993, 3031, + /*2993*/ uint16(xCondPrefix), 2, + 0xF2, 3015, + 0x0, 2999, + /*2999*/ uint16(xCondDataSize), 3003, 3009, 0, + /*3003*/ uint16(xSetOp), uint16(MOVBE), + /*3005*/ uint16(xReadSlashR), + /*3006*/ uint16(xArgR16), + /*3007*/ uint16(xArgM16), + /*3008*/ uint16(xMatch), + /*3009*/ uint16(xSetOp), uint16(MOVBE), + /*3011*/ uint16(xReadSlashR), + /*3012*/ uint16(xArgR32), + /*3013*/ uint16(xArgM32), + /*3014*/ uint16(xMatch), + /*3015*/ uint16(xCondDataSize), 3019, 3025, 0, + /*3019*/ uint16(xSetOp), uint16(CRC32), + /*3021*/ uint16(xReadSlashR), + /*3022*/ uint16(xArgR32), + /*3023*/ uint16(xArgRM8), + /*3024*/ uint16(xMatch), + /*3025*/ uint16(xSetOp), uint16(CRC32), + /*3027*/ uint16(xReadSlashR), + /*3028*/ uint16(xArgR32), + /*3029*/ uint16(xArgRM8), + /*3030*/ uint16(xMatch), + /*3031*/ uint16(xCondPrefix), 2, + 0xF2, 3047, + 0x0, 3037, + /*3037*/ uint16(xCondDataSize), 3003, 3009, 3041, + /*3041*/ uint16(xSetOp), uint16(MOVBE), + /*3043*/ uint16(xReadSlashR), + /*3044*/ uint16(xArgR64), + /*3045*/ uint16(xArgM64), + /*3046*/ uint16(xMatch), + /*3047*/ uint16(xCondDataSize), 3019, 3025, 3051, + /*3051*/ uint16(xSetOp), uint16(CRC32), + /*3053*/ uint16(xReadSlashR), + /*3054*/ uint16(xArgR64), + /*3055*/ uint16(xArgRM8), + /*3056*/ uint16(xMatch), + /*3057*/ uint16(xCondIs64), 3060, 3098, + /*3060*/ uint16(xCondPrefix), 2, + 0xF2, 3082, + 0x0, 3066, + /*3066*/ uint16(xCondDataSize), 3070, 3076, 0, + /*3070*/ uint16(xSetOp), uint16(MOVBE), + /*3072*/ uint16(xReadSlashR), + /*3073*/ uint16(xArgM16), + /*3074*/ uint16(xArgR16), + /*3075*/ uint16(xMatch), + /*3076*/ uint16(xSetOp), uint16(MOVBE), + /*3078*/ uint16(xReadSlashR), + /*3079*/ uint16(xArgM32), + /*3080*/ uint16(xArgR32), + /*3081*/ uint16(xMatch), + /*3082*/ uint16(xCondDataSize), 3086, 3092, 0, + /*3086*/ uint16(xSetOp), uint16(CRC32), + /*3088*/ uint16(xReadSlashR), + /*3089*/ uint16(xArgR32), + /*3090*/ uint16(xArgRM16), + /*3091*/ uint16(xMatch), + /*3092*/ uint16(xSetOp), uint16(CRC32), + /*3094*/ uint16(xReadSlashR), + /*3095*/ uint16(xArgR32), + /*3096*/ uint16(xArgRM32), + /*3097*/ uint16(xMatch), + /*3098*/ uint16(xCondPrefix), 2, + 0xF2, 3114, + 0x0, 3104, + /*3104*/ uint16(xCondDataSize), 3070, 3076, 3108, + /*3108*/ uint16(xSetOp), uint16(MOVBE), + /*3110*/ uint16(xReadSlashR), + /*3111*/ uint16(xArgM64), + /*3112*/ uint16(xArgR64), + /*3113*/ uint16(xMatch), + /*3114*/ uint16(xCondDataSize), 3086, 3092, 3118, + /*3118*/ uint16(xSetOp), uint16(CRC32), + /*3120*/ uint16(xReadSlashR), + /*3121*/ uint16(xArgR64), + /*3122*/ uint16(xArgRM64), + /*3123*/ uint16(xMatch), + /*3124*/ uint16(xCondByte), 25, + 0x08, 3177, + 0x09, 3189, + 0x0A, 3201, + 0x0B, 3213, + 0x0C, 3225, + 0x0D, 3237, + 0x0E, 3249, + 0x0F, 3261, + 0x14, 3283, + 0x15, 3295, + 0x16, 3307, + 0x17, 3350, + 0x20, 3362, + 0x21, 3374, + 0x22, 3386, + 0x40, 3429, + 0x41, 3441, + 0x42, 3453, + 0x44, 3465, + 0x60, 3477, + 0x61, 3489, + 0x62, 3501, + 0x63, 3513, + 0xCC, 3525, + 0xDF, 3533, uint16(xFail), - /*3126*/ uint16(xCondPrefix), 1, - 0x66, 3130, - /*3130*/ uint16(xSetOp), uint16(ROUNDPS), - /*3132*/ uint16(xReadSlashR), - /*3133*/ uint16(xReadIb), - /*3134*/ uint16(xArgXmm1), - /*3135*/ uint16(xArgXmm2M128), - /*3136*/ uint16(xArgImm8u), - /*3137*/ uint16(xMatch), - /*3138*/ uint16(xCondPrefix), 1, - 0x66, 3142, - /*3142*/ uint16(xSetOp), uint16(ROUNDPD), - /*3144*/ uint16(xReadSlashR), - /*3145*/ uint16(xReadIb), - /*3146*/ uint16(xArgXmm1), - /*3147*/ uint16(xArgXmm2M128), - /*3148*/ uint16(xArgImm8u), - /*3149*/ uint16(xMatch), - /*3150*/ uint16(xCondPrefix), 1, - 0x66, 3154, - /*3154*/ uint16(xSetOp), uint16(ROUNDSS), - /*3156*/ uint16(xReadSlashR), - /*3157*/ uint16(xReadIb), - /*3158*/ uint16(xArgXmm1), - /*3159*/ uint16(xArgXmm2M32), - /*3160*/ uint16(xArgImm8u), - /*3161*/ uint16(xMatch), - /*3162*/ uint16(xCondPrefix), 1, - 0x66, 3166, - /*3166*/ uint16(xSetOp), uint16(ROUNDSD), - /*3168*/ uint16(xReadSlashR), - /*3169*/ uint16(xReadIb), - /*3170*/ uint16(xArgXmm1), - /*3171*/ uint16(xArgXmm2M64), - /*3172*/ uint16(xArgImm8u), - /*3173*/ uint16(xMatch), - /*3174*/ uint16(xCondPrefix), 1, - 0x66, 3178, - /*3178*/ uint16(xSetOp), uint16(BLENDPS), - /*3180*/ uint16(xReadSlashR), - /*3181*/ uint16(xReadIb), - /*3182*/ uint16(xArgXmm1), - /*3183*/ uint16(xArgXmm2M128), - /*3184*/ uint16(xArgImm8u), - /*3185*/ uint16(xMatch), - /*3186*/ uint16(xCondPrefix), 1, - 0x66, 3190, - /*3190*/ uint16(xSetOp), uint16(BLENDPD), - /*3192*/ uint16(xReadSlashR), - /*3193*/ uint16(xReadIb), - /*3194*/ uint16(xArgXmm1), - /*3195*/ uint16(xArgXmm2M128), - /*3196*/ uint16(xArgImm8u), - /*3197*/ uint16(xMatch), - /*3198*/ uint16(xCondPrefix), 1, - 0x66, 3202, - /*3202*/ uint16(xSetOp), uint16(PBLENDW), - /*3204*/ uint16(xReadSlashR), - /*3205*/ uint16(xReadIb), - /*3206*/ uint16(xArgXmm1), - /*3207*/ uint16(xArgXmm2M128), - /*3208*/ uint16(xArgImm8u), - /*3209*/ uint16(xMatch), - /*3210*/ uint16(xCondPrefix), 2, - 0x66, 3224, - 0x0, 3216, - /*3216*/ uint16(xSetOp), uint16(PALIGNR), - /*3218*/ uint16(xReadSlashR), - /*3219*/ uint16(xReadIb), - /*3220*/ uint16(xArgMm1), - /*3221*/ uint16(xArgMm2M64), - /*3222*/ uint16(xArgImm8u), - /*3223*/ uint16(xMatch), - /*3224*/ uint16(xSetOp), uint16(PALIGNR), - /*3226*/ uint16(xReadSlashR), - /*3227*/ uint16(xReadIb), - /*3228*/ uint16(xArgXmm1), - /*3229*/ uint16(xArgXmm2M128), - /*3230*/ uint16(xArgImm8u), - /*3231*/ uint16(xMatch), - /*3232*/ uint16(xCondPrefix), 1, - 0x66, 3236, - /*3236*/ uint16(xSetOp), uint16(PEXTRB), - /*3238*/ uint16(xReadSlashR), - /*3239*/ uint16(xReadIb), - /*3240*/ uint16(xArgR32M8), - /*3241*/ uint16(xArgXmm1), - /*3242*/ uint16(xArgImm8u), - /*3243*/ uint16(xMatch), - /*3244*/ uint16(xCondPrefix), 1, - 0x66, 3248, - /*3248*/ uint16(xSetOp), uint16(PEXTRW), - /*3250*/ uint16(xReadSlashR), - /*3251*/ uint16(xReadIb), - /*3252*/ uint16(xArgR32M16), - /*3253*/ uint16(xArgXmm1), - /*3254*/ uint16(xArgImm8u), - /*3255*/ uint16(xMatch), - /*3256*/ uint16(xCondIs64), 3259, 3283, - /*3259*/ uint16(xCondPrefix), 1, - 0x66, 3263, - /*3263*/ uint16(xCondDataSize), 3267, 3275, 0, - /*3267*/ uint16(xSetOp), uint16(PEXTRD), + /*3177*/ uint16(xCondPrefix), 1, + 0x66, 3181, + /*3181*/ uint16(xSetOp), uint16(ROUNDPS), + /*3183*/ uint16(xReadSlashR), + /*3184*/ uint16(xReadIb), + /*3185*/ uint16(xArgXmm1), + /*3186*/ uint16(xArgXmm2M128), + /*3187*/ uint16(xArgImm8u), + /*3188*/ uint16(xMatch), + /*3189*/ uint16(xCondPrefix), 1, + 0x66, 3193, + /*3193*/ uint16(xSetOp), uint16(ROUNDPD), + /*3195*/ uint16(xReadSlashR), + /*3196*/ uint16(xReadIb), + /*3197*/ uint16(xArgXmm1), + /*3198*/ uint16(xArgXmm2M128), + /*3199*/ uint16(xArgImm8u), + /*3200*/ uint16(xMatch), + /*3201*/ uint16(xCondPrefix), 1, + 0x66, 3205, + /*3205*/ uint16(xSetOp), uint16(ROUNDSS), + /*3207*/ uint16(xReadSlashR), + /*3208*/ uint16(xReadIb), + /*3209*/ uint16(xArgXmm1), + /*3210*/ uint16(xArgXmm2M32), + /*3211*/ uint16(xArgImm8u), + /*3212*/ uint16(xMatch), + /*3213*/ uint16(xCondPrefix), 1, + 0x66, 3217, + /*3217*/ uint16(xSetOp), uint16(ROUNDSD), + /*3219*/ uint16(xReadSlashR), + /*3220*/ uint16(xReadIb), + /*3221*/ uint16(xArgXmm1), + /*3222*/ uint16(xArgXmm2M64), + /*3223*/ uint16(xArgImm8u), + /*3224*/ uint16(xMatch), + /*3225*/ uint16(xCondPrefix), 1, + 0x66, 3229, + /*3229*/ uint16(xSetOp), uint16(BLENDPS), + /*3231*/ uint16(xReadSlashR), + /*3232*/ uint16(xReadIb), + /*3233*/ uint16(xArgXmm1), + /*3234*/ uint16(xArgXmm2M128), + /*3235*/ uint16(xArgImm8u), + /*3236*/ uint16(xMatch), + /*3237*/ uint16(xCondPrefix), 1, + 0x66, 3241, + /*3241*/ uint16(xSetOp), uint16(BLENDPD), + /*3243*/ uint16(xReadSlashR), + /*3244*/ uint16(xReadIb), + /*3245*/ uint16(xArgXmm1), + /*3246*/ uint16(xArgXmm2M128), + /*3247*/ uint16(xArgImm8u), + /*3248*/ uint16(xMatch), + /*3249*/ uint16(xCondPrefix), 1, + 0x66, 3253, + /*3253*/ uint16(xSetOp), uint16(PBLENDW), + /*3255*/ uint16(xReadSlashR), + /*3256*/ uint16(xReadIb), + /*3257*/ uint16(xArgXmm1), + /*3258*/ uint16(xArgXmm2M128), + /*3259*/ uint16(xArgImm8u), + /*3260*/ uint16(xMatch), + /*3261*/ uint16(xCondPrefix), 2, + 0x66, 3275, + 0x0, 3267, + /*3267*/ uint16(xSetOp), uint16(PALIGNR), /*3269*/ uint16(xReadSlashR), /*3270*/ uint16(xReadIb), - /*3271*/ uint16(xArgRM32), - /*3272*/ uint16(xArgXmm1), + /*3271*/ uint16(xArgMm1), + /*3272*/ uint16(xArgMm2M64), /*3273*/ uint16(xArgImm8u), /*3274*/ uint16(xMatch), - /*3275*/ uint16(xSetOp), uint16(PEXTRD), + /*3275*/ uint16(xSetOp), uint16(PALIGNR), /*3277*/ uint16(xReadSlashR), /*3278*/ uint16(xReadIb), - /*3279*/ uint16(xArgRM32), - /*3280*/ uint16(xArgXmm1), + /*3279*/ uint16(xArgXmm1), + /*3280*/ uint16(xArgXmm2M128), /*3281*/ uint16(xArgImm8u), /*3282*/ uint16(xMatch), /*3283*/ uint16(xCondPrefix), 1, 0x66, 3287, - /*3287*/ uint16(xCondDataSize), 3267, 3275, 3291, - /*3291*/ uint16(xSetOp), uint16(PEXTRQ), - /*3293*/ uint16(xReadSlashR), - /*3294*/ uint16(xReadIb), - /*3295*/ uint16(xArgRM64), - /*3296*/ uint16(xArgXmm1), - /*3297*/ uint16(xArgImm8u), - /*3298*/ uint16(xMatch), - /*3299*/ uint16(xCondPrefix), 1, - 0x66, 3303, - /*3303*/ uint16(xSetOp), uint16(EXTRACTPS), - /*3305*/ uint16(xReadSlashR), - /*3306*/ uint16(xReadIb), - /*3307*/ uint16(xArgRM32), - /*3308*/ uint16(xArgXmm1), - /*3309*/ uint16(xArgImm8u), - /*3310*/ uint16(xMatch), - /*3311*/ uint16(xCondPrefix), 1, - 0x66, 3315, - /*3315*/ uint16(xSetOp), uint16(PINSRB), - /*3317*/ uint16(xReadSlashR), - /*3318*/ uint16(xReadIb), - /*3319*/ uint16(xArgXmm1), - /*3320*/ uint16(xArgR32M8), - /*3321*/ uint16(xArgImm8u), - /*3322*/ uint16(xMatch), - /*3323*/ uint16(xCondPrefix), 1, - 0x66, 3327, - /*3327*/ uint16(xSetOp), uint16(INSERTPS), - /*3329*/ uint16(xReadSlashR), - /*3330*/ uint16(xReadIb), + /*3287*/ uint16(xSetOp), uint16(PEXTRB), + /*3289*/ uint16(xReadSlashR), + /*3290*/ uint16(xReadIb), + /*3291*/ uint16(xArgR32M8), + /*3292*/ uint16(xArgXmm1), + /*3293*/ uint16(xArgImm8u), + /*3294*/ uint16(xMatch), + /*3295*/ uint16(xCondPrefix), 1, + 0x66, 3299, + /*3299*/ uint16(xSetOp), uint16(PEXTRW), + /*3301*/ uint16(xReadSlashR), + /*3302*/ uint16(xReadIb), + /*3303*/ uint16(xArgR32M16), + /*3304*/ uint16(xArgXmm1), + /*3305*/ uint16(xArgImm8u), + /*3306*/ uint16(xMatch), + /*3307*/ uint16(xCondIs64), 3310, 3334, + /*3310*/ uint16(xCondPrefix), 1, + 0x66, 3314, + /*3314*/ uint16(xCondDataSize), 3318, 3326, 0, + /*3318*/ uint16(xSetOp), uint16(PEXTRD), + /*3320*/ uint16(xReadSlashR), + /*3321*/ uint16(xReadIb), + /*3322*/ uint16(xArgRM32), + /*3323*/ uint16(xArgXmm1), + /*3324*/ uint16(xArgImm8u), + /*3325*/ uint16(xMatch), + /*3326*/ uint16(xSetOp), uint16(PEXTRD), + /*3328*/ uint16(xReadSlashR), + /*3329*/ uint16(xReadIb), + /*3330*/ uint16(xArgRM32), /*3331*/ uint16(xArgXmm1), - /*3332*/ uint16(xArgXmm2M32), - /*3333*/ uint16(xArgImm8u), - /*3334*/ uint16(xMatch), - /*3335*/ uint16(xCondIs64), 3338, 3362, - /*3338*/ uint16(xCondPrefix), 1, - 0x66, 3342, - /*3342*/ uint16(xCondDataSize), 3346, 3354, 0, - /*3346*/ uint16(xSetOp), uint16(PINSRD), - /*3348*/ uint16(xReadSlashR), - /*3349*/ uint16(xReadIb), - /*3350*/ uint16(xArgXmm1), - /*3351*/ uint16(xArgRM32), - /*3352*/ uint16(xArgImm8u), - /*3353*/ uint16(xMatch), - /*3354*/ uint16(xSetOp), uint16(PINSRD), + /*3332*/ uint16(xArgImm8u), + /*3333*/ uint16(xMatch), + /*3334*/ uint16(xCondPrefix), 1, + 0x66, 3338, + /*3338*/ uint16(xCondDataSize), 3318, 3326, 3342, + /*3342*/ uint16(xSetOp), uint16(PEXTRQ), + /*3344*/ uint16(xReadSlashR), + /*3345*/ uint16(xReadIb), + /*3346*/ uint16(xArgRM64), + /*3347*/ uint16(xArgXmm1), + /*3348*/ uint16(xArgImm8u), + /*3349*/ uint16(xMatch), + /*3350*/ uint16(xCondPrefix), 1, + 0x66, 3354, + /*3354*/ uint16(xSetOp), uint16(EXTRACTPS), /*3356*/ uint16(xReadSlashR), /*3357*/ uint16(xReadIb), - /*3358*/ uint16(xArgXmm1), - /*3359*/ uint16(xArgRM32), + /*3358*/ uint16(xArgRM32), + /*3359*/ uint16(xArgXmm1), /*3360*/ uint16(xArgImm8u), /*3361*/ uint16(xMatch), /*3362*/ uint16(xCondPrefix), 1, 0x66, 3366, - /*3366*/ uint16(xCondDataSize), 3346, 3354, 3370, - /*3370*/ uint16(xSetOp), uint16(PINSRQ), - /*3372*/ uint16(xReadSlashR), - /*3373*/ uint16(xReadIb), - /*3374*/ uint16(xArgXmm1), - /*3375*/ uint16(xArgRM64), - /*3376*/ uint16(xArgImm8u), - /*3377*/ uint16(xMatch), - /*3378*/ uint16(xCondPrefix), 1, - 0x66, 3382, - /*3382*/ uint16(xSetOp), uint16(DPPS), - /*3384*/ uint16(xReadSlashR), - /*3385*/ uint16(xReadIb), - /*3386*/ uint16(xArgXmm1), - /*3387*/ uint16(xArgXmm2M128), - /*3388*/ uint16(xArgImm8u), - /*3389*/ uint16(xMatch), - /*3390*/ uint16(xCondPrefix), 1, - 0x66, 3394, - /*3394*/ uint16(xSetOp), uint16(DPPD), - /*3396*/ uint16(xReadSlashR), - /*3397*/ uint16(xReadIb), - /*3398*/ uint16(xArgXmm1), - /*3399*/ uint16(xArgXmm2M128), - /*3400*/ uint16(xArgImm8u), - /*3401*/ uint16(xMatch), - /*3402*/ uint16(xCondPrefix), 1, - 0x66, 3406, - /*3406*/ uint16(xSetOp), uint16(MPSADBW), - /*3408*/ uint16(xReadSlashR), - /*3409*/ uint16(xReadIb), - /*3410*/ uint16(xArgXmm1), - /*3411*/ uint16(xArgXmm2M128), - /*3412*/ uint16(xArgImm8u), - /*3413*/ uint16(xMatch), - /*3414*/ uint16(xCondPrefix), 1, - 0x66, 3418, - /*3418*/ uint16(xSetOp), uint16(PCLMULQDQ), - /*3420*/ uint16(xReadSlashR), - /*3421*/ uint16(xReadIb), - /*3422*/ uint16(xArgXmm1), - /*3423*/ uint16(xArgXmm2M128), - /*3424*/ uint16(xArgImm8u), - /*3425*/ uint16(xMatch), - /*3426*/ uint16(xCondPrefix), 1, - 0x66, 3430, - /*3430*/ uint16(xSetOp), uint16(PCMPESTRM), - /*3432*/ uint16(xReadSlashR), - /*3433*/ uint16(xReadIb), - /*3434*/ uint16(xArgXmm1), - /*3435*/ uint16(xArgXmm2M128), - /*3436*/ uint16(xArgImm8u), - /*3437*/ uint16(xMatch), - /*3438*/ uint16(xCondPrefix), 1, - 0x66, 3442, - /*3442*/ uint16(xSetOp), uint16(PCMPESTRI), - /*3444*/ uint16(xReadSlashR), - /*3445*/ uint16(xReadIb), - /*3446*/ uint16(xArgXmm1), - /*3447*/ uint16(xArgXmm2M128), - /*3448*/ uint16(xArgImm8u), - /*3449*/ uint16(xMatch), - /*3450*/ uint16(xCondPrefix), 1, - 0x66, 3454, - /*3454*/ uint16(xSetOp), uint16(PCMPISTRM), - /*3456*/ uint16(xReadSlashR), - /*3457*/ uint16(xReadIb), - /*3458*/ uint16(xArgXmm1), - /*3459*/ uint16(xArgXmm2M128), - /*3460*/ uint16(xArgImm8u), - /*3461*/ uint16(xMatch), - /*3462*/ uint16(xCondPrefix), 1, - 0x66, 3466, - /*3466*/ uint16(xSetOp), uint16(PCMPISTRI), - /*3468*/ uint16(xReadSlashR), - /*3469*/ uint16(xReadIb), - /*3470*/ uint16(xArgXmm1), - /*3471*/ uint16(xArgXmm2M128), - /*3472*/ uint16(xArgImm8u), - /*3473*/ uint16(xMatch), - /*3474*/ uint16(xCondPrefix), 1, - 0x66, 3478, - /*3478*/ uint16(xSetOp), uint16(AESKEYGENASSIST), - /*3480*/ uint16(xReadSlashR), - /*3481*/ uint16(xReadIb), - /*3482*/ uint16(xArgXmm1), - /*3483*/ uint16(xArgXmm2M128), - /*3484*/ uint16(xArgImm8u), - /*3485*/ uint16(xMatch), - /*3486*/ uint16(xCondIs64), 3489, 3505, - /*3489*/ uint16(xCondDataSize), 3493, 3499, 0, - /*3493*/ uint16(xSetOp), uint16(CMOVO), + /*3366*/ uint16(xSetOp), uint16(PINSRB), + /*3368*/ uint16(xReadSlashR), + /*3369*/ uint16(xReadIb), + /*3370*/ uint16(xArgXmm1), + /*3371*/ uint16(xArgR32M8), + /*3372*/ uint16(xArgImm8u), + /*3373*/ uint16(xMatch), + /*3374*/ uint16(xCondPrefix), 1, + 0x66, 3378, + /*3378*/ uint16(xSetOp), uint16(INSERTPS), + /*3380*/ uint16(xReadSlashR), + /*3381*/ uint16(xReadIb), + /*3382*/ uint16(xArgXmm1), + /*3383*/ uint16(xArgXmm2M32), + /*3384*/ uint16(xArgImm8u), + /*3385*/ uint16(xMatch), + /*3386*/ uint16(xCondIs64), 3389, 3413, + /*3389*/ uint16(xCondPrefix), 1, + 0x66, 3393, + /*3393*/ uint16(xCondDataSize), 3397, 3405, 0, + /*3397*/ uint16(xSetOp), uint16(PINSRD), + /*3399*/ uint16(xReadSlashR), + /*3400*/ uint16(xReadIb), + /*3401*/ uint16(xArgXmm1), + /*3402*/ uint16(xArgRM32), + /*3403*/ uint16(xArgImm8u), + /*3404*/ uint16(xMatch), + /*3405*/ uint16(xSetOp), uint16(PINSRD), + /*3407*/ uint16(xReadSlashR), + /*3408*/ uint16(xReadIb), + /*3409*/ uint16(xArgXmm1), + /*3410*/ uint16(xArgRM32), + /*3411*/ uint16(xArgImm8u), + /*3412*/ uint16(xMatch), + /*3413*/ uint16(xCondPrefix), 1, + 0x66, 3417, + /*3417*/ uint16(xCondDataSize), 3397, 3405, 3421, + /*3421*/ uint16(xSetOp), uint16(PINSRQ), + /*3423*/ uint16(xReadSlashR), + /*3424*/ uint16(xReadIb), + /*3425*/ uint16(xArgXmm1), + /*3426*/ uint16(xArgRM64), + /*3427*/ uint16(xArgImm8u), + /*3428*/ uint16(xMatch), + /*3429*/ uint16(xCondPrefix), 1, + 0x66, 3433, + /*3433*/ uint16(xSetOp), uint16(DPPS), + /*3435*/ uint16(xReadSlashR), + /*3436*/ uint16(xReadIb), + /*3437*/ uint16(xArgXmm1), + /*3438*/ uint16(xArgXmm2M128), + /*3439*/ uint16(xArgImm8u), + /*3440*/ uint16(xMatch), + /*3441*/ uint16(xCondPrefix), 1, + 0x66, 3445, + /*3445*/ uint16(xSetOp), uint16(DPPD), + /*3447*/ uint16(xReadSlashR), + /*3448*/ uint16(xReadIb), + /*3449*/ uint16(xArgXmm1), + /*3450*/ uint16(xArgXmm2M128), + /*3451*/ uint16(xArgImm8u), + /*3452*/ uint16(xMatch), + /*3453*/ uint16(xCondPrefix), 1, + 0x66, 3457, + /*3457*/ uint16(xSetOp), uint16(MPSADBW), + /*3459*/ uint16(xReadSlashR), + /*3460*/ uint16(xReadIb), + /*3461*/ uint16(xArgXmm1), + /*3462*/ uint16(xArgXmm2M128), + /*3463*/ uint16(xArgImm8u), + /*3464*/ uint16(xMatch), + /*3465*/ uint16(xCondPrefix), 1, + 0x66, 3469, + /*3469*/ uint16(xSetOp), uint16(PCLMULQDQ), + /*3471*/ uint16(xReadSlashR), + /*3472*/ uint16(xReadIb), + /*3473*/ uint16(xArgXmm1), + /*3474*/ uint16(xArgXmm2M128), + /*3475*/ uint16(xArgImm8u), + /*3476*/ uint16(xMatch), + /*3477*/ uint16(xCondPrefix), 1, + 0x66, 3481, + /*3481*/ uint16(xSetOp), uint16(PCMPESTRM), + /*3483*/ uint16(xReadSlashR), + /*3484*/ uint16(xReadIb), + /*3485*/ uint16(xArgXmm1), + /*3486*/ uint16(xArgXmm2M128), + /*3487*/ uint16(xArgImm8u), + /*3488*/ uint16(xMatch), + /*3489*/ uint16(xCondPrefix), 1, + 0x66, 3493, + /*3493*/ uint16(xSetOp), uint16(PCMPESTRI), /*3495*/ uint16(xReadSlashR), - /*3496*/ uint16(xArgR16), - /*3497*/ uint16(xArgRM16), - /*3498*/ uint16(xMatch), - /*3499*/ uint16(xSetOp), uint16(CMOVO), - /*3501*/ uint16(xReadSlashR), - /*3502*/ uint16(xArgR32), - /*3503*/ uint16(xArgRM32), - /*3504*/ uint16(xMatch), - /*3505*/ uint16(xCondDataSize), 3493, 3499, 3509, - /*3509*/ uint16(xSetOp), uint16(CMOVO), - /*3511*/ uint16(xReadSlashR), - /*3512*/ uint16(xArgR64), - /*3513*/ uint16(xArgRM64), - /*3514*/ uint16(xMatch), - /*3515*/ uint16(xCondIs64), 3518, 3534, - /*3518*/ uint16(xCondDataSize), 3522, 3528, 0, - /*3522*/ uint16(xSetOp), uint16(CMOVNO), - /*3524*/ uint16(xReadSlashR), - /*3525*/ uint16(xArgR16), - /*3526*/ uint16(xArgRM16), - /*3527*/ uint16(xMatch), - /*3528*/ uint16(xSetOp), uint16(CMOVNO), - /*3530*/ uint16(xReadSlashR), - /*3531*/ uint16(xArgR32), - /*3532*/ uint16(xArgRM32), - /*3533*/ uint16(xMatch), - /*3534*/ uint16(xCondDataSize), 3522, 3528, 3538, - /*3538*/ uint16(xSetOp), uint16(CMOVNO), - /*3540*/ uint16(xReadSlashR), - /*3541*/ uint16(xArgR64), - /*3542*/ uint16(xArgRM64), - /*3543*/ uint16(xMatch), - /*3544*/ uint16(xCondIs64), 3547, 3563, - /*3547*/ uint16(xCondDataSize), 3551, 3557, 0, - /*3551*/ uint16(xSetOp), uint16(CMOVB), - /*3553*/ uint16(xReadSlashR), - /*3554*/ uint16(xArgR16), - /*3555*/ uint16(xArgRM16), - /*3556*/ uint16(xMatch), - /*3557*/ uint16(xSetOp), uint16(CMOVB), - /*3559*/ uint16(xReadSlashR), - /*3560*/ uint16(xArgR32), - /*3561*/ uint16(xArgRM32), - /*3562*/ uint16(xMatch), - /*3563*/ uint16(xCondDataSize), 3551, 3557, 3567, - /*3567*/ uint16(xSetOp), uint16(CMOVB), - /*3569*/ uint16(xReadSlashR), - /*3570*/ uint16(xArgR64), - /*3571*/ uint16(xArgRM64), - /*3572*/ uint16(xMatch), - /*3573*/ uint16(xCondIs64), 3576, 3592, - /*3576*/ uint16(xCondDataSize), 3580, 3586, 0, - /*3580*/ uint16(xSetOp), uint16(CMOVAE), - /*3582*/ uint16(xReadSlashR), - /*3583*/ uint16(xArgR16), - /*3584*/ uint16(xArgRM16), - /*3585*/ uint16(xMatch), - /*3586*/ uint16(xSetOp), uint16(CMOVAE), - /*3588*/ uint16(xReadSlashR), - /*3589*/ uint16(xArgR32), - /*3590*/ uint16(xArgRM32), - /*3591*/ uint16(xMatch), - /*3592*/ uint16(xCondDataSize), 3580, 3586, 3596, - /*3596*/ uint16(xSetOp), uint16(CMOVAE), - /*3598*/ uint16(xReadSlashR), - /*3599*/ uint16(xArgR64), - /*3600*/ uint16(xArgRM64), - /*3601*/ uint16(xMatch), - /*3602*/ uint16(xCondIs64), 3605, 3621, - /*3605*/ uint16(xCondDataSize), 3609, 3615, 0, - /*3609*/ uint16(xSetOp), uint16(CMOVE), - /*3611*/ uint16(xReadSlashR), - /*3612*/ uint16(xArgR16), - /*3613*/ uint16(xArgRM16), - /*3614*/ uint16(xMatch), - /*3615*/ uint16(xSetOp), uint16(CMOVE), - /*3617*/ uint16(xReadSlashR), - /*3618*/ uint16(xArgR32), - /*3619*/ uint16(xArgRM32), - /*3620*/ uint16(xMatch), - /*3621*/ uint16(xCondDataSize), 3609, 3615, 3625, - /*3625*/ uint16(xSetOp), uint16(CMOVE), - /*3627*/ uint16(xReadSlashR), - /*3628*/ uint16(xArgR64), - /*3629*/ uint16(xArgRM64), - /*3630*/ uint16(xMatch), - /*3631*/ uint16(xCondIs64), 3634, 3650, - /*3634*/ uint16(xCondDataSize), 3638, 3644, 0, - /*3638*/ uint16(xSetOp), uint16(CMOVNE), - /*3640*/ uint16(xReadSlashR), - /*3641*/ uint16(xArgR16), - /*3642*/ uint16(xArgRM16), - /*3643*/ uint16(xMatch), - /*3644*/ uint16(xSetOp), uint16(CMOVNE), - /*3646*/ uint16(xReadSlashR), - /*3647*/ uint16(xArgR32), - /*3648*/ uint16(xArgRM32), - /*3649*/ uint16(xMatch), - /*3650*/ uint16(xCondDataSize), 3638, 3644, 3654, - /*3654*/ uint16(xSetOp), uint16(CMOVNE), - /*3656*/ uint16(xReadSlashR), - /*3657*/ uint16(xArgR64), - /*3658*/ uint16(xArgRM64), - /*3659*/ uint16(xMatch), - /*3660*/ uint16(xCondIs64), 3663, 3679, - /*3663*/ uint16(xCondDataSize), 3667, 3673, 0, - /*3667*/ uint16(xSetOp), uint16(CMOVBE), - /*3669*/ uint16(xReadSlashR), - /*3670*/ uint16(xArgR16), - /*3671*/ uint16(xArgRM16), - /*3672*/ uint16(xMatch), - /*3673*/ uint16(xSetOp), uint16(CMOVBE), - /*3675*/ uint16(xReadSlashR), - /*3676*/ uint16(xArgR32), - /*3677*/ uint16(xArgRM32), - /*3678*/ uint16(xMatch), - /*3679*/ uint16(xCondDataSize), 3667, 3673, 3683, - /*3683*/ uint16(xSetOp), uint16(CMOVBE), - /*3685*/ uint16(xReadSlashR), - /*3686*/ uint16(xArgR64), - /*3687*/ uint16(xArgRM64), - /*3688*/ uint16(xMatch), - /*3689*/ uint16(xCondIs64), 3692, 3708, - /*3692*/ uint16(xCondDataSize), 3696, 3702, 0, - /*3696*/ uint16(xSetOp), uint16(CMOVA), - /*3698*/ uint16(xReadSlashR), - /*3699*/ uint16(xArgR16), - /*3700*/ uint16(xArgRM16), - /*3701*/ uint16(xMatch), - /*3702*/ uint16(xSetOp), uint16(CMOVA), - /*3704*/ uint16(xReadSlashR), - /*3705*/ uint16(xArgR32), - /*3706*/ uint16(xArgRM32), - /*3707*/ uint16(xMatch), - /*3708*/ uint16(xCondDataSize), 3696, 3702, 3712, - /*3712*/ uint16(xSetOp), uint16(CMOVA), - /*3714*/ uint16(xReadSlashR), - /*3715*/ uint16(xArgR64), - /*3716*/ uint16(xArgRM64), - /*3717*/ uint16(xMatch), - /*3718*/ uint16(xCondIs64), 3721, 3737, - /*3721*/ uint16(xCondDataSize), 3725, 3731, 0, - /*3725*/ uint16(xSetOp), uint16(CMOVS), - /*3727*/ uint16(xReadSlashR), - /*3728*/ uint16(xArgR16), - /*3729*/ uint16(xArgRM16), - /*3730*/ uint16(xMatch), - /*3731*/ uint16(xSetOp), uint16(CMOVS), - /*3733*/ uint16(xReadSlashR), - /*3734*/ uint16(xArgR32), - /*3735*/ uint16(xArgRM32), - /*3736*/ uint16(xMatch), - /*3737*/ uint16(xCondDataSize), 3725, 3731, 3741, - /*3741*/ uint16(xSetOp), uint16(CMOVS), - /*3743*/ uint16(xReadSlashR), - /*3744*/ uint16(xArgR64), - /*3745*/ uint16(xArgRM64), - /*3746*/ uint16(xMatch), - /*3747*/ uint16(xCondIs64), 3750, 3766, - /*3750*/ uint16(xCondDataSize), 3754, 3760, 0, - /*3754*/ uint16(xSetOp), uint16(CMOVNS), - /*3756*/ uint16(xReadSlashR), - /*3757*/ uint16(xArgR16), - /*3758*/ uint16(xArgRM16), - /*3759*/ uint16(xMatch), - /*3760*/ uint16(xSetOp), uint16(CMOVNS), - /*3762*/ uint16(xReadSlashR), - /*3763*/ uint16(xArgR32), - /*3764*/ uint16(xArgRM32), - /*3765*/ uint16(xMatch), - /*3766*/ uint16(xCondDataSize), 3754, 3760, 3770, - /*3770*/ uint16(xSetOp), uint16(CMOVNS), - /*3772*/ uint16(xReadSlashR), - /*3773*/ uint16(xArgR64), - /*3774*/ uint16(xArgRM64), - /*3775*/ uint16(xMatch), - /*3776*/ uint16(xCondIs64), 3779, 3795, - /*3779*/ uint16(xCondDataSize), 3783, 3789, 0, - /*3783*/ uint16(xSetOp), uint16(CMOVP), - /*3785*/ uint16(xReadSlashR), - /*3786*/ uint16(xArgR16), - /*3787*/ uint16(xArgRM16), - /*3788*/ uint16(xMatch), - /*3789*/ uint16(xSetOp), uint16(CMOVP), - /*3791*/ uint16(xReadSlashR), - /*3792*/ uint16(xArgR32), - /*3793*/ uint16(xArgRM32), - /*3794*/ uint16(xMatch), - /*3795*/ uint16(xCondDataSize), 3783, 3789, 3799, - /*3799*/ uint16(xSetOp), uint16(CMOVP), - /*3801*/ uint16(xReadSlashR), - /*3802*/ uint16(xArgR64), - /*3803*/ uint16(xArgRM64), - /*3804*/ uint16(xMatch), - /*3805*/ uint16(xCondIs64), 3808, 3824, - /*3808*/ uint16(xCondDataSize), 3812, 3818, 0, - /*3812*/ uint16(xSetOp), uint16(CMOVNP), - /*3814*/ uint16(xReadSlashR), - /*3815*/ uint16(xArgR16), - /*3816*/ uint16(xArgRM16), - /*3817*/ uint16(xMatch), - /*3818*/ uint16(xSetOp), uint16(CMOVNP), - /*3820*/ uint16(xReadSlashR), - /*3821*/ uint16(xArgR32), - /*3822*/ uint16(xArgRM32), - /*3823*/ uint16(xMatch), - /*3824*/ uint16(xCondDataSize), 3812, 3818, 3828, - /*3828*/ uint16(xSetOp), uint16(CMOVNP), - /*3830*/ uint16(xReadSlashR), - /*3831*/ uint16(xArgR64), - /*3832*/ uint16(xArgRM64), - /*3833*/ uint16(xMatch), - /*3834*/ uint16(xCondIs64), 3837, 3853, - /*3837*/ uint16(xCondDataSize), 3841, 3847, 0, - /*3841*/ uint16(xSetOp), uint16(CMOVL), - /*3843*/ uint16(xReadSlashR), - /*3844*/ uint16(xArgR16), - /*3845*/ uint16(xArgRM16), - /*3846*/ uint16(xMatch), - /*3847*/ uint16(xSetOp), uint16(CMOVL), - /*3849*/ uint16(xReadSlashR), - /*3850*/ uint16(xArgR32), - /*3851*/ uint16(xArgRM32), - /*3852*/ uint16(xMatch), - /*3853*/ uint16(xCondDataSize), 3841, 3847, 3857, - /*3857*/ uint16(xSetOp), uint16(CMOVL), - /*3859*/ uint16(xReadSlashR), - /*3860*/ uint16(xArgR64), - /*3861*/ uint16(xArgRM64), - /*3862*/ uint16(xMatch), - /*3863*/ uint16(xCondIs64), 3866, 3882, - /*3866*/ uint16(xCondDataSize), 3870, 3876, 0, - /*3870*/ uint16(xSetOp), uint16(CMOVGE), - /*3872*/ uint16(xReadSlashR), - /*3873*/ uint16(xArgR16), - /*3874*/ uint16(xArgRM16), - /*3875*/ uint16(xMatch), - /*3876*/ uint16(xSetOp), uint16(CMOVGE), - /*3878*/ uint16(xReadSlashR), - /*3879*/ uint16(xArgR32), - /*3880*/ uint16(xArgRM32), - /*3881*/ uint16(xMatch), - /*3882*/ uint16(xCondDataSize), 3870, 3876, 3886, - /*3886*/ uint16(xSetOp), uint16(CMOVGE), - /*3888*/ uint16(xReadSlashR), - /*3889*/ uint16(xArgR64), - /*3890*/ uint16(xArgRM64), - /*3891*/ uint16(xMatch), - /*3892*/ uint16(xCondIs64), 3895, 3911, - /*3895*/ uint16(xCondDataSize), 3899, 3905, 0, - /*3899*/ uint16(xSetOp), uint16(CMOVLE), - /*3901*/ uint16(xReadSlashR), - /*3902*/ uint16(xArgR16), - /*3903*/ uint16(xArgRM16), - /*3904*/ uint16(xMatch), - /*3905*/ uint16(xSetOp), uint16(CMOVLE), - /*3907*/ uint16(xReadSlashR), - /*3908*/ uint16(xArgR32), - /*3909*/ uint16(xArgRM32), - /*3910*/ uint16(xMatch), - /*3911*/ uint16(xCondDataSize), 3899, 3905, 3915, - /*3915*/ uint16(xSetOp), uint16(CMOVLE), - /*3917*/ uint16(xReadSlashR), - /*3918*/ uint16(xArgR64), - /*3919*/ uint16(xArgRM64), - /*3920*/ uint16(xMatch), - /*3921*/ uint16(xCondIs64), 3924, 3940, - /*3924*/ uint16(xCondDataSize), 3928, 3934, 0, - /*3928*/ uint16(xSetOp), uint16(CMOVG), - /*3930*/ uint16(xReadSlashR), - /*3931*/ uint16(xArgR16), - /*3932*/ uint16(xArgRM16), - /*3933*/ uint16(xMatch), - /*3934*/ uint16(xSetOp), uint16(CMOVG), - /*3936*/ uint16(xReadSlashR), - /*3937*/ uint16(xArgR32), - /*3938*/ uint16(xArgRM32), - /*3939*/ uint16(xMatch), - /*3940*/ uint16(xCondDataSize), 3928, 3934, 3944, - /*3944*/ uint16(xSetOp), uint16(CMOVG), - /*3946*/ uint16(xReadSlashR), - /*3947*/ uint16(xArgR64), - /*3948*/ uint16(xArgRM64), - /*3949*/ uint16(xMatch), - /*3950*/ uint16(xCondPrefix), 2, - 0x66, 3962, - 0x0, 3956, - /*3956*/ uint16(xSetOp), uint16(MOVMSKPS), - /*3958*/ uint16(xReadSlashR), - /*3959*/ uint16(xArgR32), - /*3960*/ uint16(xArgXmm2), - /*3961*/ uint16(xMatch), - /*3962*/ uint16(xSetOp), uint16(MOVMSKPD), - /*3964*/ uint16(xReadSlashR), - /*3965*/ uint16(xArgR32), - /*3966*/ uint16(xArgXmm2), - /*3967*/ uint16(xMatch), - /*3968*/ uint16(xCondPrefix), 4, - 0xF3, 3996, - 0xF2, 3990, - 0x66, 3984, - 0x0, 3978, - /*3978*/ uint16(xSetOp), uint16(SQRTPS), - /*3980*/ uint16(xReadSlashR), - /*3981*/ uint16(xArgXmm1), - /*3982*/ uint16(xArgXmm2M128), - /*3983*/ uint16(xMatch), - /*3984*/ uint16(xSetOp), uint16(SQRTPD), - /*3986*/ uint16(xReadSlashR), - /*3987*/ uint16(xArgXmm1), - /*3988*/ uint16(xArgXmm2M128), - /*3989*/ uint16(xMatch), - /*3990*/ uint16(xSetOp), uint16(SQRTSD), - /*3992*/ uint16(xReadSlashR), - /*3993*/ uint16(xArgXmm1), - /*3994*/ uint16(xArgXmm2M64), - /*3995*/ uint16(xMatch), - /*3996*/ uint16(xSetOp), uint16(SQRTSS), - /*3998*/ uint16(xReadSlashR), - /*3999*/ uint16(xArgXmm1), - /*4000*/ uint16(xArgXmm2M32), - /*4001*/ uint16(xMatch), - /*4002*/ uint16(xCondPrefix), 2, - 0xF3, 4014, - 0x0, 4008, - /*4008*/ uint16(xSetOp), uint16(RSQRTPS), - /*4010*/ uint16(xReadSlashR), - /*4011*/ uint16(xArgXmm1), - /*4012*/ uint16(xArgXmm2M128), - /*4013*/ uint16(xMatch), - /*4014*/ uint16(xSetOp), uint16(RSQRTSS), - /*4016*/ uint16(xReadSlashR), - /*4017*/ uint16(xArgXmm1), - /*4018*/ uint16(xArgXmm2M32), - /*4019*/ uint16(xMatch), - /*4020*/ uint16(xCondPrefix), 2, - 0xF3, 4032, - 0x0, 4026, - /*4026*/ uint16(xSetOp), uint16(RCPPS), - /*4028*/ uint16(xReadSlashR), - /*4029*/ uint16(xArgXmm1), - /*4030*/ uint16(xArgXmm2M128), - /*4031*/ uint16(xMatch), - /*4032*/ uint16(xSetOp), uint16(RCPSS), - /*4034*/ uint16(xReadSlashR), - /*4035*/ uint16(xArgXmm1), - /*4036*/ uint16(xArgXmm2M32), - /*4037*/ uint16(xMatch), - /*4038*/ uint16(xCondPrefix), 2, - 0x66, 4050, - 0x0, 4044, - /*4044*/ uint16(xSetOp), uint16(ANDPS), - /*4046*/ uint16(xReadSlashR), - /*4047*/ uint16(xArgXmm1), - /*4048*/ uint16(xArgXmm2M128), - /*4049*/ uint16(xMatch), - /*4050*/ uint16(xSetOp), uint16(ANDPD), - /*4052*/ uint16(xReadSlashR), - /*4053*/ uint16(xArgXmm1), - /*4054*/ uint16(xArgXmm2M128), - /*4055*/ uint16(xMatch), - /*4056*/ uint16(xCondPrefix), 2, - 0x66, 4068, - 0x0, 4062, - /*4062*/ uint16(xSetOp), uint16(ANDNPS), - /*4064*/ uint16(xReadSlashR), - /*4065*/ uint16(xArgXmm1), - /*4066*/ uint16(xArgXmm2M128), - /*4067*/ uint16(xMatch), - /*4068*/ uint16(xSetOp), uint16(ANDNPD), - /*4070*/ uint16(xReadSlashR), - /*4071*/ uint16(xArgXmm1), - /*4072*/ uint16(xArgXmm2M128), - /*4073*/ uint16(xMatch), - /*4074*/ uint16(xCondPrefix), 2, - 0x66, 4086, - 0x0, 4080, - /*4080*/ uint16(xSetOp), uint16(ORPS), - /*4082*/ uint16(xReadSlashR), - /*4083*/ uint16(xArgXmm1), - /*4084*/ uint16(xArgXmm2M128), - /*4085*/ uint16(xMatch), - /*4086*/ uint16(xSetOp), uint16(ORPD), - /*4088*/ uint16(xReadSlashR), - /*4089*/ uint16(xArgXmm1), - /*4090*/ uint16(xArgXmm2M128), - /*4091*/ uint16(xMatch), - /*4092*/ uint16(xCondPrefix), 2, - 0x66, 4104, - 0x0, 4098, - /*4098*/ uint16(xSetOp), uint16(XORPS), - /*4100*/ uint16(xReadSlashR), - /*4101*/ uint16(xArgXmm1), - /*4102*/ uint16(xArgXmm2M128), - /*4103*/ uint16(xMatch), - /*4104*/ uint16(xSetOp), uint16(XORPD), - /*4106*/ uint16(xReadSlashR), - /*4107*/ uint16(xArgXmm1), - /*4108*/ uint16(xArgXmm2M128), - /*4109*/ uint16(xMatch), - /*4110*/ uint16(xCondPrefix), 4, - 0xF3, 4138, - 0xF2, 4132, - 0x66, 4126, - 0x0, 4120, - /*4120*/ uint16(xSetOp), uint16(ADDPS), - /*4122*/ uint16(xReadSlashR), - /*4123*/ uint16(xArgXmm1), - /*4124*/ uint16(xArgXmm2M128), - /*4125*/ uint16(xMatch), - /*4126*/ uint16(xSetOp), uint16(ADDPD), - /*4128*/ uint16(xReadSlashR), - /*4129*/ uint16(xArgXmm1), - /*4130*/ uint16(xArgXmm2M128), - /*4131*/ uint16(xMatch), - /*4132*/ uint16(xSetOp), uint16(ADDSD), - /*4134*/ uint16(xReadSlashR), - /*4135*/ uint16(xArgXmm1), - /*4136*/ uint16(xArgXmm2M64), - /*4137*/ uint16(xMatch), - /*4138*/ uint16(xSetOp), uint16(ADDSS), - /*4140*/ uint16(xReadSlashR), - /*4141*/ uint16(xArgXmm1), - /*4142*/ uint16(xArgXmm2M32), - /*4143*/ uint16(xMatch), - /*4144*/ uint16(xCondPrefix), 4, - 0xF3, 4172, - 0xF2, 4166, - 0x66, 4160, - 0x0, 4154, - /*4154*/ uint16(xSetOp), uint16(MULPS), - /*4156*/ uint16(xReadSlashR), - /*4157*/ uint16(xArgXmm1), - /*4158*/ uint16(xArgXmm2M128), - /*4159*/ uint16(xMatch), - /*4160*/ uint16(xSetOp), uint16(MULPD), - /*4162*/ uint16(xReadSlashR), - /*4163*/ uint16(xArgXmm1), - /*4164*/ uint16(xArgXmm2M128), - /*4165*/ uint16(xMatch), - /*4166*/ uint16(xSetOp), uint16(MULSD), - /*4168*/ uint16(xReadSlashR), - /*4169*/ uint16(xArgXmm1), - /*4170*/ uint16(xArgXmm2M64), - /*4171*/ uint16(xMatch), - /*4172*/ uint16(xSetOp), uint16(MULSS), - /*4174*/ uint16(xReadSlashR), - /*4175*/ uint16(xArgXmm1), - /*4176*/ uint16(xArgXmm2M32), - /*4177*/ uint16(xMatch), - /*4178*/ uint16(xCondPrefix), 4, - 0xF3, 4206, - 0xF2, 4200, - 0x66, 4194, - 0x0, 4188, - /*4188*/ uint16(xSetOp), uint16(CVTPS2PD), - /*4190*/ uint16(xReadSlashR), - /*4191*/ uint16(xArgXmm1), - /*4192*/ uint16(xArgXmm2M64), - /*4193*/ uint16(xMatch), - /*4194*/ uint16(xSetOp), uint16(CVTPD2PS), - /*4196*/ uint16(xReadSlashR), - /*4197*/ uint16(xArgXmm1), - /*4198*/ uint16(xArgXmm2M128), - /*4199*/ uint16(xMatch), - /*4200*/ uint16(xSetOp), uint16(CVTSD2SS), - /*4202*/ uint16(xReadSlashR), - /*4203*/ uint16(xArgXmm1), - /*4204*/ uint16(xArgXmm2M64), - /*4205*/ uint16(xMatch), - /*4206*/ uint16(xSetOp), uint16(CVTSS2SD), - /*4208*/ uint16(xReadSlashR), - /*4209*/ uint16(xArgXmm1), - /*4210*/ uint16(xArgXmm2M32), - /*4211*/ uint16(xMatch), - /*4212*/ uint16(xCondPrefix), 3, - 0xF3, 4232, - 0x66, 4226, - 0x0, 4220, - /*4220*/ uint16(xSetOp), uint16(CVTDQ2PS), - /*4222*/ uint16(xReadSlashR), - /*4223*/ uint16(xArgXmm1), - /*4224*/ uint16(xArgXmm2M128), - /*4225*/ uint16(xMatch), - /*4226*/ uint16(xSetOp), uint16(CVTPS2DQ), - /*4228*/ uint16(xReadSlashR), - /*4229*/ uint16(xArgXmm1), - /*4230*/ uint16(xArgXmm2M128), - /*4231*/ uint16(xMatch), - /*4232*/ uint16(xSetOp), uint16(CVTTPS2DQ), - /*4234*/ uint16(xReadSlashR), - /*4235*/ uint16(xArgXmm1), - /*4236*/ uint16(xArgXmm2M128), - /*4237*/ uint16(xMatch), - /*4238*/ uint16(xCondPrefix), 4, - 0xF3, 4266, - 0xF2, 4260, - 0x66, 4254, - 0x0, 4248, - /*4248*/ uint16(xSetOp), uint16(SUBPS), - /*4250*/ uint16(xReadSlashR), - /*4251*/ uint16(xArgXmm1), - /*4252*/ uint16(xArgXmm2M128), - /*4253*/ uint16(xMatch), - /*4254*/ uint16(xSetOp), uint16(SUBPD), - /*4256*/ uint16(xReadSlashR), - /*4257*/ uint16(xArgXmm1), - /*4258*/ uint16(xArgXmm2M128), - /*4259*/ uint16(xMatch), - /*4260*/ uint16(xSetOp), uint16(SUBSD), - /*4262*/ uint16(xReadSlashR), - /*4263*/ uint16(xArgXmm1), - /*4264*/ uint16(xArgXmm2M64), - /*4265*/ uint16(xMatch), - /*4266*/ uint16(xSetOp), uint16(SUBSS), - /*4268*/ uint16(xReadSlashR), - /*4269*/ uint16(xArgXmm1), - /*4270*/ uint16(xArgXmm2M32), - /*4271*/ uint16(xMatch), - /*4272*/ uint16(xCondPrefix), 4, - 0xF3, 4300, - 0xF2, 4294, - 0x66, 4288, - 0x0, 4282, - /*4282*/ uint16(xSetOp), uint16(MINPS), - /*4284*/ uint16(xReadSlashR), - /*4285*/ uint16(xArgXmm1), - /*4286*/ uint16(xArgXmm2M128), - /*4287*/ uint16(xMatch), - /*4288*/ uint16(xSetOp), uint16(MINPD), - /*4290*/ uint16(xReadSlashR), - /*4291*/ uint16(xArgXmm1), - /*4292*/ uint16(xArgXmm2M128), - /*4293*/ uint16(xMatch), - /*4294*/ uint16(xSetOp), uint16(MINSD), - /*4296*/ uint16(xReadSlashR), - /*4297*/ uint16(xArgXmm1), - /*4298*/ uint16(xArgXmm2M64), - /*4299*/ uint16(xMatch), - /*4300*/ uint16(xSetOp), uint16(MINSS), - /*4302*/ uint16(xReadSlashR), - /*4303*/ uint16(xArgXmm1), - /*4304*/ uint16(xArgXmm2M32), - /*4305*/ uint16(xMatch), - /*4306*/ uint16(xCondPrefix), 4, - 0xF3, 4334, - 0xF2, 4328, - 0x66, 4322, - 0x0, 4316, - /*4316*/ uint16(xSetOp), uint16(DIVPS), - /*4318*/ uint16(xReadSlashR), - /*4319*/ uint16(xArgXmm1), - /*4320*/ uint16(xArgXmm2M128), - /*4321*/ uint16(xMatch), - /*4322*/ uint16(xSetOp), uint16(DIVPD), - /*4324*/ uint16(xReadSlashR), - /*4325*/ uint16(xArgXmm1), - /*4326*/ uint16(xArgXmm2M128), - /*4327*/ uint16(xMatch), - /*4328*/ uint16(xSetOp), uint16(DIVSD), - /*4330*/ uint16(xReadSlashR), - /*4331*/ uint16(xArgXmm1), - /*4332*/ uint16(xArgXmm2M64), - /*4333*/ uint16(xMatch), - /*4334*/ uint16(xSetOp), uint16(DIVSS), - /*4336*/ uint16(xReadSlashR), - /*4337*/ uint16(xArgXmm1), - /*4338*/ uint16(xArgXmm2M32), - /*4339*/ uint16(xMatch), - /*4340*/ uint16(xCondPrefix), 4, - 0xF3, 4368, - 0xF2, 4362, - 0x66, 4356, - 0x0, 4350, - /*4350*/ uint16(xSetOp), uint16(MAXPS), - /*4352*/ uint16(xReadSlashR), - /*4353*/ uint16(xArgXmm1), - /*4354*/ uint16(xArgXmm2M128), - /*4355*/ uint16(xMatch), - /*4356*/ uint16(xSetOp), uint16(MAXPD), - /*4358*/ uint16(xReadSlashR), - /*4359*/ uint16(xArgXmm1), - /*4360*/ uint16(xArgXmm2M128), - /*4361*/ uint16(xMatch), - /*4362*/ uint16(xSetOp), uint16(MAXSD), - /*4364*/ uint16(xReadSlashR), - /*4365*/ uint16(xArgXmm1), - /*4366*/ uint16(xArgXmm2M64), - /*4367*/ uint16(xMatch), - /*4368*/ uint16(xSetOp), uint16(MAXSS), - /*4370*/ uint16(xReadSlashR), - /*4371*/ uint16(xArgXmm1), - /*4372*/ uint16(xArgXmm2M32), - /*4373*/ uint16(xMatch), - /*4374*/ uint16(xCondPrefix), 2, - 0x66, 4386, - 0x0, 4380, - /*4380*/ uint16(xSetOp), uint16(PUNPCKLBW), - /*4382*/ uint16(xReadSlashR), - /*4383*/ uint16(xArgMm), - /*4384*/ uint16(xArgMmM32), - /*4385*/ uint16(xMatch), - /*4386*/ uint16(xSetOp), uint16(PUNPCKLBW), - /*4388*/ uint16(xReadSlashR), - /*4389*/ uint16(xArgXmm1), - /*4390*/ uint16(xArgXmm2M128), - /*4391*/ uint16(xMatch), - /*4392*/ uint16(xCondPrefix), 2, - 0x66, 4404, - 0x0, 4398, - /*4398*/ uint16(xSetOp), uint16(PUNPCKLWD), - /*4400*/ uint16(xReadSlashR), - /*4401*/ uint16(xArgMm), - /*4402*/ uint16(xArgMmM32), - /*4403*/ uint16(xMatch), - /*4404*/ uint16(xSetOp), uint16(PUNPCKLWD), - /*4406*/ uint16(xReadSlashR), - /*4407*/ uint16(xArgXmm1), - /*4408*/ uint16(xArgXmm2M128), - /*4409*/ uint16(xMatch), - /*4410*/ uint16(xCondPrefix), 2, - 0x66, 4422, - 0x0, 4416, - /*4416*/ uint16(xSetOp), uint16(PUNPCKLDQ), - /*4418*/ uint16(xReadSlashR), - /*4419*/ uint16(xArgMm), - /*4420*/ uint16(xArgMmM32), - /*4421*/ uint16(xMatch), - /*4422*/ uint16(xSetOp), uint16(PUNPCKLDQ), - /*4424*/ uint16(xReadSlashR), - /*4425*/ uint16(xArgXmm1), - /*4426*/ uint16(xArgXmm2M128), - /*4427*/ uint16(xMatch), - /*4428*/ uint16(xCondPrefix), 2, - 0x66, 4440, - 0x0, 4434, - /*4434*/ uint16(xSetOp), uint16(PACKSSWB), - /*4436*/ uint16(xReadSlashR), - /*4437*/ uint16(xArgMm1), - /*4438*/ uint16(xArgMm2M64), - /*4439*/ uint16(xMatch), - /*4440*/ uint16(xSetOp), uint16(PACKSSWB), - /*4442*/ uint16(xReadSlashR), - /*4443*/ uint16(xArgXmm1), - /*4444*/ uint16(xArgXmm2M128), - /*4445*/ uint16(xMatch), - /*4446*/ uint16(xCondPrefix), 2, - 0x66, 4458, - 0x0, 4452, - /*4452*/ uint16(xSetOp), uint16(PCMPGTB), - /*4454*/ uint16(xReadSlashR), - /*4455*/ uint16(xArgMm), - /*4456*/ uint16(xArgMmM64), - /*4457*/ uint16(xMatch), - /*4458*/ uint16(xSetOp), uint16(PCMPGTB), - /*4460*/ uint16(xReadSlashR), - /*4461*/ uint16(xArgXmm1), - /*4462*/ uint16(xArgXmm2M128), - /*4463*/ uint16(xMatch), - /*4464*/ uint16(xCondPrefix), 2, - 0x66, 4476, - 0x0, 4470, - /*4470*/ uint16(xSetOp), uint16(PCMPGTW), - /*4472*/ uint16(xReadSlashR), - /*4473*/ uint16(xArgMm), - /*4474*/ uint16(xArgMmM64), - /*4475*/ uint16(xMatch), - /*4476*/ uint16(xSetOp), uint16(PCMPGTW), - /*4478*/ uint16(xReadSlashR), - /*4479*/ uint16(xArgXmm1), - /*4480*/ uint16(xArgXmm2M128), - /*4481*/ uint16(xMatch), - /*4482*/ uint16(xCondPrefix), 2, - 0x66, 4494, - 0x0, 4488, - /*4488*/ uint16(xSetOp), uint16(PCMPGTD), - /*4490*/ uint16(xReadSlashR), - /*4491*/ uint16(xArgMm), - /*4492*/ uint16(xArgMmM64), - /*4493*/ uint16(xMatch), - /*4494*/ uint16(xSetOp), uint16(PCMPGTD), - /*4496*/ uint16(xReadSlashR), - /*4497*/ uint16(xArgXmm1), - /*4498*/ uint16(xArgXmm2M128), - /*4499*/ uint16(xMatch), - /*4500*/ uint16(xCondPrefix), 2, - 0x66, 4512, - 0x0, 4506, - /*4506*/ uint16(xSetOp), uint16(PACKUSWB), - /*4508*/ uint16(xReadSlashR), - /*4509*/ uint16(xArgMm), - /*4510*/ uint16(xArgMmM64), - /*4511*/ uint16(xMatch), - /*4512*/ uint16(xSetOp), uint16(PACKUSWB), - /*4514*/ uint16(xReadSlashR), - /*4515*/ uint16(xArgXmm1), - /*4516*/ uint16(xArgXmm2M128), - /*4517*/ uint16(xMatch), - /*4518*/ uint16(xCondPrefix), 2, - 0x66, 4530, - 0x0, 4524, - /*4524*/ uint16(xSetOp), uint16(PUNPCKHBW), - /*4526*/ uint16(xReadSlashR), - /*4527*/ uint16(xArgMm), - /*4528*/ uint16(xArgMmM64), - /*4529*/ uint16(xMatch), - /*4530*/ uint16(xSetOp), uint16(PUNPCKHBW), - /*4532*/ uint16(xReadSlashR), - /*4533*/ uint16(xArgXmm1), - /*4534*/ uint16(xArgXmm2M128), - /*4535*/ uint16(xMatch), - /*4536*/ uint16(xCondPrefix), 2, - 0x66, 4548, - 0x0, 4542, - /*4542*/ uint16(xSetOp), uint16(PUNPCKHWD), - /*4544*/ uint16(xReadSlashR), - /*4545*/ uint16(xArgMm), - /*4546*/ uint16(xArgMmM64), - /*4547*/ uint16(xMatch), - /*4548*/ uint16(xSetOp), uint16(PUNPCKHWD), - /*4550*/ uint16(xReadSlashR), - /*4551*/ uint16(xArgXmm1), - /*4552*/ uint16(xArgXmm2M128), - /*4553*/ uint16(xMatch), - /*4554*/ uint16(xCondPrefix), 2, - 0x66, 4566, - 0x0, 4560, - /*4560*/ uint16(xSetOp), uint16(PUNPCKHDQ), - /*4562*/ uint16(xReadSlashR), - /*4563*/ uint16(xArgMm), - /*4564*/ uint16(xArgMmM64), - /*4565*/ uint16(xMatch), - /*4566*/ uint16(xSetOp), uint16(PUNPCKHDQ), - /*4568*/ uint16(xReadSlashR), - /*4569*/ uint16(xArgXmm1), - /*4570*/ uint16(xArgXmm2M128), - /*4571*/ uint16(xMatch), - /*4572*/ uint16(xCondPrefix), 2, - 0x66, 4584, - 0x0, 4578, - /*4578*/ uint16(xSetOp), uint16(PACKSSDW), - /*4580*/ uint16(xReadSlashR), - /*4581*/ uint16(xArgMm1), - /*4582*/ uint16(xArgMm2M64), - /*4583*/ uint16(xMatch), - /*4584*/ uint16(xSetOp), uint16(PACKSSDW), - /*4586*/ uint16(xReadSlashR), - /*4587*/ uint16(xArgXmm1), - /*4588*/ uint16(xArgXmm2M128), - /*4589*/ uint16(xMatch), - /*4590*/ uint16(xCondPrefix), 1, - 0x66, 4594, - /*4594*/ uint16(xSetOp), uint16(PUNPCKLQDQ), - /*4596*/ uint16(xReadSlashR), - /*4597*/ uint16(xArgXmm1), - /*4598*/ uint16(xArgXmm2M128), - /*4599*/ uint16(xMatch), - /*4600*/ uint16(xCondPrefix), 1, - 0x66, 4604, - /*4604*/ uint16(xSetOp), uint16(PUNPCKHQDQ), - /*4606*/ uint16(xReadSlashR), - /*4607*/ uint16(xArgXmm1), - /*4608*/ uint16(xArgXmm2M128), - /*4609*/ uint16(xMatch), - /*4610*/ uint16(xCondIs64), 4613, 4651, + /*3496*/ uint16(xReadIb), + /*3497*/ uint16(xArgXmm1), + /*3498*/ uint16(xArgXmm2M128), + /*3499*/ uint16(xArgImm8u), + /*3500*/ uint16(xMatch), + /*3501*/ uint16(xCondPrefix), 1, + 0x66, 3505, + /*3505*/ uint16(xSetOp), uint16(PCMPISTRM), + /*3507*/ uint16(xReadSlashR), + /*3508*/ uint16(xReadIb), + /*3509*/ uint16(xArgXmm1), + /*3510*/ uint16(xArgXmm2M128), + /*3511*/ uint16(xArgImm8u), + /*3512*/ uint16(xMatch), + /*3513*/ uint16(xCondPrefix), 1, + 0x66, 3517, + /*3517*/ uint16(xSetOp), uint16(PCMPISTRI), + /*3519*/ uint16(xReadSlashR), + /*3520*/ uint16(xReadIb), + /*3521*/ uint16(xArgXmm1), + /*3522*/ uint16(xArgXmm2M128), + /*3523*/ uint16(xArgImm8u), + /*3524*/ uint16(xMatch), + /*3525*/ uint16(xSetOp), uint16(SHA1RNDS4), + /*3527*/ uint16(xReadSlashR), + /*3528*/ uint16(xReadIb), + /*3529*/ uint16(xArgXmm1), + /*3530*/ uint16(xArgXmm2M128), + /*3531*/ uint16(xArgImm8u), + /*3532*/ uint16(xMatch), + /*3533*/ uint16(xCondPrefix), 1, + 0x66, 3537, + /*3537*/ uint16(xSetOp), uint16(AESKEYGENASSIST), + /*3539*/ uint16(xReadSlashR), + /*3540*/ uint16(xReadIb), + /*3541*/ uint16(xArgXmm1), + /*3542*/ uint16(xArgXmm2M128), + /*3543*/ uint16(xArgImm8u), + /*3544*/ uint16(xMatch), + /*3545*/ uint16(xCondIs64), 3548, 3564, + /*3548*/ uint16(xCondDataSize), 3552, 3558, 0, + /*3552*/ uint16(xSetOp), uint16(CMOVO), + /*3554*/ uint16(xReadSlashR), + /*3555*/ uint16(xArgR16), + /*3556*/ uint16(xArgRM16), + /*3557*/ uint16(xMatch), + /*3558*/ uint16(xSetOp), uint16(CMOVO), + /*3560*/ uint16(xReadSlashR), + /*3561*/ uint16(xArgR32), + /*3562*/ uint16(xArgRM32), + /*3563*/ uint16(xMatch), + /*3564*/ uint16(xCondDataSize), 3552, 3558, 3568, + /*3568*/ uint16(xSetOp), uint16(CMOVO), + /*3570*/ uint16(xReadSlashR), + /*3571*/ uint16(xArgR64), + /*3572*/ uint16(xArgRM64), + /*3573*/ uint16(xMatch), + /*3574*/ uint16(xCondIs64), 3577, 3593, + /*3577*/ uint16(xCondDataSize), 3581, 3587, 0, + /*3581*/ uint16(xSetOp), uint16(CMOVNO), + /*3583*/ uint16(xReadSlashR), + /*3584*/ uint16(xArgR16), + /*3585*/ uint16(xArgRM16), + /*3586*/ uint16(xMatch), + /*3587*/ uint16(xSetOp), uint16(CMOVNO), + /*3589*/ uint16(xReadSlashR), + /*3590*/ uint16(xArgR32), + /*3591*/ uint16(xArgRM32), + /*3592*/ uint16(xMatch), + /*3593*/ uint16(xCondDataSize), 3581, 3587, 3597, + /*3597*/ uint16(xSetOp), uint16(CMOVNO), + /*3599*/ uint16(xReadSlashR), + /*3600*/ uint16(xArgR64), + /*3601*/ uint16(xArgRM64), + /*3602*/ uint16(xMatch), + /*3603*/ uint16(xCondIs64), 3606, 3622, + /*3606*/ uint16(xCondDataSize), 3610, 3616, 0, + /*3610*/ uint16(xSetOp), uint16(CMOVB), + /*3612*/ uint16(xReadSlashR), + /*3613*/ uint16(xArgR16), + /*3614*/ uint16(xArgRM16), + /*3615*/ uint16(xMatch), + /*3616*/ uint16(xSetOp), uint16(CMOVB), + /*3618*/ uint16(xReadSlashR), + /*3619*/ uint16(xArgR32), + /*3620*/ uint16(xArgRM32), + /*3621*/ uint16(xMatch), + /*3622*/ uint16(xCondDataSize), 3610, 3616, 3626, + /*3626*/ uint16(xSetOp), uint16(CMOVB), + /*3628*/ uint16(xReadSlashR), + /*3629*/ uint16(xArgR64), + /*3630*/ uint16(xArgRM64), + /*3631*/ uint16(xMatch), + /*3632*/ uint16(xCondIs64), 3635, 3651, + /*3635*/ uint16(xCondDataSize), 3639, 3645, 0, + /*3639*/ uint16(xSetOp), uint16(CMOVAE), + /*3641*/ uint16(xReadSlashR), + /*3642*/ uint16(xArgR16), + /*3643*/ uint16(xArgRM16), + /*3644*/ uint16(xMatch), + /*3645*/ uint16(xSetOp), uint16(CMOVAE), + /*3647*/ uint16(xReadSlashR), + /*3648*/ uint16(xArgR32), + /*3649*/ uint16(xArgRM32), + /*3650*/ uint16(xMatch), + /*3651*/ uint16(xCondDataSize), 3639, 3645, 3655, + /*3655*/ uint16(xSetOp), uint16(CMOVAE), + /*3657*/ uint16(xReadSlashR), + /*3658*/ uint16(xArgR64), + /*3659*/ uint16(xArgRM64), + /*3660*/ uint16(xMatch), + /*3661*/ uint16(xCondIs64), 3664, 3680, + /*3664*/ uint16(xCondDataSize), 3668, 3674, 0, + /*3668*/ uint16(xSetOp), uint16(CMOVE), + /*3670*/ uint16(xReadSlashR), + /*3671*/ uint16(xArgR16), + /*3672*/ uint16(xArgRM16), + /*3673*/ uint16(xMatch), + /*3674*/ uint16(xSetOp), uint16(CMOVE), + /*3676*/ uint16(xReadSlashR), + /*3677*/ uint16(xArgR32), + /*3678*/ uint16(xArgRM32), + /*3679*/ uint16(xMatch), + /*3680*/ uint16(xCondDataSize), 3668, 3674, 3684, + /*3684*/ uint16(xSetOp), uint16(CMOVE), + /*3686*/ uint16(xReadSlashR), + /*3687*/ uint16(xArgR64), + /*3688*/ uint16(xArgRM64), + /*3689*/ uint16(xMatch), + /*3690*/ uint16(xCondIs64), 3693, 3709, + /*3693*/ uint16(xCondDataSize), 3697, 3703, 0, + /*3697*/ uint16(xSetOp), uint16(CMOVNE), + /*3699*/ uint16(xReadSlashR), + /*3700*/ uint16(xArgR16), + /*3701*/ uint16(xArgRM16), + /*3702*/ uint16(xMatch), + /*3703*/ uint16(xSetOp), uint16(CMOVNE), + /*3705*/ uint16(xReadSlashR), + /*3706*/ uint16(xArgR32), + /*3707*/ uint16(xArgRM32), + /*3708*/ uint16(xMatch), + /*3709*/ uint16(xCondDataSize), 3697, 3703, 3713, + /*3713*/ uint16(xSetOp), uint16(CMOVNE), + /*3715*/ uint16(xReadSlashR), + /*3716*/ uint16(xArgR64), + /*3717*/ uint16(xArgRM64), + /*3718*/ uint16(xMatch), + /*3719*/ uint16(xCondIs64), 3722, 3738, + /*3722*/ uint16(xCondDataSize), 3726, 3732, 0, + /*3726*/ uint16(xSetOp), uint16(CMOVBE), + /*3728*/ uint16(xReadSlashR), + /*3729*/ uint16(xArgR16), + /*3730*/ uint16(xArgRM16), + /*3731*/ uint16(xMatch), + /*3732*/ uint16(xSetOp), uint16(CMOVBE), + /*3734*/ uint16(xReadSlashR), + /*3735*/ uint16(xArgR32), + /*3736*/ uint16(xArgRM32), + /*3737*/ uint16(xMatch), + /*3738*/ uint16(xCondDataSize), 3726, 3732, 3742, + /*3742*/ uint16(xSetOp), uint16(CMOVBE), + /*3744*/ uint16(xReadSlashR), + /*3745*/ uint16(xArgR64), + /*3746*/ uint16(xArgRM64), + /*3747*/ uint16(xMatch), + /*3748*/ uint16(xCondIs64), 3751, 3767, + /*3751*/ uint16(xCondDataSize), 3755, 3761, 0, + /*3755*/ uint16(xSetOp), uint16(CMOVA), + /*3757*/ uint16(xReadSlashR), + /*3758*/ uint16(xArgR16), + /*3759*/ uint16(xArgRM16), + /*3760*/ uint16(xMatch), + /*3761*/ uint16(xSetOp), uint16(CMOVA), + /*3763*/ uint16(xReadSlashR), + /*3764*/ uint16(xArgR32), + /*3765*/ uint16(xArgRM32), + /*3766*/ uint16(xMatch), + /*3767*/ uint16(xCondDataSize), 3755, 3761, 3771, + /*3771*/ uint16(xSetOp), uint16(CMOVA), + /*3773*/ uint16(xReadSlashR), + /*3774*/ uint16(xArgR64), + /*3775*/ uint16(xArgRM64), + /*3776*/ uint16(xMatch), + /*3777*/ uint16(xCondIs64), 3780, 3796, + /*3780*/ uint16(xCondDataSize), 3784, 3790, 0, + /*3784*/ uint16(xSetOp), uint16(CMOVS), + /*3786*/ uint16(xReadSlashR), + /*3787*/ uint16(xArgR16), + /*3788*/ uint16(xArgRM16), + /*3789*/ uint16(xMatch), + /*3790*/ uint16(xSetOp), uint16(CMOVS), + /*3792*/ uint16(xReadSlashR), + /*3793*/ uint16(xArgR32), + /*3794*/ uint16(xArgRM32), + /*3795*/ uint16(xMatch), + /*3796*/ uint16(xCondDataSize), 3784, 3790, 3800, + /*3800*/ uint16(xSetOp), uint16(CMOVS), + /*3802*/ uint16(xReadSlashR), + /*3803*/ uint16(xArgR64), + /*3804*/ uint16(xArgRM64), + /*3805*/ uint16(xMatch), + /*3806*/ uint16(xCondIs64), 3809, 3825, + /*3809*/ uint16(xCondDataSize), 3813, 3819, 0, + /*3813*/ uint16(xSetOp), uint16(CMOVNS), + /*3815*/ uint16(xReadSlashR), + /*3816*/ uint16(xArgR16), + /*3817*/ uint16(xArgRM16), + /*3818*/ uint16(xMatch), + /*3819*/ uint16(xSetOp), uint16(CMOVNS), + /*3821*/ uint16(xReadSlashR), + /*3822*/ uint16(xArgR32), + /*3823*/ uint16(xArgRM32), + /*3824*/ uint16(xMatch), + /*3825*/ uint16(xCondDataSize), 3813, 3819, 3829, + /*3829*/ uint16(xSetOp), uint16(CMOVNS), + /*3831*/ uint16(xReadSlashR), + /*3832*/ uint16(xArgR64), + /*3833*/ uint16(xArgRM64), + /*3834*/ uint16(xMatch), + /*3835*/ uint16(xCondIs64), 3838, 3854, + /*3838*/ uint16(xCondDataSize), 3842, 3848, 0, + /*3842*/ uint16(xSetOp), uint16(CMOVP), + /*3844*/ uint16(xReadSlashR), + /*3845*/ uint16(xArgR16), + /*3846*/ uint16(xArgRM16), + /*3847*/ uint16(xMatch), + /*3848*/ uint16(xSetOp), uint16(CMOVP), + /*3850*/ uint16(xReadSlashR), + /*3851*/ uint16(xArgR32), + /*3852*/ uint16(xArgRM32), + /*3853*/ uint16(xMatch), + /*3854*/ uint16(xCondDataSize), 3842, 3848, 3858, + /*3858*/ uint16(xSetOp), uint16(CMOVP), + /*3860*/ uint16(xReadSlashR), + /*3861*/ uint16(xArgR64), + /*3862*/ uint16(xArgRM64), + /*3863*/ uint16(xMatch), + /*3864*/ uint16(xCondIs64), 3867, 3883, + /*3867*/ uint16(xCondDataSize), 3871, 3877, 0, + /*3871*/ uint16(xSetOp), uint16(CMOVNP), + /*3873*/ uint16(xReadSlashR), + /*3874*/ uint16(xArgR16), + /*3875*/ uint16(xArgRM16), + /*3876*/ uint16(xMatch), + /*3877*/ uint16(xSetOp), uint16(CMOVNP), + /*3879*/ uint16(xReadSlashR), + /*3880*/ uint16(xArgR32), + /*3881*/ uint16(xArgRM32), + /*3882*/ uint16(xMatch), + /*3883*/ uint16(xCondDataSize), 3871, 3877, 3887, + /*3887*/ uint16(xSetOp), uint16(CMOVNP), + /*3889*/ uint16(xReadSlashR), + /*3890*/ uint16(xArgR64), + /*3891*/ uint16(xArgRM64), + /*3892*/ uint16(xMatch), + /*3893*/ uint16(xCondIs64), 3896, 3912, + /*3896*/ uint16(xCondDataSize), 3900, 3906, 0, + /*3900*/ uint16(xSetOp), uint16(CMOVL), + /*3902*/ uint16(xReadSlashR), + /*3903*/ uint16(xArgR16), + /*3904*/ uint16(xArgRM16), + /*3905*/ uint16(xMatch), + /*3906*/ uint16(xSetOp), uint16(CMOVL), + /*3908*/ uint16(xReadSlashR), + /*3909*/ uint16(xArgR32), + /*3910*/ uint16(xArgRM32), + /*3911*/ uint16(xMatch), + /*3912*/ uint16(xCondDataSize), 3900, 3906, 3916, + /*3916*/ uint16(xSetOp), uint16(CMOVL), + /*3918*/ uint16(xReadSlashR), + /*3919*/ uint16(xArgR64), + /*3920*/ uint16(xArgRM64), + /*3921*/ uint16(xMatch), + /*3922*/ uint16(xCondIs64), 3925, 3941, + /*3925*/ uint16(xCondDataSize), 3929, 3935, 0, + /*3929*/ uint16(xSetOp), uint16(CMOVGE), + /*3931*/ uint16(xReadSlashR), + /*3932*/ uint16(xArgR16), + /*3933*/ uint16(xArgRM16), + /*3934*/ uint16(xMatch), + /*3935*/ uint16(xSetOp), uint16(CMOVGE), + /*3937*/ uint16(xReadSlashR), + /*3938*/ uint16(xArgR32), + /*3939*/ uint16(xArgRM32), + /*3940*/ uint16(xMatch), + /*3941*/ uint16(xCondDataSize), 3929, 3935, 3945, + /*3945*/ uint16(xSetOp), uint16(CMOVGE), + /*3947*/ uint16(xReadSlashR), + /*3948*/ uint16(xArgR64), + /*3949*/ uint16(xArgRM64), + /*3950*/ uint16(xMatch), + /*3951*/ uint16(xCondIs64), 3954, 3970, + /*3954*/ uint16(xCondDataSize), 3958, 3964, 0, + /*3958*/ uint16(xSetOp), uint16(CMOVLE), + /*3960*/ uint16(xReadSlashR), + /*3961*/ uint16(xArgR16), + /*3962*/ uint16(xArgRM16), + /*3963*/ uint16(xMatch), + /*3964*/ uint16(xSetOp), uint16(CMOVLE), + /*3966*/ uint16(xReadSlashR), + /*3967*/ uint16(xArgR32), + /*3968*/ uint16(xArgRM32), + /*3969*/ uint16(xMatch), + /*3970*/ uint16(xCondDataSize), 3958, 3964, 3974, + /*3974*/ uint16(xSetOp), uint16(CMOVLE), + /*3976*/ uint16(xReadSlashR), + /*3977*/ uint16(xArgR64), + /*3978*/ uint16(xArgRM64), + /*3979*/ uint16(xMatch), + /*3980*/ uint16(xCondIs64), 3983, 3999, + /*3983*/ uint16(xCondDataSize), 3987, 3993, 0, + /*3987*/ uint16(xSetOp), uint16(CMOVG), + /*3989*/ uint16(xReadSlashR), + /*3990*/ uint16(xArgR16), + /*3991*/ uint16(xArgRM16), + /*3992*/ uint16(xMatch), + /*3993*/ uint16(xSetOp), uint16(CMOVG), + /*3995*/ uint16(xReadSlashR), + /*3996*/ uint16(xArgR32), + /*3997*/ uint16(xArgRM32), + /*3998*/ uint16(xMatch), + /*3999*/ uint16(xCondDataSize), 3987, 3993, 4003, + /*4003*/ uint16(xSetOp), uint16(CMOVG), + /*4005*/ uint16(xReadSlashR), + /*4006*/ uint16(xArgR64), + /*4007*/ uint16(xArgRM64), + /*4008*/ uint16(xMatch), + /*4009*/ uint16(xCondPrefix), 2, + 0x66, 4021, + 0x0, 4015, + /*4015*/ uint16(xSetOp), uint16(MOVMSKPS), + /*4017*/ uint16(xReadSlashR), + /*4018*/ uint16(xArgR32), + /*4019*/ uint16(xArgXmm2), + /*4020*/ uint16(xMatch), + /*4021*/ uint16(xSetOp), uint16(MOVMSKPD), + /*4023*/ uint16(xReadSlashR), + /*4024*/ uint16(xArgR32), + /*4025*/ uint16(xArgXmm2), + /*4026*/ uint16(xMatch), + /*4027*/ uint16(xCondPrefix), 4, + 0xF3, 4055, + 0xF2, 4049, + 0x66, 4043, + 0x0, 4037, + /*4037*/ uint16(xSetOp), uint16(SQRTPS), + /*4039*/ uint16(xReadSlashR), + /*4040*/ uint16(xArgXmm1), + /*4041*/ uint16(xArgXmm2M128), + /*4042*/ uint16(xMatch), + /*4043*/ uint16(xSetOp), uint16(SQRTPD), + /*4045*/ uint16(xReadSlashR), + /*4046*/ uint16(xArgXmm1), + /*4047*/ uint16(xArgXmm2M128), + /*4048*/ uint16(xMatch), + /*4049*/ uint16(xSetOp), uint16(SQRTSD), + /*4051*/ uint16(xReadSlashR), + /*4052*/ uint16(xArgXmm1), + /*4053*/ uint16(xArgXmm2M64), + /*4054*/ uint16(xMatch), + /*4055*/ uint16(xSetOp), uint16(SQRTSS), + /*4057*/ uint16(xReadSlashR), + /*4058*/ uint16(xArgXmm1), + /*4059*/ uint16(xArgXmm2M32), + /*4060*/ uint16(xMatch), + /*4061*/ uint16(xCondPrefix), 2, + 0xF3, 4073, + 0x0, 4067, + /*4067*/ uint16(xSetOp), uint16(RSQRTPS), + /*4069*/ uint16(xReadSlashR), + /*4070*/ uint16(xArgXmm1), + /*4071*/ uint16(xArgXmm2M128), + /*4072*/ uint16(xMatch), + /*4073*/ uint16(xSetOp), uint16(RSQRTSS), + /*4075*/ uint16(xReadSlashR), + /*4076*/ uint16(xArgXmm1), + /*4077*/ uint16(xArgXmm2M32), + /*4078*/ uint16(xMatch), + /*4079*/ uint16(xCondPrefix), 2, + 0xF3, 4091, + 0x0, 4085, + /*4085*/ uint16(xSetOp), uint16(RCPPS), + /*4087*/ uint16(xReadSlashR), + /*4088*/ uint16(xArgXmm1), + /*4089*/ uint16(xArgXmm2M128), + /*4090*/ uint16(xMatch), + /*4091*/ uint16(xSetOp), uint16(RCPSS), + /*4093*/ uint16(xReadSlashR), + /*4094*/ uint16(xArgXmm1), + /*4095*/ uint16(xArgXmm2M32), + /*4096*/ uint16(xMatch), + /*4097*/ uint16(xCondPrefix), 2, + 0x66, 4109, + 0x0, 4103, + /*4103*/ uint16(xSetOp), uint16(ANDPS), + /*4105*/ uint16(xReadSlashR), + /*4106*/ uint16(xArgXmm1), + /*4107*/ uint16(xArgXmm2M128), + /*4108*/ uint16(xMatch), + /*4109*/ uint16(xSetOp), uint16(ANDPD), + /*4111*/ uint16(xReadSlashR), + /*4112*/ uint16(xArgXmm1), + /*4113*/ uint16(xArgXmm2M128), + /*4114*/ uint16(xMatch), + /*4115*/ uint16(xCondPrefix), 2, + 0x66, 4127, + 0x0, 4121, + /*4121*/ uint16(xSetOp), uint16(ANDNPS), + /*4123*/ uint16(xReadSlashR), + /*4124*/ uint16(xArgXmm1), + /*4125*/ uint16(xArgXmm2M128), + /*4126*/ uint16(xMatch), + /*4127*/ uint16(xSetOp), uint16(ANDNPD), + /*4129*/ uint16(xReadSlashR), + /*4130*/ uint16(xArgXmm1), + /*4131*/ uint16(xArgXmm2M128), + /*4132*/ uint16(xMatch), + /*4133*/ uint16(xCondPrefix), 2, + 0x66, 4145, + 0x0, 4139, + /*4139*/ uint16(xSetOp), uint16(ORPS), + /*4141*/ uint16(xReadSlashR), + /*4142*/ uint16(xArgXmm1), + /*4143*/ uint16(xArgXmm2M128), + /*4144*/ uint16(xMatch), + /*4145*/ uint16(xSetOp), uint16(ORPD), + /*4147*/ uint16(xReadSlashR), + /*4148*/ uint16(xArgXmm1), + /*4149*/ uint16(xArgXmm2M128), + /*4150*/ uint16(xMatch), + /*4151*/ uint16(xCondPrefix), 2, + 0x66, 4163, + 0x0, 4157, + /*4157*/ uint16(xSetOp), uint16(XORPS), + /*4159*/ uint16(xReadSlashR), + /*4160*/ uint16(xArgXmm1), + /*4161*/ uint16(xArgXmm2M128), + /*4162*/ uint16(xMatch), + /*4163*/ uint16(xSetOp), uint16(XORPD), + /*4165*/ uint16(xReadSlashR), + /*4166*/ uint16(xArgXmm1), + /*4167*/ uint16(xArgXmm2M128), + /*4168*/ uint16(xMatch), + /*4169*/ uint16(xCondPrefix), 4, + 0xF3, 4197, + 0xF2, 4191, + 0x66, 4185, + 0x0, 4179, + /*4179*/ uint16(xSetOp), uint16(ADDPS), + /*4181*/ uint16(xReadSlashR), + /*4182*/ uint16(xArgXmm1), + /*4183*/ uint16(xArgXmm2M128), + /*4184*/ uint16(xMatch), + /*4185*/ uint16(xSetOp), uint16(ADDPD), + /*4187*/ uint16(xReadSlashR), + /*4188*/ uint16(xArgXmm1), + /*4189*/ uint16(xArgXmm2M128), + /*4190*/ uint16(xMatch), + /*4191*/ uint16(xSetOp), uint16(ADDSD), + /*4193*/ uint16(xReadSlashR), + /*4194*/ uint16(xArgXmm1), + /*4195*/ uint16(xArgXmm2M64), + /*4196*/ uint16(xMatch), + /*4197*/ uint16(xSetOp), uint16(ADDSS), + /*4199*/ uint16(xReadSlashR), + /*4200*/ uint16(xArgXmm1), + /*4201*/ uint16(xArgXmm2M32), + /*4202*/ uint16(xMatch), + /*4203*/ uint16(xCondPrefix), 4, + 0xF3, 4231, + 0xF2, 4225, + 0x66, 4219, + 0x0, 4213, + /*4213*/ uint16(xSetOp), uint16(MULPS), + /*4215*/ uint16(xReadSlashR), + /*4216*/ uint16(xArgXmm1), + /*4217*/ uint16(xArgXmm2M128), + /*4218*/ uint16(xMatch), + /*4219*/ uint16(xSetOp), uint16(MULPD), + /*4221*/ uint16(xReadSlashR), + /*4222*/ uint16(xArgXmm1), + /*4223*/ uint16(xArgXmm2M128), + /*4224*/ uint16(xMatch), + /*4225*/ uint16(xSetOp), uint16(MULSD), + /*4227*/ uint16(xReadSlashR), + /*4228*/ uint16(xArgXmm1), + /*4229*/ uint16(xArgXmm2M64), + /*4230*/ uint16(xMatch), + /*4231*/ uint16(xSetOp), uint16(MULSS), + /*4233*/ uint16(xReadSlashR), + /*4234*/ uint16(xArgXmm1), + /*4235*/ uint16(xArgXmm2M32), + /*4236*/ uint16(xMatch), + /*4237*/ uint16(xCondPrefix), 4, + 0xF3, 4265, + 0xF2, 4259, + 0x66, 4253, + 0x0, 4247, + /*4247*/ uint16(xSetOp), uint16(CVTPS2PD), + /*4249*/ uint16(xReadSlashR), + /*4250*/ uint16(xArgXmm1), + /*4251*/ uint16(xArgXmm2M64), + /*4252*/ uint16(xMatch), + /*4253*/ uint16(xSetOp), uint16(CVTPD2PS), + /*4255*/ uint16(xReadSlashR), + /*4256*/ uint16(xArgXmm1), + /*4257*/ uint16(xArgXmm2M128), + /*4258*/ uint16(xMatch), + /*4259*/ uint16(xSetOp), uint16(CVTSD2SS), + /*4261*/ uint16(xReadSlashR), + /*4262*/ uint16(xArgXmm1), + /*4263*/ uint16(xArgXmm2M64), + /*4264*/ uint16(xMatch), + /*4265*/ uint16(xSetOp), uint16(CVTSS2SD), + /*4267*/ uint16(xReadSlashR), + /*4268*/ uint16(xArgXmm1), + /*4269*/ uint16(xArgXmm2M32), + /*4270*/ uint16(xMatch), + /*4271*/ uint16(xCondPrefix), 3, + 0xF3, 4291, + 0x66, 4285, + 0x0, 4279, + /*4279*/ uint16(xSetOp), uint16(CVTDQ2PS), + /*4281*/ uint16(xReadSlashR), + /*4282*/ uint16(xArgXmm1), + /*4283*/ uint16(xArgXmm2M128), + /*4284*/ uint16(xMatch), + /*4285*/ uint16(xSetOp), uint16(CVTPS2DQ), + /*4287*/ uint16(xReadSlashR), + /*4288*/ uint16(xArgXmm1), + /*4289*/ uint16(xArgXmm2M128), + /*4290*/ uint16(xMatch), + /*4291*/ uint16(xSetOp), uint16(CVTTPS2DQ), + /*4293*/ uint16(xReadSlashR), + /*4294*/ uint16(xArgXmm1), + /*4295*/ uint16(xArgXmm2M128), + /*4296*/ uint16(xMatch), + /*4297*/ uint16(xCondPrefix), 4, + 0xF3, 4325, + 0xF2, 4319, + 0x66, 4313, + 0x0, 4307, + /*4307*/ uint16(xSetOp), uint16(SUBPS), + /*4309*/ uint16(xReadSlashR), + /*4310*/ uint16(xArgXmm1), + /*4311*/ uint16(xArgXmm2M128), + /*4312*/ uint16(xMatch), + /*4313*/ uint16(xSetOp), uint16(SUBPD), + /*4315*/ uint16(xReadSlashR), + /*4316*/ uint16(xArgXmm1), + /*4317*/ uint16(xArgXmm2M128), + /*4318*/ uint16(xMatch), + /*4319*/ uint16(xSetOp), uint16(SUBSD), + /*4321*/ uint16(xReadSlashR), + /*4322*/ uint16(xArgXmm1), + /*4323*/ uint16(xArgXmm2M64), + /*4324*/ uint16(xMatch), + /*4325*/ uint16(xSetOp), uint16(SUBSS), + /*4327*/ uint16(xReadSlashR), + /*4328*/ uint16(xArgXmm1), + /*4329*/ uint16(xArgXmm2M32), + /*4330*/ uint16(xMatch), + /*4331*/ uint16(xCondPrefix), 4, + 0xF3, 4359, + 0xF2, 4353, + 0x66, 4347, + 0x0, 4341, + /*4341*/ uint16(xSetOp), uint16(MINPS), + /*4343*/ uint16(xReadSlashR), + /*4344*/ uint16(xArgXmm1), + /*4345*/ uint16(xArgXmm2M128), + /*4346*/ uint16(xMatch), + /*4347*/ uint16(xSetOp), uint16(MINPD), + /*4349*/ uint16(xReadSlashR), + /*4350*/ uint16(xArgXmm1), + /*4351*/ uint16(xArgXmm2M128), + /*4352*/ uint16(xMatch), + /*4353*/ uint16(xSetOp), uint16(MINSD), + /*4355*/ uint16(xReadSlashR), + /*4356*/ uint16(xArgXmm1), + /*4357*/ uint16(xArgXmm2M64), + /*4358*/ uint16(xMatch), + /*4359*/ uint16(xSetOp), uint16(MINSS), + /*4361*/ uint16(xReadSlashR), + /*4362*/ uint16(xArgXmm1), + /*4363*/ uint16(xArgXmm2M32), + /*4364*/ uint16(xMatch), + /*4365*/ uint16(xCondPrefix), 4, + 0xF3, 4393, + 0xF2, 4387, + 0x66, 4381, + 0x0, 4375, + /*4375*/ uint16(xSetOp), uint16(DIVPS), + /*4377*/ uint16(xReadSlashR), + /*4378*/ uint16(xArgXmm1), + /*4379*/ uint16(xArgXmm2M128), + /*4380*/ uint16(xMatch), + /*4381*/ uint16(xSetOp), uint16(DIVPD), + /*4383*/ uint16(xReadSlashR), + /*4384*/ uint16(xArgXmm1), + /*4385*/ uint16(xArgXmm2M128), + /*4386*/ uint16(xMatch), + /*4387*/ uint16(xSetOp), uint16(DIVSD), + /*4389*/ uint16(xReadSlashR), + /*4390*/ uint16(xArgXmm1), + /*4391*/ uint16(xArgXmm2M64), + /*4392*/ uint16(xMatch), + /*4393*/ uint16(xSetOp), uint16(DIVSS), + /*4395*/ uint16(xReadSlashR), + /*4396*/ uint16(xArgXmm1), + /*4397*/ uint16(xArgXmm2M32), + /*4398*/ uint16(xMatch), + /*4399*/ uint16(xCondPrefix), 4, + 0xF3, 4427, + 0xF2, 4421, + 0x66, 4415, + 0x0, 4409, + /*4409*/ uint16(xSetOp), uint16(MAXPS), + /*4411*/ uint16(xReadSlashR), + /*4412*/ uint16(xArgXmm1), + /*4413*/ uint16(xArgXmm2M128), + /*4414*/ uint16(xMatch), + /*4415*/ uint16(xSetOp), uint16(MAXPD), + /*4417*/ uint16(xReadSlashR), + /*4418*/ uint16(xArgXmm1), + /*4419*/ uint16(xArgXmm2M128), + /*4420*/ uint16(xMatch), + /*4421*/ uint16(xSetOp), uint16(MAXSD), + /*4423*/ uint16(xReadSlashR), + /*4424*/ uint16(xArgXmm1), + /*4425*/ uint16(xArgXmm2M64), + /*4426*/ uint16(xMatch), + /*4427*/ uint16(xSetOp), uint16(MAXSS), + /*4429*/ uint16(xReadSlashR), + /*4430*/ uint16(xArgXmm1), + /*4431*/ uint16(xArgXmm2M32), + /*4432*/ uint16(xMatch), + /*4433*/ uint16(xCondPrefix), 2, + 0x66, 4445, + 0x0, 4439, + /*4439*/ uint16(xSetOp), uint16(PUNPCKLBW), + /*4441*/ uint16(xReadSlashR), + /*4442*/ uint16(xArgMm), + /*4443*/ uint16(xArgMmM32), + /*4444*/ uint16(xMatch), + /*4445*/ uint16(xSetOp), uint16(PUNPCKLBW), + /*4447*/ uint16(xReadSlashR), + /*4448*/ uint16(xArgXmm1), + /*4449*/ uint16(xArgXmm2M128), + /*4450*/ uint16(xMatch), + /*4451*/ uint16(xCondPrefix), 2, + 0x66, 4463, + 0x0, 4457, + /*4457*/ uint16(xSetOp), uint16(PUNPCKLWD), + /*4459*/ uint16(xReadSlashR), + /*4460*/ uint16(xArgMm), + /*4461*/ uint16(xArgMmM32), + /*4462*/ uint16(xMatch), + /*4463*/ uint16(xSetOp), uint16(PUNPCKLWD), + /*4465*/ uint16(xReadSlashR), + /*4466*/ uint16(xArgXmm1), + /*4467*/ uint16(xArgXmm2M128), + /*4468*/ uint16(xMatch), + /*4469*/ uint16(xCondPrefix), 2, + 0x66, 4481, + 0x0, 4475, + /*4475*/ uint16(xSetOp), uint16(PUNPCKLDQ), + /*4477*/ uint16(xReadSlashR), + /*4478*/ uint16(xArgMm), + /*4479*/ uint16(xArgMmM32), + /*4480*/ uint16(xMatch), + /*4481*/ uint16(xSetOp), uint16(PUNPCKLDQ), + /*4483*/ uint16(xReadSlashR), + /*4484*/ uint16(xArgXmm1), + /*4485*/ uint16(xArgXmm2M128), + /*4486*/ uint16(xMatch), + /*4487*/ uint16(xCondPrefix), 2, + 0x66, 4499, + 0x0, 4493, + /*4493*/ uint16(xSetOp), uint16(PACKSSWB), + /*4495*/ uint16(xReadSlashR), + /*4496*/ uint16(xArgMm1), + /*4497*/ uint16(xArgMm2M64), + /*4498*/ uint16(xMatch), + /*4499*/ uint16(xSetOp), uint16(PACKSSWB), + /*4501*/ uint16(xReadSlashR), + /*4502*/ uint16(xArgXmm1), + /*4503*/ uint16(xArgXmm2M128), + /*4504*/ uint16(xMatch), + /*4505*/ uint16(xCondPrefix), 2, + 0x66, 4517, + 0x0, 4511, + /*4511*/ uint16(xSetOp), uint16(PCMPGTB), + /*4513*/ uint16(xReadSlashR), + /*4514*/ uint16(xArgMm), + /*4515*/ uint16(xArgMmM64), + /*4516*/ uint16(xMatch), + /*4517*/ uint16(xSetOp), uint16(PCMPGTB), + /*4519*/ uint16(xReadSlashR), + /*4520*/ uint16(xArgXmm1), + /*4521*/ uint16(xArgXmm2M128), + /*4522*/ uint16(xMatch), + /*4523*/ uint16(xCondPrefix), 2, + 0x66, 4535, + 0x0, 4529, + /*4529*/ uint16(xSetOp), uint16(PCMPGTW), + /*4531*/ uint16(xReadSlashR), + /*4532*/ uint16(xArgMm), + /*4533*/ uint16(xArgMmM64), + /*4534*/ uint16(xMatch), + /*4535*/ uint16(xSetOp), uint16(PCMPGTW), + /*4537*/ uint16(xReadSlashR), + /*4538*/ uint16(xArgXmm1), + /*4539*/ uint16(xArgXmm2M128), + /*4540*/ uint16(xMatch), + /*4541*/ uint16(xCondPrefix), 2, + 0x66, 4553, + 0x0, 4547, + /*4547*/ uint16(xSetOp), uint16(PCMPGTD), + /*4549*/ uint16(xReadSlashR), + /*4550*/ uint16(xArgMm), + /*4551*/ uint16(xArgMmM64), + /*4552*/ uint16(xMatch), + /*4553*/ uint16(xSetOp), uint16(PCMPGTD), + /*4555*/ uint16(xReadSlashR), + /*4556*/ uint16(xArgXmm1), + /*4557*/ uint16(xArgXmm2M128), + /*4558*/ uint16(xMatch), + /*4559*/ uint16(xCondPrefix), 2, + 0x66, 4571, + 0x0, 4565, + /*4565*/ uint16(xSetOp), uint16(PACKUSWB), + /*4567*/ uint16(xReadSlashR), + /*4568*/ uint16(xArgMm), + /*4569*/ uint16(xArgMmM64), + /*4570*/ uint16(xMatch), + /*4571*/ uint16(xSetOp), uint16(PACKUSWB), + /*4573*/ uint16(xReadSlashR), + /*4574*/ uint16(xArgXmm1), + /*4575*/ uint16(xArgXmm2M128), + /*4576*/ uint16(xMatch), + /*4577*/ uint16(xCondPrefix), 2, + 0x66, 4589, + 0x0, 4583, + /*4583*/ uint16(xSetOp), uint16(PUNPCKHBW), + /*4585*/ uint16(xReadSlashR), + /*4586*/ uint16(xArgMm), + /*4587*/ uint16(xArgMmM64), + /*4588*/ uint16(xMatch), + /*4589*/ uint16(xSetOp), uint16(PUNPCKHBW), + /*4591*/ uint16(xReadSlashR), + /*4592*/ uint16(xArgXmm1), + /*4593*/ uint16(xArgXmm2M128), + /*4594*/ uint16(xMatch), + /*4595*/ uint16(xCondPrefix), 2, + 0x66, 4607, + 0x0, 4601, + /*4601*/ uint16(xSetOp), uint16(PUNPCKHWD), + /*4603*/ uint16(xReadSlashR), + /*4604*/ uint16(xArgMm), + /*4605*/ uint16(xArgMmM64), + /*4606*/ uint16(xMatch), + /*4607*/ uint16(xSetOp), uint16(PUNPCKHWD), + /*4609*/ uint16(xReadSlashR), + /*4610*/ uint16(xArgXmm1), + /*4611*/ uint16(xArgXmm2M128), + /*4612*/ uint16(xMatch), /*4613*/ uint16(xCondPrefix), 2, - 0x66, 4635, + 0x66, 4625, 0x0, 4619, - /*4619*/ uint16(xCondDataSize), 4623, 4629, 0, - /*4623*/ uint16(xSetOp), uint16(MOVD), - /*4625*/ uint16(xReadSlashR), - /*4626*/ uint16(xArgMm), - /*4627*/ uint16(xArgRM32), - /*4628*/ uint16(xMatch), - /*4629*/ uint16(xSetOp), uint16(MOVD), - /*4631*/ uint16(xReadSlashR), - /*4632*/ uint16(xArgMm), - /*4633*/ uint16(xArgRM32), - /*4634*/ uint16(xMatch), - /*4635*/ uint16(xCondDataSize), 4639, 4645, 0, - /*4639*/ uint16(xSetOp), uint16(MOVD), - /*4641*/ uint16(xReadSlashR), - /*4642*/ uint16(xArgXmm), - /*4643*/ uint16(xArgRM32), - /*4644*/ uint16(xMatch), - /*4645*/ uint16(xSetOp), uint16(MOVD), - /*4647*/ uint16(xReadSlashR), - /*4648*/ uint16(xArgXmm), - /*4649*/ uint16(xArgRM32), - /*4650*/ uint16(xMatch), - /*4651*/ uint16(xCondPrefix), 2, - 0x66, 4667, - 0x0, 4657, - /*4657*/ uint16(xCondDataSize), 4623, 4629, 4661, - /*4661*/ uint16(xSetOp), uint16(MOVQ), - /*4663*/ uint16(xReadSlashR), - /*4664*/ uint16(xArgMm), - /*4665*/ uint16(xArgRM64), - /*4666*/ uint16(xMatch), - /*4667*/ uint16(xCondDataSize), 4639, 4645, 4671, - /*4671*/ uint16(xSetOp), uint16(MOVQ), - /*4673*/ uint16(xReadSlashR), - /*4674*/ uint16(xArgXmm), - /*4675*/ uint16(xArgRM64), - /*4676*/ uint16(xMatch), - /*4677*/ uint16(xCondPrefix), 3, - 0xF3, 4697, - 0x66, 4691, - 0x0, 4685, - /*4685*/ uint16(xSetOp), uint16(MOVQ), - /*4687*/ uint16(xReadSlashR), - /*4688*/ uint16(xArgMm), - /*4689*/ uint16(xArgMmM64), - /*4690*/ uint16(xMatch), - /*4691*/ uint16(xSetOp), uint16(MOVDQA), - /*4693*/ uint16(xReadSlashR), - /*4694*/ uint16(xArgXmm1), - /*4695*/ uint16(xArgXmm2M128), - /*4696*/ uint16(xMatch), - /*4697*/ uint16(xSetOp), uint16(MOVDQU), - /*4699*/ uint16(xReadSlashR), - /*4700*/ uint16(xArgXmm1), - /*4701*/ uint16(xArgXmm2M128), - /*4702*/ uint16(xMatch), - /*4703*/ uint16(xCondPrefix), 4, - 0xF3, 4737, - 0xF2, 4729, - 0x66, 4721, - 0x0, 4713, - /*4713*/ uint16(xSetOp), uint16(PSHUFW), - /*4715*/ uint16(xReadSlashR), - /*4716*/ uint16(xReadIb), - /*4717*/ uint16(xArgMm1), - /*4718*/ uint16(xArgMm2M64), - /*4719*/ uint16(xArgImm8u), - /*4720*/ uint16(xMatch), - /*4721*/ uint16(xSetOp), uint16(PSHUFD), - /*4723*/ uint16(xReadSlashR), - /*4724*/ uint16(xReadIb), - /*4725*/ uint16(xArgXmm1), - /*4726*/ uint16(xArgXmm2M128), - /*4727*/ uint16(xArgImm8u), - /*4728*/ uint16(xMatch), - /*4729*/ uint16(xSetOp), uint16(PSHUFLW), - /*4731*/ uint16(xReadSlashR), - /*4732*/ uint16(xReadIb), - /*4733*/ uint16(xArgXmm1), - /*4734*/ uint16(xArgXmm2M128), - /*4735*/ uint16(xArgImm8u), - /*4736*/ uint16(xMatch), - /*4737*/ uint16(xSetOp), uint16(PSHUFHW), - /*4739*/ uint16(xReadSlashR), - /*4740*/ uint16(xReadIb), - /*4741*/ uint16(xArgXmm1), - /*4742*/ uint16(xArgXmm2M128), - /*4743*/ uint16(xArgImm8u), - /*4744*/ uint16(xMatch), - /*4745*/ uint16(xCondSlashR), + /*4619*/ uint16(xSetOp), uint16(PUNPCKHDQ), + /*4621*/ uint16(xReadSlashR), + /*4622*/ uint16(xArgMm), + /*4623*/ uint16(xArgMmM64), + /*4624*/ uint16(xMatch), + /*4625*/ uint16(xSetOp), uint16(PUNPCKHDQ), + /*4627*/ uint16(xReadSlashR), + /*4628*/ uint16(xArgXmm1), + /*4629*/ uint16(xArgXmm2M128), + /*4630*/ uint16(xMatch), + /*4631*/ uint16(xCondPrefix), 2, + 0x66, 4643, + 0x0, 4637, + /*4637*/ uint16(xSetOp), uint16(PACKSSDW), + /*4639*/ uint16(xReadSlashR), + /*4640*/ uint16(xArgMm1), + /*4641*/ uint16(xArgMm2M64), + /*4642*/ uint16(xMatch), + /*4643*/ uint16(xSetOp), uint16(PACKSSDW), + /*4645*/ uint16(xReadSlashR), + /*4646*/ uint16(xArgXmm1), + /*4647*/ uint16(xArgXmm2M128), + /*4648*/ uint16(xMatch), + /*4649*/ uint16(xCondPrefix), 1, + 0x66, 4653, + /*4653*/ uint16(xSetOp), uint16(PUNPCKLQDQ), + /*4655*/ uint16(xReadSlashR), + /*4656*/ uint16(xArgXmm1), + /*4657*/ uint16(xArgXmm2M128), + /*4658*/ uint16(xMatch), + /*4659*/ uint16(xCondPrefix), 1, + 0x66, 4663, + /*4663*/ uint16(xSetOp), uint16(PUNPCKHQDQ), + /*4665*/ uint16(xReadSlashR), + /*4666*/ uint16(xArgXmm1), + /*4667*/ uint16(xArgXmm2M128), + /*4668*/ uint16(xMatch), + /*4669*/ uint16(xCondIs64), 4672, 4710, + /*4672*/ uint16(xCondPrefix), 2, + 0x66, 4694, + 0x0, 4678, + /*4678*/ uint16(xCondDataSize), 4682, 4688, 0, + /*4682*/ uint16(xSetOp), uint16(MOVD), + /*4684*/ uint16(xReadSlashR), + /*4685*/ uint16(xArgMm), + /*4686*/ uint16(xArgRM32), + /*4687*/ uint16(xMatch), + /*4688*/ uint16(xSetOp), uint16(MOVD), + /*4690*/ uint16(xReadSlashR), + /*4691*/ uint16(xArgMm), + /*4692*/ uint16(xArgRM32), + /*4693*/ uint16(xMatch), + /*4694*/ uint16(xCondDataSize), 4698, 4704, 0, + /*4698*/ uint16(xSetOp), uint16(MOVD), + /*4700*/ uint16(xReadSlashR), + /*4701*/ uint16(xArgXmm), + /*4702*/ uint16(xArgRM32), + /*4703*/ uint16(xMatch), + /*4704*/ uint16(xSetOp), uint16(MOVD), + /*4706*/ uint16(xReadSlashR), + /*4707*/ uint16(xArgXmm), + /*4708*/ uint16(xArgRM32), + /*4709*/ uint16(xMatch), + /*4710*/ uint16(xCondPrefix), 2, + 0x66, 4726, + 0x0, 4716, + /*4716*/ uint16(xCondDataSize), 4682, 4688, 4720, + /*4720*/ uint16(xSetOp), uint16(MOVQ), + /*4722*/ uint16(xReadSlashR), + /*4723*/ uint16(xArgMm), + /*4724*/ uint16(xArgRM64), + /*4725*/ uint16(xMatch), + /*4726*/ uint16(xCondDataSize), 4698, 4704, 4730, + /*4730*/ uint16(xSetOp), uint16(MOVQ), + /*4732*/ uint16(xReadSlashR), + /*4733*/ uint16(xArgXmm), + /*4734*/ uint16(xArgRM64), + /*4735*/ uint16(xMatch), + /*4736*/ uint16(xCondPrefix), 3, + 0xF3, 4756, + 0x66, 4750, + 0x0, 4744, + /*4744*/ uint16(xSetOp), uint16(MOVQ), + /*4746*/ uint16(xReadSlashR), + /*4747*/ uint16(xArgMm), + /*4748*/ uint16(xArgMmM64), + /*4749*/ uint16(xMatch), + /*4750*/ uint16(xSetOp), uint16(MOVDQA), + /*4752*/ uint16(xReadSlashR), + /*4753*/ uint16(xArgXmm1), + /*4754*/ uint16(xArgXmm2M128), + /*4755*/ uint16(xMatch), + /*4756*/ uint16(xSetOp), uint16(MOVDQU), + /*4758*/ uint16(xReadSlashR), + /*4759*/ uint16(xArgXmm1), + /*4760*/ uint16(xArgXmm2M128), + /*4761*/ uint16(xMatch), + /*4762*/ uint16(xCondPrefix), 4, + 0xF3, 4796, + 0xF2, 4788, + 0x66, 4780, + 0x0, 4772, + /*4772*/ uint16(xSetOp), uint16(PSHUFW), + /*4774*/ uint16(xReadSlashR), + /*4775*/ uint16(xReadIb), + /*4776*/ uint16(xArgMm1), + /*4777*/ uint16(xArgMm2M64), + /*4778*/ uint16(xArgImm8u), + /*4779*/ uint16(xMatch), + /*4780*/ uint16(xSetOp), uint16(PSHUFD), + /*4782*/ uint16(xReadSlashR), + /*4783*/ uint16(xReadIb), + /*4784*/ uint16(xArgXmm1), + /*4785*/ uint16(xArgXmm2M128), + /*4786*/ uint16(xArgImm8u), + /*4787*/ uint16(xMatch), + /*4788*/ uint16(xSetOp), uint16(PSHUFLW), + /*4790*/ uint16(xReadSlashR), + /*4791*/ uint16(xReadIb), + /*4792*/ uint16(xArgXmm1), + /*4793*/ uint16(xArgXmm2M128), + /*4794*/ uint16(xArgImm8u), + /*4795*/ uint16(xMatch), + /*4796*/ uint16(xSetOp), uint16(PSHUFHW), + /*4798*/ uint16(xReadSlashR), + /*4799*/ uint16(xReadIb), + /*4800*/ uint16(xArgXmm1), + /*4801*/ uint16(xArgXmm2M128), + /*4802*/ uint16(xArgImm8u), + /*4803*/ uint16(xMatch), + /*4804*/ uint16(xCondSlashR), 0, // 0 0, // 1 - 4754, // 2 + 4813, // 2 0, // 3 - 4772, // 4 + 4831, // 4 0, // 5 - 4790, // 6 + 4849, // 6 0, // 7 - /*4754*/ uint16(xCondPrefix), 2, - 0x66, 4766, - 0x0, 4760, - /*4760*/ uint16(xSetOp), uint16(PSRLW), - /*4762*/ uint16(xReadIb), - /*4763*/ uint16(xArgMm2), - /*4764*/ uint16(xArgImm8u), - /*4765*/ uint16(xMatch), - /*4766*/ uint16(xSetOp), uint16(PSRLW), - /*4768*/ uint16(xReadIb), - /*4769*/ uint16(xArgXmm2), - /*4770*/ uint16(xArgImm8u), - /*4771*/ uint16(xMatch), - /*4772*/ uint16(xCondPrefix), 2, - 0x66, 4784, - 0x0, 4778, - /*4778*/ uint16(xSetOp), uint16(PSRAW), - /*4780*/ uint16(xReadIb), - /*4781*/ uint16(xArgMm2), - /*4782*/ uint16(xArgImm8u), - /*4783*/ uint16(xMatch), - /*4784*/ uint16(xSetOp), uint16(PSRAW), - /*4786*/ uint16(xReadIb), - /*4787*/ uint16(xArgXmm2), - /*4788*/ uint16(xArgImm8u), - /*4789*/ uint16(xMatch), - /*4790*/ uint16(xCondPrefix), 2, - 0x66, 4802, - 0x0, 4796, - /*4796*/ uint16(xSetOp), uint16(PSLLW), - /*4798*/ uint16(xReadIb), - /*4799*/ uint16(xArgMm2), - /*4800*/ uint16(xArgImm8u), - /*4801*/ uint16(xMatch), - /*4802*/ uint16(xSetOp), uint16(PSLLW), - /*4804*/ uint16(xReadIb), - /*4805*/ uint16(xArgXmm2), - /*4806*/ uint16(xArgImm8u), - /*4807*/ uint16(xMatch), - /*4808*/ uint16(xCondSlashR), + /*4813*/ uint16(xCondPrefix), 2, + 0x66, 4825, + 0x0, 4819, + /*4819*/ uint16(xSetOp), uint16(PSRLW), + /*4821*/ uint16(xReadIb), + /*4822*/ uint16(xArgMm2), + /*4823*/ uint16(xArgImm8u), + /*4824*/ uint16(xMatch), + /*4825*/ uint16(xSetOp), uint16(PSRLW), + /*4827*/ uint16(xReadIb), + /*4828*/ uint16(xArgXmm2), + /*4829*/ uint16(xArgImm8u), + /*4830*/ uint16(xMatch), + /*4831*/ uint16(xCondPrefix), 2, + 0x66, 4843, + 0x0, 4837, + /*4837*/ uint16(xSetOp), uint16(PSRAW), + /*4839*/ uint16(xReadIb), + /*4840*/ uint16(xArgMm2), + /*4841*/ uint16(xArgImm8u), + /*4842*/ uint16(xMatch), + /*4843*/ uint16(xSetOp), uint16(PSRAW), + /*4845*/ uint16(xReadIb), + /*4846*/ uint16(xArgXmm2), + /*4847*/ uint16(xArgImm8u), + /*4848*/ uint16(xMatch), + /*4849*/ uint16(xCondPrefix), 2, + 0x66, 4861, + 0x0, 4855, + /*4855*/ uint16(xSetOp), uint16(PSLLW), + /*4857*/ uint16(xReadIb), + /*4858*/ uint16(xArgMm2), + /*4859*/ uint16(xArgImm8u), + /*4860*/ uint16(xMatch), + /*4861*/ uint16(xSetOp), uint16(PSLLW), + /*4863*/ uint16(xReadIb), + /*4864*/ uint16(xArgXmm2), + /*4865*/ uint16(xArgImm8u), + /*4866*/ uint16(xMatch), + /*4867*/ uint16(xCondSlashR), 0, // 0 0, // 1 - 4817, // 2 + 4876, // 2 0, // 3 - 4835, // 4 + 4894, // 4 0, // 5 - 4853, // 6 + 4912, // 6 0, // 7 - /*4817*/ uint16(xCondPrefix), 2, - 0x66, 4829, - 0x0, 4823, - /*4823*/ uint16(xSetOp), uint16(PSRLD), - /*4825*/ uint16(xReadIb), - /*4826*/ uint16(xArgMm2), - /*4827*/ uint16(xArgImm8u), - /*4828*/ uint16(xMatch), - /*4829*/ uint16(xSetOp), uint16(PSRLD), - /*4831*/ uint16(xReadIb), - /*4832*/ uint16(xArgXmm2), - /*4833*/ uint16(xArgImm8u), - /*4834*/ uint16(xMatch), - /*4835*/ uint16(xCondPrefix), 2, - 0x66, 4847, - 0x0, 4841, - /*4841*/ uint16(xSetOp), uint16(PSRAD), - /*4843*/ uint16(xReadIb), - /*4844*/ uint16(xArgMm2), - /*4845*/ uint16(xArgImm8u), - /*4846*/ uint16(xMatch), - /*4847*/ uint16(xSetOp), uint16(PSRAD), - /*4849*/ uint16(xReadIb), - /*4850*/ uint16(xArgXmm2), - /*4851*/ uint16(xArgImm8u), - /*4852*/ uint16(xMatch), - /*4853*/ uint16(xCondPrefix), 2, - 0x66, 4865, - 0x0, 4859, - /*4859*/ uint16(xSetOp), uint16(PSLLD), - /*4861*/ uint16(xReadIb), - /*4862*/ uint16(xArgMm2), - /*4863*/ uint16(xArgImm8u), - /*4864*/ uint16(xMatch), - /*4865*/ uint16(xSetOp), uint16(PSLLD), - /*4867*/ uint16(xReadIb), - /*4868*/ uint16(xArgXmm2), - /*4869*/ uint16(xArgImm8u), - /*4870*/ uint16(xMatch), - /*4871*/ uint16(xCondSlashR), + /*4876*/ uint16(xCondPrefix), 2, + 0x66, 4888, + 0x0, 4882, + /*4882*/ uint16(xSetOp), uint16(PSRLD), + /*4884*/ uint16(xReadIb), + /*4885*/ uint16(xArgMm2), + /*4886*/ uint16(xArgImm8u), + /*4887*/ uint16(xMatch), + /*4888*/ uint16(xSetOp), uint16(PSRLD), + /*4890*/ uint16(xReadIb), + /*4891*/ uint16(xArgXmm2), + /*4892*/ uint16(xArgImm8u), + /*4893*/ uint16(xMatch), + /*4894*/ uint16(xCondPrefix), 2, + 0x66, 4906, + 0x0, 4900, + /*4900*/ uint16(xSetOp), uint16(PSRAD), + /*4902*/ uint16(xReadIb), + /*4903*/ uint16(xArgMm2), + /*4904*/ uint16(xArgImm8u), + /*4905*/ uint16(xMatch), + /*4906*/ uint16(xSetOp), uint16(PSRAD), + /*4908*/ uint16(xReadIb), + /*4909*/ uint16(xArgXmm2), + /*4910*/ uint16(xArgImm8u), + /*4911*/ uint16(xMatch), + /*4912*/ uint16(xCondPrefix), 2, + 0x66, 4924, + 0x0, 4918, + /*4918*/ uint16(xSetOp), uint16(PSLLD), + /*4920*/ uint16(xReadIb), + /*4921*/ uint16(xArgMm2), + /*4922*/ uint16(xArgImm8u), + /*4923*/ uint16(xMatch), + /*4924*/ uint16(xSetOp), uint16(PSLLD), + /*4926*/ uint16(xReadIb), + /*4927*/ uint16(xArgXmm2), + /*4928*/ uint16(xArgImm8u), + /*4929*/ uint16(xMatch), + /*4930*/ uint16(xCondSlashR), 0, // 0 0, // 1 - 4880, // 2 - 4898, // 3 + 4939, // 2 + 4957, // 3 0, // 4 0, // 5 - 4908, // 6 - 4926, // 7 - /*4880*/ uint16(xCondPrefix), 2, - 0x66, 4892, - 0x0, 4886, - /*4886*/ uint16(xSetOp), uint16(PSRLQ), - /*4888*/ uint16(xReadIb), - /*4889*/ uint16(xArgMm2), - /*4890*/ uint16(xArgImm8u), - /*4891*/ uint16(xMatch), - /*4892*/ uint16(xSetOp), uint16(PSRLQ), - /*4894*/ uint16(xReadIb), - /*4895*/ uint16(xArgXmm2), - /*4896*/ uint16(xArgImm8u), - /*4897*/ uint16(xMatch), - /*4898*/ uint16(xCondPrefix), 1, - 0x66, 4902, - /*4902*/ uint16(xSetOp), uint16(PSRLDQ), - /*4904*/ uint16(xReadIb), - /*4905*/ uint16(xArgXmm2), - /*4906*/ uint16(xArgImm8u), - /*4907*/ uint16(xMatch), - /*4908*/ uint16(xCondPrefix), 2, - 0x66, 4920, - 0x0, 4914, - /*4914*/ uint16(xSetOp), uint16(PSLLQ), - /*4916*/ uint16(xReadIb), - /*4917*/ uint16(xArgMm2), - /*4918*/ uint16(xArgImm8u), - /*4919*/ uint16(xMatch), - /*4920*/ uint16(xSetOp), uint16(PSLLQ), - /*4922*/ uint16(xReadIb), - /*4923*/ uint16(xArgXmm2), - /*4924*/ uint16(xArgImm8u), - /*4925*/ uint16(xMatch), - /*4926*/ uint16(xCondPrefix), 1, - 0x66, 4930, - /*4930*/ uint16(xSetOp), uint16(PSLLDQ), - /*4932*/ uint16(xReadIb), - /*4933*/ uint16(xArgXmm2), - /*4934*/ uint16(xArgImm8u), - /*4935*/ uint16(xMatch), - /*4936*/ uint16(xCondPrefix), 2, - 0x66, 4948, - 0x0, 4942, - /*4942*/ uint16(xSetOp), uint16(PCMPEQB), - /*4944*/ uint16(xReadSlashR), - /*4945*/ uint16(xArgMm), - /*4946*/ uint16(xArgMmM64), - /*4947*/ uint16(xMatch), - /*4948*/ uint16(xSetOp), uint16(PCMPEQB), - /*4950*/ uint16(xReadSlashR), - /*4951*/ uint16(xArgXmm1), - /*4952*/ uint16(xArgXmm2M128), - /*4953*/ uint16(xMatch), - /*4954*/ uint16(xCondPrefix), 2, - 0x66, 4966, - 0x0, 4960, - /*4960*/ uint16(xSetOp), uint16(PCMPEQW), - /*4962*/ uint16(xReadSlashR), - /*4963*/ uint16(xArgMm), - /*4964*/ uint16(xArgMmM64), - /*4965*/ uint16(xMatch), - /*4966*/ uint16(xSetOp), uint16(PCMPEQW), - /*4968*/ uint16(xReadSlashR), - /*4969*/ uint16(xArgXmm1), - /*4970*/ uint16(xArgXmm2M128), - /*4971*/ uint16(xMatch), - /*4972*/ uint16(xCondPrefix), 2, - 0x66, 4984, - 0x0, 4978, - /*4978*/ uint16(xSetOp), uint16(PCMPEQD), - /*4980*/ uint16(xReadSlashR), - /*4981*/ uint16(xArgMm), - /*4982*/ uint16(xArgMmM64), - /*4983*/ uint16(xMatch), - /*4984*/ uint16(xSetOp), uint16(PCMPEQD), - /*4986*/ uint16(xReadSlashR), - /*4987*/ uint16(xArgXmm1), - /*4988*/ uint16(xArgXmm2M128), - /*4989*/ uint16(xMatch), - /*4990*/ uint16(xSetOp), uint16(EMMS), - /*4992*/ uint16(xMatch), - /*4993*/ uint16(xCondPrefix), 2, - 0xF2, 5005, - 0x66, 4999, - /*4999*/ uint16(xSetOp), uint16(HADDPD), - /*5001*/ uint16(xReadSlashR), - /*5002*/ uint16(xArgXmm1), - /*5003*/ uint16(xArgXmm2M128), - /*5004*/ uint16(xMatch), - /*5005*/ uint16(xSetOp), uint16(HADDPS), - /*5007*/ uint16(xReadSlashR), - /*5008*/ uint16(xArgXmm1), - /*5009*/ uint16(xArgXmm2M128), - /*5010*/ uint16(xMatch), - /*5011*/ uint16(xCondPrefix), 2, - 0xF2, 5023, - 0x66, 5017, - /*5017*/ uint16(xSetOp), uint16(HSUBPD), - /*5019*/ uint16(xReadSlashR), - /*5020*/ uint16(xArgXmm1), - /*5021*/ uint16(xArgXmm2M128), - /*5022*/ uint16(xMatch), - /*5023*/ uint16(xSetOp), uint16(HSUBPS), - /*5025*/ uint16(xReadSlashR), - /*5026*/ uint16(xArgXmm1), - /*5027*/ uint16(xArgXmm2M128), - /*5028*/ uint16(xMatch), - /*5029*/ uint16(xCondIs64), 5032, 5078, - /*5032*/ uint16(xCondPrefix), 3, - 0xF3, 5072, - 0x66, 5056, - 0x0, 5040, - /*5040*/ uint16(xCondDataSize), 5044, 5050, 0, - /*5044*/ uint16(xSetOp), uint16(MOVD), - /*5046*/ uint16(xReadSlashR), - /*5047*/ uint16(xArgRM32), - /*5048*/ uint16(xArgMm), - /*5049*/ uint16(xMatch), - /*5050*/ uint16(xSetOp), uint16(MOVD), - /*5052*/ uint16(xReadSlashR), - /*5053*/ uint16(xArgRM32), - /*5054*/ uint16(xArgMm), - /*5055*/ uint16(xMatch), - /*5056*/ uint16(xCondDataSize), 5060, 5066, 0, - /*5060*/ uint16(xSetOp), uint16(MOVD), - /*5062*/ uint16(xReadSlashR), - /*5063*/ uint16(xArgRM32), - /*5064*/ uint16(xArgXmm), - /*5065*/ uint16(xMatch), - /*5066*/ uint16(xSetOp), uint16(MOVD), - /*5068*/ uint16(xReadSlashR), - /*5069*/ uint16(xArgRM32), - /*5070*/ uint16(xArgXmm), - /*5071*/ uint16(xMatch), - /*5072*/ uint16(xSetOp), uint16(MOVQ), - /*5074*/ uint16(xReadSlashR), - /*5075*/ uint16(xArgXmm1), - /*5076*/ uint16(xArgXmm2M64), - /*5077*/ uint16(xMatch), - /*5078*/ uint16(xCondPrefix), 3, - 0xF3, 5072, - 0x66, 5096, - 0x0, 5086, - /*5086*/ uint16(xCondDataSize), 5044, 5050, 5090, - /*5090*/ uint16(xSetOp), uint16(MOVQ), - /*5092*/ uint16(xReadSlashR), - /*5093*/ uint16(xArgRM64), - /*5094*/ uint16(xArgMm), - /*5095*/ uint16(xMatch), - /*5096*/ uint16(xCondDataSize), 5060, 5066, 5100, - /*5100*/ uint16(xSetOp), uint16(MOVQ), - /*5102*/ uint16(xReadSlashR), - /*5103*/ uint16(xArgRM64), - /*5104*/ uint16(xArgXmm), - /*5105*/ uint16(xMatch), - /*5106*/ uint16(xCondPrefix), 3, - 0xF3, 5126, - 0x66, 5120, - 0x0, 5114, - /*5114*/ uint16(xSetOp), uint16(MOVQ), - /*5116*/ uint16(xReadSlashR), - /*5117*/ uint16(xArgMmM64), - /*5118*/ uint16(xArgMm), - /*5119*/ uint16(xMatch), - /*5120*/ uint16(xSetOp), uint16(MOVDQA), - /*5122*/ uint16(xReadSlashR), - /*5123*/ uint16(xArgXmm2M128), - /*5124*/ uint16(xArgXmm1), - /*5125*/ uint16(xMatch), - /*5126*/ uint16(xSetOp), uint16(MOVDQU), - /*5128*/ uint16(xReadSlashR), - /*5129*/ uint16(xArgXmm2M128), - /*5130*/ uint16(xArgXmm1), - /*5131*/ uint16(xMatch), - /*5132*/ uint16(xCondIs64), 5135, 5149, - /*5135*/ uint16(xCondDataSize), 5139, 5144, 0, - /*5139*/ uint16(xSetOp), uint16(JO), - /*5141*/ uint16(xReadCw), - /*5142*/ uint16(xArgRel16), - /*5143*/ uint16(xMatch), - /*5144*/ uint16(xSetOp), uint16(JO), - /*5146*/ uint16(xReadCd), - /*5147*/ uint16(xArgRel32), - /*5148*/ uint16(xMatch), - /*5149*/ uint16(xCondDataSize), 5153, 5144, 5158, - /*5153*/ uint16(xSetOp), uint16(JO), - /*5155*/ uint16(xReadCd), - /*5156*/ uint16(xArgRel32), - /*5157*/ uint16(xMatch), - /*5158*/ uint16(xSetOp), uint16(JO), - /*5160*/ uint16(xReadCd), - /*5161*/ uint16(xArgRel32), - /*5162*/ uint16(xMatch), - /*5163*/ uint16(xCondIs64), 5166, 5180, - /*5166*/ uint16(xCondDataSize), 5170, 5175, 0, - /*5170*/ uint16(xSetOp), uint16(JNO), - /*5172*/ uint16(xReadCw), - /*5173*/ uint16(xArgRel16), - /*5174*/ uint16(xMatch), - /*5175*/ uint16(xSetOp), uint16(JNO), - /*5177*/ uint16(xReadCd), - /*5178*/ uint16(xArgRel32), - /*5179*/ uint16(xMatch), - /*5180*/ uint16(xCondDataSize), 5184, 5175, 5189, - /*5184*/ uint16(xSetOp), uint16(JNO), - /*5186*/ uint16(xReadCd), - /*5187*/ uint16(xArgRel32), - /*5188*/ uint16(xMatch), - /*5189*/ uint16(xSetOp), uint16(JNO), - /*5191*/ uint16(xReadCd), - /*5192*/ uint16(xArgRel32), - /*5193*/ uint16(xMatch), - /*5194*/ uint16(xCondIs64), 5197, 5211, - /*5197*/ uint16(xCondDataSize), 5201, 5206, 0, - /*5201*/ uint16(xSetOp), uint16(JB), - /*5203*/ uint16(xReadCw), - /*5204*/ uint16(xArgRel16), - /*5205*/ uint16(xMatch), - /*5206*/ uint16(xSetOp), uint16(JB), - /*5208*/ uint16(xReadCd), - /*5209*/ uint16(xArgRel32), - /*5210*/ uint16(xMatch), - /*5211*/ uint16(xCondDataSize), 5215, 5206, 5220, - /*5215*/ uint16(xSetOp), uint16(JB), - /*5217*/ uint16(xReadCd), - /*5218*/ uint16(xArgRel32), - /*5219*/ uint16(xMatch), - /*5220*/ uint16(xSetOp), uint16(JB), - /*5222*/ uint16(xReadCd), - /*5223*/ uint16(xArgRel32), - /*5224*/ uint16(xMatch), - /*5225*/ uint16(xCondIs64), 5228, 5242, - /*5228*/ uint16(xCondDataSize), 5232, 5237, 0, - /*5232*/ uint16(xSetOp), uint16(JAE), - /*5234*/ uint16(xReadCw), - /*5235*/ uint16(xArgRel16), - /*5236*/ uint16(xMatch), - /*5237*/ uint16(xSetOp), uint16(JAE), - /*5239*/ uint16(xReadCd), - /*5240*/ uint16(xArgRel32), - /*5241*/ uint16(xMatch), - /*5242*/ uint16(xCondDataSize), 5246, 5237, 5251, - /*5246*/ uint16(xSetOp), uint16(JAE), - /*5248*/ uint16(xReadCd), - /*5249*/ uint16(xArgRel32), - /*5250*/ uint16(xMatch), - /*5251*/ uint16(xSetOp), uint16(JAE), - /*5253*/ uint16(xReadCd), - /*5254*/ uint16(xArgRel32), - /*5255*/ uint16(xMatch), - /*5256*/ uint16(xCondIs64), 5259, 5273, - /*5259*/ uint16(xCondDataSize), 5263, 5268, 0, - /*5263*/ uint16(xSetOp), uint16(JE), - /*5265*/ uint16(xReadCw), - /*5266*/ uint16(xArgRel16), - /*5267*/ uint16(xMatch), - /*5268*/ uint16(xSetOp), uint16(JE), - /*5270*/ uint16(xReadCd), - /*5271*/ uint16(xArgRel32), - /*5272*/ uint16(xMatch), - /*5273*/ uint16(xCondDataSize), 5277, 5268, 5282, - /*5277*/ uint16(xSetOp), uint16(JE), - /*5279*/ uint16(xReadCd), - /*5280*/ uint16(xArgRel32), - /*5281*/ uint16(xMatch), - /*5282*/ uint16(xSetOp), uint16(JE), - /*5284*/ uint16(xReadCd), - /*5285*/ uint16(xArgRel32), - /*5286*/ uint16(xMatch), - /*5287*/ uint16(xCondIs64), 5290, 5304, - /*5290*/ uint16(xCondDataSize), 5294, 5299, 0, - /*5294*/ uint16(xSetOp), uint16(JNE), - /*5296*/ uint16(xReadCw), - /*5297*/ uint16(xArgRel16), - /*5298*/ uint16(xMatch), - /*5299*/ uint16(xSetOp), uint16(JNE), - /*5301*/ uint16(xReadCd), - /*5302*/ uint16(xArgRel32), - /*5303*/ uint16(xMatch), - /*5304*/ uint16(xCondDataSize), 5308, 5299, 5313, - /*5308*/ uint16(xSetOp), uint16(JNE), - /*5310*/ uint16(xReadCd), - /*5311*/ uint16(xArgRel32), - /*5312*/ uint16(xMatch), - /*5313*/ uint16(xSetOp), uint16(JNE), - /*5315*/ uint16(xReadCd), - /*5316*/ uint16(xArgRel32), - /*5317*/ uint16(xMatch), - /*5318*/ uint16(xCondIs64), 5321, 5335, - /*5321*/ uint16(xCondDataSize), 5325, 5330, 0, - /*5325*/ uint16(xSetOp), uint16(JBE), - /*5327*/ uint16(xReadCw), - /*5328*/ uint16(xArgRel16), - /*5329*/ uint16(xMatch), - /*5330*/ uint16(xSetOp), uint16(JBE), - /*5332*/ uint16(xReadCd), - /*5333*/ uint16(xArgRel32), - /*5334*/ uint16(xMatch), - /*5335*/ uint16(xCondDataSize), 5339, 5330, 5344, - /*5339*/ uint16(xSetOp), uint16(JBE), - /*5341*/ uint16(xReadCd), - /*5342*/ uint16(xArgRel32), - /*5343*/ uint16(xMatch), - /*5344*/ uint16(xSetOp), uint16(JBE), - /*5346*/ uint16(xReadCd), - /*5347*/ uint16(xArgRel32), - /*5348*/ uint16(xMatch), - /*5349*/ uint16(xCondIs64), 5352, 5366, - /*5352*/ uint16(xCondDataSize), 5356, 5361, 0, - /*5356*/ uint16(xSetOp), uint16(JA), - /*5358*/ uint16(xReadCw), - /*5359*/ uint16(xArgRel16), - /*5360*/ uint16(xMatch), - /*5361*/ uint16(xSetOp), uint16(JA), - /*5363*/ uint16(xReadCd), - /*5364*/ uint16(xArgRel32), - /*5365*/ uint16(xMatch), - /*5366*/ uint16(xCondDataSize), 5370, 5361, 5375, - /*5370*/ uint16(xSetOp), uint16(JA), - /*5372*/ uint16(xReadCd), - /*5373*/ uint16(xArgRel32), - /*5374*/ uint16(xMatch), - /*5375*/ uint16(xSetOp), uint16(JA), - /*5377*/ uint16(xReadCd), - /*5378*/ uint16(xArgRel32), - /*5379*/ uint16(xMatch), - /*5380*/ uint16(xCondIs64), 5383, 5397, - /*5383*/ uint16(xCondDataSize), 5387, 5392, 0, - /*5387*/ uint16(xSetOp), uint16(JS), - /*5389*/ uint16(xReadCw), - /*5390*/ uint16(xArgRel16), - /*5391*/ uint16(xMatch), - /*5392*/ uint16(xSetOp), uint16(JS), - /*5394*/ uint16(xReadCd), - /*5395*/ uint16(xArgRel32), - /*5396*/ uint16(xMatch), - /*5397*/ uint16(xCondDataSize), 5401, 5392, 5406, - /*5401*/ uint16(xSetOp), uint16(JS), - /*5403*/ uint16(xReadCd), - /*5404*/ uint16(xArgRel32), - /*5405*/ uint16(xMatch), - /*5406*/ uint16(xSetOp), uint16(JS), - /*5408*/ uint16(xReadCd), - /*5409*/ uint16(xArgRel32), - /*5410*/ uint16(xMatch), - /*5411*/ uint16(xCondIs64), 5414, 5428, - /*5414*/ uint16(xCondDataSize), 5418, 5423, 0, - /*5418*/ uint16(xSetOp), uint16(JNS), - /*5420*/ uint16(xReadCw), - /*5421*/ uint16(xArgRel16), - /*5422*/ uint16(xMatch), - /*5423*/ uint16(xSetOp), uint16(JNS), - /*5425*/ uint16(xReadCd), - /*5426*/ uint16(xArgRel32), - /*5427*/ uint16(xMatch), - /*5428*/ uint16(xCondDataSize), 5432, 5423, 5437, - /*5432*/ uint16(xSetOp), uint16(JNS), - /*5434*/ uint16(xReadCd), - /*5435*/ uint16(xArgRel32), - /*5436*/ uint16(xMatch), - /*5437*/ uint16(xSetOp), uint16(JNS), - /*5439*/ uint16(xReadCd), - /*5440*/ uint16(xArgRel32), - /*5441*/ uint16(xMatch), - /*5442*/ uint16(xCondIs64), 5445, 5459, - /*5445*/ uint16(xCondDataSize), 5449, 5454, 0, - /*5449*/ uint16(xSetOp), uint16(JP), - /*5451*/ uint16(xReadCw), - /*5452*/ uint16(xArgRel16), - /*5453*/ uint16(xMatch), - /*5454*/ uint16(xSetOp), uint16(JP), - /*5456*/ uint16(xReadCd), - /*5457*/ uint16(xArgRel32), - /*5458*/ uint16(xMatch), - /*5459*/ uint16(xCondDataSize), 5463, 5454, 5468, - /*5463*/ uint16(xSetOp), uint16(JP), - /*5465*/ uint16(xReadCd), - /*5466*/ uint16(xArgRel32), - /*5467*/ uint16(xMatch), - /*5468*/ uint16(xSetOp), uint16(JP), - /*5470*/ uint16(xReadCd), - /*5471*/ uint16(xArgRel32), - /*5472*/ uint16(xMatch), - /*5473*/ uint16(xCondIs64), 5476, 5490, - /*5476*/ uint16(xCondDataSize), 5480, 5485, 0, - /*5480*/ uint16(xSetOp), uint16(JNP), - /*5482*/ uint16(xReadCw), - /*5483*/ uint16(xArgRel16), - /*5484*/ uint16(xMatch), - /*5485*/ uint16(xSetOp), uint16(JNP), - /*5487*/ uint16(xReadCd), - /*5488*/ uint16(xArgRel32), - /*5489*/ uint16(xMatch), - /*5490*/ uint16(xCondDataSize), 5494, 5485, 5499, - /*5494*/ uint16(xSetOp), uint16(JNP), - /*5496*/ uint16(xReadCd), - /*5497*/ uint16(xArgRel32), - /*5498*/ uint16(xMatch), - /*5499*/ uint16(xSetOp), uint16(JNP), - /*5501*/ uint16(xReadCd), - /*5502*/ uint16(xArgRel32), - /*5503*/ uint16(xMatch), - /*5504*/ uint16(xCondIs64), 5507, 5521, - /*5507*/ uint16(xCondDataSize), 5511, 5516, 0, - /*5511*/ uint16(xSetOp), uint16(JL), - /*5513*/ uint16(xReadCw), - /*5514*/ uint16(xArgRel16), - /*5515*/ uint16(xMatch), - /*5516*/ uint16(xSetOp), uint16(JL), - /*5518*/ uint16(xReadCd), - /*5519*/ uint16(xArgRel32), - /*5520*/ uint16(xMatch), - /*5521*/ uint16(xCondDataSize), 5525, 5516, 5530, - /*5525*/ uint16(xSetOp), uint16(JL), - /*5527*/ uint16(xReadCd), - /*5528*/ uint16(xArgRel32), - /*5529*/ uint16(xMatch), - /*5530*/ uint16(xSetOp), uint16(JL), - /*5532*/ uint16(xReadCd), - /*5533*/ uint16(xArgRel32), - /*5534*/ uint16(xMatch), - /*5535*/ uint16(xCondIs64), 5538, 5552, - /*5538*/ uint16(xCondDataSize), 5542, 5547, 0, - /*5542*/ uint16(xSetOp), uint16(JGE), - /*5544*/ uint16(xReadCw), - /*5545*/ uint16(xArgRel16), - /*5546*/ uint16(xMatch), - /*5547*/ uint16(xSetOp), uint16(JGE), - /*5549*/ uint16(xReadCd), - /*5550*/ uint16(xArgRel32), - /*5551*/ uint16(xMatch), - /*5552*/ uint16(xCondDataSize), 5556, 5547, 5561, - /*5556*/ uint16(xSetOp), uint16(JGE), - /*5558*/ uint16(xReadCd), - /*5559*/ uint16(xArgRel32), - /*5560*/ uint16(xMatch), - /*5561*/ uint16(xSetOp), uint16(JGE), - /*5563*/ uint16(xReadCd), - /*5564*/ uint16(xArgRel32), - /*5565*/ uint16(xMatch), - /*5566*/ uint16(xCondIs64), 5569, 5583, - /*5569*/ uint16(xCondDataSize), 5573, 5578, 0, - /*5573*/ uint16(xSetOp), uint16(JLE), - /*5575*/ uint16(xReadCw), - /*5576*/ uint16(xArgRel16), - /*5577*/ uint16(xMatch), - /*5578*/ uint16(xSetOp), uint16(JLE), - /*5580*/ uint16(xReadCd), - /*5581*/ uint16(xArgRel32), - /*5582*/ uint16(xMatch), - /*5583*/ uint16(xCondDataSize), 5587, 5578, 5592, - /*5587*/ uint16(xSetOp), uint16(JLE), - /*5589*/ uint16(xReadCd), - /*5590*/ uint16(xArgRel32), - /*5591*/ uint16(xMatch), - /*5592*/ uint16(xSetOp), uint16(JLE), - /*5594*/ uint16(xReadCd), - /*5595*/ uint16(xArgRel32), - /*5596*/ uint16(xMatch), - /*5597*/ uint16(xCondIs64), 5600, 5614, - /*5600*/ uint16(xCondDataSize), 5604, 5609, 0, - /*5604*/ uint16(xSetOp), uint16(JG), - /*5606*/ uint16(xReadCw), - /*5607*/ uint16(xArgRel16), - /*5608*/ uint16(xMatch), - /*5609*/ uint16(xSetOp), uint16(JG), - /*5611*/ uint16(xReadCd), - /*5612*/ uint16(xArgRel32), - /*5613*/ uint16(xMatch), - /*5614*/ uint16(xCondDataSize), 5618, 5609, 5623, - /*5618*/ uint16(xSetOp), uint16(JG), - /*5620*/ uint16(xReadCd), - /*5621*/ uint16(xArgRel32), - /*5622*/ uint16(xMatch), - /*5623*/ uint16(xSetOp), uint16(JG), - /*5625*/ uint16(xReadCd), - /*5626*/ uint16(xArgRel32), - /*5627*/ uint16(xMatch), - /*5628*/ uint16(xSetOp), uint16(SETO), - /*5630*/ uint16(xReadSlashR), - /*5631*/ uint16(xArgRM8), - /*5632*/ uint16(xMatch), - /*5633*/ uint16(xSetOp), uint16(SETNO), - /*5635*/ uint16(xReadSlashR), - /*5636*/ uint16(xArgRM8), - /*5637*/ uint16(xMatch), - /*5638*/ uint16(xSetOp), uint16(SETB), - /*5640*/ uint16(xReadSlashR), - /*5641*/ uint16(xArgRM8), - /*5642*/ uint16(xMatch), - /*5643*/ uint16(xSetOp), uint16(SETAE), - /*5645*/ uint16(xReadSlashR), - /*5646*/ uint16(xArgRM8), - /*5647*/ uint16(xMatch), - /*5648*/ uint16(xSetOp), uint16(SETE), - /*5650*/ uint16(xReadSlashR), - /*5651*/ uint16(xArgRM8), - /*5652*/ uint16(xMatch), - /*5653*/ uint16(xSetOp), uint16(SETNE), - /*5655*/ uint16(xReadSlashR), - /*5656*/ uint16(xArgRM8), - /*5657*/ uint16(xMatch), - /*5658*/ uint16(xSetOp), uint16(SETBE), - /*5660*/ uint16(xReadSlashR), - /*5661*/ uint16(xArgRM8), - /*5662*/ uint16(xMatch), - /*5663*/ uint16(xSetOp), uint16(SETA), - /*5665*/ uint16(xReadSlashR), - /*5666*/ uint16(xArgRM8), + 4967, // 6 + 4985, // 7 + /*4939*/ uint16(xCondPrefix), 2, + 0x66, 4951, + 0x0, 4945, + /*4945*/ uint16(xSetOp), uint16(PSRLQ), + /*4947*/ uint16(xReadIb), + /*4948*/ uint16(xArgMm2), + /*4949*/ uint16(xArgImm8u), + /*4950*/ uint16(xMatch), + /*4951*/ uint16(xSetOp), uint16(PSRLQ), + /*4953*/ uint16(xReadIb), + /*4954*/ uint16(xArgXmm2), + /*4955*/ uint16(xArgImm8u), + /*4956*/ uint16(xMatch), + /*4957*/ uint16(xCondPrefix), 1, + 0x66, 4961, + /*4961*/ uint16(xSetOp), uint16(PSRLDQ), + /*4963*/ uint16(xReadIb), + /*4964*/ uint16(xArgXmm2), + /*4965*/ uint16(xArgImm8u), + /*4966*/ uint16(xMatch), + /*4967*/ uint16(xCondPrefix), 2, + 0x66, 4979, + 0x0, 4973, + /*4973*/ uint16(xSetOp), uint16(PSLLQ), + /*4975*/ uint16(xReadIb), + /*4976*/ uint16(xArgMm2), + /*4977*/ uint16(xArgImm8u), + /*4978*/ uint16(xMatch), + /*4979*/ uint16(xSetOp), uint16(PSLLQ), + /*4981*/ uint16(xReadIb), + /*4982*/ uint16(xArgXmm2), + /*4983*/ uint16(xArgImm8u), + /*4984*/ uint16(xMatch), + /*4985*/ uint16(xCondPrefix), 1, + 0x66, 4989, + /*4989*/ uint16(xSetOp), uint16(PSLLDQ), + /*4991*/ uint16(xReadIb), + /*4992*/ uint16(xArgXmm2), + /*4993*/ uint16(xArgImm8u), + /*4994*/ uint16(xMatch), + /*4995*/ uint16(xCondPrefix), 2, + 0x66, 5007, + 0x0, 5001, + /*5001*/ uint16(xSetOp), uint16(PCMPEQB), + /*5003*/ uint16(xReadSlashR), + /*5004*/ uint16(xArgMm), + /*5005*/ uint16(xArgMmM64), + /*5006*/ uint16(xMatch), + /*5007*/ uint16(xSetOp), uint16(PCMPEQB), + /*5009*/ uint16(xReadSlashR), + /*5010*/ uint16(xArgXmm1), + /*5011*/ uint16(xArgXmm2M128), + /*5012*/ uint16(xMatch), + /*5013*/ uint16(xCondPrefix), 2, + 0x66, 5025, + 0x0, 5019, + /*5019*/ uint16(xSetOp), uint16(PCMPEQW), + /*5021*/ uint16(xReadSlashR), + /*5022*/ uint16(xArgMm), + /*5023*/ uint16(xArgMmM64), + /*5024*/ uint16(xMatch), + /*5025*/ uint16(xSetOp), uint16(PCMPEQW), + /*5027*/ uint16(xReadSlashR), + /*5028*/ uint16(xArgXmm1), + /*5029*/ uint16(xArgXmm2M128), + /*5030*/ uint16(xMatch), + /*5031*/ uint16(xCondPrefix), 2, + 0x66, 5043, + 0x0, 5037, + /*5037*/ uint16(xSetOp), uint16(PCMPEQD), + /*5039*/ uint16(xReadSlashR), + /*5040*/ uint16(xArgMm), + /*5041*/ uint16(xArgMmM64), + /*5042*/ uint16(xMatch), + /*5043*/ uint16(xSetOp), uint16(PCMPEQD), + /*5045*/ uint16(xReadSlashR), + /*5046*/ uint16(xArgXmm1), + /*5047*/ uint16(xArgXmm2M128), + /*5048*/ uint16(xMatch), + /*5049*/ uint16(xSetOp), uint16(EMMS), + /*5051*/ uint16(xMatch), + /*5052*/ uint16(xCondPrefix), 2, + 0xF2, 5064, + 0x66, 5058, + /*5058*/ uint16(xSetOp), uint16(HADDPD), + /*5060*/ uint16(xReadSlashR), + /*5061*/ uint16(xArgXmm1), + /*5062*/ uint16(xArgXmm2M128), + /*5063*/ uint16(xMatch), + /*5064*/ uint16(xSetOp), uint16(HADDPS), + /*5066*/ uint16(xReadSlashR), + /*5067*/ uint16(xArgXmm1), + /*5068*/ uint16(xArgXmm2M128), + /*5069*/ uint16(xMatch), + /*5070*/ uint16(xCondPrefix), 2, + 0xF2, 5082, + 0x66, 5076, + /*5076*/ uint16(xSetOp), uint16(HSUBPD), + /*5078*/ uint16(xReadSlashR), + /*5079*/ uint16(xArgXmm1), + /*5080*/ uint16(xArgXmm2M128), + /*5081*/ uint16(xMatch), + /*5082*/ uint16(xSetOp), uint16(HSUBPS), + /*5084*/ uint16(xReadSlashR), + /*5085*/ uint16(xArgXmm1), + /*5086*/ uint16(xArgXmm2M128), + /*5087*/ uint16(xMatch), + /*5088*/ uint16(xCondIs64), 5091, 5137, + /*5091*/ uint16(xCondPrefix), 3, + 0xF3, 5131, + 0x66, 5115, + 0x0, 5099, + /*5099*/ uint16(xCondDataSize), 5103, 5109, 0, + /*5103*/ uint16(xSetOp), uint16(MOVD), + /*5105*/ uint16(xReadSlashR), + /*5106*/ uint16(xArgRM32), + /*5107*/ uint16(xArgMm), + /*5108*/ uint16(xMatch), + /*5109*/ uint16(xSetOp), uint16(MOVD), + /*5111*/ uint16(xReadSlashR), + /*5112*/ uint16(xArgRM32), + /*5113*/ uint16(xArgMm), + /*5114*/ uint16(xMatch), + /*5115*/ uint16(xCondDataSize), 5119, 5125, 0, + /*5119*/ uint16(xSetOp), uint16(MOVD), + /*5121*/ uint16(xReadSlashR), + /*5122*/ uint16(xArgRM32), + /*5123*/ uint16(xArgXmm), + /*5124*/ uint16(xMatch), + /*5125*/ uint16(xSetOp), uint16(MOVD), + /*5127*/ uint16(xReadSlashR), + /*5128*/ uint16(xArgRM32), + /*5129*/ uint16(xArgXmm), + /*5130*/ uint16(xMatch), + /*5131*/ uint16(xSetOp), uint16(MOVQ), + /*5133*/ uint16(xReadSlashR), + /*5134*/ uint16(xArgXmm1), + /*5135*/ uint16(xArgXmm2M64), + /*5136*/ uint16(xMatch), + /*5137*/ uint16(xCondPrefix), 3, + 0xF3, 5131, + 0x66, 5155, + 0x0, 5145, + /*5145*/ uint16(xCondDataSize), 5103, 5109, 5149, + /*5149*/ uint16(xSetOp), uint16(MOVQ), + /*5151*/ uint16(xReadSlashR), + /*5152*/ uint16(xArgRM64), + /*5153*/ uint16(xArgMm), + /*5154*/ uint16(xMatch), + /*5155*/ uint16(xCondDataSize), 5119, 5125, 5159, + /*5159*/ uint16(xSetOp), uint16(MOVQ), + /*5161*/ uint16(xReadSlashR), + /*5162*/ uint16(xArgRM64), + /*5163*/ uint16(xArgXmm), + /*5164*/ uint16(xMatch), + /*5165*/ uint16(xCondPrefix), 3, + 0xF3, 5185, + 0x66, 5179, + 0x0, 5173, + /*5173*/ uint16(xSetOp), uint16(MOVQ), + /*5175*/ uint16(xReadSlashR), + /*5176*/ uint16(xArgMmM64), + /*5177*/ uint16(xArgMm), + /*5178*/ uint16(xMatch), + /*5179*/ uint16(xSetOp), uint16(MOVDQA), + /*5181*/ uint16(xReadSlashR), + /*5182*/ uint16(xArgXmm2M128), + /*5183*/ uint16(xArgXmm1), + /*5184*/ uint16(xMatch), + /*5185*/ uint16(xSetOp), uint16(MOVDQU), + /*5187*/ uint16(xReadSlashR), + /*5188*/ uint16(xArgXmm2M128), + /*5189*/ uint16(xArgXmm1), + /*5190*/ uint16(xMatch), + /*5191*/ uint16(xCondIs64), 5194, 5208, + /*5194*/ uint16(xCondDataSize), 5198, 5203, 0, + /*5198*/ uint16(xSetOp), uint16(JO), + /*5200*/ uint16(xReadCw), + /*5201*/ uint16(xArgRel16), + /*5202*/ uint16(xMatch), + /*5203*/ uint16(xSetOp), uint16(JO), + /*5205*/ uint16(xReadCd), + /*5206*/ uint16(xArgRel32), + /*5207*/ uint16(xMatch), + /*5208*/ uint16(xCondDataSize), 5212, 5203, 5217, + /*5212*/ uint16(xSetOp), uint16(JO), + /*5214*/ uint16(xReadCd), + /*5215*/ uint16(xArgRel32), + /*5216*/ uint16(xMatch), + /*5217*/ uint16(xSetOp), uint16(JO), + /*5219*/ uint16(xReadCd), + /*5220*/ uint16(xArgRel32), + /*5221*/ uint16(xMatch), + /*5222*/ uint16(xCondIs64), 5225, 5239, + /*5225*/ uint16(xCondDataSize), 5229, 5234, 0, + /*5229*/ uint16(xSetOp), uint16(JNO), + /*5231*/ uint16(xReadCw), + /*5232*/ uint16(xArgRel16), + /*5233*/ uint16(xMatch), + /*5234*/ uint16(xSetOp), uint16(JNO), + /*5236*/ uint16(xReadCd), + /*5237*/ uint16(xArgRel32), + /*5238*/ uint16(xMatch), + /*5239*/ uint16(xCondDataSize), 5243, 5234, 5248, + /*5243*/ uint16(xSetOp), uint16(JNO), + /*5245*/ uint16(xReadCd), + /*5246*/ uint16(xArgRel32), + /*5247*/ uint16(xMatch), + /*5248*/ uint16(xSetOp), uint16(JNO), + /*5250*/ uint16(xReadCd), + /*5251*/ uint16(xArgRel32), + /*5252*/ uint16(xMatch), + /*5253*/ uint16(xCondIs64), 5256, 5270, + /*5256*/ uint16(xCondDataSize), 5260, 5265, 0, + /*5260*/ uint16(xSetOp), uint16(JB), + /*5262*/ uint16(xReadCw), + /*5263*/ uint16(xArgRel16), + /*5264*/ uint16(xMatch), + /*5265*/ uint16(xSetOp), uint16(JB), + /*5267*/ uint16(xReadCd), + /*5268*/ uint16(xArgRel32), + /*5269*/ uint16(xMatch), + /*5270*/ uint16(xCondDataSize), 5274, 5265, 5279, + /*5274*/ uint16(xSetOp), uint16(JB), + /*5276*/ uint16(xReadCd), + /*5277*/ uint16(xArgRel32), + /*5278*/ uint16(xMatch), + /*5279*/ uint16(xSetOp), uint16(JB), + /*5281*/ uint16(xReadCd), + /*5282*/ uint16(xArgRel32), + /*5283*/ uint16(xMatch), + /*5284*/ uint16(xCondIs64), 5287, 5301, + /*5287*/ uint16(xCondDataSize), 5291, 5296, 0, + /*5291*/ uint16(xSetOp), uint16(JAE), + /*5293*/ uint16(xReadCw), + /*5294*/ uint16(xArgRel16), + /*5295*/ uint16(xMatch), + /*5296*/ uint16(xSetOp), uint16(JAE), + /*5298*/ uint16(xReadCd), + /*5299*/ uint16(xArgRel32), + /*5300*/ uint16(xMatch), + /*5301*/ uint16(xCondDataSize), 5305, 5296, 5310, + /*5305*/ uint16(xSetOp), uint16(JAE), + /*5307*/ uint16(xReadCd), + /*5308*/ uint16(xArgRel32), + /*5309*/ uint16(xMatch), + /*5310*/ uint16(xSetOp), uint16(JAE), + /*5312*/ uint16(xReadCd), + /*5313*/ uint16(xArgRel32), + /*5314*/ uint16(xMatch), + /*5315*/ uint16(xCondIs64), 5318, 5332, + /*5318*/ uint16(xCondDataSize), 5322, 5327, 0, + /*5322*/ uint16(xSetOp), uint16(JE), + /*5324*/ uint16(xReadCw), + /*5325*/ uint16(xArgRel16), + /*5326*/ uint16(xMatch), + /*5327*/ uint16(xSetOp), uint16(JE), + /*5329*/ uint16(xReadCd), + /*5330*/ uint16(xArgRel32), + /*5331*/ uint16(xMatch), + /*5332*/ uint16(xCondDataSize), 5336, 5327, 5341, + /*5336*/ uint16(xSetOp), uint16(JE), + /*5338*/ uint16(xReadCd), + /*5339*/ uint16(xArgRel32), + /*5340*/ uint16(xMatch), + /*5341*/ uint16(xSetOp), uint16(JE), + /*5343*/ uint16(xReadCd), + /*5344*/ uint16(xArgRel32), + /*5345*/ uint16(xMatch), + /*5346*/ uint16(xCondIs64), 5349, 5363, + /*5349*/ uint16(xCondDataSize), 5353, 5358, 0, + /*5353*/ uint16(xSetOp), uint16(JNE), + /*5355*/ uint16(xReadCw), + /*5356*/ uint16(xArgRel16), + /*5357*/ uint16(xMatch), + /*5358*/ uint16(xSetOp), uint16(JNE), + /*5360*/ uint16(xReadCd), + /*5361*/ uint16(xArgRel32), + /*5362*/ uint16(xMatch), + /*5363*/ uint16(xCondDataSize), 5367, 5358, 5372, + /*5367*/ uint16(xSetOp), uint16(JNE), + /*5369*/ uint16(xReadCd), + /*5370*/ uint16(xArgRel32), + /*5371*/ uint16(xMatch), + /*5372*/ uint16(xSetOp), uint16(JNE), + /*5374*/ uint16(xReadCd), + /*5375*/ uint16(xArgRel32), + /*5376*/ uint16(xMatch), + /*5377*/ uint16(xCondIs64), 5380, 5394, + /*5380*/ uint16(xCondDataSize), 5384, 5389, 0, + /*5384*/ uint16(xSetOp), uint16(JBE), + /*5386*/ uint16(xReadCw), + /*5387*/ uint16(xArgRel16), + /*5388*/ uint16(xMatch), + /*5389*/ uint16(xSetOp), uint16(JBE), + /*5391*/ uint16(xReadCd), + /*5392*/ uint16(xArgRel32), + /*5393*/ uint16(xMatch), + /*5394*/ uint16(xCondDataSize), 5398, 5389, 5403, + /*5398*/ uint16(xSetOp), uint16(JBE), + /*5400*/ uint16(xReadCd), + /*5401*/ uint16(xArgRel32), + /*5402*/ uint16(xMatch), + /*5403*/ uint16(xSetOp), uint16(JBE), + /*5405*/ uint16(xReadCd), + /*5406*/ uint16(xArgRel32), + /*5407*/ uint16(xMatch), + /*5408*/ uint16(xCondIs64), 5411, 5425, + /*5411*/ uint16(xCondDataSize), 5415, 5420, 0, + /*5415*/ uint16(xSetOp), uint16(JA), + /*5417*/ uint16(xReadCw), + /*5418*/ uint16(xArgRel16), + /*5419*/ uint16(xMatch), + /*5420*/ uint16(xSetOp), uint16(JA), + /*5422*/ uint16(xReadCd), + /*5423*/ uint16(xArgRel32), + /*5424*/ uint16(xMatch), + /*5425*/ uint16(xCondDataSize), 5429, 5420, 5434, + /*5429*/ uint16(xSetOp), uint16(JA), + /*5431*/ uint16(xReadCd), + /*5432*/ uint16(xArgRel32), + /*5433*/ uint16(xMatch), + /*5434*/ uint16(xSetOp), uint16(JA), + /*5436*/ uint16(xReadCd), + /*5437*/ uint16(xArgRel32), + /*5438*/ uint16(xMatch), + /*5439*/ uint16(xCondIs64), 5442, 5456, + /*5442*/ uint16(xCondDataSize), 5446, 5451, 0, + /*5446*/ uint16(xSetOp), uint16(JS), + /*5448*/ uint16(xReadCw), + /*5449*/ uint16(xArgRel16), + /*5450*/ uint16(xMatch), + /*5451*/ uint16(xSetOp), uint16(JS), + /*5453*/ uint16(xReadCd), + /*5454*/ uint16(xArgRel32), + /*5455*/ uint16(xMatch), + /*5456*/ uint16(xCondDataSize), 5460, 5451, 5465, + /*5460*/ uint16(xSetOp), uint16(JS), + /*5462*/ uint16(xReadCd), + /*5463*/ uint16(xArgRel32), + /*5464*/ uint16(xMatch), + /*5465*/ uint16(xSetOp), uint16(JS), + /*5467*/ uint16(xReadCd), + /*5468*/ uint16(xArgRel32), + /*5469*/ uint16(xMatch), + /*5470*/ uint16(xCondIs64), 5473, 5487, + /*5473*/ uint16(xCondDataSize), 5477, 5482, 0, + /*5477*/ uint16(xSetOp), uint16(JNS), + /*5479*/ uint16(xReadCw), + /*5480*/ uint16(xArgRel16), + /*5481*/ uint16(xMatch), + /*5482*/ uint16(xSetOp), uint16(JNS), + /*5484*/ uint16(xReadCd), + /*5485*/ uint16(xArgRel32), + /*5486*/ uint16(xMatch), + /*5487*/ uint16(xCondDataSize), 5491, 5482, 5496, + /*5491*/ uint16(xSetOp), uint16(JNS), + /*5493*/ uint16(xReadCd), + /*5494*/ uint16(xArgRel32), + /*5495*/ uint16(xMatch), + /*5496*/ uint16(xSetOp), uint16(JNS), + /*5498*/ uint16(xReadCd), + /*5499*/ uint16(xArgRel32), + /*5500*/ uint16(xMatch), + /*5501*/ uint16(xCondIs64), 5504, 5518, + /*5504*/ uint16(xCondDataSize), 5508, 5513, 0, + /*5508*/ uint16(xSetOp), uint16(JP), + /*5510*/ uint16(xReadCw), + /*5511*/ uint16(xArgRel16), + /*5512*/ uint16(xMatch), + /*5513*/ uint16(xSetOp), uint16(JP), + /*5515*/ uint16(xReadCd), + /*5516*/ uint16(xArgRel32), + /*5517*/ uint16(xMatch), + /*5518*/ uint16(xCondDataSize), 5522, 5513, 5527, + /*5522*/ uint16(xSetOp), uint16(JP), + /*5524*/ uint16(xReadCd), + /*5525*/ uint16(xArgRel32), + /*5526*/ uint16(xMatch), + /*5527*/ uint16(xSetOp), uint16(JP), + /*5529*/ uint16(xReadCd), + /*5530*/ uint16(xArgRel32), + /*5531*/ uint16(xMatch), + /*5532*/ uint16(xCondIs64), 5535, 5549, + /*5535*/ uint16(xCondDataSize), 5539, 5544, 0, + /*5539*/ uint16(xSetOp), uint16(JNP), + /*5541*/ uint16(xReadCw), + /*5542*/ uint16(xArgRel16), + /*5543*/ uint16(xMatch), + /*5544*/ uint16(xSetOp), uint16(JNP), + /*5546*/ uint16(xReadCd), + /*5547*/ uint16(xArgRel32), + /*5548*/ uint16(xMatch), + /*5549*/ uint16(xCondDataSize), 5553, 5544, 5558, + /*5553*/ uint16(xSetOp), uint16(JNP), + /*5555*/ uint16(xReadCd), + /*5556*/ uint16(xArgRel32), + /*5557*/ uint16(xMatch), + /*5558*/ uint16(xSetOp), uint16(JNP), + /*5560*/ uint16(xReadCd), + /*5561*/ uint16(xArgRel32), + /*5562*/ uint16(xMatch), + /*5563*/ uint16(xCondIs64), 5566, 5580, + /*5566*/ uint16(xCondDataSize), 5570, 5575, 0, + /*5570*/ uint16(xSetOp), uint16(JL), + /*5572*/ uint16(xReadCw), + /*5573*/ uint16(xArgRel16), + /*5574*/ uint16(xMatch), + /*5575*/ uint16(xSetOp), uint16(JL), + /*5577*/ uint16(xReadCd), + /*5578*/ uint16(xArgRel32), + /*5579*/ uint16(xMatch), + /*5580*/ uint16(xCondDataSize), 5584, 5575, 5589, + /*5584*/ uint16(xSetOp), uint16(JL), + /*5586*/ uint16(xReadCd), + /*5587*/ uint16(xArgRel32), + /*5588*/ uint16(xMatch), + /*5589*/ uint16(xSetOp), uint16(JL), + /*5591*/ uint16(xReadCd), + /*5592*/ uint16(xArgRel32), + /*5593*/ uint16(xMatch), + /*5594*/ uint16(xCondIs64), 5597, 5611, + /*5597*/ uint16(xCondDataSize), 5601, 5606, 0, + /*5601*/ uint16(xSetOp), uint16(JGE), + /*5603*/ uint16(xReadCw), + /*5604*/ uint16(xArgRel16), + /*5605*/ uint16(xMatch), + /*5606*/ uint16(xSetOp), uint16(JGE), + /*5608*/ uint16(xReadCd), + /*5609*/ uint16(xArgRel32), + /*5610*/ uint16(xMatch), + /*5611*/ uint16(xCondDataSize), 5615, 5606, 5620, + /*5615*/ uint16(xSetOp), uint16(JGE), + /*5617*/ uint16(xReadCd), + /*5618*/ uint16(xArgRel32), + /*5619*/ uint16(xMatch), + /*5620*/ uint16(xSetOp), uint16(JGE), + /*5622*/ uint16(xReadCd), + /*5623*/ uint16(xArgRel32), + /*5624*/ uint16(xMatch), + /*5625*/ uint16(xCondIs64), 5628, 5642, + /*5628*/ uint16(xCondDataSize), 5632, 5637, 0, + /*5632*/ uint16(xSetOp), uint16(JLE), + /*5634*/ uint16(xReadCw), + /*5635*/ uint16(xArgRel16), + /*5636*/ uint16(xMatch), + /*5637*/ uint16(xSetOp), uint16(JLE), + /*5639*/ uint16(xReadCd), + /*5640*/ uint16(xArgRel32), + /*5641*/ uint16(xMatch), + /*5642*/ uint16(xCondDataSize), 5646, 5637, 5651, + /*5646*/ uint16(xSetOp), uint16(JLE), + /*5648*/ uint16(xReadCd), + /*5649*/ uint16(xArgRel32), + /*5650*/ uint16(xMatch), + /*5651*/ uint16(xSetOp), uint16(JLE), + /*5653*/ uint16(xReadCd), + /*5654*/ uint16(xArgRel32), + /*5655*/ uint16(xMatch), + /*5656*/ uint16(xCondIs64), 5659, 5673, + /*5659*/ uint16(xCondDataSize), 5663, 5668, 0, + /*5663*/ uint16(xSetOp), uint16(JG), + /*5665*/ uint16(xReadCw), + /*5666*/ uint16(xArgRel16), /*5667*/ uint16(xMatch), - /*5668*/ uint16(xSetOp), uint16(SETS), - /*5670*/ uint16(xReadSlashR), - /*5671*/ uint16(xArgRM8), + /*5668*/ uint16(xSetOp), uint16(JG), + /*5670*/ uint16(xReadCd), + /*5671*/ uint16(xArgRel32), /*5672*/ uint16(xMatch), - /*5673*/ uint16(xSetOp), uint16(SETNS), - /*5675*/ uint16(xReadSlashR), - /*5676*/ uint16(xArgRM8), - /*5677*/ uint16(xMatch), - /*5678*/ uint16(xSetOp), uint16(SETP), - /*5680*/ uint16(xReadSlashR), - /*5681*/ uint16(xArgRM8), - /*5682*/ uint16(xMatch), - /*5683*/ uint16(xSetOp), uint16(SETNP), - /*5685*/ uint16(xReadSlashR), - /*5686*/ uint16(xArgRM8), - /*5687*/ uint16(xMatch), - /*5688*/ uint16(xSetOp), uint16(SETL), - /*5690*/ uint16(xReadSlashR), - /*5691*/ uint16(xArgRM8), - /*5692*/ uint16(xMatch), - /*5693*/ uint16(xSetOp), uint16(SETGE), - /*5695*/ uint16(xReadSlashR), - /*5696*/ uint16(xArgRM8), - /*5697*/ uint16(xMatch), - /*5698*/ uint16(xSetOp), uint16(SETLE), - /*5700*/ uint16(xReadSlashR), - /*5701*/ uint16(xArgRM8), - /*5702*/ uint16(xMatch), - /*5703*/ uint16(xSetOp), uint16(SETG), - /*5705*/ uint16(xReadSlashR), - /*5706*/ uint16(xArgRM8), - /*5707*/ uint16(xMatch), - /*5708*/ uint16(xSetOp), uint16(PUSH), - /*5710*/ uint16(xArgFS), + /*5673*/ uint16(xCondDataSize), 5677, 5668, 5682, + /*5677*/ uint16(xSetOp), uint16(JG), + /*5679*/ uint16(xReadCd), + /*5680*/ uint16(xArgRel32), + /*5681*/ uint16(xMatch), + /*5682*/ uint16(xSetOp), uint16(JG), + /*5684*/ uint16(xReadCd), + /*5685*/ uint16(xArgRel32), + /*5686*/ uint16(xMatch), + /*5687*/ uint16(xSetOp), uint16(SETO), + /*5689*/ uint16(xReadSlashR), + /*5690*/ uint16(xArgRM8), + /*5691*/ uint16(xMatch), + /*5692*/ uint16(xSetOp), uint16(SETNO), + /*5694*/ uint16(xReadSlashR), + /*5695*/ uint16(xArgRM8), + /*5696*/ uint16(xMatch), + /*5697*/ uint16(xSetOp), uint16(SETB), + /*5699*/ uint16(xReadSlashR), + /*5700*/ uint16(xArgRM8), + /*5701*/ uint16(xMatch), + /*5702*/ uint16(xSetOp), uint16(SETAE), + /*5704*/ uint16(xReadSlashR), + /*5705*/ uint16(xArgRM8), + /*5706*/ uint16(xMatch), + /*5707*/ uint16(xSetOp), uint16(SETE), + /*5709*/ uint16(xReadSlashR), + /*5710*/ uint16(xArgRM8), /*5711*/ uint16(xMatch), - /*5712*/ uint16(xCondIs64), 5715, 5727, - /*5715*/ uint16(xCondDataSize), 5719, 5723, 0, - /*5719*/ uint16(xSetOp), uint16(POP), - /*5721*/ uint16(xArgFS), - /*5722*/ uint16(xMatch), - /*5723*/ uint16(xSetOp), uint16(POP), - /*5725*/ uint16(xArgFS), + /*5712*/ uint16(xSetOp), uint16(SETNE), + /*5714*/ uint16(xReadSlashR), + /*5715*/ uint16(xArgRM8), + /*5716*/ uint16(xMatch), + /*5717*/ uint16(xSetOp), uint16(SETBE), + /*5719*/ uint16(xReadSlashR), + /*5720*/ uint16(xArgRM8), + /*5721*/ uint16(xMatch), + /*5722*/ uint16(xSetOp), uint16(SETA), + /*5724*/ uint16(xReadSlashR), + /*5725*/ uint16(xArgRM8), /*5726*/ uint16(xMatch), - /*5727*/ uint16(xCondDataSize), 5719, 5731, 5735, - /*5731*/ uint16(xSetOp), uint16(POP), - /*5733*/ uint16(xArgFS), - /*5734*/ uint16(xMatch), - /*5735*/ uint16(xSetOp), uint16(POP), - /*5737*/ uint16(xArgFS), - /*5738*/ uint16(xMatch), - /*5739*/ uint16(xSetOp), uint16(CPUID), + /*5727*/ uint16(xSetOp), uint16(SETS), + /*5729*/ uint16(xReadSlashR), + /*5730*/ uint16(xArgRM8), + /*5731*/ uint16(xMatch), + /*5732*/ uint16(xSetOp), uint16(SETNS), + /*5734*/ uint16(xReadSlashR), + /*5735*/ uint16(xArgRM8), + /*5736*/ uint16(xMatch), + /*5737*/ uint16(xSetOp), uint16(SETP), + /*5739*/ uint16(xReadSlashR), + /*5740*/ uint16(xArgRM8), /*5741*/ uint16(xMatch), - /*5742*/ uint16(xCondIs64), 5745, 5761, - /*5745*/ uint16(xCondDataSize), 5749, 5755, 0, - /*5749*/ uint16(xSetOp), uint16(BT), - /*5751*/ uint16(xReadSlashR), - /*5752*/ uint16(xArgRM16), - /*5753*/ uint16(xArgR16), - /*5754*/ uint16(xMatch), - /*5755*/ uint16(xSetOp), uint16(BT), - /*5757*/ uint16(xReadSlashR), - /*5758*/ uint16(xArgRM32), - /*5759*/ uint16(xArgR32), - /*5760*/ uint16(xMatch), - /*5761*/ uint16(xCondDataSize), 5749, 5755, 5765, - /*5765*/ uint16(xSetOp), uint16(BT), - /*5767*/ uint16(xReadSlashR), - /*5768*/ uint16(xArgRM64), - /*5769*/ uint16(xArgR64), + /*5742*/ uint16(xSetOp), uint16(SETNP), + /*5744*/ uint16(xReadSlashR), + /*5745*/ uint16(xArgRM8), + /*5746*/ uint16(xMatch), + /*5747*/ uint16(xSetOp), uint16(SETL), + /*5749*/ uint16(xReadSlashR), + /*5750*/ uint16(xArgRM8), + /*5751*/ uint16(xMatch), + /*5752*/ uint16(xSetOp), uint16(SETGE), + /*5754*/ uint16(xReadSlashR), + /*5755*/ uint16(xArgRM8), + /*5756*/ uint16(xMatch), + /*5757*/ uint16(xSetOp), uint16(SETLE), + /*5759*/ uint16(xReadSlashR), + /*5760*/ uint16(xArgRM8), + /*5761*/ uint16(xMatch), + /*5762*/ uint16(xSetOp), uint16(SETG), + /*5764*/ uint16(xReadSlashR), + /*5765*/ uint16(xArgRM8), + /*5766*/ uint16(xMatch), + /*5767*/ uint16(xSetOp), uint16(PUSH), + /*5769*/ uint16(xArgFS), /*5770*/ uint16(xMatch), - /*5771*/ uint16(xCondIs64), 5774, 5794, - /*5774*/ uint16(xCondDataSize), 5778, 5786, 0, - /*5778*/ uint16(xSetOp), uint16(SHLD), - /*5780*/ uint16(xReadSlashR), - /*5781*/ uint16(xReadIb), - /*5782*/ uint16(xArgRM16), - /*5783*/ uint16(xArgR16), - /*5784*/ uint16(xArgImm8u), + /*5771*/ uint16(xCondIs64), 5774, 5786, + /*5774*/ uint16(xCondDataSize), 5778, 5782, 0, + /*5778*/ uint16(xSetOp), uint16(POP), + /*5780*/ uint16(xArgFS), + /*5781*/ uint16(xMatch), + /*5782*/ uint16(xSetOp), uint16(POP), + /*5784*/ uint16(xArgFS), /*5785*/ uint16(xMatch), - /*5786*/ uint16(xSetOp), uint16(SHLD), - /*5788*/ uint16(xReadSlashR), - /*5789*/ uint16(xReadIb), - /*5790*/ uint16(xArgRM32), - /*5791*/ uint16(xArgR32), - /*5792*/ uint16(xArgImm8u), + /*5786*/ uint16(xCondDataSize), 5778, 5790, 5794, + /*5790*/ uint16(xSetOp), uint16(POP), + /*5792*/ uint16(xArgFS), /*5793*/ uint16(xMatch), - /*5794*/ uint16(xCondDataSize), 5778, 5786, 5798, - /*5798*/ uint16(xSetOp), uint16(SHLD), - /*5800*/ uint16(xReadSlashR), - /*5801*/ uint16(xReadIb), - /*5802*/ uint16(xArgRM64), - /*5803*/ uint16(xArgR64), - /*5804*/ uint16(xArgImm8u), - /*5805*/ uint16(xMatch), - /*5806*/ uint16(xCondIs64), 5809, 5827, - /*5809*/ uint16(xCondDataSize), 5813, 5820, 0, - /*5813*/ uint16(xSetOp), uint16(SHLD), - /*5815*/ uint16(xReadSlashR), - /*5816*/ uint16(xArgRM16), - /*5817*/ uint16(xArgR16), - /*5818*/ uint16(xArgCL), + /*5794*/ uint16(xSetOp), uint16(POP), + /*5796*/ uint16(xArgFS), + /*5797*/ uint16(xMatch), + /*5798*/ uint16(xSetOp), uint16(CPUID), + /*5800*/ uint16(xMatch), + /*5801*/ uint16(xCondIs64), 5804, 5820, + /*5804*/ uint16(xCondDataSize), 5808, 5814, 0, + /*5808*/ uint16(xSetOp), uint16(BT), + /*5810*/ uint16(xReadSlashR), + /*5811*/ uint16(xArgRM16), + /*5812*/ uint16(xArgR16), + /*5813*/ uint16(xMatch), + /*5814*/ uint16(xSetOp), uint16(BT), + /*5816*/ uint16(xReadSlashR), + /*5817*/ uint16(xArgRM32), + /*5818*/ uint16(xArgR32), /*5819*/ uint16(xMatch), - /*5820*/ uint16(xSetOp), uint16(SHLD), - /*5822*/ uint16(xReadSlashR), - /*5823*/ uint16(xArgRM32), - /*5824*/ uint16(xArgR32), - /*5825*/ uint16(xArgCL), - /*5826*/ uint16(xMatch), - /*5827*/ uint16(xCondDataSize), 5813, 5820, 5831, - /*5831*/ uint16(xSetOp), uint16(SHLD), - /*5833*/ uint16(xReadSlashR), - /*5834*/ uint16(xArgRM64), - /*5835*/ uint16(xArgR64), - /*5836*/ uint16(xArgCL), - /*5837*/ uint16(xMatch), - /*5838*/ uint16(xSetOp), uint16(PUSH), - /*5840*/ uint16(xArgGS), - /*5841*/ uint16(xMatch), - /*5842*/ uint16(xCondIs64), 5845, 5857, - /*5845*/ uint16(xCondDataSize), 5849, 5853, 0, - /*5849*/ uint16(xSetOp), uint16(POP), - /*5851*/ uint16(xArgGS), + /*5820*/ uint16(xCondDataSize), 5808, 5814, 5824, + /*5824*/ uint16(xSetOp), uint16(BT), + /*5826*/ uint16(xReadSlashR), + /*5827*/ uint16(xArgRM64), + /*5828*/ uint16(xArgR64), + /*5829*/ uint16(xMatch), + /*5830*/ uint16(xCondIs64), 5833, 5853, + /*5833*/ uint16(xCondDataSize), 5837, 5845, 0, + /*5837*/ uint16(xSetOp), uint16(SHLD), + /*5839*/ uint16(xReadSlashR), + /*5840*/ uint16(xReadIb), + /*5841*/ uint16(xArgRM16), + /*5842*/ uint16(xArgR16), + /*5843*/ uint16(xArgImm8u), + /*5844*/ uint16(xMatch), + /*5845*/ uint16(xSetOp), uint16(SHLD), + /*5847*/ uint16(xReadSlashR), + /*5848*/ uint16(xReadIb), + /*5849*/ uint16(xArgRM32), + /*5850*/ uint16(xArgR32), + /*5851*/ uint16(xArgImm8u), /*5852*/ uint16(xMatch), - /*5853*/ uint16(xSetOp), uint16(POP), - /*5855*/ uint16(xArgGS), - /*5856*/ uint16(xMatch), - /*5857*/ uint16(xCondDataSize), 5849, 5861, 5865, - /*5861*/ uint16(xSetOp), uint16(POP), - /*5863*/ uint16(xArgGS), + /*5853*/ uint16(xCondDataSize), 5837, 5845, 5857, + /*5857*/ uint16(xSetOp), uint16(SHLD), + /*5859*/ uint16(xReadSlashR), + /*5860*/ uint16(xReadIb), + /*5861*/ uint16(xArgRM64), + /*5862*/ uint16(xArgR64), + /*5863*/ uint16(xArgImm8u), /*5864*/ uint16(xMatch), - /*5865*/ uint16(xSetOp), uint16(POP), - /*5867*/ uint16(xArgGS), - /*5868*/ uint16(xMatch), - /*5869*/ uint16(xSetOp), uint16(RSM), - /*5871*/ uint16(xMatch), - /*5872*/ uint16(xCondIs64), 5875, 5891, - /*5875*/ uint16(xCondDataSize), 5879, 5885, 0, - /*5879*/ uint16(xSetOp), uint16(BTS), + /*5865*/ uint16(xCondIs64), 5868, 5886, + /*5868*/ uint16(xCondDataSize), 5872, 5879, 0, + /*5872*/ uint16(xSetOp), uint16(SHLD), + /*5874*/ uint16(xReadSlashR), + /*5875*/ uint16(xArgRM16), + /*5876*/ uint16(xArgR16), + /*5877*/ uint16(xArgCL), + /*5878*/ uint16(xMatch), + /*5879*/ uint16(xSetOp), uint16(SHLD), /*5881*/ uint16(xReadSlashR), - /*5882*/ uint16(xArgRM16), - /*5883*/ uint16(xArgR16), - /*5884*/ uint16(xMatch), - /*5885*/ uint16(xSetOp), uint16(BTS), - /*5887*/ uint16(xReadSlashR), - /*5888*/ uint16(xArgRM32), - /*5889*/ uint16(xArgR32), - /*5890*/ uint16(xMatch), - /*5891*/ uint16(xCondDataSize), 5879, 5885, 5895, - /*5895*/ uint16(xSetOp), uint16(BTS), - /*5897*/ uint16(xReadSlashR), - /*5898*/ uint16(xArgRM64), - /*5899*/ uint16(xArgR64), + /*5882*/ uint16(xArgRM32), + /*5883*/ uint16(xArgR32), + /*5884*/ uint16(xArgCL), + /*5885*/ uint16(xMatch), + /*5886*/ uint16(xCondDataSize), 5872, 5879, 5890, + /*5890*/ uint16(xSetOp), uint16(SHLD), + /*5892*/ uint16(xReadSlashR), + /*5893*/ uint16(xArgRM64), + /*5894*/ uint16(xArgR64), + /*5895*/ uint16(xArgCL), + /*5896*/ uint16(xMatch), + /*5897*/ uint16(xSetOp), uint16(PUSH), + /*5899*/ uint16(xArgGS), /*5900*/ uint16(xMatch), - /*5901*/ uint16(xCondIs64), 5904, 5924, - /*5904*/ uint16(xCondDataSize), 5908, 5916, 0, - /*5908*/ uint16(xSetOp), uint16(SHRD), - /*5910*/ uint16(xReadSlashR), - /*5911*/ uint16(xReadIb), - /*5912*/ uint16(xArgRM16), - /*5913*/ uint16(xArgR16), - /*5914*/ uint16(xArgImm8u), + /*5901*/ uint16(xCondIs64), 5904, 5916, + /*5904*/ uint16(xCondDataSize), 5908, 5912, 0, + /*5908*/ uint16(xSetOp), uint16(POP), + /*5910*/ uint16(xArgGS), + /*5911*/ uint16(xMatch), + /*5912*/ uint16(xSetOp), uint16(POP), + /*5914*/ uint16(xArgGS), /*5915*/ uint16(xMatch), - /*5916*/ uint16(xSetOp), uint16(SHRD), - /*5918*/ uint16(xReadSlashR), - /*5919*/ uint16(xReadIb), - /*5920*/ uint16(xArgRM32), - /*5921*/ uint16(xArgR32), - /*5922*/ uint16(xArgImm8u), + /*5916*/ uint16(xCondDataSize), 5908, 5920, 5924, + /*5920*/ uint16(xSetOp), uint16(POP), + /*5922*/ uint16(xArgGS), /*5923*/ uint16(xMatch), - /*5924*/ uint16(xCondDataSize), 5908, 5916, 5928, - /*5928*/ uint16(xSetOp), uint16(SHRD), - /*5930*/ uint16(xReadSlashR), - /*5931*/ uint16(xReadIb), - /*5932*/ uint16(xArgRM64), - /*5933*/ uint16(xArgR64), - /*5934*/ uint16(xArgImm8u), - /*5935*/ uint16(xMatch), - /*5936*/ uint16(xCondIs64), 5939, 5957, - /*5939*/ uint16(xCondDataSize), 5943, 5950, 0, - /*5943*/ uint16(xSetOp), uint16(SHRD), - /*5945*/ uint16(xReadSlashR), - /*5946*/ uint16(xArgRM16), - /*5947*/ uint16(xArgR16), - /*5948*/ uint16(xArgCL), + /*5924*/ uint16(xSetOp), uint16(POP), + /*5926*/ uint16(xArgGS), + /*5927*/ uint16(xMatch), + /*5928*/ uint16(xSetOp), uint16(RSM), + /*5930*/ uint16(xMatch), + /*5931*/ uint16(xCondIs64), 5934, 5950, + /*5934*/ uint16(xCondDataSize), 5938, 5944, 0, + /*5938*/ uint16(xSetOp), uint16(BTS), + /*5940*/ uint16(xReadSlashR), + /*5941*/ uint16(xArgRM16), + /*5942*/ uint16(xArgR16), + /*5943*/ uint16(xMatch), + /*5944*/ uint16(xSetOp), uint16(BTS), + /*5946*/ uint16(xReadSlashR), + /*5947*/ uint16(xArgRM32), + /*5948*/ uint16(xArgR32), /*5949*/ uint16(xMatch), - /*5950*/ uint16(xSetOp), uint16(SHRD), - /*5952*/ uint16(xReadSlashR), - /*5953*/ uint16(xArgRM32), - /*5954*/ uint16(xArgR32), - /*5955*/ uint16(xArgCL), - /*5956*/ uint16(xMatch), - /*5957*/ uint16(xCondDataSize), 5943, 5950, 5961, - /*5961*/ uint16(xSetOp), uint16(SHRD), - /*5963*/ uint16(xReadSlashR), - /*5964*/ uint16(xArgRM64), - /*5965*/ uint16(xArgR64), - /*5966*/ uint16(xArgCL), - /*5967*/ uint16(xMatch), - /*5968*/ uint16(xCondByte), 3, - 0xE8, 6217, - 0xF0, 6220, - 0xF8, 6223, - /*5976*/ uint16(xCondSlashR), - 5985, // 0 - 6039, // 1 - 6093, // 2 - 6122, // 3 - 6151, // 4 - 6174, // 5 - 6197, // 6 - 6213, // 7 - /*5985*/ uint16(xCondIs64), 5988, 6000, - /*5988*/ uint16(xCondDataSize), 5992, 5996, 0, - /*5992*/ uint16(xSetOp), uint16(FXSAVE), - /*5994*/ uint16(xArgM512byte), - /*5995*/ uint16(xMatch), - /*5996*/ uint16(xSetOp), uint16(FXSAVE), - /*5998*/ uint16(xArgM512byte), - /*5999*/ uint16(xMatch), - /*6000*/ uint16(xCondPrefix), 2, - 0xF3, 6014, - 0x0, 6006, - /*6006*/ uint16(xCondDataSize), 5992, 5996, 6010, - /*6010*/ uint16(xSetOp), uint16(FXSAVE64), - /*6012*/ uint16(xArgM512byte), - /*6013*/ uint16(xMatch), - /*6014*/ uint16(xCondDataSize), 6018, 6025, 6032, - /*6018*/ uint16(xCondIsMem), 6021, 0, - /*6021*/ uint16(xSetOp), uint16(RDFSBASE), - /*6023*/ uint16(xArgRM32), - /*6024*/ uint16(xMatch), - /*6025*/ uint16(xCondIsMem), 6028, 0, - /*6028*/ uint16(xSetOp), uint16(RDFSBASE), - /*6030*/ uint16(xArgRM32), - /*6031*/ uint16(xMatch), - /*6032*/ uint16(xCondIsMem), 6035, 0, - /*6035*/ uint16(xSetOp), uint16(RDFSBASE), - /*6037*/ uint16(xArgRM64), - /*6038*/ uint16(xMatch), - /*6039*/ uint16(xCondIs64), 6042, 6054, - /*6042*/ uint16(xCondDataSize), 6046, 6050, 0, - /*6046*/ uint16(xSetOp), uint16(FXRSTOR), - /*6048*/ uint16(xArgM512byte), - /*6049*/ uint16(xMatch), - /*6050*/ uint16(xSetOp), uint16(FXRSTOR), - /*6052*/ uint16(xArgM512byte), - /*6053*/ uint16(xMatch), - /*6054*/ uint16(xCondPrefix), 2, - 0xF3, 6068, - 0x0, 6060, - /*6060*/ uint16(xCondDataSize), 6046, 6050, 6064, - /*6064*/ uint16(xSetOp), uint16(FXRSTOR64), - /*6066*/ uint16(xArgM512byte), - /*6067*/ uint16(xMatch), - /*6068*/ uint16(xCondDataSize), 6072, 6079, 6086, - /*6072*/ uint16(xCondIsMem), 6075, 0, - /*6075*/ uint16(xSetOp), uint16(RDGSBASE), - /*6077*/ uint16(xArgRM32), - /*6078*/ uint16(xMatch), - /*6079*/ uint16(xCondIsMem), 6082, 0, - /*6082*/ uint16(xSetOp), uint16(RDGSBASE), - /*6084*/ uint16(xArgRM32), - /*6085*/ uint16(xMatch), - /*6086*/ uint16(xCondIsMem), 6089, 0, - /*6089*/ uint16(xSetOp), uint16(RDGSBASE), - /*6091*/ uint16(xArgRM64), - /*6092*/ uint16(xMatch), - /*6093*/ uint16(xCondIs64), 6096, 6100, - /*6096*/ uint16(xSetOp), uint16(LDMXCSR), - /*6098*/ uint16(xArgM32), - /*6099*/ uint16(xMatch), - /*6100*/ uint16(xCondPrefix), 2, - 0xF3, 6106, - 0x0, 6096, - /*6106*/ uint16(xCondDataSize), 6110, 6114, 6118, - /*6110*/ uint16(xSetOp), uint16(WRFSBASE), - /*6112*/ uint16(xArgRM32), - /*6113*/ uint16(xMatch), - /*6114*/ uint16(xSetOp), uint16(WRFSBASE), - /*6116*/ uint16(xArgRM32), - /*6117*/ uint16(xMatch), - /*6118*/ uint16(xSetOp), uint16(WRFSBASE), - /*6120*/ uint16(xArgRM64), - /*6121*/ uint16(xMatch), - /*6122*/ uint16(xCondIs64), 6125, 6129, - /*6125*/ uint16(xSetOp), uint16(STMXCSR), - /*6127*/ uint16(xArgM32), - /*6128*/ uint16(xMatch), - /*6129*/ uint16(xCondPrefix), 2, - 0xF3, 6135, - 0x0, 6125, - /*6135*/ uint16(xCondDataSize), 6139, 6143, 6147, - /*6139*/ uint16(xSetOp), uint16(WRGSBASE), - /*6141*/ uint16(xArgRM32), - /*6142*/ uint16(xMatch), - /*6143*/ uint16(xSetOp), uint16(WRGSBASE), - /*6145*/ uint16(xArgRM32), - /*6146*/ uint16(xMatch), - /*6147*/ uint16(xSetOp), uint16(WRGSBASE), - /*6149*/ uint16(xArgRM64), - /*6150*/ uint16(xMatch), - /*6151*/ uint16(xCondIs64), 6154, 6166, - /*6154*/ uint16(xCondDataSize), 6158, 6162, 0, - /*6158*/ uint16(xSetOp), uint16(XSAVE), - /*6160*/ uint16(xArgMem), - /*6161*/ uint16(xMatch), - /*6162*/ uint16(xSetOp), uint16(XSAVE), - /*6164*/ uint16(xArgMem), - /*6165*/ uint16(xMatch), - /*6166*/ uint16(xCondDataSize), 6158, 6162, 6170, - /*6170*/ uint16(xSetOp), uint16(XSAVE64), - /*6172*/ uint16(xArgMem), - /*6173*/ uint16(xMatch), - /*6174*/ uint16(xCondIs64), 6177, 6189, - /*6177*/ uint16(xCondDataSize), 6181, 6185, 0, - /*6181*/ uint16(xSetOp), uint16(XRSTOR), - /*6183*/ uint16(xArgMem), - /*6184*/ uint16(xMatch), - /*6185*/ uint16(xSetOp), uint16(XRSTOR), - /*6187*/ uint16(xArgMem), - /*6188*/ uint16(xMatch), - /*6189*/ uint16(xCondDataSize), 6181, 6185, 6193, - /*6193*/ uint16(xSetOp), uint16(XRSTOR64), - /*6195*/ uint16(xArgMem), - /*6196*/ uint16(xMatch), - /*6197*/ uint16(xCondDataSize), 6201, 6205, 6209, - /*6201*/ uint16(xSetOp), uint16(XSAVEOPT), - /*6203*/ uint16(xArgMem), - /*6204*/ uint16(xMatch), - /*6205*/ uint16(xSetOp), uint16(XSAVEOPT), - /*6207*/ uint16(xArgMem), - /*6208*/ uint16(xMatch), - /*6209*/ uint16(xSetOp), uint16(XSAVEOPT64), - /*6211*/ uint16(xArgMem), - /*6212*/ uint16(xMatch), - /*6213*/ uint16(xSetOp), uint16(CLFLUSH), - /*6215*/ uint16(xArgM8), - /*6216*/ uint16(xMatch), - /*6217*/ uint16(xSetOp), uint16(LFENCE), - /*6219*/ uint16(xMatch), - /*6220*/ uint16(xSetOp), uint16(MFENCE), - /*6222*/ uint16(xMatch), - /*6223*/ uint16(xSetOp), uint16(SFENCE), - /*6225*/ uint16(xMatch), - /*6226*/ uint16(xCondIs64), 6229, 6245, - /*6229*/ uint16(xCondDataSize), 6233, 6239, 0, - /*6233*/ uint16(xSetOp), uint16(IMUL), - /*6235*/ uint16(xReadSlashR), - /*6236*/ uint16(xArgR16), - /*6237*/ uint16(xArgRM16), - /*6238*/ uint16(xMatch), - /*6239*/ uint16(xSetOp), uint16(IMUL), - /*6241*/ uint16(xReadSlashR), - /*6242*/ uint16(xArgR32), - /*6243*/ uint16(xArgRM32), - /*6244*/ uint16(xMatch), - /*6245*/ uint16(xCondDataSize), 6233, 6239, 6249, - /*6249*/ uint16(xSetOp), uint16(IMUL), - /*6251*/ uint16(xReadSlashR), - /*6252*/ uint16(xArgR64), - /*6253*/ uint16(xArgRM64), - /*6254*/ uint16(xMatch), - /*6255*/ uint16(xSetOp), uint16(CMPXCHG), - /*6257*/ uint16(xReadSlashR), - /*6258*/ uint16(xArgRM8), - /*6259*/ uint16(xArgR8), - /*6260*/ uint16(xMatch), - /*6261*/ uint16(xCondIs64), 6264, 6280, - /*6264*/ uint16(xCondDataSize), 6268, 6274, 0, - /*6268*/ uint16(xSetOp), uint16(CMPXCHG), - /*6270*/ uint16(xReadSlashR), - /*6271*/ uint16(xArgRM16), - /*6272*/ uint16(xArgR16), - /*6273*/ uint16(xMatch), - /*6274*/ uint16(xSetOp), uint16(CMPXCHG), - /*6276*/ uint16(xReadSlashR), - /*6277*/ uint16(xArgRM32), - /*6278*/ uint16(xArgR32), - /*6279*/ uint16(xMatch), - /*6280*/ uint16(xCondDataSize), 6268, 6274, 6284, - /*6284*/ uint16(xSetOp), uint16(CMPXCHG), - /*6286*/ uint16(xReadSlashR), - /*6287*/ uint16(xArgRM64), - /*6288*/ uint16(xArgR64), - /*6289*/ uint16(xMatch), - /*6290*/ uint16(xCondIs64), 6293, 6309, - /*6293*/ uint16(xCondDataSize), 6297, 6303, 0, - /*6297*/ uint16(xSetOp), uint16(LSS), - /*6299*/ uint16(xReadSlashR), - /*6300*/ uint16(xArgR16), - /*6301*/ uint16(xArgM16colon16), - /*6302*/ uint16(xMatch), - /*6303*/ uint16(xSetOp), uint16(LSS), - /*6305*/ uint16(xReadSlashR), - /*6306*/ uint16(xArgR32), - /*6307*/ uint16(xArgM16colon32), - /*6308*/ uint16(xMatch), - /*6309*/ uint16(xCondDataSize), 6297, 6303, 6313, - /*6313*/ uint16(xSetOp), uint16(LSS), - /*6315*/ uint16(xReadSlashR), - /*6316*/ uint16(xArgR64), - /*6317*/ uint16(xArgM16colon64), - /*6318*/ uint16(xMatch), - /*6319*/ uint16(xCondIs64), 6322, 6338, - /*6322*/ uint16(xCondDataSize), 6326, 6332, 0, - /*6326*/ uint16(xSetOp), uint16(BTR), - /*6328*/ uint16(xReadSlashR), - /*6329*/ uint16(xArgRM16), - /*6330*/ uint16(xArgR16), - /*6331*/ uint16(xMatch), - /*6332*/ uint16(xSetOp), uint16(BTR), - /*6334*/ uint16(xReadSlashR), - /*6335*/ uint16(xArgRM32), - /*6336*/ uint16(xArgR32), - /*6337*/ uint16(xMatch), - /*6338*/ uint16(xCondDataSize), 6326, 6332, 6342, - /*6342*/ uint16(xSetOp), uint16(BTR), - /*6344*/ uint16(xReadSlashR), - /*6345*/ uint16(xArgRM64), - /*6346*/ uint16(xArgR64), - /*6347*/ uint16(xMatch), - /*6348*/ uint16(xCondIs64), 6351, 6367, - /*6351*/ uint16(xCondDataSize), 6355, 6361, 0, - /*6355*/ uint16(xSetOp), uint16(LFS), - /*6357*/ uint16(xReadSlashR), - /*6358*/ uint16(xArgR16), - /*6359*/ uint16(xArgM16colon16), - /*6360*/ uint16(xMatch), - /*6361*/ uint16(xSetOp), uint16(LFS), - /*6363*/ uint16(xReadSlashR), - /*6364*/ uint16(xArgR32), - /*6365*/ uint16(xArgM16colon32), - /*6366*/ uint16(xMatch), - /*6367*/ uint16(xCondDataSize), 6355, 6361, 6371, - /*6371*/ uint16(xSetOp), uint16(LFS), - /*6373*/ uint16(xReadSlashR), - /*6374*/ uint16(xArgR64), - /*6375*/ uint16(xArgM16colon64), - /*6376*/ uint16(xMatch), - /*6377*/ uint16(xCondIs64), 6380, 6396, - /*6380*/ uint16(xCondDataSize), 6384, 6390, 0, - /*6384*/ uint16(xSetOp), uint16(LGS), - /*6386*/ uint16(xReadSlashR), - /*6387*/ uint16(xArgR16), - /*6388*/ uint16(xArgM16colon16), - /*6389*/ uint16(xMatch), - /*6390*/ uint16(xSetOp), uint16(LGS), - /*6392*/ uint16(xReadSlashR), - /*6393*/ uint16(xArgR32), - /*6394*/ uint16(xArgM16colon32), - /*6395*/ uint16(xMatch), - /*6396*/ uint16(xCondDataSize), 6384, 6390, 6400, - /*6400*/ uint16(xSetOp), uint16(LGS), - /*6402*/ uint16(xReadSlashR), - /*6403*/ uint16(xArgR64), - /*6404*/ uint16(xArgM16colon64), - /*6405*/ uint16(xMatch), - /*6406*/ uint16(xCondIs64), 6409, 6425, - /*6409*/ uint16(xCondDataSize), 6413, 6419, 0, - /*6413*/ uint16(xSetOp), uint16(MOVZX), - /*6415*/ uint16(xReadSlashR), - /*6416*/ uint16(xArgR16), - /*6417*/ uint16(xArgRM8), - /*6418*/ uint16(xMatch), - /*6419*/ uint16(xSetOp), uint16(MOVZX), - /*6421*/ uint16(xReadSlashR), - /*6422*/ uint16(xArgR32), - /*6423*/ uint16(xArgRM8), - /*6424*/ uint16(xMatch), - /*6425*/ uint16(xCondDataSize), 6413, 6419, 6429, - /*6429*/ uint16(xSetOp), uint16(MOVZX), - /*6431*/ uint16(xReadSlashR), - /*6432*/ uint16(xArgR64), - /*6433*/ uint16(xArgRM8), - /*6434*/ uint16(xMatch), - /*6435*/ uint16(xCondIs64), 6438, 6454, - /*6438*/ uint16(xCondDataSize), 6442, 6448, 0, - /*6442*/ uint16(xSetOp), uint16(MOVZX), - /*6444*/ uint16(xReadSlashR), - /*6445*/ uint16(xArgR16), - /*6446*/ uint16(xArgRM16), - /*6447*/ uint16(xMatch), - /*6448*/ uint16(xSetOp), uint16(MOVZX), - /*6450*/ uint16(xReadSlashR), - /*6451*/ uint16(xArgR32), - /*6452*/ uint16(xArgRM16), - /*6453*/ uint16(xMatch), - /*6454*/ uint16(xCondDataSize), 6442, 6448, 6458, - /*6458*/ uint16(xSetOp), uint16(MOVZX), - /*6460*/ uint16(xReadSlashR), - /*6461*/ uint16(xArgR64), - /*6462*/ uint16(xArgRM16), - /*6463*/ uint16(xMatch), - /*6464*/ uint16(xCondIs64), 6467, 6487, - /*6467*/ uint16(xCondPrefix), 1, - 0xF3, 6471, - /*6471*/ uint16(xCondDataSize), 6475, 6481, 0, - /*6475*/ uint16(xSetOp), uint16(POPCNT), - /*6477*/ uint16(xReadSlashR), - /*6478*/ uint16(xArgR16), - /*6479*/ uint16(xArgRM16), - /*6480*/ uint16(xMatch), - /*6481*/ uint16(xSetOp), uint16(POPCNT), - /*6483*/ uint16(xReadSlashR), - /*6484*/ uint16(xArgR32), - /*6485*/ uint16(xArgRM32), - /*6486*/ uint16(xMatch), - /*6487*/ uint16(xCondPrefix), 1, - 0xF3, 6491, - /*6491*/ uint16(xCondDataSize), 6475, 6481, 6495, - /*6495*/ uint16(xSetOp), uint16(POPCNT), - /*6497*/ uint16(xReadSlashR), - /*6498*/ uint16(xArgR64), - /*6499*/ uint16(xArgRM64), - /*6500*/ uint16(xMatch), - /*6501*/ uint16(xCondDataSize), 0, 6505, 0, - /*6505*/ uint16(xSetOp), uint16(UD1), - /*6507*/ uint16(xReadSlashR), - /*6508*/ uint16(xArgR32), - /*6509*/ uint16(xArgRM32), - /*6510*/ uint16(xMatch), - /*6511*/ uint16(xCondSlashR), + /*5950*/ uint16(xCondDataSize), 5938, 5944, 5954, + /*5954*/ uint16(xSetOp), uint16(BTS), + /*5956*/ uint16(xReadSlashR), + /*5957*/ uint16(xArgRM64), + /*5958*/ uint16(xArgR64), + /*5959*/ uint16(xMatch), + /*5960*/ uint16(xCondIs64), 5963, 5983, + /*5963*/ uint16(xCondDataSize), 5967, 5975, 0, + /*5967*/ uint16(xSetOp), uint16(SHRD), + /*5969*/ uint16(xReadSlashR), + /*5970*/ uint16(xReadIb), + /*5971*/ uint16(xArgRM16), + /*5972*/ uint16(xArgR16), + /*5973*/ uint16(xArgImm8u), + /*5974*/ uint16(xMatch), + /*5975*/ uint16(xSetOp), uint16(SHRD), + /*5977*/ uint16(xReadSlashR), + /*5978*/ uint16(xReadIb), + /*5979*/ uint16(xArgRM32), + /*5980*/ uint16(xArgR32), + /*5981*/ uint16(xArgImm8u), + /*5982*/ uint16(xMatch), + /*5983*/ uint16(xCondDataSize), 5967, 5975, 5987, + /*5987*/ uint16(xSetOp), uint16(SHRD), + /*5989*/ uint16(xReadSlashR), + /*5990*/ uint16(xReadIb), + /*5991*/ uint16(xArgRM64), + /*5992*/ uint16(xArgR64), + /*5993*/ uint16(xArgImm8u), + /*5994*/ uint16(xMatch), + /*5995*/ uint16(xCondIs64), 5998, 6016, + /*5998*/ uint16(xCondDataSize), 6002, 6009, 0, + /*6002*/ uint16(xSetOp), uint16(SHRD), + /*6004*/ uint16(xReadSlashR), + /*6005*/ uint16(xArgRM16), + /*6006*/ uint16(xArgR16), + /*6007*/ uint16(xArgCL), + /*6008*/ uint16(xMatch), + /*6009*/ uint16(xSetOp), uint16(SHRD), + /*6011*/ uint16(xReadSlashR), + /*6012*/ uint16(xArgRM32), + /*6013*/ uint16(xArgR32), + /*6014*/ uint16(xArgCL), + /*6015*/ uint16(xMatch), + /*6016*/ uint16(xCondDataSize), 6002, 6009, 6020, + /*6020*/ uint16(xSetOp), uint16(SHRD), + /*6022*/ uint16(xReadSlashR), + /*6023*/ uint16(xArgRM64), + /*6024*/ uint16(xArgR64), + /*6025*/ uint16(xArgCL), + /*6026*/ uint16(xMatch), + /*6027*/ uint16(xCondByte), 3, + 0xE8, 6276, + 0xF0, 6279, + 0xF8, 6282, + /*6035*/ uint16(xCondSlashR), + 6044, // 0 + 6098, // 1 + 6152, // 2 + 6181, // 3 + 6210, // 4 + 6233, // 5 + 6256, // 6 + 6272, // 7 + /*6044*/ uint16(xCondIs64), 6047, 6059, + /*6047*/ uint16(xCondDataSize), 6051, 6055, 0, + /*6051*/ uint16(xSetOp), uint16(FXSAVE), + /*6053*/ uint16(xArgM512byte), + /*6054*/ uint16(xMatch), + /*6055*/ uint16(xSetOp), uint16(FXSAVE), + /*6057*/ uint16(xArgM512byte), + /*6058*/ uint16(xMatch), + /*6059*/ uint16(xCondPrefix), 2, + 0xF3, 6073, + 0x0, 6065, + /*6065*/ uint16(xCondDataSize), 6051, 6055, 6069, + /*6069*/ uint16(xSetOp), uint16(FXSAVE64), + /*6071*/ uint16(xArgM512byte), + /*6072*/ uint16(xMatch), + /*6073*/ uint16(xCondDataSize), 6077, 6084, 6091, + /*6077*/ uint16(xCondIsMem), 6080, 0, + /*6080*/ uint16(xSetOp), uint16(RDFSBASE), + /*6082*/ uint16(xArgRM32), + /*6083*/ uint16(xMatch), + /*6084*/ uint16(xCondIsMem), 6087, 0, + /*6087*/ uint16(xSetOp), uint16(RDFSBASE), + /*6089*/ uint16(xArgRM32), + /*6090*/ uint16(xMatch), + /*6091*/ uint16(xCondIsMem), 6094, 0, + /*6094*/ uint16(xSetOp), uint16(RDFSBASE), + /*6096*/ uint16(xArgRM64), + /*6097*/ uint16(xMatch), + /*6098*/ uint16(xCondIs64), 6101, 6113, + /*6101*/ uint16(xCondDataSize), 6105, 6109, 0, + /*6105*/ uint16(xSetOp), uint16(FXRSTOR), + /*6107*/ uint16(xArgM512byte), + /*6108*/ uint16(xMatch), + /*6109*/ uint16(xSetOp), uint16(FXRSTOR), + /*6111*/ uint16(xArgM512byte), + /*6112*/ uint16(xMatch), + /*6113*/ uint16(xCondPrefix), 2, + 0xF3, 6127, + 0x0, 6119, + /*6119*/ uint16(xCondDataSize), 6105, 6109, 6123, + /*6123*/ uint16(xSetOp), uint16(FXRSTOR64), + /*6125*/ uint16(xArgM512byte), + /*6126*/ uint16(xMatch), + /*6127*/ uint16(xCondDataSize), 6131, 6138, 6145, + /*6131*/ uint16(xCondIsMem), 6134, 0, + /*6134*/ uint16(xSetOp), uint16(RDGSBASE), + /*6136*/ uint16(xArgRM32), + /*6137*/ uint16(xMatch), + /*6138*/ uint16(xCondIsMem), 6141, 0, + /*6141*/ uint16(xSetOp), uint16(RDGSBASE), + /*6143*/ uint16(xArgRM32), + /*6144*/ uint16(xMatch), + /*6145*/ uint16(xCondIsMem), 6148, 0, + /*6148*/ uint16(xSetOp), uint16(RDGSBASE), + /*6150*/ uint16(xArgRM64), + /*6151*/ uint16(xMatch), + /*6152*/ uint16(xCondIs64), 6155, 6159, + /*6155*/ uint16(xSetOp), uint16(LDMXCSR), + /*6157*/ uint16(xArgM32), + /*6158*/ uint16(xMatch), + /*6159*/ uint16(xCondPrefix), 2, + 0xF3, 6165, + 0x0, 6155, + /*6165*/ uint16(xCondDataSize), 6169, 6173, 6177, + /*6169*/ uint16(xSetOp), uint16(WRFSBASE), + /*6171*/ uint16(xArgRM32), + /*6172*/ uint16(xMatch), + /*6173*/ uint16(xSetOp), uint16(WRFSBASE), + /*6175*/ uint16(xArgRM32), + /*6176*/ uint16(xMatch), + /*6177*/ uint16(xSetOp), uint16(WRFSBASE), + /*6179*/ uint16(xArgRM64), + /*6180*/ uint16(xMatch), + /*6181*/ uint16(xCondIs64), 6184, 6188, + /*6184*/ uint16(xSetOp), uint16(STMXCSR), + /*6186*/ uint16(xArgM32), + /*6187*/ uint16(xMatch), + /*6188*/ uint16(xCondPrefix), 2, + 0xF3, 6194, + 0x0, 6184, + /*6194*/ uint16(xCondDataSize), 6198, 6202, 6206, + /*6198*/ uint16(xSetOp), uint16(WRGSBASE), + /*6200*/ uint16(xArgRM32), + /*6201*/ uint16(xMatch), + /*6202*/ uint16(xSetOp), uint16(WRGSBASE), + /*6204*/ uint16(xArgRM32), + /*6205*/ uint16(xMatch), + /*6206*/ uint16(xSetOp), uint16(WRGSBASE), + /*6208*/ uint16(xArgRM64), + /*6209*/ uint16(xMatch), + /*6210*/ uint16(xCondIs64), 6213, 6225, + /*6213*/ uint16(xCondDataSize), 6217, 6221, 0, + /*6217*/ uint16(xSetOp), uint16(XSAVE), + /*6219*/ uint16(xArgMem), + /*6220*/ uint16(xMatch), + /*6221*/ uint16(xSetOp), uint16(XSAVE), + /*6223*/ uint16(xArgMem), + /*6224*/ uint16(xMatch), + /*6225*/ uint16(xCondDataSize), 6217, 6221, 6229, + /*6229*/ uint16(xSetOp), uint16(XSAVE64), + /*6231*/ uint16(xArgMem), + /*6232*/ uint16(xMatch), + /*6233*/ uint16(xCondIs64), 6236, 6248, + /*6236*/ uint16(xCondDataSize), 6240, 6244, 0, + /*6240*/ uint16(xSetOp), uint16(XRSTOR), + /*6242*/ uint16(xArgMem), + /*6243*/ uint16(xMatch), + /*6244*/ uint16(xSetOp), uint16(XRSTOR), + /*6246*/ uint16(xArgMem), + /*6247*/ uint16(xMatch), + /*6248*/ uint16(xCondDataSize), 6240, 6244, 6252, + /*6252*/ uint16(xSetOp), uint16(XRSTOR64), + /*6254*/ uint16(xArgMem), + /*6255*/ uint16(xMatch), + /*6256*/ uint16(xCondDataSize), 6260, 6264, 6268, + /*6260*/ uint16(xSetOp), uint16(XSAVEOPT), + /*6262*/ uint16(xArgMem), + /*6263*/ uint16(xMatch), + /*6264*/ uint16(xSetOp), uint16(XSAVEOPT), + /*6266*/ uint16(xArgMem), + /*6267*/ uint16(xMatch), + /*6268*/ uint16(xSetOp), uint16(XSAVEOPT64), + /*6270*/ uint16(xArgMem), + /*6271*/ uint16(xMatch), + /*6272*/ uint16(xSetOp), uint16(CLFLUSH), + /*6274*/ uint16(xArgM8), + /*6275*/ uint16(xMatch), + /*6276*/ uint16(xSetOp), uint16(LFENCE), + /*6278*/ uint16(xMatch), + /*6279*/ uint16(xSetOp), uint16(MFENCE), + /*6281*/ uint16(xMatch), + /*6282*/ uint16(xSetOp), uint16(SFENCE), + /*6284*/ uint16(xMatch), + /*6285*/ uint16(xCondIs64), 6288, 6304, + /*6288*/ uint16(xCondDataSize), 6292, 6298, 0, + /*6292*/ uint16(xSetOp), uint16(IMUL), + /*6294*/ uint16(xReadSlashR), + /*6295*/ uint16(xArgR16), + /*6296*/ uint16(xArgRM16), + /*6297*/ uint16(xMatch), + /*6298*/ uint16(xSetOp), uint16(IMUL), + /*6300*/ uint16(xReadSlashR), + /*6301*/ uint16(xArgR32), + /*6302*/ uint16(xArgRM32), + /*6303*/ uint16(xMatch), + /*6304*/ uint16(xCondDataSize), 6292, 6298, 6308, + /*6308*/ uint16(xSetOp), uint16(IMUL), + /*6310*/ uint16(xReadSlashR), + /*6311*/ uint16(xArgR64), + /*6312*/ uint16(xArgRM64), + /*6313*/ uint16(xMatch), + /*6314*/ uint16(xSetOp), uint16(CMPXCHG), + /*6316*/ uint16(xReadSlashR), + /*6317*/ uint16(xArgRM8), + /*6318*/ uint16(xArgR8), + /*6319*/ uint16(xMatch), + /*6320*/ uint16(xCondIs64), 6323, 6339, + /*6323*/ uint16(xCondDataSize), 6327, 6333, 0, + /*6327*/ uint16(xSetOp), uint16(CMPXCHG), + /*6329*/ uint16(xReadSlashR), + /*6330*/ uint16(xArgRM16), + /*6331*/ uint16(xArgR16), + /*6332*/ uint16(xMatch), + /*6333*/ uint16(xSetOp), uint16(CMPXCHG), + /*6335*/ uint16(xReadSlashR), + /*6336*/ uint16(xArgRM32), + /*6337*/ uint16(xArgR32), + /*6338*/ uint16(xMatch), + /*6339*/ uint16(xCondDataSize), 6327, 6333, 6343, + /*6343*/ uint16(xSetOp), uint16(CMPXCHG), + /*6345*/ uint16(xReadSlashR), + /*6346*/ uint16(xArgRM64), + /*6347*/ uint16(xArgR64), + /*6348*/ uint16(xMatch), + /*6349*/ uint16(xCondIs64), 6352, 6368, + /*6352*/ uint16(xCondDataSize), 6356, 6362, 0, + /*6356*/ uint16(xSetOp), uint16(LSS), + /*6358*/ uint16(xReadSlashR), + /*6359*/ uint16(xArgR16), + /*6360*/ uint16(xArgM16colon16), + /*6361*/ uint16(xMatch), + /*6362*/ uint16(xSetOp), uint16(LSS), + /*6364*/ uint16(xReadSlashR), + /*6365*/ uint16(xArgR32), + /*6366*/ uint16(xArgM16colon32), + /*6367*/ uint16(xMatch), + /*6368*/ uint16(xCondDataSize), 6356, 6362, 6372, + /*6372*/ uint16(xSetOp), uint16(LSS), + /*6374*/ uint16(xReadSlashR), + /*6375*/ uint16(xArgR64), + /*6376*/ uint16(xArgM16colon64), + /*6377*/ uint16(xMatch), + /*6378*/ uint16(xCondIs64), 6381, 6397, + /*6381*/ uint16(xCondDataSize), 6385, 6391, 0, + /*6385*/ uint16(xSetOp), uint16(BTR), + /*6387*/ uint16(xReadSlashR), + /*6388*/ uint16(xArgRM16), + /*6389*/ uint16(xArgR16), + /*6390*/ uint16(xMatch), + /*6391*/ uint16(xSetOp), uint16(BTR), + /*6393*/ uint16(xReadSlashR), + /*6394*/ uint16(xArgRM32), + /*6395*/ uint16(xArgR32), + /*6396*/ uint16(xMatch), + /*6397*/ uint16(xCondDataSize), 6385, 6391, 6401, + /*6401*/ uint16(xSetOp), uint16(BTR), + /*6403*/ uint16(xReadSlashR), + /*6404*/ uint16(xArgRM64), + /*6405*/ uint16(xArgR64), + /*6406*/ uint16(xMatch), + /*6407*/ uint16(xCondIs64), 6410, 6426, + /*6410*/ uint16(xCondDataSize), 6414, 6420, 0, + /*6414*/ uint16(xSetOp), uint16(LFS), + /*6416*/ uint16(xReadSlashR), + /*6417*/ uint16(xArgR16), + /*6418*/ uint16(xArgM16colon16), + /*6419*/ uint16(xMatch), + /*6420*/ uint16(xSetOp), uint16(LFS), + /*6422*/ uint16(xReadSlashR), + /*6423*/ uint16(xArgR32), + /*6424*/ uint16(xArgM16colon32), + /*6425*/ uint16(xMatch), + /*6426*/ uint16(xCondDataSize), 6414, 6420, 6430, + /*6430*/ uint16(xSetOp), uint16(LFS), + /*6432*/ uint16(xReadSlashR), + /*6433*/ uint16(xArgR64), + /*6434*/ uint16(xArgM16colon64), + /*6435*/ uint16(xMatch), + /*6436*/ uint16(xCondIs64), 6439, 6455, + /*6439*/ uint16(xCondDataSize), 6443, 6449, 0, + /*6443*/ uint16(xSetOp), uint16(LGS), + /*6445*/ uint16(xReadSlashR), + /*6446*/ uint16(xArgR16), + /*6447*/ uint16(xArgM16colon16), + /*6448*/ uint16(xMatch), + /*6449*/ uint16(xSetOp), uint16(LGS), + /*6451*/ uint16(xReadSlashR), + /*6452*/ uint16(xArgR32), + /*6453*/ uint16(xArgM16colon32), + /*6454*/ uint16(xMatch), + /*6455*/ uint16(xCondDataSize), 6443, 6449, 6459, + /*6459*/ uint16(xSetOp), uint16(LGS), + /*6461*/ uint16(xReadSlashR), + /*6462*/ uint16(xArgR64), + /*6463*/ uint16(xArgM16colon64), + /*6464*/ uint16(xMatch), + /*6465*/ uint16(xCondIs64), 6468, 6484, + /*6468*/ uint16(xCondDataSize), 6472, 6478, 0, + /*6472*/ uint16(xSetOp), uint16(MOVZX), + /*6474*/ uint16(xReadSlashR), + /*6475*/ uint16(xArgR16), + /*6476*/ uint16(xArgRM8), + /*6477*/ uint16(xMatch), + /*6478*/ uint16(xSetOp), uint16(MOVZX), + /*6480*/ uint16(xReadSlashR), + /*6481*/ uint16(xArgR32), + /*6482*/ uint16(xArgRM8), + /*6483*/ uint16(xMatch), + /*6484*/ uint16(xCondDataSize), 6472, 6478, 6488, + /*6488*/ uint16(xSetOp), uint16(MOVZX), + /*6490*/ uint16(xReadSlashR), + /*6491*/ uint16(xArgR64), + /*6492*/ uint16(xArgRM8), + /*6493*/ uint16(xMatch), + /*6494*/ uint16(xCondIs64), 6497, 6513, + /*6497*/ uint16(xCondDataSize), 6501, 6507, 0, + /*6501*/ uint16(xSetOp), uint16(MOVZX), + /*6503*/ uint16(xReadSlashR), + /*6504*/ uint16(xArgR16), + /*6505*/ uint16(xArgRM16), + /*6506*/ uint16(xMatch), + /*6507*/ uint16(xSetOp), uint16(MOVZX), + /*6509*/ uint16(xReadSlashR), + /*6510*/ uint16(xArgR32), + /*6511*/ uint16(xArgRM16), + /*6512*/ uint16(xMatch), + /*6513*/ uint16(xCondDataSize), 6501, 6507, 6517, + /*6517*/ uint16(xSetOp), uint16(MOVZX), + /*6519*/ uint16(xReadSlashR), + /*6520*/ uint16(xArgR64), + /*6521*/ uint16(xArgRM16), + /*6522*/ uint16(xMatch), + /*6523*/ uint16(xCondIs64), 6526, 6546, + /*6526*/ uint16(xCondPrefix), 1, + 0xF3, 6530, + /*6530*/ uint16(xCondDataSize), 6534, 6540, 0, + /*6534*/ uint16(xSetOp), uint16(POPCNT), + /*6536*/ uint16(xReadSlashR), + /*6537*/ uint16(xArgR16), + /*6538*/ uint16(xArgRM16), + /*6539*/ uint16(xMatch), + /*6540*/ uint16(xSetOp), uint16(POPCNT), + /*6542*/ uint16(xReadSlashR), + /*6543*/ uint16(xArgR32), + /*6544*/ uint16(xArgRM32), + /*6545*/ uint16(xMatch), + /*6546*/ uint16(xCondPrefix), 1, + 0xF3, 6550, + /*6550*/ uint16(xCondDataSize), 6534, 6540, 6554, + /*6554*/ uint16(xSetOp), uint16(POPCNT), + /*6556*/ uint16(xReadSlashR), + /*6557*/ uint16(xArgR64), + /*6558*/ uint16(xArgRM64), + /*6559*/ uint16(xMatch), + /*6560*/ uint16(xCondDataSize), 0, 6564, 0, + /*6564*/ uint16(xSetOp), uint16(UD1), + /*6566*/ uint16(xReadSlashR), + /*6567*/ uint16(xArgR32), + /*6568*/ uint16(xArgRM32), + /*6569*/ uint16(xMatch), + /*6570*/ uint16(xCondSlashR), 0, // 0 0, // 1 0, // 2 0, // 3 - 6520, // 4 - 6549, // 5 - 6578, // 6 - 6607, // 7 - /*6520*/ uint16(xCondIs64), 6523, 6539, - /*6523*/ uint16(xCondDataSize), 6527, 6533, 0, - /*6527*/ uint16(xSetOp), uint16(BT), - /*6529*/ uint16(xReadIb), - /*6530*/ uint16(xArgRM16), - /*6531*/ uint16(xArgImm8u), - /*6532*/ uint16(xMatch), - /*6533*/ uint16(xSetOp), uint16(BT), - /*6535*/ uint16(xReadIb), - /*6536*/ uint16(xArgRM32), - /*6537*/ uint16(xArgImm8u), - /*6538*/ uint16(xMatch), - /*6539*/ uint16(xCondDataSize), 6527, 6533, 6543, - /*6543*/ uint16(xSetOp), uint16(BT), - /*6545*/ uint16(xReadIb), - /*6546*/ uint16(xArgRM64), - /*6547*/ uint16(xArgImm8u), - /*6548*/ uint16(xMatch), - /*6549*/ uint16(xCondIs64), 6552, 6568, - /*6552*/ uint16(xCondDataSize), 6556, 6562, 0, - /*6556*/ uint16(xSetOp), uint16(BTS), - /*6558*/ uint16(xReadIb), - /*6559*/ uint16(xArgRM16), - /*6560*/ uint16(xArgImm8u), - /*6561*/ uint16(xMatch), - /*6562*/ uint16(xSetOp), uint16(BTS), - /*6564*/ uint16(xReadIb), - /*6565*/ uint16(xArgRM32), - /*6566*/ uint16(xArgImm8u), - /*6567*/ uint16(xMatch), - /*6568*/ uint16(xCondDataSize), 6556, 6562, 6572, - /*6572*/ uint16(xSetOp), uint16(BTS), - /*6574*/ uint16(xReadIb), - /*6575*/ uint16(xArgRM64), - /*6576*/ uint16(xArgImm8u), - /*6577*/ uint16(xMatch), - /*6578*/ uint16(xCondIs64), 6581, 6597, - /*6581*/ uint16(xCondDataSize), 6585, 6591, 0, - /*6585*/ uint16(xSetOp), uint16(BTR), - /*6587*/ uint16(xReadIb), - /*6588*/ uint16(xArgRM16), - /*6589*/ uint16(xArgImm8u), - /*6590*/ uint16(xMatch), - /*6591*/ uint16(xSetOp), uint16(BTR), - /*6593*/ uint16(xReadIb), - /*6594*/ uint16(xArgRM32), - /*6595*/ uint16(xArgImm8u), - /*6596*/ uint16(xMatch), - /*6597*/ uint16(xCondDataSize), 6585, 6591, 6601, - /*6601*/ uint16(xSetOp), uint16(BTR), - /*6603*/ uint16(xReadIb), - /*6604*/ uint16(xArgRM64), - /*6605*/ uint16(xArgImm8u), - /*6606*/ uint16(xMatch), - /*6607*/ uint16(xCondIs64), 6610, 6626, - /*6610*/ uint16(xCondDataSize), 6614, 6620, 0, - /*6614*/ uint16(xSetOp), uint16(BTC), - /*6616*/ uint16(xReadIb), - /*6617*/ uint16(xArgRM16), - /*6618*/ uint16(xArgImm8u), - /*6619*/ uint16(xMatch), - /*6620*/ uint16(xSetOp), uint16(BTC), - /*6622*/ uint16(xReadIb), - /*6623*/ uint16(xArgRM32), - /*6624*/ uint16(xArgImm8u), - /*6625*/ uint16(xMatch), - /*6626*/ uint16(xCondDataSize), 6614, 6620, 6630, - /*6630*/ uint16(xSetOp), uint16(BTC), - /*6632*/ uint16(xReadIb), - /*6633*/ uint16(xArgRM64), - /*6634*/ uint16(xArgImm8u), - /*6635*/ uint16(xMatch), - /*6636*/ uint16(xCondIs64), 6639, 6655, - /*6639*/ uint16(xCondDataSize), 6643, 6649, 0, - /*6643*/ uint16(xSetOp), uint16(BTC), - /*6645*/ uint16(xReadSlashR), - /*6646*/ uint16(xArgRM16), - /*6647*/ uint16(xArgR16), - /*6648*/ uint16(xMatch), - /*6649*/ uint16(xSetOp), uint16(BTC), - /*6651*/ uint16(xReadSlashR), - /*6652*/ uint16(xArgRM32), - /*6653*/ uint16(xArgR32), - /*6654*/ uint16(xMatch), - /*6655*/ uint16(xCondDataSize), 6643, 6649, 6659, - /*6659*/ uint16(xSetOp), uint16(BTC), - /*6661*/ uint16(xReadSlashR), - /*6662*/ uint16(xArgRM64), - /*6663*/ uint16(xArgR64), - /*6664*/ uint16(xMatch), - /*6665*/ uint16(xCondIs64), 6668, 6706, - /*6668*/ uint16(xCondPrefix), 2, - 0xF3, 6690, - 0x0, 6674, - /*6674*/ uint16(xCondDataSize), 6678, 6684, 0, - /*6678*/ uint16(xSetOp), uint16(BSF), - /*6680*/ uint16(xReadSlashR), - /*6681*/ uint16(xArgR16), - /*6682*/ uint16(xArgRM16), - /*6683*/ uint16(xMatch), - /*6684*/ uint16(xSetOp), uint16(BSF), - /*6686*/ uint16(xReadSlashR), - /*6687*/ uint16(xArgR32), - /*6688*/ uint16(xArgRM32), - /*6689*/ uint16(xMatch), - /*6690*/ uint16(xCondDataSize), 6694, 6700, 0, - /*6694*/ uint16(xSetOp), uint16(TZCNT), - /*6696*/ uint16(xReadSlashR), - /*6697*/ uint16(xArgR16), - /*6698*/ uint16(xArgRM16), - /*6699*/ uint16(xMatch), - /*6700*/ uint16(xSetOp), uint16(TZCNT), - /*6702*/ uint16(xReadSlashR), - /*6703*/ uint16(xArgR32), - /*6704*/ uint16(xArgRM32), - /*6705*/ uint16(xMatch), - /*6706*/ uint16(xCondPrefix), 2, - 0xF3, 6722, - 0x0, 6712, - /*6712*/ uint16(xCondDataSize), 6678, 6684, 6716, - /*6716*/ uint16(xSetOp), uint16(BSF), - /*6718*/ uint16(xReadSlashR), - /*6719*/ uint16(xArgR64), - /*6720*/ uint16(xArgRM64), - /*6721*/ uint16(xMatch), - /*6722*/ uint16(xCondDataSize), 6694, 6700, 6726, - /*6726*/ uint16(xSetOp), uint16(TZCNT), - /*6728*/ uint16(xReadSlashR), - /*6729*/ uint16(xArgR64), - /*6730*/ uint16(xArgRM64), - /*6731*/ uint16(xMatch), - /*6732*/ uint16(xCondIs64), 6735, 6773, - /*6735*/ uint16(xCondPrefix), 2, - 0xF3, 6757, - 0x0, 6741, - /*6741*/ uint16(xCondDataSize), 6745, 6751, 0, - /*6745*/ uint16(xSetOp), uint16(BSR), - /*6747*/ uint16(xReadSlashR), - /*6748*/ uint16(xArgR16), - /*6749*/ uint16(xArgRM16), - /*6750*/ uint16(xMatch), - /*6751*/ uint16(xSetOp), uint16(BSR), - /*6753*/ uint16(xReadSlashR), - /*6754*/ uint16(xArgR32), - /*6755*/ uint16(xArgRM32), - /*6756*/ uint16(xMatch), - /*6757*/ uint16(xCondDataSize), 6761, 6767, 0, - /*6761*/ uint16(xSetOp), uint16(LZCNT), - /*6763*/ uint16(xReadSlashR), - /*6764*/ uint16(xArgR16), - /*6765*/ uint16(xArgRM16), - /*6766*/ uint16(xMatch), - /*6767*/ uint16(xSetOp), uint16(LZCNT), - /*6769*/ uint16(xReadSlashR), - /*6770*/ uint16(xArgR32), - /*6771*/ uint16(xArgRM32), - /*6772*/ uint16(xMatch), - /*6773*/ uint16(xCondPrefix), 2, - 0xF3, 6789, - 0x0, 6779, - /*6779*/ uint16(xCondDataSize), 6745, 6751, 6783, - /*6783*/ uint16(xSetOp), uint16(BSR), - /*6785*/ uint16(xReadSlashR), - /*6786*/ uint16(xArgR64), - /*6787*/ uint16(xArgRM64), - /*6788*/ uint16(xMatch), - /*6789*/ uint16(xCondDataSize), 6761, 6767, 6793, - /*6793*/ uint16(xSetOp), uint16(LZCNT), - /*6795*/ uint16(xReadSlashR), - /*6796*/ uint16(xArgR64), - /*6797*/ uint16(xArgRM64), - /*6798*/ uint16(xMatch), - /*6799*/ uint16(xCondIs64), 6802, 6818, - /*6802*/ uint16(xCondDataSize), 6806, 6812, 0, - /*6806*/ uint16(xSetOp), uint16(MOVSX), - /*6808*/ uint16(xReadSlashR), - /*6809*/ uint16(xArgR16), - /*6810*/ uint16(xArgRM8), - /*6811*/ uint16(xMatch), - /*6812*/ uint16(xSetOp), uint16(MOVSX), - /*6814*/ uint16(xReadSlashR), - /*6815*/ uint16(xArgR32), - /*6816*/ uint16(xArgRM8), - /*6817*/ uint16(xMatch), - /*6818*/ uint16(xCondDataSize), 6806, 6812, 6822, - /*6822*/ uint16(xSetOp), uint16(MOVSX), - /*6824*/ uint16(xReadSlashR), - /*6825*/ uint16(xArgR64), - /*6826*/ uint16(xArgRM8), - /*6827*/ uint16(xMatch), - /*6828*/ uint16(xCondIs64), 6831, 6847, - /*6831*/ uint16(xCondDataSize), 6835, 6841, 0, - /*6835*/ uint16(xSetOp), uint16(MOVSX), - /*6837*/ uint16(xReadSlashR), - /*6838*/ uint16(xArgR16), - /*6839*/ uint16(xArgRM16), - /*6840*/ uint16(xMatch), - /*6841*/ uint16(xSetOp), uint16(MOVSX), - /*6843*/ uint16(xReadSlashR), - /*6844*/ uint16(xArgR32), - /*6845*/ uint16(xArgRM16), - /*6846*/ uint16(xMatch), - /*6847*/ uint16(xCondDataSize), 6835, 6841, 6851, - /*6851*/ uint16(xSetOp), uint16(MOVSX), - /*6853*/ uint16(xReadSlashR), - /*6854*/ uint16(xArgR64), - /*6855*/ uint16(xArgRM16), - /*6856*/ uint16(xMatch), - /*6857*/ uint16(xSetOp), uint16(XADD), - /*6859*/ uint16(xReadSlashR), - /*6860*/ uint16(xArgRM8), - /*6861*/ uint16(xArgR8), - /*6862*/ uint16(xMatch), - /*6863*/ uint16(xCondIs64), 6866, 6882, - /*6866*/ uint16(xCondDataSize), 6870, 6876, 0, - /*6870*/ uint16(xSetOp), uint16(XADD), - /*6872*/ uint16(xReadSlashR), - /*6873*/ uint16(xArgRM16), - /*6874*/ uint16(xArgR16), - /*6875*/ uint16(xMatch), - /*6876*/ uint16(xSetOp), uint16(XADD), - /*6878*/ uint16(xReadSlashR), - /*6879*/ uint16(xArgRM32), - /*6880*/ uint16(xArgR32), - /*6881*/ uint16(xMatch), - /*6882*/ uint16(xCondDataSize), 6870, 6876, 6886, - /*6886*/ uint16(xSetOp), uint16(XADD), - /*6888*/ uint16(xReadSlashR), - /*6889*/ uint16(xArgRM64), - /*6890*/ uint16(xArgR64), - /*6891*/ uint16(xMatch), - /*6892*/ uint16(xCondPrefix), 4, - 0xF3, 6926, - 0xF2, 6918, - 0x66, 6910, - 0x0, 6902, - /*6902*/ uint16(xSetOp), uint16(CMPPS), - /*6904*/ uint16(xReadSlashR), - /*6905*/ uint16(xReadIb), - /*6906*/ uint16(xArgXmm1), - /*6907*/ uint16(xArgXmm2M128), - /*6908*/ uint16(xArgImm8u), - /*6909*/ uint16(xMatch), - /*6910*/ uint16(xSetOp), uint16(CMPPD), + 6579, // 4 + 6608, // 5 + 6637, // 6 + 6666, // 7 + /*6579*/ uint16(xCondIs64), 6582, 6598, + /*6582*/ uint16(xCondDataSize), 6586, 6592, 0, + /*6586*/ uint16(xSetOp), uint16(BT), + /*6588*/ uint16(xReadIb), + /*6589*/ uint16(xArgRM16), + /*6590*/ uint16(xArgImm8u), + /*6591*/ uint16(xMatch), + /*6592*/ uint16(xSetOp), uint16(BT), + /*6594*/ uint16(xReadIb), + /*6595*/ uint16(xArgRM32), + /*6596*/ uint16(xArgImm8u), + /*6597*/ uint16(xMatch), + /*6598*/ uint16(xCondDataSize), 6586, 6592, 6602, + /*6602*/ uint16(xSetOp), uint16(BT), + /*6604*/ uint16(xReadIb), + /*6605*/ uint16(xArgRM64), + /*6606*/ uint16(xArgImm8u), + /*6607*/ uint16(xMatch), + /*6608*/ uint16(xCondIs64), 6611, 6627, + /*6611*/ uint16(xCondDataSize), 6615, 6621, 0, + /*6615*/ uint16(xSetOp), uint16(BTS), + /*6617*/ uint16(xReadIb), + /*6618*/ uint16(xArgRM16), + /*6619*/ uint16(xArgImm8u), + /*6620*/ uint16(xMatch), + /*6621*/ uint16(xSetOp), uint16(BTS), + /*6623*/ uint16(xReadIb), + /*6624*/ uint16(xArgRM32), + /*6625*/ uint16(xArgImm8u), + /*6626*/ uint16(xMatch), + /*6627*/ uint16(xCondDataSize), 6615, 6621, 6631, + /*6631*/ uint16(xSetOp), uint16(BTS), + /*6633*/ uint16(xReadIb), + /*6634*/ uint16(xArgRM64), + /*6635*/ uint16(xArgImm8u), + /*6636*/ uint16(xMatch), + /*6637*/ uint16(xCondIs64), 6640, 6656, + /*6640*/ uint16(xCondDataSize), 6644, 6650, 0, + /*6644*/ uint16(xSetOp), uint16(BTR), + /*6646*/ uint16(xReadIb), + /*6647*/ uint16(xArgRM16), + /*6648*/ uint16(xArgImm8u), + /*6649*/ uint16(xMatch), + /*6650*/ uint16(xSetOp), uint16(BTR), + /*6652*/ uint16(xReadIb), + /*6653*/ uint16(xArgRM32), + /*6654*/ uint16(xArgImm8u), + /*6655*/ uint16(xMatch), + /*6656*/ uint16(xCondDataSize), 6644, 6650, 6660, + /*6660*/ uint16(xSetOp), uint16(BTR), + /*6662*/ uint16(xReadIb), + /*6663*/ uint16(xArgRM64), + /*6664*/ uint16(xArgImm8u), + /*6665*/ uint16(xMatch), + /*6666*/ uint16(xCondIs64), 6669, 6685, + /*6669*/ uint16(xCondDataSize), 6673, 6679, 0, + /*6673*/ uint16(xSetOp), uint16(BTC), + /*6675*/ uint16(xReadIb), + /*6676*/ uint16(xArgRM16), + /*6677*/ uint16(xArgImm8u), + /*6678*/ uint16(xMatch), + /*6679*/ uint16(xSetOp), uint16(BTC), + /*6681*/ uint16(xReadIb), + /*6682*/ uint16(xArgRM32), + /*6683*/ uint16(xArgImm8u), + /*6684*/ uint16(xMatch), + /*6685*/ uint16(xCondDataSize), 6673, 6679, 6689, + /*6689*/ uint16(xSetOp), uint16(BTC), + /*6691*/ uint16(xReadIb), + /*6692*/ uint16(xArgRM64), + /*6693*/ uint16(xArgImm8u), + /*6694*/ uint16(xMatch), + /*6695*/ uint16(xCondIs64), 6698, 6714, + /*6698*/ uint16(xCondDataSize), 6702, 6708, 0, + /*6702*/ uint16(xSetOp), uint16(BTC), + /*6704*/ uint16(xReadSlashR), + /*6705*/ uint16(xArgRM16), + /*6706*/ uint16(xArgR16), + /*6707*/ uint16(xMatch), + /*6708*/ uint16(xSetOp), uint16(BTC), + /*6710*/ uint16(xReadSlashR), + /*6711*/ uint16(xArgRM32), + /*6712*/ uint16(xArgR32), + /*6713*/ uint16(xMatch), + /*6714*/ uint16(xCondDataSize), 6702, 6708, 6718, + /*6718*/ uint16(xSetOp), uint16(BTC), + /*6720*/ uint16(xReadSlashR), + /*6721*/ uint16(xArgRM64), + /*6722*/ uint16(xArgR64), + /*6723*/ uint16(xMatch), + /*6724*/ uint16(xCondIs64), 6727, 6765, + /*6727*/ uint16(xCondPrefix), 2, + 0xF3, 6749, + 0x0, 6733, + /*6733*/ uint16(xCondDataSize), 6737, 6743, 0, + /*6737*/ uint16(xSetOp), uint16(BSF), + /*6739*/ uint16(xReadSlashR), + /*6740*/ uint16(xArgR16), + /*6741*/ uint16(xArgRM16), + /*6742*/ uint16(xMatch), + /*6743*/ uint16(xSetOp), uint16(BSF), + /*6745*/ uint16(xReadSlashR), + /*6746*/ uint16(xArgR32), + /*6747*/ uint16(xArgRM32), + /*6748*/ uint16(xMatch), + /*6749*/ uint16(xCondDataSize), 6753, 6759, 0, + /*6753*/ uint16(xSetOp), uint16(TZCNT), + /*6755*/ uint16(xReadSlashR), + /*6756*/ uint16(xArgR16), + /*6757*/ uint16(xArgRM16), + /*6758*/ uint16(xMatch), + /*6759*/ uint16(xSetOp), uint16(TZCNT), + /*6761*/ uint16(xReadSlashR), + /*6762*/ uint16(xArgR32), + /*6763*/ uint16(xArgRM32), + /*6764*/ uint16(xMatch), + /*6765*/ uint16(xCondPrefix), 2, + 0xF3, 6781, + 0x0, 6771, + /*6771*/ uint16(xCondDataSize), 6737, 6743, 6775, + /*6775*/ uint16(xSetOp), uint16(BSF), + /*6777*/ uint16(xReadSlashR), + /*6778*/ uint16(xArgR64), + /*6779*/ uint16(xArgRM64), + /*6780*/ uint16(xMatch), + /*6781*/ uint16(xCondDataSize), 6753, 6759, 6785, + /*6785*/ uint16(xSetOp), uint16(TZCNT), + /*6787*/ uint16(xReadSlashR), + /*6788*/ uint16(xArgR64), + /*6789*/ uint16(xArgRM64), + /*6790*/ uint16(xMatch), + /*6791*/ uint16(xCondIs64), 6794, 6832, + /*6794*/ uint16(xCondPrefix), 2, + 0xF3, 6816, + 0x0, 6800, + /*6800*/ uint16(xCondDataSize), 6804, 6810, 0, + /*6804*/ uint16(xSetOp), uint16(BSR), + /*6806*/ uint16(xReadSlashR), + /*6807*/ uint16(xArgR16), + /*6808*/ uint16(xArgRM16), + /*6809*/ uint16(xMatch), + /*6810*/ uint16(xSetOp), uint16(BSR), + /*6812*/ uint16(xReadSlashR), + /*6813*/ uint16(xArgR32), + /*6814*/ uint16(xArgRM32), + /*6815*/ uint16(xMatch), + /*6816*/ uint16(xCondDataSize), 6820, 6826, 0, + /*6820*/ uint16(xSetOp), uint16(LZCNT), + /*6822*/ uint16(xReadSlashR), + /*6823*/ uint16(xArgR16), + /*6824*/ uint16(xArgRM16), + /*6825*/ uint16(xMatch), + /*6826*/ uint16(xSetOp), uint16(LZCNT), + /*6828*/ uint16(xReadSlashR), + /*6829*/ uint16(xArgR32), + /*6830*/ uint16(xArgRM32), + /*6831*/ uint16(xMatch), + /*6832*/ uint16(xCondPrefix), 2, + 0xF3, 6848, + 0x0, 6838, + /*6838*/ uint16(xCondDataSize), 6804, 6810, 6842, + /*6842*/ uint16(xSetOp), uint16(BSR), + /*6844*/ uint16(xReadSlashR), + /*6845*/ uint16(xArgR64), + /*6846*/ uint16(xArgRM64), + /*6847*/ uint16(xMatch), + /*6848*/ uint16(xCondDataSize), 6820, 6826, 6852, + /*6852*/ uint16(xSetOp), uint16(LZCNT), + /*6854*/ uint16(xReadSlashR), + /*6855*/ uint16(xArgR64), + /*6856*/ uint16(xArgRM64), + /*6857*/ uint16(xMatch), + /*6858*/ uint16(xCondIs64), 6861, 6877, + /*6861*/ uint16(xCondDataSize), 6865, 6871, 0, + /*6865*/ uint16(xSetOp), uint16(MOVSX), + /*6867*/ uint16(xReadSlashR), + /*6868*/ uint16(xArgR16), + /*6869*/ uint16(xArgRM8), + /*6870*/ uint16(xMatch), + /*6871*/ uint16(xSetOp), uint16(MOVSX), + /*6873*/ uint16(xReadSlashR), + /*6874*/ uint16(xArgR32), + /*6875*/ uint16(xArgRM8), + /*6876*/ uint16(xMatch), + /*6877*/ uint16(xCondDataSize), 6865, 6871, 6881, + /*6881*/ uint16(xSetOp), uint16(MOVSX), + /*6883*/ uint16(xReadSlashR), + /*6884*/ uint16(xArgR64), + /*6885*/ uint16(xArgRM8), + /*6886*/ uint16(xMatch), + /*6887*/ uint16(xCondIs64), 6890, 6906, + /*6890*/ uint16(xCondDataSize), 6894, 6900, 0, + /*6894*/ uint16(xSetOp), uint16(MOVSX), + /*6896*/ uint16(xReadSlashR), + /*6897*/ uint16(xArgR16), + /*6898*/ uint16(xArgRM16), + /*6899*/ uint16(xMatch), + /*6900*/ uint16(xSetOp), uint16(MOVSX), + /*6902*/ uint16(xReadSlashR), + /*6903*/ uint16(xArgR32), + /*6904*/ uint16(xArgRM16), + /*6905*/ uint16(xMatch), + /*6906*/ uint16(xCondDataSize), 6894, 6900, 6910, + /*6910*/ uint16(xSetOp), uint16(MOVSX), /*6912*/ uint16(xReadSlashR), - /*6913*/ uint16(xReadIb), - /*6914*/ uint16(xArgXmm1), - /*6915*/ uint16(xArgXmm2M128), - /*6916*/ uint16(xArgImm8u), - /*6917*/ uint16(xMatch), - /*6918*/ uint16(xSetOp), uint16(CMPSD_XMM), - /*6920*/ uint16(xReadSlashR), - /*6921*/ uint16(xReadIb), - /*6922*/ uint16(xArgXmm1), - /*6923*/ uint16(xArgXmm2M64), - /*6924*/ uint16(xArgImm8u), - /*6925*/ uint16(xMatch), - /*6926*/ uint16(xSetOp), uint16(CMPSS), - /*6928*/ uint16(xReadSlashR), - /*6929*/ uint16(xReadIb), - /*6930*/ uint16(xArgXmm1), - /*6931*/ uint16(xArgXmm2M32), - /*6932*/ uint16(xArgImm8u), - /*6933*/ uint16(xMatch), - /*6934*/ uint16(xCondIs64), 6937, 6953, - /*6937*/ uint16(xCondDataSize), 6941, 6947, 0, - /*6941*/ uint16(xSetOp), uint16(MOVNTI), - /*6943*/ uint16(xReadSlashR), - /*6944*/ uint16(xArgM32), - /*6945*/ uint16(xArgR32), - /*6946*/ uint16(xMatch), - /*6947*/ uint16(xSetOp), uint16(MOVNTI), - /*6949*/ uint16(xReadSlashR), - /*6950*/ uint16(xArgM32), - /*6951*/ uint16(xArgR32), - /*6952*/ uint16(xMatch), - /*6953*/ uint16(xCondDataSize), 6941, 6947, 6957, - /*6957*/ uint16(xSetOp), uint16(MOVNTI), - /*6959*/ uint16(xReadSlashR), - /*6960*/ uint16(xArgM64), - /*6961*/ uint16(xArgR64), - /*6962*/ uint16(xMatch), - /*6963*/ uint16(xCondPrefix), 2, - 0x66, 6977, - 0x0, 6969, - /*6969*/ uint16(xSetOp), uint16(PINSRW), + /*6913*/ uint16(xArgR64), + /*6914*/ uint16(xArgRM16), + /*6915*/ uint16(xMatch), + /*6916*/ uint16(xSetOp), uint16(XADD), + /*6918*/ uint16(xReadSlashR), + /*6919*/ uint16(xArgRM8), + /*6920*/ uint16(xArgR8), + /*6921*/ uint16(xMatch), + /*6922*/ uint16(xCondIs64), 6925, 6941, + /*6925*/ uint16(xCondDataSize), 6929, 6935, 0, + /*6929*/ uint16(xSetOp), uint16(XADD), + /*6931*/ uint16(xReadSlashR), + /*6932*/ uint16(xArgRM16), + /*6933*/ uint16(xArgR16), + /*6934*/ uint16(xMatch), + /*6935*/ uint16(xSetOp), uint16(XADD), + /*6937*/ uint16(xReadSlashR), + /*6938*/ uint16(xArgRM32), + /*6939*/ uint16(xArgR32), + /*6940*/ uint16(xMatch), + /*6941*/ uint16(xCondDataSize), 6929, 6935, 6945, + /*6945*/ uint16(xSetOp), uint16(XADD), + /*6947*/ uint16(xReadSlashR), + /*6948*/ uint16(xArgRM64), + /*6949*/ uint16(xArgR64), + /*6950*/ uint16(xMatch), + /*6951*/ uint16(xCondPrefix), 4, + 0xF3, 6985, + 0xF2, 6977, + 0x66, 6969, + 0x0, 6961, + /*6961*/ uint16(xSetOp), uint16(CMPPS), + /*6963*/ uint16(xReadSlashR), + /*6964*/ uint16(xReadIb), + /*6965*/ uint16(xArgXmm1), + /*6966*/ uint16(xArgXmm2M128), + /*6967*/ uint16(xArgImm8u), + /*6968*/ uint16(xMatch), + /*6969*/ uint16(xSetOp), uint16(CMPPD), /*6971*/ uint16(xReadSlashR), /*6972*/ uint16(xReadIb), - /*6973*/ uint16(xArgMm), - /*6974*/ uint16(xArgR32M16), + /*6973*/ uint16(xArgXmm1), + /*6974*/ uint16(xArgXmm2M128), /*6975*/ uint16(xArgImm8u), /*6976*/ uint16(xMatch), - /*6977*/ uint16(xSetOp), uint16(PINSRW), + /*6977*/ uint16(xSetOp), uint16(CMPSD_XMM), /*6979*/ uint16(xReadSlashR), /*6980*/ uint16(xReadIb), - /*6981*/ uint16(xArgXmm), - /*6982*/ uint16(xArgR32M16), + /*6981*/ uint16(xArgXmm1), + /*6982*/ uint16(xArgXmm2M64), /*6983*/ uint16(xArgImm8u), /*6984*/ uint16(xMatch), - /*6985*/ uint16(xCondPrefix), 2, - 0x66, 6999, - 0x0, 6991, - /*6991*/ uint16(xSetOp), uint16(PEXTRW), - /*6993*/ uint16(xReadSlashR), - /*6994*/ uint16(xReadIb), - /*6995*/ uint16(xArgR32), - /*6996*/ uint16(xArgMm2), - /*6997*/ uint16(xArgImm8u), - /*6998*/ uint16(xMatch), - /*6999*/ uint16(xSetOp), uint16(PEXTRW), - /*7001*/ uint16(xReadSlashR), - /*7002*/ uint16(xReadIb), - /*7003*/ uint16(xArgR32), - /*7004*/ uint16(xArgXmm2), - /*7005*/ uint16(xArgImm8u), - /*7006*/ uint16(xMatch), - /*7007*/ uint16(xCondPrefix), 2, - 0x66, 7021, - 0x0, 7013, - /*7013*/ uint16(xSetOp), uint16(SHUFPS), - /*7015*/ uint16(xReadSlashR), - /*7016*/ uint16(xReadIb), - /*7017*/ uint16(xArgXmm1), - /*7018*/ uint16(xArgXmm2M128), - /*7019*/ uint16(xArgImm8u), - /*7020*/ uint16(xMatch), - /*7021*/ uint16(xSetOp), uint16(SHUFPD), - /*7023*/ uint16(xReadSlashR), - /*7024*/ uint16(xReadIb), - /*7025*/ uint16(xArgXmm1), - /*7026*/ uint16(xArgXmm2M128), - /*7027*/ uint16(xArgImm8u), - /*7028*/ uint16(xMatch), - /*7029*/ uint16(xCondSlashR), + /*6985*/ uint16(xSetOp), uint16(CMPSS), + /*6987*/ uint16(xReadSlashR), + /*6988*/ uint16(xReadIb), + /*6989*/ uint16(xArgXmm1), + /*6990*/ uint16(xArgXmm2M32), + /*6991*/ uint16(xArgImm8u), + /*6992*/ uint16(xMatch), + /*6993*/ uint16(xCondIs64), 6996, 7012, + /*6996*/ uint16(xCondDataSize), 7000, 7006, 0, + /*7000*/ uint16(xSetOp), uint16(MOVNTI), + /*7002*/ uint16(xReadSlashR), + /*7003*/ uint16(xArgM32), + /*7004*/ uint16(xArgR32), + /*7005*/ uint16(xMatch), + /*7006*/ uint16(xSetOp), uint16(MOVNTI), + /*7008*/ uint16(xReadSlashR), + /*7009*/ uint16(xArgM32), + /*7010*/ uint16(xArgR32), + /*7011*/ uint16(xMatch), + /*7012*/ uint16(xCondDataSize), 7000, 7006, 7016, + /*7016*/ uint16(xSetOp), uint16(MOVNTI), + /*7018*/ uint16(xReadSlashR), + /*7019*/ uint16(xArgM64), + /*7020*/ uint16(xArgR64), + /*7021*/ uint16(xMatch), + /*7022*/ uint16(xCondPrefix), 2, + 0x66, 7036, + 0x0, 7028, + /*7028*/ uint16(xSetOp), uint16(PINSRW), + /*7030*/ uint16(xReadSlashR), + /*7031*/ uint16(xReadIb), + /*7032*/ uint16(xArgMm), + /*7033*/ uint16(xArgR32M16), + /*7034*/ uint16(xArgImm8u), + /*7035*/ uint16(xMatch), + /*7036*/ uint16(xSetOp), uint16(PINSRW), + /*7038*/ uint16(xReadSlashR), + /*7039*/ uint16(xReadIb), + /*7040*/ uint16(xArgXmm), + /*7041*/ uint16(xArgR32M16), + /*7042*/ uint16(xArgImm8u), + /*7043*/ uint16(xMatch), + /*7044*/ uint16(xCondPrefix), 2, + 0x66, 7058, + 0x0, 7050, + /*7050*/ uint16(xSetOp), uint16(PEXTRW), + /*7052*/ uint16(xReadSlashR), + /*7053*/ uint16(xReadIb), + /*7054*/ uint16(xArgR32), + /*7055*/ uint16(xArgMm2), + /*7056*/ uint16(xArgImm8u), + /*7057*/ uint16(xMatch), + /*7058*/ uint16(xSetOp), uint16(PEXTRW), + /*7060*/ uint16(xReadSlashR), + /*7061*/ uint16(xReadIb), + /*7062*/ uint16(xArgR32), + /*7063*/ uint16(xArgXmm2), + /*7064*/ uint16(xArgImm8u), + /*7065*/ uint16(xMatch), + /*7066*/ uint16(xCondPrefix), 2, + 0x66, 7080, + 0x0, 7072, + /*7072*/ uint16(xSetOp), uint16(SHUFPS), + /*7074*/ uint16(xReadSlashR), + /*7075*/ uint16(xReadIb), + /*7076*/ uint16(xArgXmm1), + /*7077*/ uint16(xArgXmm2M128), + /*7078*/ uint16(xArgImm8u), + /*7079*/ uint16(xMatch), + /*7080*/ uint16(xSetOp), uint16(SHUFPD), + /*7082*/ uint16(xReadSlashR), + /*7083*/ uint16(xReadIb), + /*7084*/ uint16(xArgXmm1), + /*7085*/ uint16(xArgXmm2M128), + /*7086*/ uint16(xArgImm8u), + /*7087*/ uint16(xMatch), + /*7088*/ uint16(xCondSlashR), 0, // 0 - 7038, // 1 + 7097, // 1 0, // 2 - 7061, // 3 - 7084, // 4 - 7107, // 5 - 7130, // 6 + 7120, // 3 + 7143, // 4 + 7166, // 5 + 7189, // 6 0, // 7 - /*7038*/ uint16(xCondIs64), 7041, 7053, - /*7041*/ uint16(xCondDataSize), 7045, 7049, 0, - /*7045*/ uint16(xSetOp), uint16(CMPXCHG8B), - /*7047*/ uint16(xArgM64), - /*7048*/ uint16(xMatch), - /*7049*/ uint16(xSetOp), uint16(CMPXCHG8B), - /*7051*/ uint16(xArgM64), - /*7052*/ uint16(xMatch), - /*7053*/ uint16(xCondDataSize), 7045, 7049, 7057, - /*7057*/ uint16(xSetOp), uint16(CMPXCHG16B), - /*7059*/ uint16(xArgM128), - /*7060*/ uint16(xMatch), - /*7061*/ uint16(xCondIs64), 7064, 7076, - /*7064*/ uint16(xCondDataSize), 7068, 7072, 0, - /*7068*/ uint16(xSetOp), uint16(XRSTORS), - /*7070*/ uint16(xArgMem), - /*7071*/ uint16(xMatch), - /*7072*/ uint16(xSetOp), uint16(XRSTORS), - /*7074*/ uint16(xArgMem), - /*7075*/ uint16(xMatch), - /*7076*/ uint16(xCondDataSize), 7068, 7072, 7080, - /*7080*/ uint16(xSetOp), uint16(XRSTORS64), - /*7082*/ uint16(xArgMem), - /*7083*/ uint16(xMatch), - /*7084*/ uint16(xCondIs64), 7087, 7099, - /*7087*/ uint16(xCondDataSize), 7091, 7095, 0, - /*7091*/ uint16(xSetOp), uint16(XSAVEC), - /*7093*/ uint16(xArgMem), - /*7094*/ uint16(xMatch), - /*7095*/ uint16(xSetOp), uint16(XSAVEC), - /*7097*/ uint16(xArgMem), - /*7098*/ uint16(xMatch), - /*7099*/ uint16(xCondDataSize), 7091, 7095, 7103, - /*7103*/ uint16(xSetOp), uint16(XSAVEC64), - /*7105*/ uint16(xArgMem), - /*7106*/ uint16(xMatch), - /*7107*/ uint16(xCondIs64), 7110, 7122, - /*7110*/ uint16(xCondDataSize), 7114, 7118, 0, - /*7114*/ uint16(xSetOp), uint16(XSAVES), - /*7116*/ uint16(xArgMem), - /*7117*/ uint16(xMatch), - /*7118*/ uint16(xSetOp), uint16(XSAVES), - /*7120*/ uint16(xArgMem), - /*7121*/ uint16(xMatch), - /*7122*/ uint16(xCondDataSize), 7114, 7118, 7126, - /*7126*/ uint16(xSetOp), uint16(XSAVES64), - /*7128*/ uint16(xArgMem), - /*7129*/ uint16(xMatch), - /*7130*/ uint16(xCondIs64), 7133, 7151, - /*7133*/ uint16(xCondDataSize), 7137, 7144, 0, - /*7137*/ uint16(xCondIsMem), 7140, 0, - /*7140*/ uint16(xSetOp), uint16(RDRAND), - /*7142*/ uint16(xArgRmf16), - /*7143*/ uint16(xMatch), - /*7144*/ uint16(xCondIsMem), 7147, 0, - /*7147*/ uint16(xSetOp), uint16(RDRAND), - /*7149*/ uint16(xArgRmf32), - /*7150*/ uint16(xMatch), - /*7151*/ uint16(xCondDataSize), 7137, 7144, 7155, - /*7155*/ uint16(xSetOp), uint16(RDRAND), + /*7097*/ uint16(xCondIs64), 7100, 7112, + /*7100*/ uint16(xCondDataSize), 7104, 7108, 0, + /*7104*/ uint16(xSetOp), uint16(CMPXCHG8B), + /*7106*/ uint16(xArgM64), + /*7107*/ uint16(xMatch), + /*7108*/ uint16(xSetOp), uint16(CMPXCHG8B), + /*7110*/ uint16(xArgM64), + /*7111*/ uint16(xMatch), + /*7112*/ uint16(xCondDataSize), 7104, 7108, 7116, + /*7116*/ uint16(xSetOp), uint16(CMPXCHG16B), + /*7118*/ uint16(xArgM128), + /*7119*/ uint16(xMatch), + /*7120*/ uint16(xCondIs64), 7123, 7135, + /*7123*/ uint16(xCondDataSize), 7127, 7131, 0, + /*7127*/ uint16(xSetOp), uint16(XRSTORS), + /*7129*/ uint16(xArgMem), + /*7130*/ uint16(xMatch), + /*7131*/ uint16(xSetOp), uint16(XRSTORS), + /*7133*/ uint16(xArgMem), + /*7134*/ uint16(xMatch), + /*7135*/ uint16(xCondDataSize), 7127, 7131, 7139, + /*7139*/ uint16(xSetOp), uint16(XRSTORS64), + /*7141*/ uint16(xArgMem), + /*7142*/ uint16(xMatch), + /*7143*/ uint16(xCondIs64), 7146, 7158, + /*7146*/ uint16(xCondDataSize), 7150, 7154, 0, + /*7150*/ uint16(xSetOp), uint16(XSAVEC), + /*7152*/ uint16(xArgMem), + /*7153*/ uint16(xMatch), + /*7154*/ uint16(xSetOp), uint16(XSAVEC), + /*7156*/ uint16(xArgMem), /*7157*/ uint16(xMatch), - /*7158*/ uint16(xCondIs64), 7161, 7173, - /*7161*/ uint16(xCondDataSize), 7165, 7169, 0, - /*7165*/ uint16(xSetOp), uint16(BSWAP), - /*7167*/ uint16(xArgR16op), - /*7168*/ uint16(xMatch), - /*7169*/ uint16(xSetOp), uint16(BSWAP), - /*7171*/ uint16(xArgR32op), - /*7172*/ uint16(xMatch), - /*7173*/ uint16(xCondDataSize), 7165, 7169, 7177, - /*7177*/ uint16(xSetOp), uint16(BSWAP), - /*7179*/ uint16(xArgR64op), + /*7158*/ uint16(xCondDataSize), 7150, 7154, 7162, + /*7162*/ uint16(xSetOp), uint16(XSAVEC64), + /*7164*/ uint16(xArgMem), + /*7165*/ uint16(xMatch), + /*7166*/ uint16(xCondIs64), 7169, 7181, + /*7169*/ uint16(xCondDataSize), 7173, 7177, 0, + /*7173*/ uint16(xSetOp), uint16(XSAVES), + /*7175*/ uint16(xArgMem), + /*7176*/ uint16(xMatch), + /*7177*/ uint16(xSetOp), uint16(XSAVES), + /*7179*/ uint16(xArgMem), /*7180*/ uint16(xMatch), - /*7181*/ uint16(xCondPrefix), 2, - 0xF2, 7193, - 0x66, 7187, - /*7187*/ uint16(xSetOp), uint16(ADDSUBPD), - /*7189*/ uint16(xReadSlashR), - /*7190*/ uint16(xArgXmm1), - /*7191*/ uint16(xArgXmm2M128), - /*7192*/ uint16(xMatch), - /*7193*/ uint16(xSetOp), uint16(ADDSUBPS), - /*7195*/ uint16(xReadSlashR), - /*7196*/ uint16(xArgXmm1), - /*7197*/ uint16(xArgXmm2M128), - /*7198*/ uint16(xMatch), - /*7199*/ uint16(xCondPrefix), 2, - 0x66, 7211, - 0x0, 7205, - /*7205*/ uint16(xSetOp), uint16(PSRLW), - /*7207*/ uint16(xReadSlashR), - /*7208*/ uint16(xArgMm), - /*7209*/ uint16(xArgMmM64), - /*7210*/ uint16(xMatch), - /*7211*/ uint16(xSetOp), uint16(PSRLW), - /*7213*/ uint16(xReadSlashR), - /*7214*/ uint16(xArgXmm1), - /*7215*/ uint16(xArgXmm2M128), + /*7181*/ uint16(xCondDataSize), 7173, 7177, 7185, + /*7185*/ uint16(xSetOp), uint16(XSAVES64), + /*7187*/ uint16(xArgMem), + /*7188*/ uint16(xMatch), + /*7189*/ uint16(xCondIs64), 7192, 7210, + /*7192*/ uint16(xCondDataSize), 7196, 7203, 0, + /*7196*/ uint16(xCondIsMem), 7199, 0, + /*7199*/ uint16(xSetOp), uint16(RDRAND), + /*7201*/ uint16(xArgRmf16), + /*7202*/ uint16(xMatch), + /*7203*/ uint16(xCondIsMem), 7206, 0, + /*7206*/ uint16(xSetOp), uint16(RDRAND), + /*7208*/ uint16(xArgRmf32), + /*7209*/ uint16(xMatch), + /*7210*/ uint16(xCondDataSize), 7196, 7203, 7214, + /*7214*/ uint16(xSetOp), uint16(RDRAND), /*7216*/ uint16(xMatch), - /*7217*/ uint16(xCondPrefix), 2, - 0x66, 7229, - 0x0, 7223, - /*7223*/ uint16(xSetOp), uint16(PSRLD), - /*7225*/ uint16(xReadSlashR), - /*7226*/ uint16(xArgMm), - /*7227*/ uint16(xArgMmM64), - /*7228*/ uint16(xMatch), - /*7229*/ uint16(xSetOp), uint16(PSRLD), - /*7231*/ uint16(xReadSlashR), - /*7232*/ uint16(xArgXmm1), - /*7233*/ uint16(xArgXmm2M128), - /*7234*/ uint16(xMatch), - /*7235*/ uint16(xCondPrefix), 2, - 0x66, 7247, - 0x0, 7241, - /*7241*/ uint16(xSetOp), uint16(PSRLQ), - /*7243*/ uint16(xReadSlashR), - /*7244*/ uint16(xArgMm), - /*7245*/ uint16(xArgMmM64), - /*7246*/ uint16(xMatch), - /*7247*/ uint16(xSetOp), uint16(PSRLQ), - /*7249*/ uint16(xReadSlashR), - /*7250*/ uint16(xArgXmm1), - /*7251*/ uint16(xArgXmm2M128), - /*7252*/ uint16(xMatch), - /*7253*/ uint16(xCondPrefix), 2, - 0x66, 7265, - 0x0, 7259, - /*7259*/ uint16(xSetOp), uint16(PADDQ), - /*7261*/ uint16(xReadSlashR), - /*7262*/ uint16(xArgMm1), - /*7263*/ uint16(xArgMm2M64), - /*7264*/ uint16(xMatch), - /*7265*/ uint16(xSetOp), uint16(PADDQ), - /*7267*/ uint16(xReadSlashR), - /*7268*/ uint16(xArgXmm1), - /*7269*/ uint16(xArgXmm2M128), - /*7270*/ uint16(xMatch), - /*7271*/ uint16(xCondPrefix), 2, - 0x66, 7283, - 0x0, 7277, - /*7277*/ uint16(xSetOp), uint16(PMULLW), - /*7279*/ uint16(xReadSlashR), - /*7280*/ uint16(xArgMm), - /*7281*/ uint16(xArgMmM64), - /*7282*/ uint16(xMatch), - /*7283*/ uint16(xSetOp), uint16(PMULLW), - /*7285*/ uint16(xReadSlashR), - /*7286*/ uint16(xArgXmm1), - /*7287*/ uint16(xArgXmm2M128), - /*7288*/ uint16(xMatch), - /*7289*/ uint16(xCondPrefix), 3, - 0xF3, 7309, - 0xF2, 7303, - 0x66, 7297, - /*7297*/ uint16(xSetOp), uint16(MOVQ), - /*7299*/ uint16(xReadSlashR), - /*7300*/ uint16(xArgXmm2M64), - /*7301*/ uint16(xArgXmm1), - /*7302*/ uint16(xMatch), - /*7303*/ uint16(xSetOp), uint16(MOVDQ2Q), - /*7305*/ uint16(xReadSlashR), - /*7306*/ uint16(xArgMm), - /*7307*/ uint16(xArgXmm2), - /*7308*/ uint16(xMatch), - /*7309*/ uint16(xSetOp), uint16(MOVQ2DQ), - /*7311*/ uint16(xReadSlashR), - /*7312*/ uint16(xArgXmm1), - /*7313*/ uint16(xArgMm2), - /*7314*/ uint16(xMatch), - /*7315*/ uint16(xCondPrefix), 2, - 0x66, 7327, - 0x0, 7321, - /*7321*/ uint16(xSetOp), uint16(PMOVMSKB), - /*7323*/ uint16(xReadSlashR), - /*7324*/ uint16(xArgR32), - /*7325*/ uint16(xArgMm2), - /*7326*/ uint16(xMatch), - /*7327*/ uint16(xSetOp), uint16(PMOVMSKB), - /*7329*/ uint16(xReadSlashR), - /*7330*/ uint16(xArgR32), - /*7331*/ uint16(xArgXmm2), - /*7332*/ uint16(xMatch), - /*7333*/ uint16(xCondPrefix), 2, - 0x66, 7345, - 0x0, 7339, - /*7339*/ uint16(xSetOp), uint16(PSUBUSB), - /*7341*/ uint16(xReadSlashR), - /*7342*/ uint16(xArgMm), - /*7343*/ uint16(xArgMmM64), - /*7344*/ uint16(xMatch), - /*7345*/ uint16(xSetOp), uint16(PSUBUSB), - /*7347*/ uint16(xReadSlashR), - /*7348*/ uint16(xArgXmm1), - /*7349*/ uint16(xArgXmm2M128), - /*7350*/ uint16(xMatch), - /*7351*/ uint16(xCondPrefix), 2, - 0x66, 7363, - 0x0, 7357, - /*7357*/ uint16(xSetOp), uint16(PSUBUSW), - /*7359*/ uint16(xReadSlashR), - /*7360*/ uint16(xArgMm), - /*7361*/ uint16(xArgMmM64), - /*7362*/ uint16(xMatch), - /*7363*/ uint16(xSetOp), uint16(PSUBUSW), - /*7365*/ uint16(xReadSlashR), - /*7366*/ uint16(xArgXmm1), - /*7367*/ uint16(xArgXmm2M128), - /*7368*/ uint16(xMatch), - /*7369*/ uint16(xCondPrefix), 2, - 0x66, 7381, - 0x0, 7375, - /*7375*/ uint16(xSetOp), uint16(PMINUB), - /*7377*/ uint16(xReadSlashR), - /*7378*/ uint16(xArgMm1), - /*7379*/ uint16(xArgMm2M64), - /*7380*/ uint16(xMatch), - /*7381*/ uint16(xSetOp), uint16(PMINUB), - /*7383*/ uint16(xReadSlashR), - /*7384*/ uint16(xArgXmm1), - /*7385*/ uint16(xArgXmm2M128), - /*7386*/ uint16(xMatch), - /*7387*/ uint16(xCondPrefix), 2, - 0x66, 7399, - 0x0, 7393, - /*7393*/ uint16(xSetOp), uint16(PAND), - /*7395*/ uint16(xReadSlashR), - /*7396*/ uint16(xArgMm), - /*7397*/ uint16(xArgMmM64), - /*7398*/ uint16(xMatch), - /*7399*/ uint16(xSetOp), uint16(PAND), - /*7401*/ uint16(xReadSlashR), - /*7402*/ uint16(xArgXmm1), - /*7403*/ uint16(xArgXmm2M128), - /*7404*/ uint16(xMatch), - /*7405*/ uint16(xCondPrefix), 2, - 0x66, 7417, - 0x0, 7411, - /*7411*/ uint16(xSetOp), uint16(PADDUSB), - /*7413*/ uint16(xReadSlashR), - /*7414*/ uint16(xArgMm), - /*7415*/ uint16(xArgMmM64), - /*7416*/ uint16(xMatch), - /*7417*/ uint16(xSetOp), uint16(PADDUSB), - /*7419*/ uint16(xReadSlashR), - /*7420*/ uint16(xArgXmm1), - /*7421*/ uint16(xArgXmm2M128), - /*7422*/ uint16(xMatch), - /*7423*/ uint16(xCondPrefix), 2, - 0x66, 7435, - 0x0, 7429, - /*7429*/ uint16(xSetOp), uint16(PADDUSW), - /*7431*/ uint16(xReadSlashR), - /*7432*/ uint16(xArgMm), - /*7433*/ uint16(xArgMmM64), - /*7434*/ uint16(xMatch), - /*7435*/ uint16(xSetOp), uint16(PADDUSW), - /*7437*/ uint16(xReadSlashR), - /*7438*/ uint16(xArgXmm1), - /*7439*/ uint16(xArgXmm2M128), - /*7440*/ uint16(xMatch), - /*7441*/ uint16(xCondPrefix), 2, - 0x66, 7453, - 0x0, 7447, - /*7447*/ uint16(xSetOp), uint16(PMAXUB), - /*7449*/ uint16(xReadSlashR), - /*7450*/ uint16(xArgMm1), - /*7451*/ uint16(xArgMm2M64), - /*7452*/ uint16(xMatch), - /*7453*/ uint16(xSetOp), uint16(PMAXUB), - /*7455*/ uint16(xReadSlashR), - /*7456*/ uint16(xArgXmm1), - /*7457*/ uint16(xArgXmm2M128), - /*7458*/ uint16(xMatch), - /*7459*/ uint16(xCondPrefix), 2, - 0x66, 7471, - 0x0, 7465, - /*7465*/ uint16(xSetOp), uint16(PANDN), - /*7467*/ uint16(xReadSlashR), - /*7468*/ uint16(xArgMm), - /*7469*/ uint16(xArgMmM64), - /*7470*/ uint16(xMatch), - /*7471*/ uint16(xSetOp), uint16(PANDN), - /*7473*/ uint16(xReadSlashR), - /*7474*/ uint16(xArgXmm1), - /*7475*/ uint16(xArgXmm2M128), - /*7476*/ uint16(xMatch), - /*7477*/ uint16(xCondPrefix), 2, - 0x66, 7489, - 0x0, 7483, - /*7483*/ uint16(xSetOp), uint16(PAVGB), - /*7485*/ uint16(xReadSlashR), - /*7486*/ uint16(xArgMm1), - /*7487*/ uint16(xArgMm2M64), - /*7488*/ uint16(xMatch), - /*7489*/ uint16(xSetOp), uint16(PAVGB), - /*7491*/ uint16(xReadSlashR), - /*7492*/ uint16(xArgXmm1), - /*7493*/ uint16(xArgXmm2M128), - /*7494*/ uint16(xMatch), - /*7495*/ uint16(xCondPrefix), 2, - 0x66, 7507, - 0x0, 7501, - /*7501*/ uint16(xSetOp), uint16(PSRAW), - /*7503*/ uint16(xReadSlashR), - /*7504*/ uint16(xArgMm), - /*7505*/ uint16(xArgMmM64), - /*7506*/ uint16(xMatch), - /*7507*/ uint16(xSetOp), uint16(PSRAW), - /*7509*/ uint16(xReadSlashR), - /*7510*/ uint16(xArgXmm1), - /*7511*/ uint16(xArgXmm2M128), - /*7512*/ uint16(xMatch), - /*7513*/ uint16(xCondPrefix), 2, - 0x66, 7525, - 0x0, 7519, - /*7519*/ uint16(xSetOp), uint16(PSRAD), - /*7521*/ uint16(xReadSlashR), - /*7522*/ uint16(xArgMm), - /*7523*/ uint16(xArgMmM64), - /*7524*/ uint16(xMatch), - /*7525*/ uint16(xSetOp), uint16(PSRAD), - /*7527*/ uint16(xReadSlashR), - /*7528*/ uint16(xArgXmm1), - /*7529*/ uint16(xArgXmm2M128), - /*7530*/ uint16(xMatch), - /*7531*/ uint16(xCondPrefix), 2, - 0x66, 7543, - 0x0, 7537, - /*7537*/ uint16(xSetOp), uint16(PAVGW), - /*7539*/ uint16(xReadSlashR), - /*7540*/ uint16(xArgMm1), - /*7541*/ uint16(xArgMm2M64), - /*7542*/ uint16(xMatch), - /*7543*/ uint16(xSetOp), uint16(PAVGW), - /*7545*/ uint16(xReadSlashR), - /*7546*/ uint16(xArgXmm1), - /*7547*/ uint16(xArgXmm2M128), - /*7548*/ uint16(xMatch), - /*7549*/ uint16(xCondPrefix), 2, - 0x66, 7561, - 0x0, 7555, - /*7555*/ uint16(xSetOp), uint16(PMULHUW), - /*7557*/ uint16(xReadSlashR), - /*7558*/ uint16(xArgMm1), - /*7559*/ uint16(xArgMm2M64), - /*7560*/ uint16(xMatch), - /*7561*/ uint16(xSetOp), uint16(PMULHUW), - /*7563*/ uint16(xReadSlashR), - /*7564*/ uint16(xArgXmm1), - /*7565*/ uint16(xArgXmm2M128), - /*7566*/ uint16(xMatch), - /*7567*/ uint16(xCondPrefix), 2, - 0x66, 7579, - 0x0, 7573, - /*7573*/ uint16(xSetOp), uint16(PMULHW), - /*7575*/ uint16(xReadSlashR), - /*7576*/ uint16(xArgMm), - /*7577*/ uint16(xArgMmM64), - /*7578*/ uint16(xMatch), - /*7579*/ uint16(xSetOp), uint16(PMULHW), - /*7581*/ uint16(xReadSlashR), - /*7582*/ uint16(xArgXmm1), - /*7583*/ uint16(xArgXmm2M128), - /*7584*/ uint16(xMatch), - /*7585*/ uint16(xCondPrefix), 3, - 0xF3, 7605, - 0xF2, 7599, - 0x66, 7593, - /*7593*/ uint16(xSetOp), uint16(CVTTPD2DQ), - /*7595*/ uint16(xReadSlashR), - /*7596*/ uint16(xArgXmm1), - /*7597*/ uint16(xArgXmm2M128), - /*7598*/ uint16(xMatch), - /*7599*/ uint16(xSetOp), uint16(CVTPD2DQ), - /*7601*/ uint16(xReadSlashR), - /*7602*/ uint16(xArgXmm1), - /*7603*/ uint16(xArgXmm2M128), - /*7604*/ uint16(xMatch), - /*7605*/ uint16(xSetOp), uint16(CVTDQ2PD), - /*7607*/ uint16(xReadSlashR), - /*7608*/ uint16(xArgXmm1), - /*7609*/ uint16(xArgXmm2M64), - /*7610*/ uint16(xMatch), - /*7611*/ uint16(xCondPrefix), 2, - 0x66, 7623, - 0x0, 7617, - /*7617*/ uint16(xSetOp), uint16(MOVNTQ), - /*7619*/ uint16(xReadSlashR), - /*7620*/ uint16(xArgM64), - /*7621*/ uint16(xArgMm), - /*7622*/ uint16(xMatch), - /*7623*/ uint16(xSetOp), uint16(MOVNTDQ), - /*7625*/ uint16(xReadSlashR), - /*7626*/ uint16(xArgM128), - /*7627*/ uint16(xArgXmm), - /*7628*/ uint16(xMatch), - /*7629*/ uint16(xCondPrefix), 2, - 0x66, 7641, - 0x0, 7635, - /*7635*/ uint16(xSetOp), uint16(PSUBSB), - /*7637*/ uint16(xReadSlashR), - /*7638*/ uint16(xArgMm), - /*7639*/ uint16(xArgMmM64), - /*7640*/ uint16(xMatch), - /*7641*/ uint16(xSetOp), uint16(PSUBSB), - /*7643*/ uint16(xReadSlashR), - /*7644*/ uint16(xArgXmm1), - /*7645*/ uint16(xArgXmm2M128), - /*7646*/ uint16(xMatch), - /*7647*/ uint16(xCondPrefix), 2, - 0x66, 7659, - 0x0, 7653, - /*7653*/ uint16(xSetOp), uint16(PSUBSW), - /*7655*/ uint16(xReadSlashR), - /*7656*/ uint16(xArgMm), - /*7657*/ uint16(xArgMmM64), - /*7658*/ uint16(xMatch), - /*7659*/ uint16(xSetOp), uint16(PSUBSW), - /*7661*/ uint16(xReadSlashR), - /*7662*/ uint16(xArgXmm1), - /*7663*/ uint16(xArgXmm2M128), - /*7664*/ uint16(xMatch), - /*7665*/ uint16(xCondPrefix), 2, - 0x66, 7677, - 0x0, 7671, - /*7671*/ uint16(xSetOp), uint16(PMINSW), - /*7673*/ uint16(xReadSlashR), - /*7674*/ uint16(xArgMm1), - /*7675*/ uint16(xArgMm2M64), - /*7676*/ uint16(xMatch), - /*7677*/ uint16(xSetOp), uint16(PMINSW), - /*7679*/ uint16(xReadSlashR), - /*7680*/ uint16(xArgXmm1), - /*7681*/ uint16(xArgXmm2M128), - /*7682*/ uint16(xMatch), - /*7683*/ uint16(xCondPrefix), 2, - 0x66, 7695, - 0x0, 7689, - /*7689*/ uint16(xSetOp), uint16(POR), - /*7691*/ uint16(xReadSlashR), - /*7692*/ uint16(xArgMm), - /*7693*/ uint16(xArgMmM64), - /*7694*/ uint16(xMatch), - /*7695*/ uint16(xSetOp), uint16(POR), - /*7697*/ uint16(xReadSlashR), - /*7698*/ uint16(xArgXmm1), - /*7699*/ uint16(xArgXmm2M128), - /*7700*/ uint16(xMatch), - /*7701*/ uint16(xCondPrefix), 2, - 0x66, 7713, - 0x0, 7707, - /*7707*/ uint16(xSetOp), uint16(PADDSB), - /*7709*/ uint16(xReadSlashR), - /*7710*/ uint16(xArgMm), - /*7711*/ uint16(xArgMmM64), - /*7712*/ uint16(xMatch), - /*7713*/ uint16(xSetOp), uint16(PADDSB), - /*7715*/ uint16(xReadSlashR), - /*7716*/ uint16(xArgXmm1), - /*7717*/ uint16(xArgXmm2M128), - /*7718*/ uint16(xMatch), - /*7719*/ uint16(xCondPrefix), 2, - 0x66, 7731, - 0x0, 7725, - /*7725*/ uint16(xSetOp), uint16(PADDSW), - /*7727*/ uint16(xReadSlashR), - /*7728*/ uint16(xArgMm), - /*7729*/ uint16(xArgMmM64), - /*7730*/ uint16(xMatch), - /*7731*/ uint16(xSetOp), uint16(PADDSW), - /*7733*/ uint16(xReadSlashR), - /*7734*/ uint16(xArgXmm1), - /*7735*/ uint16(xArgXmm2M128), - /*7736*/ uint16(xMatch), - /*7737*/ uint16(xCondPrefix), 2, - 0x66, 7749, - 0x0, 7743, - /*7743*/ uint16(xSetOp), uint16(PMAXSW), - /*7745*/ uint16(xReadSlashR), - /*7746*/ uint16(xArgMm1), - /*7747*/ uint16(xArgMm2M64), - /*7748*/ uint16(xMatch), - /*7749*/ uint16(xSetOp), uint16(PMAXSW), - /*7751*/ uint16(xReadSlashR), - /*7752*/ uint16(xArgXmm1), - /*7753*/ uint16(xArgXmm2M128), - /*7754*/ uint16(xMatch), - /*7755*/ uint16(xCondPrefix), 2, - 0x66, 7767, - 0x0, 7761, - /*7761*/ uint16(xSetOp), uint16(PXOR), - /*7763*/ uint16(xReadSlashR), - /*7764*/ uint16(xArgMm), - /*7765*/ uint16(xArgMmM64), - /*7766*/ uint16(xMatch), - /*7767*/ uint16(xSetOp), uint16(PXOR), - /*7769*/ uint16(xReadSlashR), - /*7770*/ uint16(xArgXmm1), - /*7771*/ uint16(xArgXmm2M128), - /*7772*/ uint16(xMatch), - /*7773*/ uint16(xCondPrefix), 1, - 0xF2, 7777, - /*7777*/ uint16(xSetOp), uint16(LDDQU), - /*7779*/ uint16(xReadSlashR), - /*7780*/ uint16(xArgXmm1), - /*7781*/ uint16(xArgM128), - /*7782*/ uint16(xMatch), - /*7783*/ uint16(xCondPrefix), 2, - 0x66, 7795, - 0x0, 7789, - /*7789*/ uint16(xSetOp), uint16(PSLLW), - /*7791*/ uint16(xReadSlashR), - /*7792*/ uint16(xArgMm), - /*7793*/ uint16(xArgMmM64), - /*7794*/ uint16(xMatch), - /*7795*/ uint16(xSetOp), uint16(PSLLW), - /*7797*/ uint16(xReadSlashR), - /*7798*/ uint16(xArgXmm1), - /*7799*/ uint16(xArgXmm2M128), - /*7800*/ uint16(xMatch), - /*7801*/ uint16(xCondPrefix), 2, - 0x66, 7813, - 0x0, 7807, - /*7807*/ uint16(xSetOp), uint16(PSLLD), - /*7809*/ uint16(xReadSlashR), - /*7810*/ uint16(xArgMm), - /*7811*/ uint16(xArgMmM64), - /*7812*/ uint16(xMatch), - /*7813*/ uint16(xSetOp), uint16(PSLLD), - /*7815*/ uint16(xReadSlashR), - /*7816*/ uint16(xArgXmm1), - /*7817*/ uint16(xArgXmm2M128), - /*7818*/ uint16(xMatch), - /*7819*/ uint16(xCondPrefix), 2, - 0x66, 7831, - 0x0, 7825, - /*7825*/ uint16(xSetOp), uint16(PSLLQ), - /*7827*/ uint16(xReadSlashR), - /*7828*/ uint16(xArgMm), - /*7829*/ uint16(xArgMmM64), - /*7830*/ uint16(xMatch), - /*7831*/ uint16(xSetOp), uint16(PSLLQ), - /*7833*/ uint16(xReadSlashR), - /*7834*/ uint16(xArgXmm1), - /*7835*/ uint16(xArgXmm2M128), - /*7836*/ uint16(xMatch), - /*7837*/ uint16(xCondPrefix), 2, - 0x66, 7849, - 0x0, 7843, - /*7843*/ uint16(xSetOp), uint16(PMULUDQ), - /*7845*/ uint16(xReadSlashR), - /*7846*/ uint16(xArgMm1), - /*7847*/ uint16(xArgMm2M64), - /*7848*/ uint16(xMatch), - /*7849*/ uint16(xSetOp), uint16(PMULUDQ), - /*7851*/ uint16(xReadSlashR), - /*7852*/ uint16(xArgXmm1), - /*7853*/ uint16(xArgXmm2M128), - /*7854*/ uint16(xMatch), - /*7855*/ uint16(xCondPrefix), 2, - 0x66, 7867, - 0x0, 7861, - /*7861*/ uint16(xSetOp), uint16(PMADDWD), - /*7863*/ uint16(xReadSlashR), - /*7864*/ uint16(xArgMm), - /*7865*/ uint16(xArgMmM64), - /*7866*/ uint16(xMatch), - /*7867*/ uint16(xSetOp), uint16(PMADDWD), - /*7869*/ uint16(xReadSlashR), - /*7870*/ uint16(xArgXmm1), - /*7871*/ uint16(xArgXmm2M128), - /*7872*/ uint16(xMatch), - /*7873*/ uint16(xCondPrefix), 2, - 0x66, 7885, - 0x0, 7879, - /*7879*/ uint16(xSetOp), uint16(PSADBW), - /*7881*/ uint16(xReadSlashR), - /*7882*/ uint16(xArgMm1), - /*7883*/ uint16(xArgMm2M64), - /*7884*/ uint16(xMatch), - /*7885*/ uint16(xSetOp), uint16(PSADBW), - /*7887*/ uint16(xReadSlashR), - /*7888*/ uint16(xArgXmm1), - /*7889*/ uint16(xArgXmm2M128), - /*7890*/ uint16(xMatch), - /*7891*/ uint16(xCondPrefix), 2, - 0x66, 7903, - 0x0, 7897, - /*7897*/ uint16(xSetOp), uint16(MASKMOVQ), - /*7899*/ uint16(xReadSlashR), - /*7900*/ uint16(xArgMm1), - /*7901*/ uint16(xArgMm2), - /*7902*/ uint16(xMatch), - /*7903*/ uint16(xSetOp), uint16(MASKMOVDQU), - /*7905*/ uint16(xReadSlashR), - /*7906*/ uint16(xArgXmm1), - /*7907*/ uint16(xArgXmm2), - /*7908*/ uint16(xMatch), - /*7909*/ uint16(xCondPrefix), 2, - 0x66, 7921, - 0x0, 7915, - /*7915*/ uint16(xSetOp), uint16(PSUBB), - /*7917*/ uint16(xReadSlashR), - /*7918*/ uint16(xArgMm), - /*7919*/ uint16(xArgMmM64), - /*7920*/ uint16(xMatch), - /*7921*/ uint16(xSetOp), uint16(PSUBB), - /*7923*/ uint16(xReadSlashR), - /*7924*/ uint16(xArgXmm1), - /*7925*/ uint16(xArgXmm2M128), - /*7926*/ uint16(xMatch), - /*7927*/ uint16(xCondPrefix), 2, - 0x66, 7939, - 0x0, 7933, - /*7933*/ uint16(xSetOp), uint16(PSUBW), - /*7935*/ uint16(xReadSlashR), - /*7936*/ uint16(xArgMm), - /*7937*/ uint16(xArgMmM64), - /*7938*/ uint16(xMatch), - /*7939*/ uint16(xSetOp), uint16(PSUBW), - /*7941*/ uint16(xReadSlashR), - /*7942*/ uint16(xArgXmm1), - /*7943*/ uint16(xArgXmm2M128), - /*7944*/ uint16(xMatch), - /*7945*/ uint16(xCondPrefix), 2, - 0x66, 7957, - 0x0, 7951, - /*7951*/ uint16(xSetOp), uint16(PSUBD), - /*7953*/ uint16(xReadSlashR), - /*7954*/ uint16(xArgMm), - /*7955*/ uint16(xArgMmM64), - /*7956*/ uint16(xMatch), - /*7957*/ uint16(xSetOp), uint16(PSUBD), - /*7959*/ uint16(xReadSlashR), - /*7960*/ uint16(xArgXmm1), - /*7961*/ uint16(xArgXmm2M128), - /*7962*/ uint16(xMatch), - /*7963*/ uint16(xCondPrefix), 2, - 0x66, 7975, - 0x0, 7969, - /*7969*/ uint16(xSetOp), uint16(PSUBQ), - /*7971*/ uint16(xReadSlashR), - /*7972*/ uint16(xArgMm1), - /*7973*/ uint16(xArgMm2M64), - /*7974*/ uint16(xMatch), - /*7975*/ uint16(xSetOp), uint16(PSUBQ), - /*7977*/ uint16(xReadSlashR), - /*7978*/ uint16(xArgXmm1), - /*7979*/ uint16(xArgXmm2M128), - /*7980*/ uint16(xMatch), - /*7981*/ uint16(xCondPrefix), 2, - 0x66, 7993, - 0x0, 7987, - /*7987*/ uint16(xSetOp), uint16(PADDB), - /*7989*/ uint16(xReadSlashR), - /*7990*/ uint16(xArgMm), - /*7991*/ uint16(xArgMmM64), - /*7992*/ uint16(xMatch), - /*7993*/ uint16(xSetOp), uint16(PADDB), - /*7995*/ uint16(xReadSlashR), - /*7996*/ uint16(xArgXmm1), - /*7997*/ uint16(xArgXmm2M128), - /*7998*/ uint16(xMatch), - /*7999*/ uint16(xCondPrefix), 2, - 0x66, 8011, - 0x0, 8005, - /*8005*/ uint16(xSetOp), uint16(PADDW), - /*8007*/ uint16(xReadSlashR), - /*8008*/ uint16(xArgMm), - /*8009*/ uint16(xArgMmM64), - /*8010*/ uint16(xMatch), - /*8011*/ uint16(xSetOp), uint16(PADDW), - /*8013*/ uint16(xReadSlashR), - /*8014*/ uint16(xArgXmm1), - /*8015*/ uint16(xArgXmm2M128), - /*8016*/ uint16(xMatch), - /*8017*/ uint16(xCondPrefix), 2, - 0x66, 8029, - 0x0, 8023, - /*8023*/ uint16(xSetOp), uint16(PADDD), - /*8025*/ uint16(xReadSlashR), - /*8026*/ uint16(xArgMm), - /*8027*/ uint16(xArgMmM64), - /*8028*/ uint16(xMatch), - /*8029*/ uint16(xSetOp), uint16(PADDD), - /*8031*/ uint16(xReadSlashR), - /*8032*/ uint16(xArgXmm1), - /*8033*/ uint16(xArgXmm2M128), - /*8034*/ uint16(xMatch), - /*8035*/ uint16(xCondDataSize), 0, 8039, 0, - /*8039*/ uint16(xSetOp), uint16(UD0), - /*8041*/ uint16(xReadSlashR), - /*8042*/ uint16(xArgR32), - /*8043*/ uint16(xArgRM32), - /*8044*/ uint16(xMatch), - /*8045*/ uint16(xSetOp), uint16(ADC), - /*8047*/ uint16(xReadSlashR), - /*8048*/ uint16(xArgRM8), - /*8049*/ uint16(xArgR8), - /*8050*/ uint16(xMatch), - /*8051*/ uint16(xCondIs64), 8054, 8070, - /*8054*/ uint16(xCondDataSize), 8058, 8064, 0, - /*8058*/ uint16(xSetOp), uint16(ADC), - /*8060*/ uint16(xReadSlashR), - /*8061*/ uint16(xArgRM16), - /*8062*/ uint16(xArgR16), - /*8063*/ uint16(xMatch), - /*8064*/ uint16(xSetOp), uint16(ADC), + /*7217*/ uint16(xCondIs64), 7220, 7232, + /*7220*/ uint16(xCondDataSize), 7224, 7228, 0, + /*7224*/ uint16(xSetOp), uint16(BSWAP), + /*7226*/ uint16(xArgR16op), + /*7227*/ uint16(xMatch), + /*7228*/ uint16(xSetOp), uint16(BSWAP), + /*7230*/ uint16(xArgR32op), + /*7231*/ uint16(xMatch), + /*7232*/ uint16(xCondDataSize), 7224, 7228, 7236, + /*7236*/ uint16(xSetOp), uint16(BSWAP), + /*7238*/ uint16(xArgR64op), + /*7239*/ uint16(xMatch), + /*7240*/ uint16(xCondPrefix), 2, + 0xF2, 7252, + 0x66, 7246, + /*7246*/ uint16(xSetOp), uint16(ADDSUBPD), + /*7248*/ uint16(xReadSlashR), + /*7249*/ uint16(xArgXmm1), + /*7250*/ uint16(xArgXmm2M128), + /*7251*/ uint16(xMatch), + /*7252*/ uint16(xSetOp), uint16(ADDSUBPS), + /*7254*/ uint16(xReadSlashR), + /*7255*/ uint16(xArgXmm1), + /*7256*/ uint16(xArgXmm2M128), + /*7257*/ uint16(xMatch), + /*7258*/ uint16(xCondPrefix), 2, + 0x66, 7270, + 0x0, 7264, + /*7264*/ uint16(xSetOp), uint16(PSRLW), + /*7266*/ uint16(xReadSlashR), + /*7267*/ uint16(xArgMm), + /*7268*/ uint16(xArgMmM64), + /*7269*/ uint16(xMatch), + /*7270*/ uint16(xSetOp), uint16(PSRLW), + /*7272*/ uint16(xReadSlashR), + /*7273*/ uint16(xArgXmm1), + /*7274*/ uint16(xArgXmm2M128), + /*7275*/ uint16(xMatch), + /*7276*/ uint16(xCondPrefix), 2, + 0x66, 7288, + 0x0, 7282, + /*7282*/ uint16(xSetOp), uint16(PSRLD), + /*7284*/ uint16(xReadSlashR), + /*7285*/ uint16(xArgMm), + /*7286*/ uint16(xArgMmM64), + /*7287*/ uint16(xMatch), + /*7288*/ uint16(xSetOp), uint16(PSRLD), + /*7290*/ uint16(xReadSlashR), + /*7291*/ uint16(xArgXmm1), + /*7292*/ uint16(xArgXmm2M128), + /*7293*/ uint16(xMatch), + /*7294*/ uint16(xCondPrefix), 2, + 0x66, 7306, + 0x0, 7300, + /*7300*/ uint16(xSetOp), uint16(PSRLQ), + /*7302*/ uint16(xReadSlashR), + /*7303*/ uint16(xArgMm), + /*7304*/ uint16(xArgMmM64), + /*7305*/ uint16(xMatch), + /*7306*/ uint16(xSetOp), uint16(PSRLQ), + /*7308*/ uint16(xReadSlashR), + /*7309*/ uint16(xArgXmm1), + /*7310*/ uint16(xArgXmm2M128), + /*7311*/ uint16(xMatch), + /*7312*/ uint16(xCondPrefix), 2, + 0x66, 7324, + 0x0, 7318, + /*7318*/ uint16(xSetOp), uint16(PADDQ), + /*7320*/ uint16(xReadSlashR), + /*7321*/ uint16(xArgMm1), + /*7322*/ uint16(xArgMm2M64), + /*7323*/ uint16(xMatch), + /*7324*/ uint16(xSetOp), uint16(PADDQ), + /*7326*/ uint16(xReadSlashR), + /*7327*/ uint16(xArgXmm1), + /*7328*/ uint16(xArgXmm2M128), + /*7329*/ uint16(xMatch), + /*7330*/ uint16(xCondPrefix), 2, + 0x66, 7342, + 0x0, 7336, + /*7336*/ uint16(xSetOp), uint16(PMULLW), + /*7338*/ uint16(xReadSlashR), + /*7339*/ uint16(xArgMm), + /*7340*/ uint16(xArgMmM64), + /*7341*/ uint16(xMatch), + /*7342*/ uint16(xSetOp), uint16(PMULLW), + /*7344*/ uint16(xReadSlashR), + /*7345*/ uint16(xArgXmm1), + /*7346*/ uint16(xArgXmm2M128), + /*7347*/ uint16(xMatch), + /*7348*/ uint16(xCondPrefix), 3, + 0xF3, 7368, + 0xF2, 7362, + 0x66, 7356, + /*7356*/ uint16(xSetOp), uint16(MOVQ), + /*7358*/ uint16(xReadSlashR), + /*7359*/ uint16(xArgXmm2M64), + /*7360*/ uint16(xArgXmm1), + /*7361*/ uint16(xMatch), + /*7362*/ uint16(xSetOp), uint16(MOVDQ2Q), + /*7364*/ uint16(xReadSlashR), + /*7365*/ uint16(xArgMm), + /*7366*/ uint16(xArgXmm2), + /*7367*/ uint16(xMatch), + /*7368*/ uint16(xSetOp), uint16(MOVQ2DQ), + /*7370*/ uint16(xReadSlashR), + /*7371*/ uint16(xArgXmm1), + /*7372*/ uint16(xArgMm2), + /*7373*/ uint16(xMatch), + /*7374*/ uint16(xCondPrefix), 2, + 0x66, 7386, + 0x0, 7380, + /*7380*/ uint16(xSetOp), uint16(PMOVMSKB), + /*7382*/ uint16(xReadSlashR), + /*7383*/ uint16(xArgR32), + /*7384*/ uint16(xArgMm2), + /*7385*/ uint16(xMatch), + /*7386*/ uint16(xSetOp), uint16(PMOVMSKB), + /*7388*/ uint16(xReadSlashR), + /*7389*/ uint16(xArgR32), + /*7390*/ uint16(xArgXmm2), + /*7391*/ uint16(xMatch), + /*7392*/ uint16(xCondPrefix), 2, + 0x66, 7404, + 0x0, 7398, + /*7398*/ uint16(xSetOp), uint16(PSUBUSB), + /*7400*/ uint16(xReadSlashR), + /*7401*/ uint16(xArgMm), + /*7402*/ uint16(xArgMmM64), + /*7403*/ uint16(xMatch), + /*7404*/ uint16(xSetOp), uint16(PSUBUSB), + /*7406*/ uint16(xReadSlashR), + /*7407*/ uint16(xArgXmm1), + /*7408*/ uint16(xArgXmm2M128), + /*7409*/ uint16(xMatch), + /*7410*/ uint16(xCondPrefix), 2, + 0x66, 7422, + 0x0, 7416, + /*7416*/ uint16(xSetOp), uint16(PSUBUSW), + /*7418*/ uint16(xReadSlashR), + /*7419*/ uint16(xArgMm), + /*7420*/ uint16(xArgMmM64), + /*7421*/ uint16(xMatch), + /*7422*/ uint16(xSetOp), uint16(PSUBUSW), + /*7424*/ uint16(xReadSlashR), + /*7425*/ uint16(xArgXmm1), + /*7426*/ uint16(xArgXmm2M128), + /*7427*/ uint16(xMatch), + /*7428*/ uint16(xCondPrefix), 2, + 0x66, 7440, + 0x0, 7434, + /*7434*/ uint16(xSetOp), uint16(PMINUB), + /*7436*/ uint16(xReadSlashR), + /*7437*/ uint16(xArgMm1), + /*7438*/ uint16(xArgMm2M64), + /*7439*/ uint16(xMatch), + /*7440*/ uint16(xSetOp), uint16(PMINUB), + /*7442*/ uint16(xReadSlashR), + /*7443*/ uint16(xArgXmm1), + /*7444*/ uint16(xArgXmm2M128), + /*7445*/ uint16(xMatch), + /*7446*/ uint16(xCondPrefix), 2, + 0x66, 7458, + 0x0, 7452, + /*7452*/ uint16(xSetOp), uint16(PAND), + /*7454*/ uint16(xReadSlashR), + /*7455*/ uint16(xArgMm), + /*7456*/ uint16(xArgMmM64), + /*7457*/ uint16(xMatch), + /*7458*/ uint16(xSetOp), uint16(PAND), + /*7460*/ uint16(xReadSlashR), + /*7461*/ uint16(xArgXmm1), + /*7462*/ uint16(xArgXmm2M128), + /*7463*/ uint16(xMatch), + /*7464*/ uint16(xCondPrefix), 2, + 0x66, 7476, + 0x0, 7470, + /*7470*/ uint16(xSetOp), uint16(PADDUSB), + /*7472*/ uint16(xReadSlashR), + /*7473*/ uint16(xArgMm), + /*7474*/ uint16(xArgMmM64), + /*7475*/ uint16(xMatch), + /*7476*/ uint16(xSetOp), uint16(PADDUSB), + /*7478*/ uint16(xReadSlashR), + /*7479*/ uint16(xArgXmm1), + /*7480*/ uint16(xArgXmm2M128), + /*7481*/ uint16(xMatch), + /*7482*/ uint16(xCondPrefix), 2, + 0x66, 7494, + 0x0, 7488, + /*7488*/ uint16(xSetOp), uint16(PADDUSW), + /*7490*/ uint16(xReadSlashR), + /*7491*/ uint16(xArgMm), + /*7492*/ uint16(xArgMmM64), + /*7493*/ uint16(xMatch), + /*7494*/ uint16(xSetOp), uint16(PADDUSW), + /*7496*/ uint16(xReadSlashR), + /*7497*/ uint16(xArgXmm1), + /*7498*/ uint16(xArgXmm2M128), + /*7499*/ uint16(xMatch), + /*7500*/ uint16(xCondPrefix), 2, + 0x66, 7512, + 0x0, 7506, + /*7506*/ uint16(xSetOp), uint16(PMAXUB), + /*7508*/ uint16(xReadSlashR), + /*7509*/ uint16(xArgMm1), + /*7510*/ uint16(xArgMm2M64), + /*7511*/ uint16(xMatch), + /*7512*/ uint16(xSetOp), uint16(PMAXUB), + /*7514*/ uint16(xReadSlashR), + /*7515*/ uint16(xArgXmm1), + /*7516*/ uint16(xArgXmm2M128), + /*7517*/ uint16(xMatch), + /*7518*/ uint16(xCondPrefix), 2, + 0x66, 7530, + 0x0, 7524, + /*7524*/ uint16(xSetOp), uint16(PANDN), + /*7526*/ uint16(xReadSlashR), + /*7527*/ uint16(xArgMm), + /*7528*/ uint16(xArgMmM64), + /*7529*/ uint16(xMatch), + /*7530*/ uint16(xSetOp), uint16(PANDN), + /*7532*/ uint16(xReadSlashR), + /*7533*/ uint16(xArgXmm1), + /*7534*/ uint16(xArgXmm2M128), + /*7535*/ uint16(xMatch), + /*7536*/ uint16(xCondPrefix), 2, + 0x66, 7548, + 0x0, 7542, + /*7542*/ uint16(xSetOp), uint16(PAVGB), + /*7544*/ uint16(xReadSlashR), + /*7545*/ uint16(xArgMm1), + /*7546*/ uint16(xArgMm2M64), + /*7547*/ uint16(xMatch), + /*7548*/ uint16(xSetOp), uint16(PAVGB), + /*7550*/ uint16(xReadSlashR), + /*7551*/ uint16(xArgXmm1), + /*7552*/ uint16(xArgXmm2M128), + /*7553*/ uint16(xMatch), + /*7554*/ uint16(xCondPrefix), 2, + 0x66, 7566, + 0x0, 7560, + /*7560*/ uint16(xSetOp), uint16(PSRAW), + /*7562*/ uint16(xReadSlashR), + /*7563*/ uint16(xArgMm), + /*7564*/ uint16(xArgMmM64), + /*7565*/ uint16(xMatch), + /*7566*/ uint16(xSetOp), uint16(PSRAW), + /*7568*/ uint16(xReadSlashR), + /*7569*/ uint16(xArgXmm1), + /*7570*/ uint16(xArgXmm2M128), + /*7571*/ uint16(xMatch), + /*7572*/ uint16(xCondPrefix), 2, + 0x66, 7584, + 0x0, 7578, + /*7578*/ uint16(xSetOp), uint16(PSRAD), + /*7580*/ uint16(xReadSlashR), + /*7581*/ uint16(xArgMm), + /*7582*/ uint16(xArgMmM64), + /*7583*/ uint16(xMatch), + /*7584*/ uint16(xSetOp), uint16(PSRAD), + /*7586*/ uint16(xReadSlashR), + /*7587*/ uint16(xArgXmm1), + /*7588*/ uint16(xArgXmm2M128), + /*7589*/ uint16(xMatch), + /*7590*/ uint16(xCondPrefix), 2, + 0x66, 7602, + 0x0, 7596, + /*7596*/ uint16(xSetOp), uint16(PAVGW), + /*7598*/ uint16(xReadSlashR), + /*7599*/ uint16(xArgMm1), + /*7600*/ uint16(xArgMm2M64), + /*7601*/ uint16(xMatch), + /*7602*/ uint16(xSetOp), uint16(PAVGW), + /*7604*/ uint16(xReadSlashR), + /*7605*/ uint16(xArgXmm1), + /*7606*/ uint16(xArgXmm2M128), + /*7607*/ uint16(xMatch), + /*7608*/ uint16(xCondPrefix), 2, + 0x66, 7620, + 0x0, 7614, + /*7614*/ uint16(xSetOp), uint16(PMULHUW), + /*7616*/ uint16(xReadSlashR), + /*7617*/ uint16(xArgMm1), + /*7618*/ uint16(xArgMm2M64), + /*7619*/ uint16(xMatch), + /*7620*/ uint16(xSetOp), uint16(PMULHUW), + /*7622*/ uint16(xReadSlashR), + /*7623*/ uint16(xArgXmm1), + /*7624*/ uint16(xArgXmm2M128), + /*7625*/ uint16(xMatch), + /*7626*/ uint16(xCondPrefix), 2, + 0x66, 7638, + 0x0, 7632, + /*7632*/ uint16(xSetOp), uint16(PMULHW), + /*7634*/ uint16(xReadSlashR), + /*7635*/ uint16(xArgMm), + /*7636*/ uint16(xArgMmM64), + /*7637*/ uint16(xMatch), + /*7638*/ uint16(xSetOp), uint16(PMULHW), + /*7640*/ uint16(xReadSlashR), + /*7641*/ uint16(xArgXmm1), + /*7642*/ uint16(xArgXmm2M128), + /*7643*/ uint16(xMatch), + /*7644*/ uint16(xCondPrefix), 3, + 0xF3, 7664, + 0xF2, 7658, + 0x66, 7652, + /*7652*/ uint16(xSetOp), uint16(CVTTPD2DQ), + /*7654*/ uint16(xReadSlashR), + /*7655*/ uint16(xArgXmm1), + /*7656*/ uint16(xArgXmm2M128), + /*7657*/ uint16(xMatch), + /*7658*/ uint16(xSetOp), uint16(CVTPD2DQ), + /*7660*/ uint16(xReadSlashR), + /*7661*/ uint16(xArgXmm1), + /*7662*/ uint16(xArgXmm2M128), + /*7663*/ uint16(xMatch), + /*7664*/ uint16(xSetOp), uint16(CVTDQ2PD), + /*7666*/ uint16(xReadSlashR), + /*7667*/ uint16(xArgXmm1), + /*7668*/ uint16(xArgXmm2M64), + /*7669*/ uint16(xMatch), + /*7670*/ uint16(xCondPrefix), 2, + 0x66, 7682, + 0x0, 7676, + /*7676*/ uint16(xSetOp), uint16(MOVNTQ), + /*7678*/ uint16(xReadSlashR), + /*7679*/ uint16(xArgM64), + /*7680*/ uint16(xArgMm), + /*7681*/ uint16(xMatch), + /*7682*/ uint16(xSetOp), uint16(MOVNTDQ), + /*7684*/ uint16(xReadSlashR), + /*7685*/ uint16(xArgM128), + /*7686*/ uint16(xArgXmm), + /*7687*/ uint16(xMatch), + /*7688*/ uint16(xCondPrefix), 2, + 0x66, 7700, + 0x0, 7694, + /*7694*/ uint16(xSetOp), uint16(PSUBSB), + /*7696*/ uint16(xReadSlashR), + /*7697*/ uint16(xArgMm), + /*7698*/ uint16(xArgMmM64), + /*7699*/ uint16(xMatch), + /*7700*/ uint16(xSetOp), uint16(PSUBSB), + /*7702*/ uint16(xReadSlashR), + /*7703*/ uint16(xArgXmm1), + /*7704*/ uint16(xArgXmm2M128), + /*7705*/ uint16(xMatch), + /*7706*/ uint16(xCondPrefix), 2, + 0x66, 7718, + 0x0, 7712, + /*7712*/ uint16(xSetOp), uint16(PSUBSW), + /*7714*/ uint16(xReadSlashR), + /*7715*/ uint16(xArgMm), + /*7716*/ uint16(xArgMmM64), + /*7717*/ uint16(xMatch), + /*7718*/ uint16(xSetOp), uint16(PSUBSW), + /*7720*/ uint16(xReadSlashR), + /*7721*/ uint16(xArgXmm1), + /*7722*/ uint16(xArgXmm2M128), + /*7723*/ uint16(xMatch), + /*7724*/ uint16(xCondPrefix), 2, + 0x66, 7736, + 0x0, 7730, + /*7730*/ uint16(xSetOp), uint16(PMINSW), + /*7732*/ uint16(xReadSlashR), + /*7733*/ uint16(xArgMm1), + /*7734*/ uint16(xArgMm2M64), + /*7735*/ uint16(xMatch), + /*7736*/ uint16(xSetOp), uint16(PMINSW), + /*7738*/ uint16(xReadSlashR), + /*7739*/ uint16(xArgXmm1), + /*7740*/ uint16(xArgXmm2M128), + /*7741*/ uint16(xMatch), + /*7742*/ uint16(xCondPrefix), 2, + 0x66, 7754, + 0x0, 7748, + /*7748*/ uint16(xSetOp), uint16(POR), + /*7750*/ uint16(xReadSlashR), + /*7751*/ uint16(xArgMm), + /*7752*/ uint16(xArgMmM64), + /*7753*/ uint16(xMatch), + /*7754*/ uint16(xSetOp), uint16(POR), + /*7756*/ uint16(xReadSlashR), + /*7757*/ uint16(xArgXmm1), + /*7758*/ uint16(xArgXmm2M128), + /*7759*/ uint16(xMatch), + /*7760*/ uint16(xCondPrefix), 2, + 0x66, 7772, + 0x0, 7766, + /*7766*/ uint16(xSetOp), uint16(PADDSB), + /*7768*/ uint16(xReadSlashR), + /*7769*/ uint16(xArgMm), + /*7770*/ uint16(xArgMmM64), + /*7771*/ uint16(xMatch), + /*7772*/ uint16(xSetOp), uint16(PADDSB), + /*7774*/ uint16(xReadSlashR), + /*7775*/ uint16(xArgXmm1), + /*7776*/ uint16(xArgXmm2M128), + /*7777*/ uint16(xMatch), + /*7778*/ uint16(xCondPrefix), 2, + 0x66, 7790, + 0x0, 7784, + /*7784*/ uint16(xSetOp), uint16(PADDSW), + /*7786*/ uint16(xReadSlashR), + /*7787*/ uint16(xArgMm), + /*7788*/ uint16(xArgMmM64), + /*7789*/ uint16(xMatch), + /*7790*/ uint16(xSetOp), uint16(PADDSW), + /*7792*/ uint16(xReadSlashR), + /*7793*/ uint16(xArgXmm1), + /*7794*/ uint16(xArgXmm2M128), + /*7795*/ uint16(xMatch), + /*7796*/ uint16(xCondPrefix), 2, + 0x66, 7808, + 0x0, 7802, + /*7802*/ uint16(xSetOp), uint16(PMAXSW), + /*7804*/ uint16(xReadSlashR), + /*7805*/ uint16(xArgMm1), + /*7806*/ uint16(xArgMm2M64), + /*7807*/ uint16(xMatch), + /*7808*/ uint16(xSetOp), uint16(PMAXSW), + /*7810*/ uint16(xReadSlashR), + /*7811*/ uint16(xArgXmm1), + /*7812*/ uint16(xArgXmm2M128), + /*7813*/ uint16(xMatch), + /*7814*/ uint16(xCondPrefix), 2, + 0x66, 7826, + 0x0, 7820, + /*7820*/ uint16(xSetOp), uint16(PXOR), + /*7822*/ uint16(xReadSlashR), + /*7823*/ uint16(xArgMm), + /*7824*/ uint16(xArgMmM64), + /*7825*/ uint16(xMatch), + /*7826*/ uint16(xSetOp), uint16(PXOR), + /*7828*/ uint16(xReadSlashR), + /*7829*/ uint16(xArgXmm1), + /*7830*/ uint16(xArgXmm2M128), + /*7831*/ uint16(xMatch), + /*7832*/ uint16(xCondPrefix), 1, + 0xF2, 7836, + /*7836*/ uint16(xSetOp), uint16(LDDQU), + /*7838*/ uint16(xReadSlashR), + /*7839*/ uint16(xArgXmm1), + /*7840*/ uint16(xArgM128), + /*7841*/ uint16(xMatch), + /*7842*/ uint16(xCondPrefix), 2, + 0x66, 7854, + 0x0, 7848, + /*7848*/ uint16(xSetOp), uint16(PSLLW), + /*7850*/ uint16(xReadSlashR), + /*7851*/ uint16(xArgMm), + /*7852*/ uint16(xArgMmM64), + /*7853*/ uint16(xMatch), + /*7854*/ uint16(xSetOp), uint16(PSLLW), + /*7856*/ uint16(xReadSlashR), + /*7857*/ uint16(xArgXmm1), + /*7858*/ uint16(xArgXmm2M128), + /*7859*/ uint16(xMatch), + /*7860*/ uint16(xCondPrefix), 2, + 0x66, 7872, + 0x0, 7866, + /*7866*/ uint16(xSetOp), uint16(PSLLD), + /*7868*/ uint16(xReadSlashR), + /*7869*/ uint16(xArgMm), + /*7870*/ uint16(xArgMmM64), + /*7871*/ uint16(xMatch), + /*7872*/ uint16(xSetOp), uint16(PSLLD), + /*7874*/ uint16(xReadSlashR), + /*7875*/ uint16(xArgXmm1), + /*7876*/ uint16(xArgXmm2M128), + /*7877*/ uint16(xMatch), + /*7878*/ uint16(xCondPrefix), 2, + 0x66, 7890, + 0x0, 7884, + /*7884*/ uint16(xSetOp), uint16(PSLLQ), + /*7886*/ uint16(xReadSlashR), + /*7887*/ uint16(xArgMm), + /*7888*/ uint16(xArgMmM64), + /*7889*/ uint16(xMatch), + /*7890*/ uint16(xSetOp), uint16(PSLLQ), + /*7892*/ uint16(xReadSlashR), + /*7893*/ uint16(xArgXmm1), + /*7894*/ uint16(xArgXmm2M128), + /*7895*/ uint16(xMatch), + /*7896*/ uint16(xCondPrefix), 2, + 0x66, 7908, + 0x0, 7902, + /*7902*/ uint16(xSetOp), uint16(PMULUDQ), + /*7904*/ uint16(xReadSlashR), + /*7905*/ uint16(xArgMm1), + /*7906*/ uint16(xArgMm2M64), + /*7907*/ uint16(xMatch), + /*7908*/ uint16(xSetOp), uint16(PMULUDQ), + /*7910*/ uint16(xReadSlashR), + /*7911*/ uint16(xArgXmm1), + /*7912*/ uint16(xArgXmm2M128), + /*7913*/ uint16(xMatch), + /*7914*/ uint16(xCondPrefix), 2, + 0x66, 7926, + 0x0, 7920, + /*7920*/ uint16(xSetOp), uint16(PMADDWD), + /*7922*/ uint16(xReadSlashR), + /*7923*/ uint16(xArgMm), + /*7924*/ uint16(xArgMmM64), + /*7925*/ uint16(xMatch), + /*7926*/ uint16(xSetOp), uint16(PMADDWD), + /*7928*/ uint16(xReadSlashR), + /*7929*/ uint16(xArgXmm1), + /*7930*/ uint16(xArgXmm2M128), + /*7931*/ uint16(xMatch), + /*7932*/ uint16(xCondPrefix), 2, + 0x66, 7944, + 0x0, 7938, + /*7938*/ uint16(xSetOp), uint16(PSADBW), + /*7940*/ uint16(xReadSlashR), + /*7941*/ uint16(xArgMm1), + /*7942*/ uint16(xArgMm2M64), + /*7943*/ uint16(xMatch), + /*7944*/ uint16(xSetOp), uint16(PSADBW), + /*7946*/ uint16(xReadSlashR), + /*7947*/ uint16(xArgXmm1), + /*7948*/ uint16(xArgXmm2M128), + /*7949*/ uint16(xMatch), + /*7950*/ uint16(xCondPrefix), 2, + 0x66, 7962, + 0x0, 7956, + /*7956*/ uint16(xSetOp), uint16(MASKMOVQ), + /*7958*/ uint16(xReadSlashR), + /*7959*/ uint16(xArgMm1), + /*7960*/ uint16(xArgMm2), + /*7961*/ uint16(xMatch), + /*7962*/ uint16(xSetOp), uint16(MASKMOVDQU), + /*7964*/ uint16(xReadSlashR), + /*7965*/ uint16(xArgXmm1), + /*7966*/ uint16(xArgXmm2), + /*7967*/ uint16(xMatch), + /*7968*/ uint16(xCondPrefix), 2, + 0x66, 7980, + 0x0, 7974, + /*7974*/ uint16(xSetOp), uint16(PSUBB), + /*7976*/ uint16(xReadSlashR), + /*7977*/ uint16(xArgMm), + /*7978*/ uint16(xArgMmM64), + /*7979*/ uint16(xMatch), + /*7980*/ uint16(xSetOp), uint16(PSUBB), + /*7982*/ uint16(xReadSlashR), + /*7983*/ uint16(xArgXmm1), + /*7984*/ uint16(xArgXmm2M128), + /*7985*/ uint16(xMatch), + /*7986*/ uint16(xCondPrefix), 2, + 0x66, 7998, + 0x0, 7992, + /*7992*/ uint16(xSetOp), uint16(PSUBW), + /*7994*/ uint16(xReadSlashR), + /*7995*/ uint16(xArgMm), + /*7996*/ uint16(xArgMmM64), + /*7997*/ uint16(xMatch), + /*7998*/ uint16(xSetOp), uint16(PSUBW), + /*8000*/ uint16(xReadSlashR), + /*8001*/ uint16(xArgXmm1), + /*8002*/ uint16(xArgXmm2M128), + /*8003*/ uint16(xMatch), + /*8004*/ uint16(xCondPrefix), 2, + 0x66, 8016, + 0x0, 8010, + /*8010*/ uint16(xSetOp), uint16(PSUBD), + /*8012*/ uint16(xReadSlashR), + /*8013*/ uint16(xArgMm), + /*8014*/ uint16(xArgMmM64), + /*8015*/ uint16(xMatch), + /*8016*/ uint16(xSetOp), uint16(PSUBD), + /*8018*/ uint16(xReadSlashR), + /*8019*/ uint16(xArgXmm1), + /*8020*/ uint16(xArgXmm2M128), + /*8021*/ uint16(xMatch), + /*8022*/ uint16(xCondPrefix), 2, + 0x66, 8034, + 0x0, 8028, + /*8028*/ uint16(xSetOp), uint16(PSUBQ), + /*8030*/ uint16(xReadSlashR), + /*8031*/ uint16(xArgMm1), + /*8032*/ uint16(xArgMm2M64), + /*8033*/ uint16(xMatch), + /*8034*/ uint16(xSetOp), uint16(PSUBQ), + /*8036*/ uint16(xReadSlashR), + /*8037*/ uint16(xArgXmm1), + /*8038*/ uint16(xArgXmm2M128), + /*8039*/ uint16(xMatch), + /*8040*/ uint16(xCondPrefix), 2, + 0x66, 8052, + 0x0, 8046, + /*8046*/ uint16(xSetOp), uint16(PADDB), + /*8048*/ uint16(xReadSlashR), + /*8049*/ uint16(xArgMm), + /*8050*/ uint16(xArgMmM64), + /*8051*/ uint16(xMatch), + /*8052*/ uint16(xSetOp), uint16(PADDB), + /*8054*/ uint16(xReadSlashR), + /*8055*/ uint16(xArgXmm1), + /*8056*/ uint16(xArgXmm2M128), + /*8057*/ uint16(xMatch), + /*8058*/ uint16(xCondPrefix), 2, + 0x66, 8070, + 0x0, 8064, + /*8064*/ uint16(xSetOp), uint16(PADDW), /*8066*/ uint16(xReadSlashR), - /*8067*/ uint16(xArgRM32), - /*8068*/ uint16(xArgR32), + /*8067*/ uint16(xArgMm), + /*8068*/ uint16(xArgMmM64), /*8069*/ uint16(xMatch), - /*8070*/ uint16(xCondDataSize), 8058, 8064, 8074, - /*8074*/ uint16(xSetOp), uint16(ADC), - /*8076*/ uint16(xReadSlashR), - /*8077*/ uint16(xArgRM64), - /*8078*/ uint16(xArgR64), - /*8079*/ uint16(xMatch), - /*8080*/ uint16(xSetOp), uint16(ADC), - /*8082*/ uint16(xReadSlashR), - /*8083*/ uint16(xArgR8), - /*8084*/ uint16(xArgRM8), - /*8085*/ uint16(xMatch), - /*8086*/ uint16(xCondIs64), 8089, 8105, - /*8089*/ uint16(xCondDataSize), 8093, 8099, 0, - /*8093*/ uint16(xSetOp), uint16(ADC), - /*8095*/ uint16(xReadSlashR), - /*8096*/ uint16(xArgR16), - /*8097*/ uint16(xArgRM16), - /*8098*/ uint16(xMatch), - /*8099*/ uint16(xSetOp), uint16(ADC), - /*8101*/ uint16(xReadSlashR), - /*8102*/ uint16(xArgR32), - /*8103*/ uint16(xArgRM32), - /*8104*/ uint16(xMatch), - /*8105*/ uint16(xCondDataSize), 8093, 8099, 8109, - /*8109*/ uint16(xSetOp), uint16(ADC), - /*8111*/ uint16(xReadSlashR), - /*8112*/ uint16(xArgR64), - /*8113*/ uint16(xArgRM64), - /*8114*/ uint16(xMatch), - /*8115*/ uint16(xSetOp), uint16(ADC), - /*8117*/ uint16(xReadIb), - /*8118*/ uint16(xArgAL), - /*8119*/ uint16(xArgImm8u), - /*8120*/ uint16(xMatch), - /*8121*/ uint16(xCondIs64), 8124, 8140, - /*8124*/ uint16(xCondDataSize), 8128, 8134, 0, - /*8128*/ uint16(xSetOp), uint16(ADC), - /*8130*/ uint16(xReadIw), - /*8131*/ uint16(xArgAX), - /*8132*/ uint16(xArgImm16), - /*8133*/ uint16(xMatch), - /*8134*/ uint16(xSetOp), uint16(ADC), - /*8136*/ uint16(xReadId), - /*8137*/ uint16(xArgEAX), - /*8138*/ uint16(xArgImm32), - /*8139*/ uint16(xMatch), - /*8140*/ uint16(xCondDataSize), 8128, 8134, 8144, - /*8144*/ uint16(xSetOp), uint16(ADC), - /*8146*/ uint16(xReadId), - /*8147*/ uint16(xArgRAX), - /*8148*/ uint16(xArgImm32), - /*8149*/ uint16(xMatch), - /*8150*/ uint16(xCondIs64), 8153, 0, - /*8153*/ uint16(xSetOp), uint16(PUSH), - /*8155*/ uint16(xArgSS), - /*8156*/ uint16(xMatch), - /*8157*/ uint16(xCondIs64), 8160, 0, - /*8160*/ uint16(xSetOp), uint16(POP), - /*8162*/ uint16(xArgSS), + /*8070*/ uint16(xSetOp), uint16(PADDW), + /*8072*/ uint16(xReadSlashR), + /*8073*/ uint16(xArgXmm1), + /*8074*/ uint16(xArgXmm2M128), + /*8075*/ uint16(xMatch), + /*8076*/ uint16(xCondPrefix), 2, + 0x66, 8088, + 0x0, 8082, + /*8082*/ uint16(xSetOp), uint16(PADDD), + /*8084*/ uint16(xReadSlashR), + /*8085*/ uint16(xArgMm), + /*8086*/ uint16(xArgMmM64), + /*8087*/ uint16(xMatch), + /*8088*/ uint16(xSetOp), uint16(PADDD), + /*8090*/ uint16(xReadSlashR), + /*8091*/ uint16(xArgXmm1), + /*8092*/ uint16(xArgXmm2M128), + /*8093*/ uint16(xMatch), + /*8094*/ uint16(xCondDataSize), 0, 8098, 0, + /*8098*/ uint16(xSetOp), uint16(UD0), + /*8100*/ uint16(xReadSlashR), + /*8101*/ uint16(xArgR32), + /*8102*/ uint16(xArgRM32), + /*8103*/ uint16(xMatch), + /*8104*/ uint16(xSetOp), uint16(ADC), + /*8106*/ uint16(xReadSlashR), + /*8107*/ uint16(xArgRM8), + /*8108*/ uint16(xArgR8), + /*8109*/ uint16(xMatch), + /*8110*/ uint16(xCondIs64), 8113, 8129, + /*8113*/ uint16(xCondDataSize), 8117, 8123, 0, + /*8117*/ uint16(xSetOp), uint16(ADC), + /*8119*/ uint16(xReadSlashR), + /*8120*/ uint16(xArgRM16), + /*8121*/ uint16(xArgR16), + /*8122*/ uint16(xMatch), + /*8123*/ uint16(xSetOp), uint16(ADC), + /*8125*/ uint16(xReadSlashR), + /*8126*/ uint16(xArgRM32), + /*8127*/ uint16(xArgR32), + /*8128*/ uint16(xMatch), + /*8129*/ uint16(xCondDataSize), 8117, 8123, 8133, + /*8133*/ uint16(xSetOp), uint16(ADC), + /*8135*/ uint16(xReadSlashR), + /*8136*/ uint16(xArgRM64), + /*8137*/ uint16(xArgR64), + /*8138*/ uint16(xMatch), + /*8139*/ uint16(xSetOp), uint16(ADC), + /*8141*/ uint16(xReadSlashR), + /*8142*/ uint16(xArgR8), + /*8143*/ uint16(xArgRM8), + /*8144*/ uint16(xMatch), + /*8145*/ uint16(xCondIs64), 8148, 8164, + /*8148*/ uint16(xCondDataSize), 8152, 8158, 0, + /*8152*/ uint16(xSetOp), uint16(ADC), + /*8154*/ uint16(xReadSlashR), + /*8155*/ uint16(xArgR16), + /*8156*/ uint16(xArgRM16), + /*8157*/ uint16(xMatch), + /*8158*/ uint16(xSetOp), uint16(ADC), + /*8160*/ uint16(xReadSlashR), + /*8161*/ uint16(xArgR32), + /*8162*/ uint16(xArgRM32), /*8163*/ uint16(xMatch), - /*8164*/ uint16(xSetOp), uint16(SBB), - /*8166*/ uint16(xReadSlashR), - /*8167*/ uint16(xArgRM8), - /*8168*/ uint16(xArgR8), - /*8169*/ uint16(xMatch), - /*8170*/ uint16(xCondIs64), 8173, 8189, - /*8173*/ uint16(xCondDataSize), 8177, 8183, 0, - /*8177*/ uint16(xSetOp), uint16(SBB), - /*8179*/ uint16(xReadSlashR), - /*8180*/ uint16(xArgRM16), - /*8181*/ uint16(xArgR16), - /*8182*/ uint16(xMatch), - /*8183*/ uint16(xSetOp), uint16(SBB), - /*8185*/ uint16(xReadSlashR), - /*8186*/ uint16(xArgRM32), - /*8187*/ uint16(xArgR32), - /*8188*/ uint16(xMatch), - /*8189*/ uint16(xCondDataSize), 8177, 8183, 8193, - /*8193*/ uint16(xSetOp), uint16(SBB), - /*8195*/ uint16(xReadSlashR), - /*8196*/ uint16(xArgRM64), - /*8197*/ uint16(xArgR64), + /*8164*/ uint16(xCondDataSize), 8152, 8158, 8168, + /*8168*/ uint16(xSetOp), uint16(ADC), + /*8170*/ uint16(xReadSlashR), + /*8171*/ uint16(xArgR64), + /*8172*/ uint16(xArgRM64), + /*8173*/ uint16(xMatch), + /*8174*/ uint16(xSetOp), uint16(ADC), + /*8176*/ uint16(xReadIb), + /*8177*/ uint16(xArgAL), + /*8178*/ uint16(xArgImm8u), + /*8179*/ uint16(xMatch), + /*8180*/ uint16(xCondIs64), 8183, 8199, + /*8183*/ uint16(xCondDataSize), 8187, 8193, 0, + /*8187*/ uint16(xSetOp), uint16(ADC), + /*8189*/ uint16(xReadIw), + /*8190*/ uint16(xArgAX), + /*8191*/ uint16(xArgImm16), + /*8192*/ uint16(xMatch), + /*8193*/ uint16(xSetOp), uint16(ADC), + /*8195*/ uint16(xReadId), + /*8196*/ uint16(xArgEAX), + /*8197*/ uint16(xArgImm32), /*8198*/ uint16(xMatch), - /*8199*/ uint16(xSetOp), uint16(SBB), - /*8201*/ uint16(xReadSlashR), - /*8202*/ uint16(xArgR8), - /*8203*/ uint16(xArgRM8), - /*8204*/ uint16(xMatch), - /*8205*/ uint16(xCondIs64), 8208, 8224, - /*8208*/ uint16(xCondDataSize), 8212, 8218, 0, - /*8212*/ uint16(xSetOp), uint16(SBB), - /*8214*/ uint16(xReadSlashR), - /*8215*/ uint16(xArgR16), - /*8216*/ uint16(xArgRM16), - /*8217*/ uint16(xMatch), - /*8218*/ uint16(xSetOp), uint16(SBB), - /*8220*/ uint16(xReadSlashR), - /*8221*/ uint16(xArgR32), - /*8222*/ uint16(xArgRM32), - /*8223*/ uint16(xMatch), - /*8224*/ uint16(xCondDataSize), 8212, 8218, 8228, - /*8228*/ uint16(xSetOp), uint16(SBB), - /*8230*/ uint16(xReadSlashR), - /*8231*/ uint16(xArgR64), - /*8232*/ uint16(xArgRM64), - /*8233*/ uint16(xMatch), - /*8234*/ uint16(xSetOp), uint16(SBB), - /*8236*/ uint16(xReadIb), - /*8237*/ uint16(xArgAL), - /*8238*/ uint16(xArgImm8u), - /*8239*/ uint16(xMatch), - /*8240*/ uint16(xCondIs64), 8243, 8259, - /*8243*/ uint16(xCondDataSize), 8247, 8253, 0, - /*8247*/ uint16(xSetOp), uint16(SBB), - /*8249*/ uint16(xReadIw), - /*8250*/ uint16(xArgAX), - /*8251*/ uint16(xArgImm16), - /*8252*/ uint16(xMatch), - /*8253*/ uint16(xSetOp), uint16(SBB), - /*8255*/ uint16(xReadId), - /*8256*/ uint16(xArgEAX), - /*8257*/ uint16(xArgImm32), - /*8258*/ uint16(xMatch), - /*8259*/ uint16(xCondDataSize), 8247, 8253, 8263, - /*8263*/ uint16(xSetOp), uint16(SBB), - /*8265*/ uint16(xReadId), - /*8266*/ uint16(xArgRAX), - /*8267*/ uint16(xArgImm32), - /*8268*/ uint16(xMatch), - /*8269*/ uint16(xCondIs64), 8272, 0, - /*8272*/ uint16(xSetOp), uint16(PUSH), - /*8274*/ uint16(xArgDS), - /*8275*/ uint16(xMatch), - /*8276*/ uint16(xCondIs64), 8279, 0, - /*8279*/ uint16(xSetOp), uint16(POP), - /*8281*/ uint16(xArgDS), + /*8199*/ uint16(xCondDataSize), 8187, 8193, 8203, + /*8203*/ uint16(xSetOp), uint16(ADC), + /*8205*/ uint16(xReadId), + /*8206*/ uint16(xArgRAX), + /*8207*/ uint16(xArgImm32), + /*8208*/ uint16(xMatch), + /*8209*/ uint16(xCondIs64), 8212, 0, + /*8212*/ uint16(xSetOp), uint16(PUSH), + /*8214*/ uint16(xArgSS), + /*8215*/ uint16(xMatch), + /*8216*/ uint16(xCondIs64), 8219, 0, + /*8219*/ uint16(xSetOp), uint16(POP), + /*8221*/ uint16(xArgSS), + /*8222*/ uint16(xMatch), + /*8223*/ uint16(xSetOp), uint16(SBB), + /*8225*/ uint16(xReadSlashR), + /*8226*/ uint16(xArgRM8), + /*8227*/ uint16(xArgR8), + /*8228*/ uint16(xMatch), + /*8229*/ uint16(xCondIs64), 8232, 8248, + /*8232*/ uint16(xCondDataSize), 8236, 8242, 0, + /*8236*/ uint16(xSetOp), uint16(SBB), + /*8238*/ uint16(xReadSlashR), + /*8239*/ uint16(xArgRM16), + /*8240*/ uint16(xArgR16), + /*8241*/ uint16(xMatch), + /*8242*/ uint16(xSetOp), uint16(SBB), + /*8244*/ uint16(xReadSlashR), + /*8245*/ uint16(xArgRM32), + /*8246*/ uint16(xArgR32), + /*8247*/ uint16(xMatch), + /*8248*/ uint16(xCondDataSize), 8236, 8242, 8252, + /*8252*/ uint16(xSetOp), uint16(SBB), + /*8254*/ uint16(xReadSlashR), + /*8255*/ uint16(xArgRM64), + /*8256*/ uint16(xArgR64), + /*8257*/ uint16(xMatch), + /*8258*/ uint16(xSetOp), uint16(SBB), + /*8260*/ uint16(xReadSlashR), + /*8261*/ uint16(xArgR8), + /*8262*/ uint16(xArgRM8), + /*8263*/ uint16(xMatch), + /*8264*/ uint16(xCondIs64), 8267, 8283, + /*8267*/ uint16(xCondDataSize), 8271, 8277, 0, + /*8271*/ uint16(xSetOp), uint16(SBB), + /*8273*/ uint16(xReadSlashR), + /*8274*/ uint16(xArgR16), + /*8275*/ uint16(xArgRM16), + /*8276*/ uint16(xMatch), + /*8277*/ uint16(xSetOp), uint16(SBB), + /*8279*/ uint16(xReadSlashR), + /*8280*/ uint16(xArgR32), + /*8281*/ uint16(xArgRM32), /*8282*/ uint16(xMatch), - /*8283*/ uint16(xSetOp), uint16(AND), - /*8285*/ uint16(xReadSlashR), - /*8286*/ uint16(xArgRM8), - /*8287*/ uint16(xArgR8), - /*8288*/ uint16(xMatch), - /*8289*/ uint16(xCondIs64), 8292, 8308, - /*8292*/ uint16(xCondDataSize), 8296, 8302, 0, - /*8296*/ uint16(xSetOp), uint16(AND), - /*8298*/ uint16(xReadSlashR), - /*8299*/ uint16(xArgRM16), - /*8300*/ uint16(xArgR16), - /*8301*/ uint16(xMatch), - /*8302*/ uint16(xSetOp), uint16(AND), - /*8304*/ uint16(xReadSlashR), - /*8305*/ uint16(xArgRM32), - /*8306*/ uint16(xArgR32), - /*8307*/ uint16(xMatch), - /*8308*/ uint16(xCondDataSize), 8296, 8302, 8312, - /*8312*/ uint16(xSetOp), uint16(AND), - /*8314*/ uint16(xReadSlashR), - /*8315*/ uint16(xArgRM64), - /*8316*/ uint16(xArgR64), + /*8283*/ uint16(xCondDataSize), 8271, 8277, 8287, + /*8287*/ uint16(xSetOp), uint16(SBB), + /*8289*/ uint16(xReadSlashR), + /*8290*/ uint16(xArgR64), + /*8291*/ uint16(xArgRM64), + /*8292*/ uint16(xMatch), + /*8293*/ uint16(xSetOp), uint16(SBB), + /*8295*/ uint16(xReadIb), + /*8296*/ uint16(xArgAL), + /*8297*/ uint16(xArgImm8u), + /*8298*/ uint16(xMatch), + /*8299*/ uint16(xCondIs64), 8302, 8318, + /*8302*/ uint16(xCondDataSize), 8306, 8312, 0, + /*8306*/ uint16(xSetOp), uint16(SBB), + /*8308*/ uint16(xReadIw), + /*8309*/ uint16(xArgAX), + /*8310*/ uint16(xArgImm16), + /*8311*/ uint16(xMatch), + /*8312*/ uint16(xSetOp), uint16(SBB), + /*8314*/ uint16(xReadId), + /*8315*/ uint16(xArgEAX), + /*8316*/ uint16(xArgImm32), /*8317*/ uint16(xMatch), - /*8318*/ uint16(xSetOp), uint16(AND), - /*8320*/ uint16(xReadSlashR), - /*8321*/ uint16(xArgR8), - /*8322*/ uint16(xArgRM8), - /*8323*/ uint16(xMatch), - /*8324*/ uint16(xCondIs64), 8327, 8343, - /*8327*/ uint16(xCondDataSize), 8331, 8337, 0, - /*8331*/ uint16(xSetOp), uint16(AND), - /*8333*/ uint16(xReadSlashR), - /*8334*/ uint16(xArgR16), - /*8335*/ uint16(xArgRM16), - /*8336*/ uint16(xMatch), - /*8337*/ uint16(xSetOp), uint16(AND), - /*8339*/ uint16(xReadSlashR), - /*8340*/ uint16(xArgR32), - /*8341*/ uint16(xArgRM32), - /*8342*/ uint16(xMatch), - /*8343*/ uint16(xCondDataSize), 8331, 8337, 8347, - /*8347*/ uint16(xSetOp), uint16(AND), - /*8349*/ uint16(xReadSlashR), - /*8350*/ uint16(xArgR64), - /*8351*/ uint16(xArgRM64), - /*8352*/ uint16(xMatch), - /*8353*/ uint16(xSetOp), uint16(AND), - /*8355*/ uint16(xReadIb), - /*8356*/ uint16(xArgAL), - /*8357*/ uint16(xArgImm8u), - /*8358*/ uint16(xMatch), - /*8359*/ uint16(xCondIs64), 8362, 8378, - /*8362*/ uint16(xCondDataSize), 8366, 8372, 0, - /*8366*/ uint16(xSetOp), uint16(AND), - /*8368*/ uint16(xReadIw), - /*8369*/ uint16(xArgAX), - /*8370*/ uint16(xArgImm16), - /*8371*/ uint16(xMatch), - /*8372*/ uint16(xSetOp), uint16(AND), - /*8374*/ uint16(xReadId), - /*8375*/ uint16(xArgEAX), - /*8376*/ uint16(xArgImm32), - /*8377*/ uint16(xMatch), - /*8378*/ uint16(xCondDataSize), 8366, 8372, 8382, - /*8382*/ uint16(xSetOp), uint16(AND), - /*8384*/ uint16(xReadId), - /*8385*/ uint16(xArgRAX), - /*8386*/ uint16(xArgImm32), - /*8387*/ uint16(xMatch), - /*8388*/ uint16(xCondIs64), 8391, 0, - /*8391*/ uint16(xSetOp), uint16(DAA), - /*8393*/ uint16(xMatch), - /*8394*/ uint16(xSetOp), uint16(SUB), - /*8396*/ uint16(xReadSlashR), - /*8397*/ uint16(xArgRM8), - /*8398*/ uint16(xArgR8), - /*8399*/ uint16(xMatch), - /*8400*/ uint16(xCondIs64), 8403, 8419, - /*8403*/ uint16(xCondDataSize), 8407, 8413, 0, - /*8407*/ uint16(xSetOp), uint16(SUB), - /*8409*/ uint16(xReadSlashR), - /*8410*/ uint16(xArgRM16), - /*8411*/ uint16(xArgR16), - /*8412*/ uint16(xMatch), - /*8413*/ uint16(xSetOp), uint16(SUB), - /*8415*/ uint16(xReadSlashR), - /*8416*/ uint16(xArgRM32), - /*8417*/ uint16(xArgR32), - /*8418*/ uint16(xMatch), - /*8419*/ uint16(xCondDataSize), 8407, 8413, 8423, - /*8423*/ uint16(xSetOp), uint16(SUB), - /*8425*/ uint16(xReadSlashR), - /*8426*/ uint16(xArgRM64), - /*8427*/ uint16(xArgR64), - /*8428*/ uint16(xMatch), - /*8429*/ uint16(xCondPrefix), 3, - 0xC5, 8457, - 0xC4, 8443, - 0x0, 8437, - /*8437*/ uint16(xSetOp), uint16(SUB), - /*8439*/ uint16(xReadSlashR), - /*8440*/ uint16(xArgR8), - /*8441*/ uint16(xArgRM8), - /*8442*/ uint16(xMatch), - /*8443*/ uint16(xCondPrefix), 1, - 0x66, 8447, - /*8447*/ uint16(xCondPrefix), 1, - 0x0F38, 8451, - /*8451*/ uint16(xSetOp), uint16(VMOVNTDQA), - /*8453*/ uint16(xReadSlashR), - /*8454*/ uint16(xArgYmm1), - /*8455*/ uint16(xArgM256), - /*8456*/ uint16(xMatch), - /*8457*/ uint16(xCondPrefix), 1, - 0x66, 8461, - /*8461*/ uint16(xCondPrefix), 1, - 0x0F38, 8465, - /*8465*/ uint16(xSetOp), uint16(VMOVNTDQA), - /*8467*/ uint16(xReadSlashR), - /*8468*/ uint16(xArgYmm1), - /*8469*/ uint16(xArgM256), - /*8470*/ uint16(xMatch), - /*8471*/ uint16(xCondIs64), 8474, 8490, - /*8474*/ uint16(xCondDataSize), 8478, 8484, 0, - /*8478*/ uint16(xSetOp), uint16(SUB), - /*8480*/ uint16(xReadSlashR), - /*8481*/ uint16(xArgR16), - /*8482*/ uint16(xArgRM16), - /*8483*/ uint16(xMatch), - /*8484*/ uint16(xSetOp), uint16(SUB), - /*8486*/ uint16(xReadSlashR), - /*8487*/ uint16(xArgR32), - /*8488*/ uint16(xArgRM32), - /*8489*/ uint16(xMatch), - /*8490*/ uint16(xCondDataSize), 8478, 8484, 8494, - /*8494*/ uint16(xSetOp), uint16(SUB), - /*8496*/ uint16(xReadSlashR), - /*8497*/ uint16(xArgR64), - /*8498*/ uint16(xArgRM64), - /*8499*/ uint16(xMatch), - /*8500*/ uint16(xSetOp), uint16(SUB), - /*8502*/ uint16(xReadIb), - /*8503*/ uint16(xArgAL), - /*8504*/ uint16(xArgImm8u), - /*8505*/ uint16(xMatch), - /*8506*/ uint16(xCondIs64), 8509, 8525, - /*8509*/ uint16(xCondDataSize), 8513, 8519, 0, - /*8513*/ uint16(xSetOp), uint16(SUB), - /*8515*/ uint16(xReadIw), - /*8516*/ uint16(xArgAX), - /*8517*/ uint16(xArgImm16), - /*8518*/ uint16(xMatch), - /*8519*/ uint16(xSetOp), uint16(SUB), - /*8521*/ uint16(xReadId), - /*8522*/ uint16(xArgEAX), - /*8523*/ uint16(xArgImm32), - /*8524*/ uint16(xMatch), - /*8525*/ uint16(xCondDataSize), 8513, 8519, 8529, - /*8529*/ uint16(xSetOp), uint16(SUB), - /*8531*/ uint16(xReadId), - /*8532*/ uint16(xArgRAX), - /*8533*/ uint16(xArgImm32), - /*8534*/ uint16(xMatch), - /*8535*/ uint16(xCondIs64), 8538, 0, - /*8538*/ uint16(xSetOp), uint16(DAS), - /*8540*/ uint16(xMatch), - /*8541*/ uint16(xSetOp), uint16(XOR), - /*8543*/ uint16(xReadSlashR), - /*8544*/ uint16(xArgRM8), - /*8545*/ uint16(xArgR8), - /*8546*/ uint16(xMatch), - /*8547*/ uint16(xCondIs64), 8550, 8566, - /*8550*/ uint16(xCondDataSize), 8554, 8560, 0, - /*8554*/ uint16(xSetOp), uint16(XOR), - /*8556*/ uint16(xReadSlashR), - /*8557*/ uint16(xArgRM16), - /*8558*/ uint16(xArgR16), - /*8559*/ uint16(xMatch), - /*8560*/ uint16(xSetOp), uint16(XOR), - /*8562*/ uint16(xReadSlashR), - /*8563*/ uint16(xArgRM32), - /*8564*/ uint16(xArgR32), - /*8565*/ uint16(xMatch), - /*8566*/ uint16(xCondDataSize), 8554, 8560, 8570, - /*8570*/ uint16(xSetOp), uint16(XOR), - /*8572*/ uint16(xReadSlashR), - /*8573*/ uint16(xArgRM64), - /*8574*/ uint16(xArgR64), - /*8575*/ uint16(xMatch), - /*8576*/ uint16(xSetOp), uint16(XOR), - /*8578*/ uint16(xReadSlashR), - /*8579*/ uint16(xArgR8), - /*8580*/ uint16(xArgRM8), - /*8581*/ uint16(xMatch), - /*8582*/ uint16(xCondIs64), 8585, 8601, - /*8585*/ uint16(xCondDataSize), 8589, 8595, 0, - /*8589*/ uint16(xSetOp), uint16(XOR), - /*8591*/ uint16(xReadSlashR), - /*8592*/ uint16(xArgR16), - /*8593*/ uint16(xArgRM16), - /*8594*/ uint16(xMatch), - /*8595*/ uint16(xSetOp), uint16(XOR), - /*8597*/ uint16(xReadSlashR), - /*8598*/ uint16(xArgR32), - /*8599*/ uint16(xArgRM32), - /*8600*/ uint16(xMatch), - /*8601*/ uint16(xCondDataSize), 8589, 8595, 8605, - /*8605*/ uint16(xSetOp), uint16(XOR), - /*8607*/ uint16(xReadSlashR), - /*8608*/ uint16(xArgR64), - /*8609*/ uint16(xArgRM64), - /*8610*/ uint16(xMatch), - /*8611*/ uint16(xSetOp), uint16(XOR), - /*8613*/ uint16(xReadIb), - /*8614*/ uint16(xArgAL), - /*8615*/ uint16(xArgImm8u), - /*8616*/ uint16(xMatch), - /*8617*/ uint16(xCondIs64), 8620, 8636, - /*8620*/ uint16(xCondDataSize), 8624, 8630, 0, - /*8624*/ uint16(xSetOp), uint16(XOR), - /*8626*/ uint16(xReadIw), - /*8627*/ uint16(xArgAX), - /*8628*/ uint16(xArgImm16), - /*8629*/ uint16(xMatch), - /*8630*/ uint16(xSetOp), uint16(XOR), - /*8632*/ uint16(xReadId), - /*8633*/ uint16(xArgEAX), - /*8634*/ uint16(xArgImm32), - /*8635*/ uint16(xMatch), - /*8636*/ uint16(xCondDataSize), 8624, 8630, 8640, - /*8640*/ uint16(xSetOp), uint16(XOR), - /*8642*/ uint16(xReadId), - /*8643*/ uint16(xArgRAX), - /*8644*/ uint16(xArgImm32), - /*8645*/ uint16(xMatch), - /*8646*/ uint16(xCondIs64), 8649, 0, - /*8649*/ uint16(xSetOp), uint16(AAA), - /*8651*/ uint16(xMatch), - /*8652*/ uint16(xSetOp), uint16(CMP), - /*8654*/ uint16(xReadSlashR), - /*8655*/ uint16(xArgRM8), - /*8656*/ uint16(xArgR8), - /*8657*/ uint16(xMatch), - /*8658*/ uint16(xCondIs64), 8661, 8677, - /*8661*/ uint16(xCondDataSize), 8665, 8671, 0, - /*8665*/ uint16(xSetOp), uint16(CMP), - /*8667*/ uint16(xReadSlashR), - /*8668*/ uint16(xArgRM16), - /*8669*/ uint16(xArgR16), - /*8670*/ uint16(xMatch), - /*8671*/ uint16(xSetOp), uint16(CMP), - /*8673*/ uint16(xReadSlashR), - /*8674*/ uint16(xArgRM32), - /*8675*/ uint16(xArgR32), - /*8676*/ uint16(xMatch), - /*8677*/ uint16(xCondDataSize), 8665, 8671, 8681, - /*8681*/ uint16(xSetOp), uint16(CMP), - /*8683*/ uint16(xReadSlashR), - /*8684*/ uint16(xArgRM64), - /*8685*/ uint16(xArgR64), - /*8686*/ uint16(xMatch), - /*8687*/ uint16(xSetOp), uint16(CMP), - /*8689*/ uint16(xReadSlashR), - /*8690*/ uint16(xArgR8), - /*8691*/ uint16(xArgRM8), - /*8692*/ uint16(xMatch), - /*8693*/ uint16(xCondIs64), 8696, 8712, - /*8696*/ uint16(xCondDataSize), 8700, 8706, 0, - /*8700*/ uint16(xSetOp), uint16(CMP), - /*8702*/ uint16(xReadSlashR), - /*8703*/ uint16(xArgR16), - /*8704*/ uint16(xArgRM16), - /*8705*/ uint16(xMatch), - /*8706*/ uint16(xSetOp), uint16(CMP), - /*8708*/ uint16(xReadSlashR), - /*8709*/ uint16(xArgR32), - /*8710*/ uint16(xArgRM32), - /*8711*/ uint16(xMatch), - /*8712*/ uint16(xCondDataSize), 8700, 8706, 8716, - /*8716*/ uint16(xSetOp), uint16(CMP), - /*8718*/ uint16(xReadSlashR), - /*8719*/ uint16(xArgR64), - /*8720*/ uint16(xArgRM64), - /*8721*/ uint16(xMatch), - /*8722*/ uint16(xSetOp), uint16(CMP), - /*8724*/ uint16(xReadIb), - /*8725*/ uint16(xArgAL), - /*8726*/ uint16(xArgImm8u), - /*8727*/ uint16(xMatch), - /*8728*/ uint16(xCondIs64), 8731, 8747, - /*8731*/ uint16(xCondDataSize), 8735, 8741, 0, - /*8735*/ uint16(xSetOp), uint16(CMP), - /*8737*/ uint16(xReadIw), - /*8738*/ uint16(xArgAX), - /*8739*/ uint16(xArgImm16), - /*8740*/ uint16(xMatch), - /*8741*/ uint16(xSetOp), uint16(CMP), - /*8743*/ uint16(xReadId), - /*8744*/ uint16(xArgEAX), - /*8745*/ uint16(xArgImm32), - /*8746*/ uint16(xMatch), - /*8747*/ uint16(xCondDataSize), 8735, 8741, 8751, - /*8751*/ uint16(xSetOp), uint16(CMP), - /*8753*/ uint16(xReadId), - /*8754*/ uint16(xArgRAX), - /*8755*/ uint16(xArgImm32), - /*8756*/ uint16(xMatch), - /*8757*/ uint16(xCondIs64), 8760, 0, - /*8760*/ uint16(xSetOp), uint16(AAS), - /*8762*/ uint16(xMatch), - /*8763*/ uint16(xCondIs64), 8766, 0, - /*8766*/ uint16(xCondDataSize), 8770, 8774, 0, - /*8770*/ uint16(xSetOp), uint16(INC), - /*8772*/ uint16(xArgR16op), - /*8773*/ uint16(xMatch), - /*8774*/ uint16(xSetOp), uint16(INC), - /*8776*/ uint16(xArgR32op), - /*8777*/ uint16(xMatch), - /*8778*/ uint16(xCondIs64), 8781, 0, - /*8781*/ uint16(xCondDataSize), 8785, 8789, 0, - /*8785*/ uint16(xSetOp), uint16(DEC), - /*8787*/ uint16(xArgR16op), - /*8788*/ uint16(xMatch), - /*8789*/ uint16(xSetOp), uint16(DEC), - /*8791*/ uint16(xArgR32op), - /*8792*/ uint16(xMatch), - /*8793*/ uint16(xCondIs64), 8796, 8808, - /*8796*/ uint16(xCondDataSize), 8800, 8804, 0, - /*8800*/ uint16(xSetOp), uint16(PUSH), - /*8802*/ uint16(xArgR16op), - /*8803*/ uint16(xMatch), - /*8804*/ uint16(xSetOp), uint16(PUSH), - /*8806*/ uint16(xArgR32op), - /*8807*/ uint16(xMatch), - /*8808*/ uint16(xCondDataSize), 8800, 8812, 8816, - /*8812*/ uint16(xSetOp), uint16(PUSH), - /*8814*/ uint16(xArgR64op), + /*8318*/ uint16(xCondDataSize), 8306, 8312, 8322, + /*8322*/ uint16(xSetOp), uint16(SBB), + /*8324*/ uint16(xReadId), + /*8325*/ uint16(xArgRAX), + /*8326*/ uint16(xArgImm32), + /*8327*/ uint16(xMatch), + /*8328*/ uint16(xCondIs64), 8331, 0, + /*8331*/ uint16(xSetOp), uint16(PUSH), + /*8333*/ uint16(xArgDS), + /*8334*/ uint16(xMatch), + /*8335*/ uint16(xCondIs64), 8338, 0, + /*8338*/ uint16(xSetOp), uint16(POP), + /*8340*/ uint16(xArgDS), + /*8341*/ uint16(xMatch), + /*8342*/ uint16(xSetOp), uint16(AND), + /*8344*/ uint16(xReadSlashR), + /*8345*/ uint16(xArgRM8), + /*8346*/ uint16(xArgR8), + /*8347*/ uint16(xMatch), + /*8348*/ uint16(xCondIs64), 8351, 8367, + /*8351*/ uint16(xCondDataSize), 8355, 8361, 0, + /*8355*/ uint16(xSetOp), uint16(AND), + /*8357*/ uint16(xReadSlashR), + /*8358*/ uint16(xArgRM16), + /*8359*/ uint16(xArgR16), + /*8360*/ uint16(xMatch), + /*8361*/ uint16(xSetOp), uint16(AND), + /*8363*/ uint16(xReadSlashR), + /*8364*/ uint16(xArgRM32), + /*8365*/ uint16(xArgR32), + /*8366*/ uint16(xMatch), + /*8367*/ uint16(xCondDataSize), 8355, 8361, 8371, + /*8371*/ uint16(xSetOp), uint16(AND), + /*8373*/ uint16(xReadSlashR), + /*8374*/ uint16(xArgRM64), + /*8375*/ uint16(xArgR64), + /*8376*/ uint16(xMatch), + /*8377*/ uint16(xSetOp), uint16(AND), + /*8379*/ uint16(xReadSlashR), + /*8380*/ uint16(xArgR8), + /*8381*/ uint16(xArgRM8), + /*8382*/ uint16(xMatch), + /*8383*/ uint16(xCondIs64), 8386, 8402, + /*8386*/ uint16(xCondDataSize), 8390, 8396, 0, + /*8390*/ uint16(xSetOp), uint16(AND), + /*8392*/ uint16(xReadSlashR), + /*8393*/ uint16(xArgR16), + /*8394*/ uint16(xArgRM16), + /*8395*/ uint16(xMatch), + /*8396*/ uint16(xSetOp), uint16(AND), + /*8398*/ uint16(xReadSlashR), + /*8399*/ uint16(xArgR32), + /*8400*/ uint16(xArgRM32), + /*8401*/ uint16(xMatch), + /*8402*/ uint16(xCondDataSize), 8390, 8396, 8406, + /*8406*/ uint16(xSetOp), uint16(AND), + /*8408*/ uint16(xReadSlashR), + /*8409*/ uint16(xArgR64), + /*8410*/ uint16(xArgRM64), + /*8411*/ uint16(xMatch), + /*8412*/ uint16(xSetOp), uint16(AND), + /*8414*/ uint16(xReadIb), + /*8415*/ uint16(xArgAL), + /*8416*/ uint16(xArgImm8u), + /*8417*/ uint16(xMatch), + /*8418*/ uint16(xCondIs64), 8421, 8437, + /*8421*/ uint16(xCondDataSize), 8425, 8431, 0, + /*8425*/ uint16(xSetOp), uint16(AND), + /*8427*/ uint16(xReadIw), + /*8428*/ uint16(xArgAX), + /*8429*/ uint16(xArgImm16), + /*8430*/ uint16(xMatch), + /*8431*/ uint16(xSetOp), uint16(AND), + /*8433*/ uint16(xReadId), + /*8434*/ uint16(xArgEAX), + /*8435*/ uint16(xArgImm32), + /*8436*/ uint16(xMatch), + /*8437*/ uint16(xCondDataSize), 8425, 8431, 8441, + /*8441*/ uint16(xSetOp), uint16(AND), + /*8443*/ uint16(xReadId), + /*8444*/ uint16(xArgRAX), + /*8445*/ uint16(xArgImm32), + /*8446*/ uint16(xMatch), + /*8447*/ uint16(xCondIs64), 8450, 0, + /*8450*/ uint16(xSetOp), uint16(DAA), + /*8452*/ uint16(xMatch), + /*8453*/ uint16(xSetOp), uint16(SUB), + /*8455*/ uint16(xReadSlashR), + /*8456*/ uint16(xArgRM8), + /*8457*/ uint16(xArgR8), + /*8458*/ uint16(xMatch), + /*8459*/ uint16(xCondIs64), 8462, 8478, + /*8462*/ uint16(xCondDataSize), 8466, 8472, 0, + /*8466*/ uint16(xSetOp), uint16(SUB), + /*8468*/ uint16(xReadSlashR), + /*8469*/ uint16(xArgRM16), + /*8470*/ uint16(xArgR16), + /*8471*/ uint16(xMatch), + /*8472*/ uint16(xSetOp), uint16(SUB), + /*8474*/ uint16(xReadSlashR), + /*8475*/ uint16(xArgRM32), + /*8476*/ uint16(xArgR32), + /*8477*/ uint16(xMatch), + /*8478*/ uint16(xCondDataSize), 8466, 8472, 8482, + /*8482*/ uint16(xSetOp), uint16(SUB), + /*8484*/ uint16(xReadSlashR), + /*8485*/ uint16(xArgRM64), + /*8486*/ uint16(xArgR64), + /*8487*/ uint16(xMatch), + /*8488*/ uint16(xSetOp), uint16(SUB), + /*8490*/ uint16(xReadSlashR), + /*8491*/ uint16(xArgR8), + /*8492*/ uint16(xArgRM8), + /*8493*/ uint16(xMatch), + /*8494*/ uint16(xCondIs64), 8497, 8513, + /*8497*/ uint16(xCondDataSize), 8501, 8507, 0, + /*8501*/ uint16(xSetOp), uint16(SUB), + /*8503*/ uint16(xReadSlashR), + /*8504*/ uint16(xArgR16), + /*8505*/ uint16(xArgRM16), + /*8506*/ uint16(xMatch), + /*8507*/ uint16(xSetOp), uint16(SUB), + /*8509*/ uint16(xReadSlashR), + /*8510*/ uint16(xArgR32), + /*8511*/ uint16(xArgRM32), + /*8512*/ uint16(xMatch), + /*8513*/ uint16(xCondDataSize), 8501, 8507, 8517, + /*8517*/ uint16(xSetOp), uint16(SUB), + /*8519*/ uint16(xReadSlashR), + /*8520*/ uint16(xArgR64), + /*8521*/ uint16(xArgRM64), + /*8522*/ uint16(xMatch), + /*8523*/ uint16(xSetOp), uint16(SUB), + /*8525*/ uint16(xReadIb), + /*8526*/ uint16(xArgAL), + /*8527*/ uint16(xArgImm8u), + /*8528*/ uint16(xMatch), + /*8529*/ uint16(xCondIs64), 8532, 8548, + /*8532*/ uint16(xCondDataSize), 8536, 8542, 0, + /*8536*/ uint16(xSetOp), uint16(SUB), + /*8538*/ uint16(xReadIw), + /*8539*/ uint16(xArgAX), + /*8540*/ uint16(xArgImm16), + /*8541*/ uint16(xMatch), + /*8542*/ uint16(xSetOp), uint16(SUB), + /*8544*/ uint16(xReadId), + /*8545*/ uint16(xArgEAX), + /*8546*/ uint16(xArgImm32), + /*8547*/ uint16(xMatch), + /*8548*/ uint16(xCondDataSize), 8536, 8542, 8552, + /*8552*/ uint16(xSetOp), uint16(SUB), + /*8554*/ uint16(xReadId), + /*8555*/ uint16(xArgRAX), + /*8556*/ uint16(xArgImm32), + /*8557*/ uint16(xMatch), + /*8558*/ uint16(xCondIs64), 8561, 0, + /*8561*/ uint16(xSetOp), uint16(DAS), + /*8563*/ uint16(xMatch), + /*8564*/ uint16(xSetOp), uint16(XOR), + /*8566*/ uint16(xReadSlashR), + /*8567*/ uint16(xArgRM8), + /*8568*/ uint16(xArgR8), + /*8569*/ uint16(xMatch), + /*8570*/ uint16(xCondIs64), 8573, 8589, + /*8573*/ uint16(xCondDataSize), 8577, 8583, 0, + /*8577*/ uint16(xSetOp), uint16(XOR), + /*8579*/ uint16(xReadSlashR), + /*8580*/ uint16(xArgRM16), + /*8581*/ uint16(xArgR16), + /*8582*/ uint16(xMatch), + /*8583*/ uint16(xSetOp), uint16(XOR), + /*8585*/ uint16(xReadSlashR), + /*8586*/ uint16(xArgRM32), + /*8587*/ uint16(xArgR32), + /*8588*/ uint16(xMatch), + /*8589*/ uint16(xCondDataSize), 8577, 8583, 8593, + /*8593*/ uint16(xSetOp), uint16(XOR), + /*8595*/ uint16(xReadSlashR), + /*8596*/ uint16(xArgRM64), + /*8597*/ uint16(xArgR64), + /*8598*/ uint16(xMatch), + /*8599*/ uint16(xSetOp), uint16(XOR), + /*8601*/ uint16(xReadSlashR), + /*8602*/ uint16(xArgR8), + /*8603*/ uint16(xArgRM8), + /*8604*/ uint16(xMatch), + /*8605*/ uint16(xCondIs64), 8608, 8624, + /*8608*/ uint16(xCondDataSize), 8612, 8618, 0, + /*8612*/ uint16(xSetOp), uint16(XOR), + /*8614*/ uint16(xReadSlashR), + /*8615*/ uint16(xArgR16), + /*8616*/ uint16(xArgRM16), + /*8617*/ uint16(xMatch), + /*8618*/ uint16(xSetOp), uint16(XOR), + /*8620*/ uint16(xReadSlashR), + /*8621*/ uint16(xArgR32), + /*8622*/ uint16(xArgRM32), + /*8623*/ uint16(xMatch), + /*8624*/ uint16(xCondDataSize), 8612, 8618, 8628, + /*8628*/ uint16(xSetOp), uint16(XOR), + /*8630*/ uint16(xReadSlashR), + /*8631*/ uint16(xArgR64), + /*8632*/ uint16(xArgRM64), + /*8633*/ uint16(xMatch), + /*8634*/ uint16(xSetOp), uint16(XOR), + /*8636*/ uint16(xReadIb), + /*8637*/ uint16(xArgAL), + /*8638*/ uint16(xArgImm8u), + /*8639*/ uint16(xMatch), + /*8640*/ uint16(xCondIs64), 8643, 8659, + /*8643*/ uint16(xCondDataSize), 8647, 8653, 0, + /*8647*/ uint16(xSetOp), uint16(XOR), + /*8649*/ uint16(xReadIw), + /*8650*/ uint16(xArgAX), + /*8651*/ uint16(xArgImm16), + /*8652*/ uint16(xMatch), + /*8653*/ uint16(xSetOp), uint16(XOR), + /*8655*/ uint16(xReadId), + /*8656*/ uint16(xArgEAX), + /*8657*/ uint16(xArgImm32), + /*8658*/ uint16(xMatch), + /*8659*/ uint16(xCondDataSize), 8647, 8653, 8663, + /*8663*/ uint16(xSetOp), uint16(XOR), + /*8665*/ uint16(xReadId), + /*8666*/ uint16(xArgRAX), + /*8667*/ uint16(xArgImm32), + /*8668*/ uint16(xMatch), + /*8669*/ uint16(xCondIs64), 8672, 0, + /*8672*/ uint16(xSetOp), uint16(AAA), + /*8674*/ uint16(xMatch), + /*8675*/ uint16(xSetOp), uint16(CMP), + /*8677*/ uint16(xReadSlashR), + /*8678*/ uint16(xArgRM8), + /*8679*/ uint16(xArgR8), + /*8680*/ uint16(xMatch), + /*8681*/ uint16(xCondIs64), 8684, 8700, + /*8684*/ uint16(xCondDataSize), 8688, 8694, 0, + /*8688*/ uint16(xSetOp), uint16(CMP), + /*8690*/ uint16(xReadSlashR), + /*8691*/ uint16(xArgRM16), + /*8692*/ uint16(xArgR16), + /*8693*/ uint16(xMatch), + /*8694*/ uint16(xSetOp), uint16(CMP), + /*8696*/ uint16(xReadSlashR), + /*8697*/ uint16(xArgRM32), + /*8698*/ uint16(xArgR32), + /*8699*/ uint16(xMatch), + /*8700*/ uint16(xCondDataSize), 8688, 8694, 8704, + /*8704*/ uint16(xSetOp), uint16(CMP), + /*8706*/ uint16(xReadSlashR), + /*8707*/ uint16(xArgRM64), + /*8708*/ uint16(xArgR64), + /*8709*/ uint16(xMatch), + /*8710*/ uint16(xSetOp), uint16(CMP), + /*8712*/ uint16(xReadSlashR), + /*8713*/ uint16(xArgR8), + /*8714*/ uint16(xArgRM8), + /*8715*/ uint16(xMatch), + /*8716*/ uint16(xCondIs64), 8719, 8735, + /*8719*/ uint16(xCondDataSize), 8723, 8729, 0, + /*8723*/ uint16(xSetOp), uint16(CMP), + /*8725*/ uint16(xReadSlashR), + /*8726*/ uint16(xArgR16), + /*8727*/ uint16(xArgRM16), + /*8728*/ uint16(xMatch), + /*8729*/ uint16(xSetOp), uint16(CMP), + /*8731*/ uint16(xReadSlashR), + /*8732*/ uint16(xArgR32), + /*8733*/ uint16(xArgRM32), + /*8734*/ uint16(xMatch), + /*8735*/ uint16(xCondDataSize), 8723, 8729, 8739, + /*8739*/ uint16(xSetOp), uint16(CMP), + /*8741*/ uint16(xReadSlashR), + /*8742*/ uint16(xArgR64), + /*8743*/ uint16(xArgRM64), + /*8744*/ uint16(xMatch), + /*8745*/ uint16(xSetOp), uint16(CMP), + /*8747*/ uint16(xReadIb), + /*8748*/ uint16(xArgAL), + /*8749*/ uint16(xArgImm8u), + /*8750*/ uint16(xMatch), + /*8751*/ uint16(xCondIs64), 8754, 8770, + /*8754*/ uint16(xCondDataSize), 8758, 8764, 0, + /*8758*/ uint16(xSetOp), uint16(CMP), + /*8760*/ uint16(xReadIw), + /*8761*/ uint16(xArgAX), + /*8762*/ uint16(xArgImm16), + /*8763*/ uint16(xMatch), + /*8764*/ uint16(xSetOp), uint16(CMP), + /*8766*/ uint16(xReadId), + /*8767*/ uint16(xArgEAX), + /*8768*/ uint16(xArgImm32), + /*8769*/ uint16(xMatch), + /*8770*/ uint16(xCondDataSize), 8758, 8764, 8774, + /*8774*/ uint16(xSetOp), uint16(CMP), + /*8776*/ uint16(xReadId), + /*8777*/ uint16(xArgRAX), + /*8778*/ uint16(xArgImm32), + /*8779*/ uint16(xMatch), + /*8780*/ uint16(xCondIs64), 8783, 0, + /*8783*/ uint16(xSetOp), uint16(AAS), + /*8785*/ uint16(xMatch), + /*8786*/ uint16(xCondIs64), 8789, 0, + /*8789*/ uint16(xCondDataSize), 8793, 8797, 0, + /*8793*/ uint16(xSetOp), uint16(INC), + /*8795*/ uint16(xArgR16op), + /*8796*/ uint16(xMatch), + /*8797*/ uint16(xSetOp), uint16(INC), + /*8799*/ uint16(xArgR32op), + /*8800*/ uint16(xMatch), + /*8801*/ uint16(xCondIs64), 8804, 0, + /*8804*/ uint16(xCondDataSize), 8808, 8812, 0, + /*8808*/ uint16(xSetOp), uint16(DEC), + /*8810*/ uint16(xArgR16op), + /*8811*/ uint16(xMatch), + /*8812*/ uint16(xSetOp), uint16(DEC), + /*8814*/ uint16(xArgR32op), /*8815*/ uint16(xMatch), - /*8816*/ uint16(xSetOp), uint16(PUSH), - /*8818*/ uint16(xArgR64op), - /*8819*/ uint16(xMatch), - /*8820*/ uint16(xCondIs64), 8823, 8835, - /*8823*/ uint16(xCondDataSize), 8827, 8831, 0, - /*8827*/ uint16(xSetOp), uint16(POP), - /*8829*/ uint16(xArgR16op), + /*8816*/ uint16(xCondIs64), 8819, 8831, + /*8819*/ uint16(xCondDataSize), 8823, 8827, 0, + /*8823*/ uint16(xSetOp), uint16(PUSH), + /*8825*/ uint16(xArgR16op), + /*8826*/ uint16(xMatch), + /*8827*/ uint16(xSetOp), uint16(PUSH), + /*8829*/ uint16(xArgR32op), /*8830*/ uint16(xMatch), - /*8831*/ uint16(xSetOp), uint16(POP), - /*8833*/ uint16(xArgR32op), - /*8834*/ uint16(xMatch), - /*8835*/ uint16(xCondDataSize), 8827, 8839, 8843, - /*8839*/ uint16(xSetOp), uint16(POP), + /*8831*/ uint16(xCondDataSize), 8823, 8835, 8839, + /*8835*/ uint16(xSetOp), uint16(PUSH), + /*8837*/ uint16(xArgR64op), + /*8838*/ uint16(xMatch), + /*8839*/ uint16(xSetOp), uint16(PUSH), /*8841*/ uint16(xArgR64op), /*8842*/ uint16(xMatch), - /*8843*/ uint16(xSetOp), uint16(POP), - /*8845*/ uint16(xArgR64op), - /*8846*/ uint16(xMatch), - /*8847*/ uint16(xCondIs64), 8850, 0, - /*8850*/ uint16(xCondDataSize), 8854, 8857, 0, - /*8854*/ uint16(xSetOp), uint16(PUSHA), - /*8856*/ uint16(xMatch), - /*8857*/ uint16(xSetOp), uint16(PUSHAD), - /*8859*/ uint16(xMatch), - /*8860*/ uint16(xCondIs64), 8863, 0, - /*8863*/ uint16(xCondDataSize), 8867, 8870, 0, - /*8867*/ uint16(xSetOp), uint16(POPA), + /*8843*/ uint16(xCondIs64), 8846, 8858, + /*8846*/ uint16(xCondDataSize), 8850, 8854, 0, + /*8850*/ uint16(xSetOp), uint16(POP), + /*8852*/ uint16(xArgR16op), + /*8853*/ uint16(xMatch), + /*8854*/ uint16(xSetOp), uint16(POP), + /*8856*/ uint16(xArgR32op), + /*8857*/ uint16(xMatch), + /*8858*/ uint16(xCondDataSize), 8850, 8862, 8866, + /*8862*/ uint16(xSetOp), uint16(POP), + /*8864*/ uint16(xArgR64op), + /*8865*/ uint16(xMatch), + /*8866*/ uint16(xSetOp), uint16(POP), + /*8868*/ uint16(xArgR64op), /*8869*/ uint16(xMatch), - /*8870*/ uint16(xSetOp), uint16(POPAD), - /*8872*/ uint16(xMatch), - /*8873*/ uint16(xCondIs64), 8876, 0, - /*8876*/ uint16(xCondDataSize), 8880, 8886, 0, - /*8880*/ uint16(xSetOp), uint16(BOUND), - /*8882*/ uint16(xReadSlashR), - /*8883*/ uint16(xArgR16), - /*8884*/ uint16(xArgM16and16), - /*8885*/ uint16(xMatch), - /*8886*/ uint16(xSetOp), uint16(BOUND), - /*8888*/ uint16(xReadSlashR), - /*8889*/ uint16(xArgR32), - /*8890*/ uint16(xArgM32and32), - /*8891*/ uint16(xMatch), - /*8892*/ uint16(xCondIs64), 8895, 8901, - /*8895*/ uint16(xSetOp), uint16(ARPL), - /*8897*/ uint16(xReadSlashR), - /*8898*/ uint16(xArgRM16), - /*8899*/ uint16(xArgR16), - /*8900*/ uint16(xMatch), - /*8901*/ uint16(xCondDataSize), 8905, 8911, 8917, - /*8905*/ uint16(xSetOp), uint16(MOVSXD), - /*8907*/ uint16(xReadSlashR), - /*8908*/ uint16(xArgR16), - /*8909*/ uint16(xArgRM32), - /*8910*/ uint16(xMatch), - /*8911*/ uint16(xSetOp), uint16(MOVSXD), - /*8913*/ uint16(xReadSlashR), - /*8914*/ uint16(xArgR32), - /*8915*/ uint16(xArgRM32), - /*8916*/ uint16(xMatch), - /*8917*/ uint16(xSetOp), uint16(MOVSXD), - /*8919*/ uint16(xReadSlashR), - /*8920*/ uint16(xArgR64), - /*8921*/ uint16(xArgRM32), - /*8922*/ uint16(xMatch), - /*8923*/ uint16(xCondDataSize), 8927, 8932, 8937, - /*8927*/ uint16(xSetOp), uint16(PUSH), - /*8929*/ uint16(xReadIw), - /*8930*/ uint16(xArgImm16), - /*8931*/ uint16(xMatch), - /*8932*/ uint16(xSetOp), uint16(PUSH), - /*8934*/ uint16(xReadId), - /*8935*/ uint16(xArgImm32), - /*8936*/ uint16(xMatch), - /*8937*/ uint16(xSetOp), uint16(PUSH), - /*8939*/ uint16(xReadId), - /*8940*/ uint16(xArgImm32), - /*8941*/ uint16(xMatch), - /*8942*/ uint16(xCondIs64), 8945, 8965, - /*8945*/ uint16(xCondDataSize), 8949, 8957, 0, - /*8949*/ uint16(xSetOp), uint16(IMUL), - /*8951*/ uint16(xReadSlashR), + /*8870*/ uint16(xCondIs64), 8873, 0, + /*8873*/ uint16(xCondDataSize), 8877, 8880, 0, + /*8877*/ uint16(xSetOp), uint16(PUSHA), + /*8879*/ uint16(xMatch), + /*8880*/ uint16(xSetOp), uint16(PUSHAD), + /*8882*/ uint16(xMatch), + /*8883*/ uint16(xCondIs64), 8886, 0, + /*8886*/ uint16(xCondDataSize), 8890, 8893, 0, + /*8890*/ uint16(xSetOp), uint16(POPA), + /*8892*/ uint16(xMatch), + /*8893*/ uint16(xSetOp), uint16(POPAD), + /*8895*/ uint16(xMatch), + /*8896*/ uint16(xCondIs64), 8899, 0, + /*8899*/ uint16(xCondDataSize), 8903, 8909, 0, + /*8903*/ uint16(xSetOp), uint16(BOUND), + /*8905*/ uint16(xReadSlashR), + /*8906*/ uint16(xArgR16), + /*8907*/ uint16(xArgM16and16), + /*8908*/ uint16(xMatch), + /*8909*/ uint16(xSetOp), uint16(BOUND), + /*8911*/ uint16(xReadSlashR), + /*8912*/ uint16(xArgR32), + /*8913*/ uint16(xArgM32and32), + /*8914*/ uint16(xMatch), + /*8915*/ uint16(xCondIs64), 8918, 8924, + /*8918*/ uint16(xSetOp), uint16(ARPL), + /*8920*/ uint16(xReadSlashR), + /*8921*/ uint16(xArgRM16), + /*8922*/ uint16(xArgR16), + /*8923*/ uint16(xMatch), + /*8924*/ uint16(xCondDataSize), 8928, 8934, 8940, + /*8928*/ uint16(xSetOp), uint16(MOVSXD), + /*8930*/ uint16(xReadSlashR), + /*8931*/ uint16(xArgR16), + /*8932*/ uint16(xArgRM32), + /*8933*/ uint16(xMatch), + /*8934*/ uint16(xSetOp), uint16(MOVSXD), + /*8936*/ uint16(xReadSlashR), + /*8937*/ uint16(xArgR32), + /*8938*/ uint16(xArgRM32), + /*8939*/ uint16(xMatch), + /*8940*/ uint16(xSetOp), uint16(MOVSXD), + /*8942*/ uint16(xReadSlashR), + /*8943*/ uint16(xArgR64), + /*8944*/ uint16(xArgRM32), + /*8945*/ uint16(xMatch), + /*8946*/ uint16(xCondDataSize), 8950, 8955, 8960, + /*8950*/ uint16(xSetOp), uint16(PUSH), /*8952*/ uint16(xReadIw), - /*8953*/ uint16(xArgR16), - /*8954*/ uint16(xArgRM16), - /*8955*/ uint16(xArgImm16), - /*8956*/ uint16(xMatch), - /*8957*/ uint16(xSetOp), uint16(IMUL), - /*8959*/ uint16(xReadSlashR), - /*8960*/ uint16(xReadId), - /*8961*/ uint16(xArgR32), - /*8962*/ uint16(xArgRM32), + /*8953*/ uint16(xArgImm16), + /*8954*/ uint16(xMatch), + /*8955*/ uint16(xSetOp), uint16(PUSH), + /*8957*/ uint16(xReadId), + /*8958*/ uint16(xArgImm32), + /*8959*/ uint16(xMatch), + /*8960*/ uint16(xSetOp), uint16(PUSH), + /*8962*/ uint16(xReadId), /*8963*/ uint16(xArgImm32), /*8964*/ uint16(xMatch), - /*8965*/ uint16(xCondDataSize), 8949, 8957, 8969, - /*8969*/ uint16(xSetOp), uint16(IMUL), - /*8971*/ uint16(xReadSlashR), - /*8972*/ uint16(xReadId), - /*8973*/ uint16(xArgR64), - /*8974*/ uint16(xArgRM64), - /*8975*/ uint16(xArgImm32), - /*8976*/ uint16(xMatch), - /*8977*/ uint16(xSetOp), uint16(PUSH), - /*8979*/ uint16(xReadIb), - /*8980*/ uint16(xArgImm8), - /*8981*/ uint16(xMatch), - /*8982*/ uint16(xCondIs64), 8985, 9005, - /*8985*/ uint16(xCondDataSize), 8989, 8997, 0, - /*8989*/ uint16(xSetOp), uint16(IMUL), - /*8991*/ uint16(xReadSlashR), - /*8992*/ uint16(xReadIb), - /*8993*/ uint16(xArgR16), - /*8994*/ uint16(xArgRM16), - /*8995*/ uint16(xArgImm8), - /*8996*/ uint16(xMatch), - /*8997*/ uint16(xSetOp), uint16(IMUL), - /*8999*/ uint16(xReadSlashR), - /*9000*/ uint16(xReadIb), - /*9001*/ uint16(xArgR32), - /*9002*/ uint16(xArgRM32), + /*8965*/ uint16(xCondIs64), 8968, 8988, + /*8968*/ uint16(xCondDataSize), 8972, 8980, 0, + /*8972*/ uint16(xSetOp), uint16(IMUL), + /*8974*/ uint16(xReadSlashR), + /*8975*/ uint16(xReadIw), + /*8976*/ uint16(xArgR16), + /*8977*/ uint16(xArgRM16), + /*8978*/ uint16(xArgImm16), + /*8979*/ uint16(xMatch), + /*8980*/ uint16(xSetOp), uint16(IMUL), + /*8982*/ uint16(xReadSlashR), + /*8983*/ uint16(xReadId), + /*8984*/ uint16(xArgR32), + /*8985*/ uint16(xArgRM32), + /*8986*/ uint16(xArgImm32), + /*8987*/ uint16(xMatch), + /*8988*/ uint16(xCondDataSize), 8972, 8980, 8992, + /*8992*/ uint16(xSetOp), uint16(IMUL), + /*8994*/ uint16(xReadSlashR), + /*8995*/ uint16(xReadId), + /*8996*/ uint16(xArgR64), + /*8997*/ uint16(xArgRM64), + /*8998*/ uint16(xArgImm32), + /*8999*/ uint16(xMatch), + /*9000*/ uint16(xSetOp), uint16(PUSH), + /*9002*/ uint16(xReadIb), /*9003*/ uint16(xArgImm8), /*9004*/ uint16(xMatch), - /*9005*/ uint16(xCondDataSize), 8989, 8997, 9009, - /*9009*/ uint16(xSetOp), uint16(IMUL), - /*9011*/ uint16(xReadSlashR), - /*9012*/ uint16(xReadIb), - /*9013*/ uint16(xArgR64), - /*9014*/ uint16(xArgRM64), - /*9015*/ uint16(xArgImm8), - /*9016*/ uint16(xMatch), - /*9017*/ uint16(xSetOp), uint16(INSB), + /*9005*/ uint16(xCondIs64), 9008, 9028, + /*9008*/ uint16(xCondDataSize), 9012, 9020, 0, + /*9012*/ uint16(xSetOp), uint16(IMUL), + /*9014*/ uint16(xReadSlashR), + /*9015*/ uint16(xReadIb), + /*9016*/ uint16(xArgR16), + /*9017*/ uint16(xArgRM16), + /*9018*/ uint16(xArgImm8), /*9019*/ uint16(xMatch), - /*9020*/ uint16(xCondDataSize), 9024, 9027, 9030, - /*9024*/ uint16(xSetOp), uint16(INSW), - /*9026*/ uint16(xMatch), - /*9027*/ uint16(xSetOp), uint16(INSD), - /*9029*/ uint16(xMatch), - /*9030*/ uint16(xSetOp), uint16(INSD), - /*9032*/ uint16(xMatch), - /*9033*/ uint16(xSetOp), uint16(OUTSB), - /*9035*/ uint16(xMatch), - /*9036*/ uint16(xCondPrefix), 3, - 0xC5, 9083, - 0xC4, 9057, - 0x0, 9044, - /*9044*/ uint16(xCondDataSize), 9048, 9051, 9054, - /*9048*/ uint16(xSetOp), uint16(OUTSW), - /*9050*/ uint16(xMatch), - /*9051*/ uint16(xSetOp), uint16(OUTSD), - /*9053*/ uint16(xMatch), - /*9054*/ uint16(xSetOp), uint16(OUTSD), - /*9056*/ uint16(xMatch), - /*9057*/ uint16(xCondPrefix), 2, - 0xF3, 9073, - 0x66, 9063, - /*9063*/ uint16(xCondPrefix), 1, - 0x0F, 9067, - /*9067*/ uint16(xSetOp), uint16(VMOVDQA), - /*9069*/ uint16(xReadSlashR), - /*9070*/ uint16(xArgYmm1), - /*9071*/ uint16(xArgYmm2M256), - /*9072*/ uint16(xMatch), - /*9073*/ uint16(xCondPrefix), 1, - 0x0F, 9077, - /*9077*/ uint16(xSetOp), uint16(VMOVDQU), - /*9079*/ uint16(xReadSlashR), - /*9080*/ uint16(xArgYmm1), - /*9081*/ uint16(xArgYmm2M256), - /*9082*/ uint16(xMatch), - /*9083*/ uint16(xCondPrefix), 2, - 0xF3, 9099, - 0x66, 9089, - /*9089*/ uint16(xCondPrefix), 1, - 0x0F, 9093, - /*9093*/ uint16(xSetOp), uint16(VMOVDQA), - /*9095*/ uint16(xReadSlashR), - /*9096*/ uint16(xArgYmm1), - /*9097*/ uint16(xArgYmm2M256), - /*9098*/ uint16(xMatch), - /*9099*/ uint16(xCondPrefix), 1, - 0x0F, 9103, - /*9103*/ uint16(xSetOp), uint16(VMOVDQU), - /*9105*/ uint16(xReadSlashR), - /*9106*/ uint16(xArgYmm1), - /*9107*/ uint16(xArgYmm2M256), - /*9108*/ uint16(xMatch), - /*9109*/ uint16(xSetOp), uint16(JO), - /*9111*/ uint16(xReadCb), - /*9112*/ uint16(xArgRel8), - /*9113*/ uint16(xMatch), - /*9114*/ uint16(xSetOp), uint16(JNO), - /*9116*/ uint16(xReadCb), - /*9117*/ uint16(xArgRel8), - /*9118*/ uint16(xMatch), - /*9119*/ uint16(xSetOp), uint16(JB), - /*9121*/ uint16(xReadCb), - /*9122*/ uint16(xArgRel8), - /*9123*/ uint16(xMatch), - /*9124*/ uint16(xSetOp), uint16(JAE), - /*9126*/ uint16(xReadCb), - /*9127*/ uint16(xArgRel8), - /*9128*/ uint16(xMatch), - /*9129*/ uint16(xSetOp), uint16(JE), - /*9131*/ uint16(xReadCb), - /*9132*/ uint16(xArgRel8), - /*9133*/ uint16(xMatch), - /*9134*/ uint16(xSetOp), uint16(JNE), - /*9136*/ uint16(xReadCb), - /*9137*/ uint16(xArgRel8), - /*9138*/ uint16(xMatch), - /*9139*/ uint16(xSetOp), uint16(JBE), - /*9141*/ uint16(xReadCb), - /*9142*/ uint16(xArgRel8), - /*9143*/ uint16(xMatch), - /*9144*/ uint16(xCondPrefix), 3, - 0xC5, 9164, - 0xC4, 9157, - 0x0, 9152, - /*9152*/ uint16(xSetOp), uint16(JA), - /*9154*/ uint16(xReadCb), - /*9155*/ uint16(xArgRel8), - /*9156*/ uint16(xMatch), - /*9157*/ uint16(xCondPrefix), 1, - 0x0F, 9161, - /*9161*/ uint16(xSetOp), uint16(VZEROUPPER), - /*9163*/ uint16(xMatch), - /*9164*/ uint16(xCondPrefix), 1, - 0x0F, 9168, - /*9168*/ uint16(xSetOp), uint16(VZEROUPPER), - /*9170*/ uint16(xMatch), - /*9171*/ uint16(xSetOp), uint16(JS), - /*9173*/ uint16(xReadCb), - /*9174*/ uint16(xArgRel8), - /*9175*/ uint16(xMatch), - /*9176*/ uint16(xSetOp), uint16(JNS), - /*9178*/ uint16(xReadCb), - /*9179*/ uint16(xArgRel8), - /*9180*/ uint16(xMatch), - /*9181*/ uint16(xSetOp), uint16(JP), - /*9183*/ uint16(xReadCb), - /*9184*/ uint16(xArgRel8), - /*9185*/ uint16(xMatch), - /*9186*/ uint16(xSetOp), uint16(JNP), - /*9188*/ uint16(xReadCb), - /*9189*/ uint16(xArgRel8), + /*9020*/ uint16(xSetOp), uint16(IMUL), + /*9022*/ uint16(xReadSlashR), + /*9023*/ uint16(xReadIb), + /*9024*/ uint16(xArgR32), + /*9025*/ uint16(xArgRM32), + /*9026*/ uint16(xArgImm8), + /*9027*/ uint16(xMatch), + /*9028*/ uint16(xCondDataSize), 9012, 9020, 9032, + /*9032*/ uint16(xSetOp), uint16(IMUL), + /*9034*/ uint16(xReadSlashR), + /*9035*/ uint16(xReadIb), + /*9036*/ uint16(xArgR64), + /*9037*/ uint16(xArgRM64), + /*9038*/ uint16(xArgImm8), + /*9039*/ uint16(xMatch), + /*9040*/ uint16(xSetOp), uint16(INSB), + /*9042*/ uint16(xMatch), + /*9043*/ uint16(xCondDataSize), 9047, 9050, 9053, + /*9047*/ uint16(xSetOp), uint16(INSW), + /*9049*/ uint16(xMatch), + /*9050*/ uint16(xSetOp), uint16(INSD), + /*9052*/ uint16(xMatch), + /*9053*/ uint16(xSetOp), uint16(INSD), + /*9055*/ uint16(xMatch), + /*9056*/ uint16(xSetOp), uint16(OUTSB), + /*9058*/ uint16(xMatch), + /*9059*/ uint16(xCondDataSize), 9063, 9066, 9069, + /*9063*/ uint16(xSetOp), uint16(OUTSW), + /*9065*/ uint16(xMatch), + /*9066*/ uint16(xSetOp), uint16(OUTSD), + /*9068*/ uint16(xMatch), + /*9069*/ uint16(xSetOp), uint16(OUTSD), + /*9071*/ uint16(xMatch), + /*9072*/ uint16(xSetOp), uint16(JO), + /*9074*/ uint16(xReadCb), + /*9075*/ uint16(xArgRel8), + /*9076*/ uint16(xMatch), + /*9077*/ uint16(xSetOp), uint16(JNO), + /*9079*/ uint16(xReadCb), + /*9080*/ uint16(xArgRel8), + /*9081*/ uint16(xMatch), + /*9082*/ uint16(xSetOp), uint16(JB), + /*9084*/ uint16(xReadCb), + /*9085*/ uint16(xArgRel8), + /*9086*/ uint16(xMatch), + /*9087*/ uint16(xSetOp), uint16(JAE), + /*9089*/ uint16(xReadCb), + /*9090*/ uint16(xArgRel8), + /*9091*/ uint16(xMatch), + /*9092*/ uint16(xSetOp), uint16(JE), + /*9094*/ uint16(xReadCb), + /*9095*/ uint16(xArgRel8), + /*9096*/ uint16(xMatch), + /*9097*/ uint16(xSetOp), uint16(JNE), + /*9099*/ uint16(xReadCb), + /*9100*/ uint16(xArgRel8), + /*9101*/ uint16(xMatch), + /*9102*/ uint16(xSetOp), uint16(JBE), + /*9104*/ uint16(xReadCb), + /*9105*/ uint16(xArgRel8), + /*9106*/ uint16(xMatch), + /*9107*/ uint16(xSetOp), uint16(JA), + /*9109*/ uint16(xReadCb), + /*9110*/ uint16(xArgRel8), + /*9111*/ uint16(xMatch), + /*9112*/ uint16(xSetOp), uint16(JS), + /*9114*/ uint16(xReadCb), + /*9115*/ uint16(xArgRel8), + /*9116*/ uint16(xMatch), + /*9117*/ uint16(xSetOp), uint16(JNS), + /*9119*/ uint16(xReadCb), + /*9120*/ uint16(xArgRel8), + /*9121*/ uint16(xMatch), + /*9122*/ uint16(xSetOp), uint16(JP), + /*9124*/ uint16(xReadCb), + /*9125*/ uint16(xArgRel8), + /*9126*/ uint16(xMatch), + /*9127*/ uint16(xSetOp), uint16(JNP), + /*9129*/ uint16(xReadCb), + /*9130*/ uint16(xArgRel8), + /*9131*/ uint16(xMatch), + /*9132*/ uint16(xSetOp), uint16(JL), + /*9134*/ uint16(xReadCb), + /*9135*/ uint16(xArgRel8), + /*9136*/ uint16(xMatch), + /*9137*/ uint16(xSetOp), uint16(JGE), + /*9139*/ uint16(xReadCb), + /*9140*/ uint16(xArgRel8), + /*9141*/ uint16(xMatch), + /*9142*/ uint16(xSetOp), uint16(JLE), + /*9144*/ uint16(xReadCb), + /*9145*/ uint16(xArgRel8), + /*9146*/ uint16(xMatch), + /*9147*/ uint16(xSetOp), uint16(JG), + /*9149*/ uint16(xReadCb), + /*9150*/ uint16(xArgRel8), + /*9151*/ uint16(xMatch), + /*9152*/ uint16(xCondSlashR), + 9161, // 0 + 9167, // 1 + 9173, // 2 + 9179, // 3 + 9185, // 4 + 9191, // 5 + 9197, // 6 + 9203, // 7 + /*9161*/ uint16(xSetOp), uint16(ADD), + /*9163*/ uint16(xReadIb), + /*9164*/ uint16(xArgRM8), + /*9165*/ uint16(xArgImm8u), + /*9166*/ uint16(xMatch), + /*9167*/ uint16(xSetOp), uint16(OR), + /*9169*/ uint16(xReadIb), + /*9170*/ uint16(xArgRM8), + /*9171*/ uint16(xArgImm8u), + /*9172*/ uint16(xMatch), + /*9173*/ uint16(xSetOp), uint16(ADC), + /*9175*/ uint16(xReadIb), + /*9176*/ uint16(xArgRM8), + /*9177*/ uint16(xArgImm8u), + /*9178*/ uint16(xMatch), + /*9179*/ uint16(xSetOp), uint16(SBB), + /*9181*/ uint16(xReadIb), + /*9182*/ uint16(xArgRM8), + /*9183*/ uint16(xArgImm8u), + /*9184*/ uint16(xMatch), + /*9185*/ uint16(xSetOp), uint16(AND), + /*9187*/ uint16(xReadIb), + /*9188*/ uint16(xArgRM8), + /*9189*/ uint16(xArgImm8u), /*9190*/ uint16(xMatch), - /*9191*/ uint16(xSetOp), uint16(JL), - /*9193*/ uint16(xReadCb), - /*9194*/ uint16(xArgRel8), - /*9195*/ uint16(xMatch), - /*9196*/ uint16(xSetOp), uint16(JGE), - /*9198*/ uint16(xReadCb), - /*9199*/ uint16(xArgRel8), - /*9200*/ uint16(xMatch), - /*9201*/ uint16(xSetOp), uint16(JLE), - /*9203*/ uint16(xReadCb), - /*9204*/ uint16(xArgRel8), - /*9205*/ uint16(xMatch), - /*9206*/ uint16(xCondPrefix), 3, - 0xC5, 9245, - 0xC4, 9219, - 0x0, 9214, - /*9214*/ uint16(xSetOp), uint16(JG), - /*9216*/ uint16(xReadCb), - /*9217*/ uint16(xArgRel8), - /*9218*/ uint16(xMatch), - /*9219*/ uint16(xCondPrefix), 2, - 0xF3, 9235, - 0x66, 9225, - /*9225*/ uint16(xCondPrefix), 1, - 0x0F, 9229, - /*9229*/ uint16(xSetOp), uint16(VMOVDQA), - /*9231*/ uint16(xReadSlashR), - /*9232*/ uint16(xArgYmm2M256), - /*9233*/ uint16(xArgYmm1), - /*9234*/ uint16(xMatch), - /*9235*/ uint16(xCondPrefix), 1, - 0x0F, 9239, - /*9239*/ uint16(xSetOp), uint16(VMOVDQU), - /*9241*/ uint16(xReadSlashR), - /*9242*/ uint16(xArgYmm2M256), - /*9243*/ uint16(xArgYmm1), - /*9244*/ uint16(xMatch), - /*9245*/ uint16(xCondPrefix), 2, - 0xF3, 9261, - 0x66, 9251, - /*9251*/ uint16(xCondPrefix), 1, - 0x0F, 9255, - /*9255*/ uint16(xSetOp), uint16(VMOVDQA), - /*9257*/ uint16(xReadSlashR), - /*9258*/ uint16(xArgYmm2M256), - /*9259*/ uint16(xArgYmm1), - /*9260*/ uint16(xMatch), - /*9261*/ uint16(xCondPrefix), 1, - 0x0F, 9265, - /*9265*/ uint16(xSetOp), uint16(VMOVDQU), - /*9267*/ uint16(xReadSlashR), - /*9268*/ uint16(xArgYmm2M256), - /*9269*/ uint16(xArgYmm1), - /*9270*/ uint16(xMatch), - /*9271*/ uint16(xCondSlashR), - 9280, // 0 - 9286, // 1 - 9292, // 2 - 9298, // 3 - 9304, // 4 - 9310, // 5 - 9316, // 6 - 9322, // 7 - /*9280*/ uint16(xSetOp), uint16(ADD), - /*9282*/ uint16(xReadIb), - /*9283*/ uint16(xArgRM8), - /*9284*/ uint16(xArgImm8u), - /*9285*/ uint16(xMatch), - /*9286*/ uint16(xSetOp), uint16(OR), - /*9288*/ uint16(xReadIb), - /*9289*/ uint16(xArgRM8), - /*9290*/ uint16(xArgImm8u), - /*9291*/ uint16(xMatch), - /*9292*/ uint16(xSetOp), uint16(ADC), - /*9294*/ uint16(xReadIb), - /*9295*/ uint16(xArgRM8), - /*9296*/ uint16(xArgImm8u), - /*9297*/ uint16(xMatch), - /*9298*/ uint16(xSetOp), uint16(SBB), - /*9300*/ uint16(xReadIb), - /*9301*/ uint16(xArgRM8), - /*9302*/ uint16(xArgImm8u), - /*9303*/ uint16(xMatch), - /*9304*/ uint16(xSetOp), uint16(AND), - /*9306*/ uint16(xReadIb), - /*9307*/ uint16(xArgRM8), - /*9308*/ uint16(xArgImm8u), - /*9309*/ uint16(xMatch), - /*9310*/ uint16(xSetOp), uint16(SUB), - /*9312*/ uint16(xReadIb), - /*9313*/ uint16(xArgRM8), - /*9314*/ uint16(xArgImm8u), - /*9315*/ uint16(xMatch), - /*9316*/ uint16(xSetOp), uint16(XOR), - /*9318*/ uint16(xReadIb), - /*9319*/ uint16(xArgRM8), - /*9320*/ uint16(xArgImm8u), - /*9321*/ uint16(xMatch), - /*9322*/ uint16(xSetOp), uint16(CMP), - /*9324*/ uint16(xReadIb), - /*9325*/ uint16(xArgRM8), - /*9326*/ uint16(xArgImm8u), - /*9327*/ uint16(xMatch), - /*9328*/ uint16(xCondSlashR), - 9337, // 0 - 9366, // 1 - 9395, // 2 - 9424, // 3 - 9453, // 4 - 9482, // 5 - 9511, // 6 - 9540, // 7 - /*9337*/ uint16(xCondIs64), 9340, 9356, - /*9340*/ uint16(xCondDataSize), 9344, 9350, 0, - /*9344*/ uint16(xSetOp), uint16(ADD), - /*9346*/ uint16(xReadIw), - /*9347*/ uint16(xArgRM16), - /*9348*/ uint16(xArgImm16), - /*9349*/ uint16(xMatch), - /*9350*/ uint16(xSetOp), uint16(ADD), - /*9352*/ uint16(xReadId), - /*9353*/ uint16(xArgRM32), - /*9354*/ uint16(xArgImm32), - /*9355*/ uint16(xMatch), - /*9356*/ uint16(xCondDataSize), 9344, 9350, 9360, - /*9360*/ uint16(xSetOp), uint16(ADD), - /*9362*/ uint16(xReadId), - /*9363*/ uint16(xArgRM64), - /*9364*/ uint16(xArgImm32), - /*9365*/ uint16(xMatch), - /*9366*/ uint16(xCondIs64), 9369, 9385, - /*9369*/ uint16(xCondDataSize), 9373, 9379, 0, - /*9373*/ uint16(xSetOp), uint16(OR), - /*9375*/ uint16(xReadIw), - /*9376*/ uint16(xArgRM16), - /*9377*/ uint16(xArgImm16), - /*9378*/ uint16(xMatch), - /*9379*/ uint16(xSetOp), uint16(OR), - /*9381*/ uint16(xReadId), - /*9382*/ uint16(xArgRM32), - /*9383*/ uint16(xArgImm32), - /*9384*/ uint16(xMatch), - /*9385*/ uint16(xCondDataSize), 9373, 9379, 9389, - /*9389*/ uint16(xSetOp), uint16(OR), - /*9391*/ uint16(xReadId), - /*9392*/ uint16(xArgRM64), - /*9393*/ uint16(xArgImm32), - /*9394*/ uint16(xMatch), - /*9395*/ uint16(xCondIs64), 9398, 9414, - /*9398*/ uint16(xCondDataSize), 9402, 9408, 0, - /*9402*/ uint16(xSetOp), uint16(ADC), - /*9404*/ uint16(xReadIw), - /*9405*/ uint16(xArgRM16), - /*9406*/ uint16(xArgImm16), - /*9407*/ uint16(xMatch), - /*9408*/ uint16(xSetOp), uint16(ADC), - /*9410*/ uint16(xReadId), - /*9411*/ uint16(xArgRM32), - /*9412*/ uint16(xArgImm32), - /*9413*/ uint16(xMatch), - /*9414*/ uint16(xCondDataSize), 9402, 9408, 9418, - /*9418*/ uint16(xSetOp), uint16(ADC), - /*9420*/ uint16(xReadId), - /*9421*/ uint16(xArgRM64), - /*9422*/ uint16(xArgImm32), - /*9423*/ uint16(xMatch), - /*9424*/ uint16(xCondIs64), 9427, 9443, - /*9427*/ uint16(xCondDataSize), 9431, 9437, 0, - /*9431*/ uint16(xSetOp), uint16(SBB), - /*9433*/ uint16(xReadIw), - /*9434*/ uint16(xArgRM16), - /*9435*/ uint16(xArgImm16), - /*9436*/ uint16(xMatch), - /*9437*/ uint16(xSetOp), uint16(SBB), - /*9439*/ uint16(xReadId), - /*9440*/ uint16(xArgRM32), - /*9441*/ uint16(xArgImm32), - /*9442*/ uint16(xMatch), - /*9443*/ uint16(xCondDataSize), 9431, 9437, 9447, - /*9447*/ uint16(xSetOp), uint16(SBB), - /*9449*/ uint16(xReadId), - /*9450*/ uint16(xArgRM64), - /*9451*/ uint16(xArgImm32), - /*9452*/ uint16(xMatch), - /*9453*/ uint16(xCondIs64), 9456, 9472, - /*9456*/ uint16(xCondDataSize), 9460, 9466, 0, - /*9460*/ uint16(xSetOp), uint16(AND), - /*9462*/ uint16(xReadIw), - /*9463*/ uint16(xArgRM16), - /*9464*/ uint16(xArgImm16), - /*9465*/ uint16(xMatch), - /*9466*/ uint16(xSetOp), uint16(AND), - /*9468*/ uint16(xReadId), - /*9469*/ uint16(xArgRM32), - /*9470*/ uint16(xArgImm32), + /*9191*/ uint16(xSetOp), uint16(SUB), + /*9193*/ uint16(xReadIb), + /*9194*/ uint16(xArgRM8), + /*9195*/ uint16(xArgImm8u), + /*9196*/ uint16(xMatch), + /*9197*/ uint16(xSetOp), uint16(XOR), + /*9199*/ uint16(xReadIb), + /*9200*/ uint16(xArgRM8), + /*9201*/ uint16(xArgImm8u), + /*9202*/ uint16(xMatch), + /*9203*/ uint16(xSetOp), uint16(CMP), + /*9205*/ uint16(xReadIb), + /*9206*/ uint16(xArgRM8), + /*9207*/ uint16(xArgImm8u), + /*9208*/ uint16(xMatch), + /*9209*/ uint16(xCondSlashR), + 9218, // 0 + 9247, // 1 + 9276, // 2 + 9305, // 3 + 9334, // 4 + 9363, // 5 + 9392, // 6 + 9421, // 7 + /*9218*/ uint16(xCondIs64), 9221, 9237, + /*9221*/ uint16(xCondDataSize), 9225, 9231, 0, + /*9225*/ uint16(xSetOp), uint16(ADD), + /*9227*/ uint16(xReadIw), + /*9228*/ uint16(xArgRM16), + /*9229*/ uint16(xArgImm16), + /*9230*/ uint16(xMatch), + /*9231*/ uint16(xSetOp), uint16(ADD), + /*9233*/ uint16(xReadId), + /*9234*/ uint16(xArgRM32), + /*9235*/ uint16(xArgImm32), + /*9236*/ uint16(xMatch), + /*9237*/ uint16(xCondDataSize), 9225, 9231, 9241, + /*9241*/ uint16(xSetOp), uint16(ADD), + /*9243*/ uint16(xReadId), + /*9244*/ uint16(xArgRM64), + /*9245*/ uint16(xArgImm32), + /*9246*/ uint16(xMatch), + /*9247*/ uint16(xCondIs64), 9250, 9266, + /*9250*/ uint16(xCondDataSize), 9254, 9260, 0, + /*9254*/ uint16(xSetOp), uint16(OR), + /*9256*/ uint16(xReadIw), + /*9257*/ uint16(xArgRM16), + /*9258*/ uint16(xArgImm16), + /*9259*/ uint16(xMatch), + /*9260*/ uint16(xSetOp), uint16(OR), + /*9262*/ uint16(xReadId), + /*9263*/ uint16(xArgRM32), + /*9264*/ uint16(xArgImm32), + /*9265*/ uint16(xMatch), + /*9266*/ uint16(xCondDataSize), 9254, 9260, 9270, + /*9270*/ uint16(xSetOp), uint16(OR), + /*9272*/ uint16(xReadId), + /*9273*/ uint16(xArgRM64), + /*9274*/ uint16(xArgImm32), + /*9275*/ uint16(xMatch), + /*9276*/ uint16(xCondIs64), 9279, 9295, + /*9279*/ uint16(xCondDataSize), 9283, 9289, 0, + /*9283*/ uint16(xSetOp), uint16(ADC), + /*9285*/ uint16(xReadIw), + /*9286*/ uint16(xArgRM16), + /*9287*/ uint16(xArgImm16), + /*9288*/ uint16(xMatch), + /*9289*/ uint16(xSetOp), uint16(ADC), + /*9291*/ uint16(xReadId), + /*9292*/ uint16(xArgRM32), + /*9293*/ uint16(xArgImm32), + /*9294*/ uint16(xMatch), + /*9295*/ uint16(xCondDataSize), 9283, 9289, 9299, + /*9299*/ uint16(xSetOp), uint16(ADC), + /*9301*/ uint16(xReadId), + /*9302*/ uint16(xArgRM64), + /*9303*/ uint16(xArgImm32), + /*9304*/ uint16(xMatch), + /*9305*/ uint16(xCondIs64), 9308, 9324, + /*9308*/ uint16(xCondDataSize), 9312, 9318, 0, + /*9312*/ uint16(xSetOp), uint16(SBB), + /*9314*/ uint16(xReadIw), + /*9315*/ uint16(xArgRM16), + /*9316*/ uint16(xArgImm16), + /*9317*/ uint16(xMatch), + /*9318*/ uint16(xSetOp), uint16(SBB), + /*9320*/ uint16(xReadId), + /*9321*/ uint16(xArgRM32), + /*9322*/ uint16(xArgImm32), + /*9323*/ uint16(xMatch), + /*9324*/ uint16(xCondDataSize), 9312, 9318, 9328, + /*9328*/ uint16(xSetOp), uint16(SBB), + /*9330*/ uint16(xReadId), + /*9331*/ uint16(xArgRM64), + /*9332*/ uint16(xArgImm32), + /*9333*/ uint16(xMatch), + /*9334*/ uint16(xCondIs64), 9337, 9353, + /*9337*/ uint16(xCondDataSize), 9341, 9347, 0, + /*9341*/ uint16(xSetOp), uint16(AND), + /*9343*/ uint16(xReadIw), + /*9344*/ uint16(xArgRM16), + /*9345*/ uint16(xArgImm16), + /*9346*/ uint16(xMatch), + /*9347*/ uint16(xSetOp), uint16(AND), + /*9349*/ uint16(xReadId), + /*9350*/ uint16(xArgRM32), + /*9351*/ uint16(xArgImm32), + /*9352*/ uint16(xMatch), + /*9353*/ uint16(xCondDataSize), 9341, 9347, 9357, + /*9357*/ uint16(xSetOp), uint16(AND), + /*9359*/ uint16(xReadId), + /*9360*/ uint16(xArgRM64), + /*9361*/ uint16(xArgImm32), + /*9362*/ uint16(xMatch), + /*9363*/ uint16(xCondIs64), 9366, 9382, + /*9366*/ uint16(xCondDataSize), 9370, 9376, 0, + /*9370*/ uint16(xSetOp), uint16(SUB), + /*9372*/ uint16(xReadIw), + /*9373*/ uint16(xArgRM16), + /*9374*/ uint16(xArgImm16), + /*9375*/ uint16(xMatch), + /*9376*/ uint16(xSetOp), uint16(SUB), + /*9378*/ uint16(xReadId), + /*9379*/ uint16(xArgRM32), + /*9380*/ uint16(xArgImm32), + /*9381*/ uint16(xMatch), + /*9382*/ uint16(xCondDataSize), 9370, 9376, 9386, + /*9386*/ uint16(xSetOp), uint16(SUB), + /*9388*/ uint16(xReadId), + /*9389*/ uint16(xArgRM64), + /*9390*/ uint16(xArgImm32), + /*9391*/ uint16(xMatch), + /*9392*/ uint16(xCondIs64), 9395, 9411, + /*9395*/ uint16(xCondDataSize), 9399, 9405, 0, + /*9399*/ uint16(xSetOp), uint16(XOR), + /*9401*/ uint16(xReadIw), + /*9402*/ uint16(xArgRM16), + /*9403*/ uint16(xArgImm16), + /*9404*/ uint16(xMatch), + /*9405*/ uint16(xSetOp), uint16(XOR), + /*9407*/ uint16(xReadId), + /*9408*/ uint16(xArgRM32), + /*9409*/ uint16(xArgImm32), + /*9410*/ uint16(xMatch), + /*9411*/ uint16(xCondDataSize), 9399, 9405, 9415, + /*9415*/ uint16(xSetOp), uint16(XOR), + /*9417*/ uint16(xReadId), + /*9418*/ uint16(xArgRM64), + /*9419*/ uint16(xArgImm32), + /*9420*/ uint16(xMatch), + /*9421*/ uint16(xCondIs64), 9424, 9440, + /*9424*/ uint16(xCondDataSize), 9428, 9434, 0, + /*9428*/ uint16(xSetOp), uint16(CMP), + /*9430*/ uint16(xReadIw), + /*9431*/ uint16(xArgRM16), + /*9432*/ uint16(xArgImm16), + /*9433*/ uint16(xMatch), + /*9434*/ uint16(xSetOp), uint16(CMP), + /*9436*/ uint16(xReadId), + /*9437*/ uint16(xArgRM32), + /*9438*/ uint16(xArgImm32), + /*9439*/ uint16(xMatch), + /*9440*/ uint16(xCondDataSize), 9428, 9434, 9444, + /*9444*/ uint16(xSetOp), uint16(CMP), + /*9446*/ uint16(xReadId), + /*9447*/ uint16(xArgRM64), + /*9448*/ uint16(xArgImm32), + /*9449*/ uint16(xMatch), + /*9450*/ uint16(xCondSlashR), + 9459, // 0 + 9488, // 1 + 9517, // 2 + 9546, // 3 + 9575, // 4 + 9604, // 5 + 9633, // 6 + 9662, // 7 + /*9459*/ uint16(xCondIs64), 9462, 9478, + /*9462*/ uint16(xCondDataSize), 9466, 9472, 0, + /*9466*/ uint16(xSetOp), uint16(ADD), + /*9468*/ uint16(xReadIb), + /*9469*/ uint16(xArgRM16), + /*9470*/ uint16(xArgImm8), /*9471*/ uint16(xMatch), - /*9472*/ uint16(xCondDataSize), 9460, 9466, 9476, - /*9476*/ uint16(xSetOp), uint16(AND), - /*9478*/ uint16(xReadId), - /*9479*/ uint16(xArgRM64), - /*9480*/ uint16(xArgImm32), - /*9481*/ uint16(xMatch), - /*9482*/ uint16(xCondIs64), 9485, 9501, - /*9485*/ uint16(xCondDataSize), 9489, 9495, 0, - /*9489*/ uint16(xSetOp), uint16(SUB), - /*9491*/ uint16(xReadIw), - /*9492*/ uint16(xArgRM16), - /*9493*/ uint16(xArgImm16), - /*9494*/ uint16(xMatch), - /*9495*/ uint16(xSetOp), uint16(SUB), - /*9497*/ uint16(xReadId), - /*9498*/ uint16(xArgRM32), - /*9499*/ uint16(xArgImm32), + /*9472*/ uint16(xSetOp), uint16(ADD), + /*9474*/ uint16(xReadIb), + /*9475*/ uint16(xArgRM32), + /*9476*/ uint16(xArgImm8), + /*9477*/ uint16(xMatch), + /*9478*/ uint16(xCondDataSize), 9466, 9472, 9482, + /*9482*/ uint16(xSetOp), uint16(ADD), + /*9484*/ uint16(xReadIb), + /*9485*/ uint16(xArgRM64), + /*9486*/ uint16(xArgImm8), + /*9487*/ uint16(xMatch), + /*9488*/ uint16(xCondIs64), 9491, 9507, + /*9491*/ uint16(xCondDataSize), 9495, 9501, 0, + /*9495*/ uint16(xSetOp), uint16(OR), + /*9497*/ uint16(xReadIb), + /*9498*/ uint16(xArgRM16), + /*9499*/ uint16(xArgImm8), /*9500*/ uint16(xMatch), - /*9501*/ uint16(xCondDataSize), 9489, 9495, 9505, - /*9505*/ uint16(xSetOp), uint16(SUB), - /*9507*/ uint16(xReadId), - /*9508*/ uint16(xArgRM64), - /*9509*/ uint16(xArgImm32), - /*9510*/ uint16(xMatch), - /*9511*/ uint16(xCondIs64), 9514, 9530, - /*9514*/ uint16(xCondDataSize), 9518, 9524, 0, - /*9518*/ uint16(xSetOp), uint16(XOR), - /*9520*/ uint16(xReadIw), - /*9521*/ uint16(xArgRM16), - /*9522*/ uint16(xArgImm16), - /*9523*/ uint16(xMatch), - /*9524*/ uint16(xSetOp), uint16(XOR), - /*9526*/ uint16(xReadId), - /*9527*/ uint16(xArgRM32), - /*9528*/ uint16(xArgImm32), + /*9501*/ uint16(xSetOp), uint16(OR), + /*9503*/ uint16(xReadIb), + /*9504*/ uint16(xArgRM32), + /*9505*/ uint16(xArgImm8), + /*9506*/ uint16(xMatch), + /*9507*/ uint16(xCondDataSize), 9495, 9501, 9511, + /*9511*/ uint16(xSetOp), uint16(OR), + /*9513*/ uint16(xReadIb), + /*9514*/ uint16(xArgRM64), + /*9515*/ uint16(xArgImm8), + /*9516*/ uint16(xMatch), + /*9517*/ uint16(xCondIs64), 9520, 9536, + /*9520*/ uint16(xCondDataSize), 9524, 9530, 0, + /*9524*/ uint16(xSetOp), uint16(ADC), + /*9526*/ uint16(xReadIb), + /*9527*/ uint16(xArgRM16), + /*9528*/ uint16(xArgImm8), /*9529*/ uint16(xMatch), - /*9530*/ uint16(xCondDataSize), 9518, 9524, 9534, - /*9534*/ uint16(xSetOp), uint16(XOR), - /*9536*/ uint16(xReadId), - /*9537*/ uint16(xArgRM64), - /*9538*/ uint16(xArgImm32), - /*9539*/ uint16(xMatch), - /*9540*/ uint16(xCondIs64), 9543, 9559, - /*9543*/ uint16(xCondDataSize), 9547, 9553, 0, - /*9547*/ uint16(xSetOp), uint16(CMP), - /*9549*/ uint16(xReadIw), - /*9550*/ uint16(xArgRM16), - /*9551*/ uint16(xArgImm16), - /*9552*/ uint16(xMatch), - /*9553*/ uint16(xSetOp), uint16(CMP), - /*9555*/ uint16(xReadId), - /*9556*/ uint16(xArgRM32), - /*9557*/ uint16(xArgImm32), + /*9530*/ uint16(xSetOp), uint16(ADC), + /*9532*/ uint16(xReadIb), + /*9533*/ uint16(xArgRM32), + /*9534*/ uint16(xArgImm8), + /*9535*/ uint16(xMatch), + /*9536*/ uint16(xCondDataSize), 9524, 9530, 9540, + /*9540*/ uint16(xSetOp), uint16(ADC), + /*9542*/ uint16(xReadIb), + /*9543*/ uint16(xArgRM64), + /*9544*/ uint16(xArgImm8), + /*9545*/ uint16(xMatch), + /*9546*/ uint16(xCondIs64), 9549, 9565, + /*9549*/ uint16(xCondDataSize), 9553, 9559, 0, + /*9553*/ uint16(xSetOp), uint16(SBB), + /*9555*/ uint16(xReadIb), + /*9556*/ uint16(xArgRM16), + /*9557*/ uint16(xArgImm8), /*9558*/ uint16(xMatch), - /*9559*/ uint16(xCondDataSize), 9547, 9553, 9563, - /*9563*/ uint16(xSetOp), uint16(CMP), - /*9565*/ uint16(xReadId), - /*9566*/ uint16(xArgRM64), - /*9567*/ uint16(xArgImm32), - /*9568*/ uint16(xMatch), - /*9569*/ uint16(xCondSlashR), - 9578, // 0 - 9607, // 1 - 9636, // 2 - 9665, // 3 - 9694, // 4 - 9723, // 5 - 9752, // 6 - 9781, // 7 - /*9578*/ uint16(xCondIs64), 9581, 9597, - /*9581*/ uint16(xCondDataSize), 9585, 9591, 0, - /*9585*/ uint16(xSetOp), uint16(ADD), - /*9587*/ uint16(xReadIb), - /*9588*/ uint16(xArgRM16), - /*9589*/ uint16(xArgImm8), - /*9590*/ uint16(xMatch), - /*9591*/ uint16(xSetOp), uint16(ADD), - /*9593*/ uint16(xReadIb), - /*9594*/ uint16(xArgRM32), - /*9595*/ uint16(xArgImm8), - /*9596*/ uint16(xMatch), - /*9597*/ uint16(xCondDataSize), 9585, 9591, 9601, - /*9601*/ uint16(xSetOp), uint16(ADD), - /*9603*/ uint16(xReadIb), - /*9604*/ uint16(xArgRM64), - /*9605*/ uint16(xArgImm8), - /*9606*/ uint16(xMatch), - /*9607*/ uint16(xCondIs64), 9610, 9626, - /*9610*/ uint16(xCondDataSize), 9614, 9620, 0, - /*9614*/ uint16(xSetOp), uint16(OR), - /*9616*/ uint16(xReadIb), - /*9617*/ uint16(xArgRM16), - /*9618*/ uint16(xArgImm8), - /*9619*/ uint16(xMatch), - /*9620*/ uint16(xSetOp), uint16(OR), - /*9622*/ uint16(xReadIb), - /*9623*/ uint16(xArgRM32), - /*9624*/ uint16(xArgImm8), - /*9625*/ uint16(xMatch), - /*9626*/ uint16(xCondDataSize), 9614, 9620, 9630, - /*9630*/ uint16(xSetOp), uint16(OR), - /*9632*/ uint16(xReadIb), - /*9633*/ uint16(xArgRM64), - /*9634*/ uint16(xArgImm8), - /*9635*/ uint16(xMatch), - /*9636*/ uint16(xCondIs64), 9639, 9655, - /*9639*/ uint16(xCondDataSize), 9643, 9649, 0, - /*9643*/ uint16(xSetOp), uint16(ADC), - /*9645*/ uint16(xReadIb), - /*9646*/ uint16(xArgRM16), - /*9647*/ uint16(xArgImm8), - /*9648*/ uint16(xMatch), - /*9649*/ uint16(xSetOp), uint16(ADC), - /*9651*/ uint16(xReadIb), - /*9652*/ uint16(xArgRM32), - /*9653*/ uint16(xArgImm8), - /*9654*/ uint16(xMatch), - /*9655*/ uint16(xCondDataSize), 9643, 9649, 9659, - /*9659*/ uint16(xSetOp), uint16(ADC), - /*9661*/ uint16(xReadIb), - /*9662*/ uint16(xArgRM64), - /*9663*/ uint16(xArgImm8), - /*9664*/ uint16(xMatch), - /*9665*/ uint16(xCondIs64), 9668, 9684, - /*9668*/ uint16(xCondDataSize), 9672, 9678, 0, - /*9672*/ uint16(xSetOp), uint16(SBB), - /*9674*/ uint16(xReadIb), - /*9675*/ uint16(xArgRM16), - /*9676*/ uint16(xArgImm8), - /*9677*/ uint16(xMatch), - /*9678*/ uint16(xSetOp), uint16(SBB), - /*9680*/ uint16(xReadIb), - /*9681*/ uint16(xArgRM32), - /*9682*/ uint16(xArgImm8), - /*9683*/ uint16(xMatch), - /*9684*/ uint16(xCondDataSize), 9672, 9678, 9688, - /*9688*/ uint16(xSetOp), uint16(SBB), - /*9690*/ uint16(xReadIb), - /*9691*/ uint16(xArgRM64), - /*9692*/ uint16(xArgImm8), - /*9693*/ uint16(xMatch), - /*9694*/ uint16(xCondIs64), 9697, 9713, - /*9697*/ uint16(xCondDataSize), 9701, 9707, 0, - /*9701*/ uint16(xSetOp), uint16(AND), - /*9703*/ uint16(xReadIb), - /*9704*/ uint16(xArgRM16), - /*9705*/ uint16(xArgImm8), - /*9706*/ uint16(xMatch), - /*9707*/ uint16(xSetOp), uint16(AND), - /*9709*/ uint16(xReadIb), - /*9710*/ uint16(xArgRM32), - /*9711*/ uint16(xArgImm8), - /*9712*/ uint16(xMatch), - /*9713*/ uint16(xCondDataSize), 9701, 9707, 9717, - /*9717*/ uint16(xSetOp), uint16(AND), - /*9719*/ uint16(xReadIb), - /*9720*/ uint16(xArgRM64), - /*9721*/ uint16(xArgImm8), - /*9722*/ uint16(xMatch), - /*9723*/ uint16(xCondIs64), 9726, 9742, - /*9726*/ uint16(xCondDataSize), 9730, 9736, 0, - /*9730*/ uint16(xSetOp), uint16(SUB), - /*9732*/ uint16(xReadIb), - /*9733*/ uint16(xArgRM16), - /*9734*/ uint16(xArgImm8), - /*9735*/ uint16(xMatch), - /*9736*/ uint16(xSetOp), uint16(SUB), - /*9738*/ uint16(xReadIb), - /*9739*/ uint16(xArgRM32), - /*9740*/ uint16(xArgImm8), - /*9741*/ uint16(xMatch), - /*9742*/ uint16(xCondDataSize), 9730, 9736, 9746, - /*9746*/ uint16(xSetOp), uint16(SUB), - /*9748*/ uint16(xReadIb), - /*9749*/ uint16(xArgRM64), - /*9750*/ uint16(xArgImm8), - /*9751*/ uint16(xMatch), - /*9752*/ uint16(xCondIs64), 9755, 9771, - /*9755*/ uint16(xCondDataSize), 9759, 9765, 0, - /*9759*/ uint16(xSetOp), uint16(XOR), - /*9761*/ uint16(xReadIb), - /*9762*/ uint16(xArgRM16), - /*9763*/ uint16(xArgImm8), - /*9764*/ uint16(xMatch), - /*9765*/ uint16(xSetOp), uint16(XOR), - /*9767*/ uint16(xReadIb), - /*9768*/ uint16(xArgRM32), - /*9769*/ uint16(xArgImm8), - /*9770*/ uint16(xMatch), - /*9771*/ uint16(xCondDataSize), 9759, 9765, 9775, - /*9775*/ uint16(xSetOp), uint16(XOR), - /*9777*/ uint16(xReadIb), - /*9778*/ uint16(xArgRM64), - /*9779*/ uint16(xArgImm8), - /*9780*/ uint16(xMatch), - /*9781*/ uint16(xCondIs64), 9784, 9800, - /*9784*/ uint16(xCondDataSize), 9788, 9794, 0, - /*9788*/ uint16(xSetOp), uint16(CMP), - /*9790*/ uint16(xReadIb), - /*9791*/ uint16(xArgRM16), - /*9792*/ uint16(xArgImm8), - /*9793*/ uint16(xMatch), - /*9794*/ uint16(xSetOp), uint16(CMP), - /*9796*/ uint16(xReadIb), - /*9797*/ uint16(xArgRM32), - /*9798*/ uint16(xArgImm8), - /*9799*/ uint16(xMatch), - /*9800*/ uint16(xCondDataSize), 9788, 9794, 9804, - /*9804*/ uint16(xSetOp), uint16(CMP), - /*9806*/ uint16(xReadIb), - /*9807*/ uint16(xArgRM64), - /*9808*/ uint16(xArgImm8), - /*9809*/ uint16(xMatch), - /*9810*/ uint16(xSetOp), uint16(TEST), - /*9812*/ uint16(xReadSlashR), - /*9813*/ uint16(xArgRM8), - /*9814*/ uint16(xArgR8), - /*9815*/ uint16(xMatch), - /*9816*/ uint16(xCondIs64), 9819, 9835, - /*9819*/ uint16(xCondDataSize), 9823, 9829, 0, - /*9823*/ uint16(xSetOp), uint16(TEST), - /*9825*/ uint16(xReadSlashR), - /*9826*/ uint16(xArgRM16), - /*9827*/ uint16(xArgR16), - /*9828*/ uint16(xMatch), - /*9829*/ uint16(xSetOp), uint16(TEST), - /*9831*/ uint16(xReadSlashR), - /*9832*/ uint16(xArgRM32), - /*9833*/ uint16(xArgR32), - /*9834*/ uint16(xMatch), - /*9835*/ uint16(xCondDataSize), 9823, 9829, 9839, - /*9839*/ uint16(xSetOp), uint16(TEST), - /*9841*/ uint16(xReadSlashR), - /*9842*/ uint16(xArgRM64), - /*9843*/ uint16(xArgR64), - /*9844*/ uint16(xMatch), - /*9845*/ uint16(xSetOp), uint16(XCHG), - /*9847*/ uint16(xReadSlashR), - /*9848*/ uint16(xArgRM8), - /*9849*/ uint16(xArgR8), - /*9850*/ uint16(xMatch), - /*9851*/ uint16(xCondIs64), 9854, 9870, - /*9854*/ uint16(xCondDataSize), 9858, 9864, 0, - /*9858*/ uint16(xSetOp), uint16(XCHG), - /*9860*/ uint16(xReadSlashR), - /*9861*/ uint16(xArgRM16), - /*9862*/ uint16(xArgR16), - /*9863*/ uint16(xMatch), - /*9864*/ uint16(xSetOp), uint16(XCHG), - /*9866*/ uint16(xReadSlashR), - /*9867*/ uint16(xArgRM32), - /*9868*/ uint16(xArgR32), - /*9869*/ uint16(xMatch), - /*9870*/ uint16(xCondDataSize), 9858, 9864, 9874, - /*9874*/ uint16(xSetOp), uint16(XCHG), - /*9876*/ uint16(xReadSlashR), - /*9877*/ uint16(xArgRM64), - /*9878*/ uint16(xArgR64), - /*9879*/ uint16(xMatch), - /*9880*/ uint16(xSetOp), uint16(MOV), - /*9882*/ uint16(xReadSlashR), - /*9883*/ uint16(xArgRM8), - /*9884*/ uint16(xArgR8), - /*9885*/ uint16(xMatch), - /*9886*/ uint16(xCondDataSize), 9890, 9896, 9902, - /*9890*/ uint16(xSetOp), uint16(MOV), - /*9892*/ uint16(xReadSlashR), - /*9893*/ uint16(xArgRM16), - /*9894*/ uint16(xArgR16), - /*9895*/ uint16(xMatch), - /*9896*/ uint16(xSetOp), uint16(MOV), - /*9898*/ uint16(xReadSlashR), - /*9899*/ uint16(xArgRM32), - /*9900*/ uint16(xArgR32), - /*9901*/ uint16(xMatch), - /*9902*/ uint16(xSetOp), uint16(MOV), - /*9904*/ uint16(xReadSlashR), - /*9905*/ uint16(xArgRM64), - /*9906*/ uint16(xArgR64), - /*9907*/ uint16(xMatch), - /*9908*/ uint16(xSetOp), uint16(MOV), - /*9910*/ uint16(xReadSlashR), - /*9911*/ uint16(xArgR8), - /*9912*/ uint16(xArgRM8), - /*9913*/ uint16(xMatch), - /*9914*/ uint16(xCondDataSize), 9918, 9924, 9930, - /*9918*/ uint16(xSetOp), uint16(MOV), - /*9920*/ uint16(xReadSlashR), - /*9921*/ uint16(xArgR16), + /*9559*/ uint16(xSetOp), uint16(SBB), + /*9561*/ uint16(xReadIb), + /*9562*/ uint16(xArgRM32), + /*9563*/ uint16(xArgImm8), + /*9564*/ uint16(xMatch), + /*9565*/ uint16(xCondDataSize), 9553, 9559, 9569, + /*9569*/ uint16(xSetOp), uint16(SBB), + /*9571*/ uint16(xReadIb), + /*9572*/ uint16(xArgRM64), + /*9573*/ uint16(xArgImm8), + /*9574*/ uint16(xMatch), + /*9575*/ uint16(xCondIs64), 9578, 9594, + /*9578*/ uint16(xCondDataSize), 9582, 9588, 0, + /*9582*/ uint16(xSetOp), uint16(AND), + /*9584*/ uint16(xReadIb), + /*9585*/ uint16(xArgRM16), + /*9586*/ uint16(xArgImm8), + /*9587*/ uint16(xMatch), + /*9588*/ uint16(xSetOp), uint16(AND), + /*9590*/ uint16(xReadIb), + /*9591*/ uint16(xArgRM32), + /*9592*/ uint16(xArgImm8), + /*9593*/ uint16(xMatch), + /*9594*/ uint16(xCondDataSize), 9582, 9588, 9598, + /*9598*/ uint16(xSetOp), uint16(AND), + /*9600*/ uint16(xReadIb), + /*9601*/ uint16(xArgRM64), + /*9602*/ uint16(xArgImm8), + /*9603*/ uint16(xMatch), + /*9604*/ uint16(xCondIs64), 9607, 9623, + /*9607*/ uint16(xCondDataSize), 9611, 9617, 0, + /*9611*/ uint16(xSetOp), uint16(SUB), + /*9613*/ uint16(xReadIb), + /*9614*/ uint16(xArgRM16), + /*9615*/ uint16(xArgImm8), + /*9616*/ uint16(xMatch), + /*9617*/ uint16(xSetOp), uint16(SUB), + /*9619*/ uint16(xReadIb), + /*9620*/ uint16(xArgRM32), + /*9621*/ uint16(xArgImm8), + /*9622*/ uint16(xMatch), + /*9623*/ uint16(xCondDataSize), 9611, 9617, 9627, + /*9627*/ uint16(xSetOp), uint16(SUB), + /*9629*/ uint16(xReadIb), + /*9630*/ uint16(xArgRM64), + /*9631*/ uint16(xArgImm8), + /*9632*/ uint16(xMatch), + /*9633*/ uint16(xCondIs64), 9636, 9652, + /*9636*/ uint16(xCondDataSize), 9640, 9646, 0, + /*9640*/ uint16(xSetOp), uint16(XOR), + /*9642*/ uint16(xReadIb), + /*9643*/ uint16(xArgRM16), + /*9644*/ uint16(xArgImm8), + /*9645*/ uint16(xMatch), + /*9646*/ uint16(xSetOp), uint16(XOR), + /*9648*/ uint16(xReadIb), + /*9649*/ uint16(xArgRM32), + /*9650*/ uint16(xArgImm8), + /*9651*/ uint16(xMatch), + /*9652*/ uint16(xCondDataSize), 9640, 9646, 9656, + /*9656*/ uint16(xSetOp), uint16(XOR), + /*9658*/ uint16(xReadIb), + /*9659*/ uint16(xArgRM64), + /*9660*/ uint16(xArgImm8), + /*9661*/ uint16(xMatch), + /*9662*/ uint16(xCondIs64), 9665, 9681, + /*9665*/ uint16(xCondDataSize), 9669, 9675, 0, + /*9669*/ uint16(xSetOp), uint16(CMP), + /*9671*/ uint16(xReadIb), + /*9672*/ uint16(xArgRM16), + /*9673*/ uint16(xArgImm8), + /*9674*/ uint16(xMatch), + /*9675*/ uint16(xSetOp), uint16(CMP), + /*9677*/ uint16(xReadIb), + /*9678*/ uint16(xArgRM32), + /*9679*/ uint16(xArgImm8), + /*9680*/ uint16(xMatch), + /*9681*/ uint16(xCondDataSize), 9669, 9675, 9685, + /*9685*/ uint16(xSetOp), uint16(CMP), + /*9687*/ uint16(xReadIb), + /*9688*/ uint16(xArgRM64), + /*9689*/ uint16(xArgImm8), + /*9690*/ uint16(xMatch), + /*9691*/ uint16(xSetOp), uint16(TEST), + /*9693*/ uint16(xReadSlashR), + /*9694*/ uint16(xArgRM8), + /*9695*/ uint16(xArgR8), + /*9696*/ uint16(xMatch), + /*9697*/ uint16(xCondIs64), 9700, 9716, + /*9700*/ uint16(xCondDataSize), 9704, 9710, 0, + /*9704*/ uint16(xSetOp), uint16(TEST), + /*9706*/ uint16(xReadSlashR), + /*9707*/ uint16(xArgRM16), + /*9708*/ uint16(xArgR16), + /*9709*/ uint16(xMatch), + /*9710*/ uint16(xSetOp), uint16(TEST), + /*9712*/ uint16(xReadSlashR), + /*9713*/ uint16(xArgRM32), + /*9714*/ uint16(xArgR32), + /*9715*/ uint16(xMatch), + /*9716*/ uint16(xCondDataSize), 9704, 9710, 9720, + /*9720*/ uint16(xSetOp), uint16(TEST), + /*9722*/ uint16(xReadSlashR), + /*9723*/ uint16(xArgRM64), + /*9724*/ uint16(xArgR64), + /*9725*/ uint16(xMatch), + /*9726*/ uint16(xSetOp), uint16(XCHG), + /*9728*/ uint16(xReadSlashR), + /*9729*/ uint16(xArgRM8), + /*9730*/ uint16(xArgR8), + /*9731*/ uint16(xMatch), + /*9732*/ uint16(xCondIs64), 9735, 9751, + /*9735*/ uint16(xCondDataSize), 9739, 9745, 0, + /*9739*/ uint16(xSetOp), uint16(XCHG), + /*9741*/ uint16(xReadSlashR), + /*9742*/ uint16(xArgRM16), + /*9743*/ uint16(xArgR16), + /*9744*/ uint16(xMatch), + /*9745*/ uint16(xSetOp), uint16(XCHG), + /*9747*/ uint16(xReadSlashR), + /*9748*/ uint16(xArgRM32), + /*9749*/ uint16(xArgR32), + /*9750*/ uint16(xMatch), + /*9751*/ uint16(xCondDataSize), 9739, 9745, 9755, + /*9755*/ uint16(xSetOp), uint16(XCHG), + /*9757*/ uint16(xReadSlashR), + /*9758*/ uint16(xArgRM64), + /*9759*/ uint16(xArgR64), + /*9760*/ uint16(xMatch), + /*9761*/ uint16(xSetOp), uint16(MOV), + /*9763*/ uint16(xReadSlashR), + /*9764*/ uint16(xArgRM8), + /*9765*/ uint16(xArgR8), + /*9766*/ uint16(xMatch), + /*9767*/ uint16(xCondDataSize), 9771, 9777, 9783, + /*9771*/ uint16(xSetOp), uint16(MOV), + /*9773*/ uint16(xReadSlashR), + /*9774*/ uint16(xArgRM16), + /*9775*/ uint16(xArgR16), + /*9776*/ uint16(xMatch), + /*9777*/ uint16(xSetOp), uint16(MOV), + /*9779*/ uint16(xReadSlashR), + /*9780*/ uint16(xArgRM32), + /*9781*/ uint16(xArgR32), + /*9782*/ uint16(xMatch), + /*9783*/ uint16(xSetOp), uint16(MOV), + /*9785*/ uint16(xReadSlashR), + /*9786*/ uint16(xArgRM64), + /*9787*/ uint16(xArgR64), + /*9788*/ uint16(xMatch), + /*9789*/ uint16(xSetOp), uint16(MOV), + /*9791*/ uint16(xReadSlashR), + /*9792*/ uint16(xArgR8), + /*9793*/ uint16(xArgRM8), + /*9794*/ uint16(xMatch), + /*9795*/ uint16(xCondDataSize), 9799, 9805, 9811, + /*9799*/ uint16(xSetOp), uint16(MOV), + /*9801*/ uint16(xReadSlashR), + /*9802*/ uint16(xArgR16), + /*9803*/ uint16(xArgRM16), + /*9804*/ uint16(xMatch), + /*9805*/ uint16(xSetOp), uint16(MOV), + /*9807*/ uint16(xReadSlashR), + /*9808*/ uint16(xArgR32), + /*9809*/ uint16(xArgRM32), + /*9810*/ uint16(xMatch), + /*9811*/ uint16(xSetOp), uint16(MOV), + /*9813*/ uint16(xReadSlashR), + /*9814*/ uint16(xArgR64), + /*9815*/ uint16(xArgRM64), + /*9816*/ uint16(xMatch), + /*9817*/ uint16(xCondIs64), 9820, 9836, + /*9820*/ uint16(xCondDataSize), 9824, 9830, 0, + /*9824*/ uint16(xSetOp), uint16(MOV), + /*9826*/ uint16(xReadSlashR), + /*9827*/ uint16(xArgRM16), + /*9828*/ uint16(xArgSreg), + /*9829*/ uint16(xMatch), + /*9830*/ uint16(xSetOp), uint16(MOV), + /*9832*/ uint16(xReadSlashR), + /*9833*/ uint16(xArgR32M16), + /*9834*/ uint16(xArgSreg), + /*9835*/ uint16(xMatch), + /*9836*/ uint16(xCondDataSize), 9824, 9830, 9840, + /*9840*/ uint16(xSetOp), uint16(MOV), + /*9842*/ uint16(xReadSlashR), + /*9843*/ uint16(xArgR64M16), + /*9844*/ uint16(xArgSreg), + /*9845*/ uint16(xMatch), + /*9846*/ uint16(xCondIs64), 9849, 9865, + /*9849*/ uint16(xCondDataSize), 9853, 9859, 0, + /*9853*/ uint16(xSetOp), uint16(LEA), + /*9855*/ uint16(xReadSlashR), + /*9856*/ uint16(xArgR16), + /*9857*/ uint16(xArgM), + /*9858*/ uint16(xMatch), + /*9859*/ uint16(xSetOp), uint16(LEA), + /*9861*/ uint16(xReadSlashR), + /*9862*/ uint16(xArgR32), + /*9863*/ uint16(xArgM), + /*9864*/ uint16(xMatch), + /*9865*/ uint16(xCondDataSize), 9853, 9859, 9869, + /*9869*/ uint16(xSetOp), uint16(LEA), + /*9871*/ uint16(xReadSlashR), + /*9872*/ uint16(xArgR64), + /*9873*/ uint16(xArgM), + /*9874*/ uint16(xMatch), + /*9875*/ uint16(xCondIs64), 9878, 9894, + /*9878*/ uint16(xCondDataSize), 9882, 9888, 0, + /*9882*/ uint16(xSetOp), uint16(MOV), + /*9884*/ uint16(xReadSlashR), + /*9885*/ uint16(xArgSreg), + /*9886*/ uint16(xArgRM16), + /*9887*/ uint16(xMatch), + /*9888*/ uint16(xSetOp), uint16(MOV), + /*9890*/ uint16(xReadSlashR), + /*9891*/ uint16(xArgSreg), + /*9892*/ uint16(xArgR32M16), + /*9893*/ uint16(xMatch), + /*9894*/ uint16(xCondDataSize), 9882, 9888, 9898, + /*9898*/ uint16(xSetOp), uint16(MOV), + /*9900*/ uint16(xReadSlashR), + /*9901*/ uint16(xArgSreg), + /*9902*/ uint16(xArgR64M16), + /*9903*/ uint16(xMatch), + /*9904*/ uint16(xCondSlashR), + 9913, // 0 + 0, // 1 + 0, // 2 + 0, // 3 + 0, // 4 + 0, // 5 + 0, // 6 + 0, // 7 + /*9913*/ uint16(xCondIs64), 9916, 9928, + /*9916*/ uint16(xCondDataSize), 9920, 9924, 0, + /*9920*/ uint16(xSetOp), uint16(POP), /*9922*/ uint16(xArgRM16), /*9923*/ uint16(xMatch), - /*9924*/ uint16(xSetOp), uint16(MOV), - /*9926*/ uint16(xReadSlashR), - /*9927*/ uint16(xArgR32), - /*9928*/ uint16(xArgRM32), - /*9929*/ uint16(xMatch), - /*9930*/ uint16(xSetOp), uint16(MOV), - /*9932*/ uint16(xReadSlashR), - /*9933*/ uint16(xArgR64), + /*9924*/ uint16(xSetOp), uint16(POP), + /*9926*/ uint16(xArgRM32), + /*9927*/ uint16(xMatch), + /*9928*/ uint16(xCondDataSize), 9920, 9932, 9936, + /*9932*/ uint16(xSetOp), uint16(POP), /*9934*/ uint16(xArgRM64), /*9935*/ uint16(xMatch), - /*9936*/ uint16(xCondIs64), 9939, 9955, - /*9939*/ uint16(xCondDataSize), 9943, 9949, 0, - /*9943*/ uint16(xSetOp), uint16(MOV), - /*9945*/ uint16(xReadSlashR), - /*9946*/ uint16(xArgRM16), - /*9947*/ uint16(xArgSreg), - /*9948*/ uint16(xMatch), - /*9949*/ uint16(xSetOp), uint16(MOV), - /*9951*/ uint16(xReadSlashR), - /*9952*/ uint16(xArgR32M16), - /*9953*/ uint16(xArgSreg), - /*9954*/ uint16(xMatch), - /*9955*/ uint16(xCondDataSize), 9943, 9949, 9959, - /*9959*/ uint16(xSetOp), uint16(MOV), - /*9961*/ uint16(xReadSlashR), - /*9962*/ uint16(xArgR64M16), - /*9963*/ uint16(xArgSreg), - /*9964*/ uint16(xMatch), - /*9965*/ uint16(xCondIs64), 9968, 9984, - /*9968*/ uint16(xCondDataSize), 9972, 9978, 0, - /*9972*/ uint16(xSetOp), uint16(LEA), - /*9974*/ uint16(xReadSlashR), - /*9975*/ uint16(xArgR16), - /*9976*/ uint16(xArgM), - /*9977*/ uint16(xMatch), - /*9978*/ uint16(xSetOp), uint16(LEA), - /*9980*/ uint16(xReadSlashR), - /*9981*/ uint16(xArgR32), - /*9982*/ uint16(xArgM), - /*9983*/ uint16(xMatch), - /*9984*/ uint16(xCondDataSize), 9972, 9978, 9988, - /*9988*/ uint16(xSetOp), uint16(LEA), - /*9990*/ uint16(xReadSlashR), - /*9991*/ uint16(xArgR64), - /*9992*/ uint16(xArgM), - /*9993*/ uint16(xMatch), - /*9994*/ uint16(xCondIs64), 9997, 10013, - /*9997*/ uint16(xCondDataSize), 10001, 10007, 0, - /*10001*/ uint16(xSetOp), uint16(MOV), - /*10003*/ uint16(xReadSlashR), - /*10004*/ uint16(xArgSreg), - /*10005*/ uint16(xArgRM16), - /*10006*/ uint16(xMatch), - /*10007*/ uint16(xSetOp), uint16(MOV), - /*10009*/ uint16(xReadSlashR), - /*10010*/ uint16(xArgSreg), - /*10011*/ uint16(xArgR32M16), - /*10012*/ uint16(xMatch), - /*10013*/ uint16(xCondDataSize), 10001, 10007, 10017, - /*10017*/ uint16(xSetOp), uint16(MOV), - /*10019*/ uint16(xReadSlashR), - /*10020*/ uint16(xArgSreg), - /*10021*/ uint16(xArgR64M16), + /*9936*/ uint16(xSetOp), uint16(POP), + /*9938*/ uint16(xArgRM64), + /*9939*/ uint16(xMatch), + /*9940*/ uint16(xCondIs64), 9943, 9957, + /*9943*/ uint16(xCondDataSize), 9947, 9952, 0, + /*9947*/ uint16(xSetOp), uint16(XCHG), + /*9949*/ uint16(xArgR16op), + /*9950*/ uint16(xArgAX), + /*9951*/ uint16(xMatch), + /*9952*/ uint16(xSetOp), uint16(XCHG), + /*9954*/ uint16(xArgR32op), + /*9955*/ uint16(xArgEAX), + /*9956*/ uint16(xMatch), + /*9957*/ uint16(xCondDataSize), 9947, 9952, 9961, + /*9961*/ uint16(xSetOp), uint16(XCHG), + /*9963*/ uint16(xArgR64op), + /*9964*/ uint16(xArgRAX), + /*9965*/ uint16(xMatch), + /*9966*/ uint16(xCondIs64), 9969, 9979, + /*9969*/ uint16(xCondDataSize), 9973, 9976, 0, + /*9973*/ uint16(xSetOp), uint16(CBW), + /*9975*/ uint16(xMatch), + /*9976*/ uint16(xSetOp), uint16(CWDE), + /*9978*/ uint16(xMatch), + /*9979*/ uint16(xCondDataSize), 9973, 9976, 9983, + /*9983*/ uint16(xSetOp), uint16(CDQE), + /*9985*/ uint16(xMatch), + /*9986*/ uint16(xCondIs64), 9989, 9999, + /*9989*/ uint16(xCondDataSize), 9993, 9996, 0, + /*9993*/ uint16(xSetOp), uint16(CWD), + /*9995*/ uint16(xMatch), + /*9996*/ uint16(xSetOp), uint16(CDQ), + /*9998*/ uint16(xMatch), + /*9999*/ uint16(xCondDataSize), 9993, 9996, 10003, + /*10003*/ uint16(xSetOp), uint16(CQO), + /*10005*/ uint16(xMatch), + /*10006*/ uint16(xCondIs64), 10009, 0, + /*10009*/ uint16(xCondDataSize), 10013, 10018, 0, + /*10013*/ uint16(xSetOp), uint16(LCALL), + /*10015*/ uint16(xReadCd), + /*10016*/ uint16(xArgPtr16colon16), + /*10017*/ uint16(xMatch), + /*10018*/ uint16(xSetOp), uint16(LCALL), + /*10020*/ uint16(xReadCp), + /*10021*/ uint16(xArgPtr16colon32), /*10022*/ uint16(xMatch), - /*10023*/ uint16(xCondSlashR), - 10032, // 0 - 0, // 1 - 0, // 2 - 0, // 3 - 0, // 4 - 0, // 5 - 0, // 6 - 0, // 7 - /*10032*/ uint16(xCondIs64), 10035, 10047, - /*10035*/ uint16(xCondDataSize), 10039, 10043, 0, - /*10039*/ uint16(xSetOp), uint16(POP), - /*10041*/ uint16(xArgRM16), - /*10042*/ uint16(xMatch), - /*10043*/ uint16(xSetOp), uint16(POP), - /*10045*/ uint16(xArgRM32), - /*10046*/ uint16(xMatch), - /*10047*/ uint16(xCondDataSize), 10039, 10051, 10055, - /*10051*/ uint16(xSetOp), uint16(POP), - /*10053*/ uint16(xArgRM64), - /*10054*/ uint16(xMatch), - /*10055*/ uint16(xSetOp), uint16(POP), - /*10057*/ uint16(xArgRM64), + /*10023*/ uint16(xSetOp), uint16(FWAIT), + /*10025*/ uint16(xMatch), + /*10026*/ uint16(xCondIs64), 10029, 10039, + /*10029*/ uint16(xCondDataSize), 10033, 10036, 0, + /*10033*/ uint16(xSetOp), uint16(PUSHF), + /*10035*/ uint16(xMatch), + /*10036*/ uint16(xSetOp), uint16(PUSHFD), + /*10038*/ uint16(xMatch), + /*10039*/ uint16(xCondDataSize), 10033, 10043, 10046, + /*10043*/ uint16(xSetOp), uint16(PUSHFQ), + /*10045*/ uint16(xMatch), + /*10046*/ uint16(xSetOp), uint16(PUSHFQ), + /*10048*/ uint16(xMatch), + /*10049*/ uint16(xCondIs64), 10052, 10062, + /*10052*/ uint16(xCondDataSize), 10056, 10059, 0, + /*10056*/ uint16(xSetOp), uint16(POPF), /*10058*/ uint16(xMatch), - /*10059*/ uint16(xCondIs64), 10062, 10076, - /*10062*/ uint16(xCondDataSize), 10066, 10071, 0, - /*10066*/ uint16(xSetOp), uint16(XCHG), - /*10068*/ uint16(xArgR16op), - /*10069*/ uint16(xArgAX), - /*10070*/ uint16(xMatch), - /*10071*/ uint16(xSetOp), uint16(XCHG), - /*10073*/ uint16(xArgR32op), - /*10074*/ uint16(xArgEAX), - /*10075*/ uint16(xMatch), - /*10076*/ uint16(xCondDataSize), 10066, 10071, 10080, - /*10080*/ uint16(xSetOp), uint16(XCHG), - /*10082*/ uint16(xArgR64op), - /*10083*/ uint16(xArgRAX), - /*10084*/ uint16(xMatch), - /*10085*/ uint16(xCondIs64), 10088, 10098, - /*10088*/ uint16(xCondDataSize), 10092, 10095, 0, - /*10092*/ uint16(xSetOp), uint16(CBW), - /*10094*/ uint16(xMatch), - /*10095*/ uint16(xSetOp), uint16(CWDE), - /*10097*/ uint16(xMatch), - /*10098*/ uint16(xCondDataSize), 10092, 10095, 10102, - /*10102*/ uint16(xSetOp), uint16(CDQE), - /*10104*/ uint16(xMatch), - /*10105*/ uint16(xCondIs64), 10108, 10118, - /*10108*/ uint16(xCondDataSize), 10112, 10115, 0, - /*10112*/ uint16(xSetOp), uint16(CWD), - /*10114*/ uint16(xMatch), - /*10115*/ uint16(xSetOp), uint16(CDQ), - /*10117*/ uint16(xMatch), - /*10118*/ uint16(xCondDataSize), 10112, 10115, 10122, - /*10122*/ uint16(xSetOp), uint16(CQO), - /*10124*/ uint16(xMatch), - /*10125*/ uint16(xCondIs64), 10128, 0, - /*10128*/ uint16(xCondDataSize), 10132, 10137, 0, - /*10132*/ uint16(xSetOp), uint16(LCALL), - /*10134*/ uint16(xReadCd), - /*10135*/ uint16(xArgPtr16colon16), - /*10136*/ uint16(xMatch), - /*10137*/ uint16(xSetOp), uint16(LCALL), - /*10139*/ uint16(xReadCp), - /*10140*/ uint16(xArgPtr16colon32), - /*10141*/ uint16(xMatch), - /*10142*/ uint16(xSetOp), uint16(FWAIT), - /*10144*/ uint16(xMatch), - /*10145*/ uint16(xCondIs64), 10148, 10158, - /*10148*/ uint16(xCondDataSize), 10152, 10155, 0, - /*10152*/ uint16(xSetOp), uint16(PUSHF), - /*10154*/ uint16(xMatch), - /*10155*/ uint16(xSetOp), uint16(PUSHFD), - /*10157*/ uint16(xMatch), - /*10158*/ uint16(xCondDataSize), 10152, 10162, 10165, - /*10162*/ uint16(xSetOp), uint16(PUSHFQ), - /*10164*/ uint16(xMatch), - /*10165*/ uint16(xSetOp), uint16(PUSHFQ), - /*10167*/ uint16(xMatch), - /*10168*/ uint16(xCondIs64), 10171, 10181, - /*10171*/ uint16(xCondDataSize), 10175, 10178, 0, - /*10175*/ uint16(xSetOp), uint16(POPF), - /*10177*/ uint16(xMatch), - /*10178*/ uint16(xSetOp), uint16(POPFD), - /*10180*/ uint16(xMatch), - /*10181*/ uint16(xCondDataSize), 10175, 10185, 10188, - /*10185*/ uint16(xSetOp), uint16(POPFQ), - /*10187*/ uint16(xMatch), - /*10188*/ uint16(xSetOp), uint16(POPFQ), - /*10190*/ uint16(xMatch), - /*10191*/ uint16(xSetOp), uint16(SAHF), - /*10193*/ uint16(xMatch), - /*10194*/ uint16(xSetOp), uint16(LAHF), - /*10196*/ uint16(xMatch), - /*10197*/ uint16(xCondIs64), 10200, 10206, - /*10200*/ uint16(xSetOp), uint16(MOV), - /*10202*/ uint16(xReadCm), - /*10203*/ uint16(xArgAL), - /*10204*/ uint16(xArgMoffs8), + /*10059*/ uint16(xSetOp), uint16(POPFD), + /*10061*/ uint16(xMatch), + /*10062*/ uint16(xCondDataSize), 10056, 10066, 10069, + /*10066*/ uint16(xSetOp), uint16(POPFQ), + /*10068*/ uint16(xMatch), + /*10069*/ uint16(xSetOp), uint16(POPFQ), + /*10071*/ uint16(xMatch), + /*10072*/ uint16(xSetOp), uint16(SAHF), + /*10074*/ uint16(xMatch), + /*10075*/ uint16(xSetOp), uint16(LAHF), + /*10077*/ uint16(xMatch), + /*10078*/ uint16(xCondIs64), 10081, 10087, + /*10081*/ uint16(xSetOp), uint16(MOV), + /*10083*/ uint16(xReadCm), + /*10084*/ uint16(xArgAL), + /*10085*/ uint16(xArgMoffs8), + /*10086*/ uint16(xMatch), + /*10087*/ uint16(xCondDataSize), 10081, 10081, 10091, + /*10091*/ uint16(xSetOp), uint16(MOV), + /*10093*/ uint16(xReadCm), + /*10094*/ uint16(xArgAL), + /*10095*/ uint16(xArgMoffs8), + /*10096*/ uint16(xMatch), + /*10097*/ uint16(xCondDataSize), 10101, 10107, 10113, + /*10101*/ uint16(xSetOp), uint16(MOV), + /*10103*/ uint16(xReadCm), + /*10104*/ uint16(xArgAX), + /*10105*/ uint16(xArgMoffs16), + /*10106*/ uint16(xMatch), + /*10107*/ uint16(xSetOp), uint16(MOV), + /*10109*/ uint16(xReadCm), + /*10110*/ uint16(xArgEAX), + /*10111*/ uint16(xArgMoffs32), + /*10112*/ uint16(xMatch), + /*10113*/ uint16(xSetOp), uint16(MOV), + /*10115*/ uint16(xReadCm), + /*10116*/ uint16(xArgRAX), + /*10117*/ uint16(xArgMoffs64), + /*10118*/ uint16(xMatch), + /*10119*/ uint16(xCondIs64), 10122, 10128, + /*10122*/ uint16(xSetOp), uint16(MOV), + /*10124*/ uint16(xReadCm), + /*10125*/ uint16(xArgMoffs8), + /*10126*/ uint16(xArgAL), + /*10127*/ uint16(xMatch), + /*10128*/ uint16(xCondDataSize), 10122, 10122, 10132, + /*10132*/ uint16(xSetOp), uint16(MOV), + /*10134*/ uint16(xReadCm), + /*10135*/ uint16(xArgMoffs8), + /*10136*/ uint16(xArgAL), + /*10137*/ uint16(xMatch), + /*10138*/ uint16(xCondDataSize), 10142, 10148, 10154, + /*10142*/ uint16(xSetOp), uint16(MOV), + /*10144*/ uint16(xReadCm), + /*10145*/ uint16(xArgMoffs16), + /*10146*/ uint16(xArgAX), + /*10147*/ uint16(xMatch), + /*10148*/ uint16(xSetOp), uint16(MOV), + /*10150*/ uint16(xReadCm), + /*10151*/ uint16(xArgMoffs32), + /*10152*/ uint16(xArgEAX), + /*10153*/ uint16(xMatch), + /*10154*/ uint16(xSetOp), uint16(MOV), + /*10156*/ uint16(xReadCm), + /*10157*/ uint16(xArgMoffs64), + /*10158*/ uint16(xArgRAX), + /*10159*/ uint16(xMatch), + /*10160*/ uint16(xSetOp), uint16(MOVSB), + /*10162*/ uint16(xMatch), + /*10163*/ uint16(xCondIs64), 10166, 10176, + /*10166*/ uint16(xCondDataSize), 10170, 10173, 0, + /*10170*/ uint16(xSetOp), uint16(MOVSW), + /*10172*/ uint16(xMatch), + /*10173*/ uint16(xSetOp), uint16(MOVSD), + /*10175*/ uint16(xMatch), + /*10176*/ uint16(xCondDataSize), 10170, 10173, 10180, + /*10180*/ uint16(xSetOp), uint16(MOVSQ), + /*10182*/ uint16(xMatch), + /*10183*/ uint16(xSetOp), uint16(CMPSB), + /*10185*/ uint16(xMatch), + /*10186*/ uint16(xCondIs64), 10189, 10199, + /*10189*/ uint16(xCondDataSize), 10193, 10196, 0, + /*10193*/ uint16(xSetOp), uint16(CMPSW), + /*10195*/ uint16(xMatch), + /*10196*/ uint16(xSetOp), uint16(CMPSD), + /*10198*/ uint16(xMatch), + /*10199*/ uint16(xCondDataSize), 10193, 10196, 10203, + /*10203*/ uint16(xSetOp), uint16(CMPSQ), /*10205*/ uint16(xMatch), - /*10206*/ uint16(xCondDataSize), 10200, 10200, 10210, - /*10210*/ uint16(xSetOp), uint16(MOV), - /*10212*/ uint16(xReadCm), - /*10213*/ uint16(xArgAL), - /*10214*/ uint16(xArgMoffs8), - /*10215*/ uint16(xMatch), - /*10216*/ uint16(xCondDataSize), 10220, 10226, 10232, - /*10220*/ uint16(xSetOp), uint16(MOV), - /*10222*/ uint16(xReadCm), - /*10223*/ uint16(xArgAX), - /*10224*/ uint16(xArgMoffs16), - /*10225*/ uint16(xMatch), - /*10226*/ uint16(xSetOp), uint16(MOV), - /*10228*/ uint16(xReadCm), - /*10229*/ uint16(xArgEAX), - /*10230*/ uint16(xArgMoffs32), - /*10231*/ uint16(xMatch), - /*10232*/ uint16(xSetOp), uint16(MOV), - /*10234*/ uint16(xReadCm), - /*10235*/ uint16(xArgRAX), - /*10236*/ uint16(xArgMoffs64), - /*10237*/ uint16(xMatch), - /*10238*/ uint16(xCondIs64), 10241, 10247, - /*10241*/ uint16(xSetOp), uint16(MOV), - /*10243*/ uint16(xReadCm), - /*10244*/ uint16(xArgMoffs8), - /*10245*/ uint16(xArgAL), - /*10246*/ uint16(xMatch), - /*10247*/ uint16(xCondDataSize), 10241, 10241, 10251, - /*10251*/ uint16(xSetOp), uint16(MOV), - /*10253*/ uint16(xReadCm), - /*10254*/ uint16(xArgMoffs8), - /*10255*/ uint16(xArgAL), + /*10206*/ uint16(xSetOp), uint16(TEST), + /*10208*/ uint16(xReadIb), + /*10209*/ uint16(xArgAL), + /*10210*/ uint16(xArgImm8u), + /*10211*/ uint16(xMatch), + /*10212*/ uint16(xCondIs64), 10215, 10231, + /*10215*/ uint16(xCondDataSize), 10219, 10225, 0, + /*10219*/ uint16(xSetOp), uint16(TEST), + /*10221*/ uint16(xReadIw), + /*10222*/ uint16(xArgAX), + /*10223*/ uint16(xArgImm16), + /*10224*/ uint16(xMatch), + /*10225*/ uint16(xSetOp), uint16(TEST), + /*10227*/ uint16(xReadId), + /*10228*/ uint16(xArgEAX), + /*10229*/ uint16(xArgImm32), + /*10230*/ uint16(xMatch), + /*10231*/ uint16(xCondDataSize), 10219, 10225, 10235, + /*10235*/ uint16(xSetOp), uint16(TEST), + /*10237*/ uint16(xReadId), + /*10238*/ uint16(xArgRAX), + /*10239*/ uint16(xArgImm32), + /*10240*/ uint16(xMatch), + /*10241*/ uint16(xSetOp), uint16(STOSB), + /*10243*/ uint16(xMatch), + /*10244*/ uint16(xCondIs64), 10247, 10257, + /*10247*/ uint16(xCondDataSize), 10251, 10254, 0, + /*10251*/ uint16(xSetOp), uint16(STOSW), + /*10253*/ uint16(xMatch), + /*10254*/ uint16(xSetOp), uint16(STOSD), /*10256*/ uint16(xMatch), - /*10257*/ uint16(xCondDataSize), 10261, 10267, 10273, - /*10261*/ uint16(xSetOp), uint16(MOV), - /*10263*/ uint16(xReadCm), - /*10264*/ uint16(xArgMoffs16), - /*10265*/ uint16(xArgAX), + /*10257*/ uint16(xCondDataSize), 10251, 10254, 10261, + /*10261*/ uint16(xSetOp), uint16(STOSQ), + /*10263*/ uint16(xMatch), + /*10264*/ uint16(xSetOp), uint16(LODSB), /*10266*/ uint16(xMatch), - /*10267*/ uint16(xSetOp), uint16(MOV), - /*10269*/ uint16(xReadCm), - /*10270*/ uint16(xArgMoffs32), - /*10271*/ uint16(xArgEAX), - /*10272*/ uint16(xMatch), - /*10273*/ uint16(xSetOp), uint16(MOV), - /*10275*/ uint16(xReadCm), - /*10276*/ uint16(xArgMoffs64), - /*10277*/ uint16(xArgRAX), - /*10278*/ uint16(xMatch), - /*10279*/ uint16(xSetOp), uint16(MOVSB), - /*10281*/ uint16(xMatch), - /*10282*/ uint16(xCondIs64), 10285, 10295, - /*10285*/ uint16(xCondDataSize), 10289, 10292, 0, - /*10289*/ uint16(xSetOp), uint16(MOVSW), - /*10291*/ uint16(xMatch), - /*10292*/ uint16(xSetOp), uint16(MOVSD), - /*10294*/ uint16(xMatch), - /*10295*/ uint16(xCondDataSize), 10289, 10292, 10299, - /*10299*/ uint16(xSetOp), uint16(MOVSQ), - /*10301*/ uint16(xMatch), - /*10302*/ uint16(xSetOp), uint16(CMPSB), - /*10304*/ uint16(xMatch), - /*10305*/ uint16(xCondIs64), 10308, 10318, - /*10308*/ uint16(xCondDataSize), 10312, 10315, 0, - /*10312*/ uint16(xSetOp), uint16(CMPSW), - /*10314*/ uint16(xMatch), - /*10315*/ uint16(xSetOp), uint16(CMPSD), - /*10317*/ uint16(xMatch), - /*10318*/ uint16(xCondDataSize), 10312, 10315, 10322, - /*10322*/ uint16(xSetOp), uint16(CMPSQ), - /*10324*/ uint16(xMatch), - /*10325*/ uint16(xSetOp), uint16(TEST), - /*10327*/ uint16(xReadIb), - /*10328*/ uint16(xArgAL), - /*10329*/ uint16(xArgImm8u), - /*10330*/ uint16(xMatch), - /*10331*/ uint16(xCondIs64), 10334, 10350, - /*10334*/ uint16(xCondDataSize), 10338, 10344, 0, - /*10338*/ uint16(xSetOp), uint16(TEST), - /*10340*/ uint16(xReadIw), - /*10341*/ uint16(xArgAX), - /*10342*/ uint16(xArgImm16), - /*10343*/ uint16(xMatch), - /*10344*/ uint16(xSetOp), uint16(TEST), - /*10346*/ uint16(xReadId), - /*10347*/ uint16(xArgEAX), - /*10348*/ uint16(xArgImm32), - /*10349*/ uint16(xMatch), - /*10350*/ uint16(xCondDataSize), 10338, 10344, 10354, - /*10354*/ uint16(xSetOp), uint16(TEST), - /*10356*/ uint16(xReadId), - /*10357*/ uint16(xArgRAX), - /*10358*/ uint16(xArgImm32), + /*10267*/ uint16(xCondIs64), 10270, 10280, + /*10270*/ uint16(xCondDataSize), 10274, 10277, 0, + /*10274*/ uint16(xSetOp), uint16(LODSW), + /*10276*/ uint16(xMatch), + /*10277*/ uint16(xSetOp), uint16(LODSD), + /*10279*/ uint16(xMatch), + /*10280*/ uint16(xCondDataSize), 10274, 10277, 10284, + /*10284*/ uint16(xSetOp), uint16(LODSQ), + /*10286*/ uint16(xMatch), + /*10287*/ uint16(xSetOp), uint16(SCASB), + /*10289*/ uint16(xMatch), + /*10290*/ uint16(xCondIs64), 10293, 10303, + /*10293*/ uint16(xCondDataSize), 10297, 10300, 0, + /*10297*/ uint16(xSetOp), uint16(SCASW), + /*10299*/ uint16(xMatch), + /*10300*/ uint16(xSetOp), uint16(SCASD), + /*10302*/ uint16(xMatch), + /*10303*/ uint16(xCondDataSize), 10297, 10300, 10307, + /*10307*/ uint16(xSetOp), uint16(SCASQ), + /*10309*/ uint16(xMatch), + /*10310*/ uint16(xSetOp), uint16(MOV), + /*10312*/ uint16(xReadIb), + /*10313*/ uint16(xArgR8op), + /*10314*/ uint16(xArgImm8u), + /*10315*/ uint16(xMatch), + /*10316*/ uint16(xCondIs64), 10319, 10335, + /*10319*/ uint16(xCondDataSize), 10323, 10329, 0, + /*10323*/ uint16(xSetOp), uint16(MOV), + /*10325*/ uint16(xReadIw), + /*10326*/ uint16(xArgR16op), + /*10327*/ uint16(xArgImm16), + /*10328*/ uint16(xMatch), + /*10329*/ uint16(xSetOp), uint16(MOV), + /*10331*/ uint16(xReadId), + /*10332*/ uint16(xArgR32op), + /*10333*/ uint16(xArgImm32), + /*10334*/ uint16(xMatch), + /*10335*/ uint16(xCondDataSize), 10323, 10329, 10339, + /*10339*/ uint16(xSetOp), uint16(MOV), + /*10341*/ uint16(xReadIo), + /*10342*/ uint16(xArgR64op), + /*10343*/ uint16(xArgImm64), + /*10344*/ uint16(xMatch), + /*10345*/ uint16(xCondSlashR), + 10354, // 0 + 10360, // 1 + 10366, // 2 + 10372, // 3 + 10378, // 4 + 10384, // 5 + 0, // 6 + 10390, // 7 + /*10354*/ uint16(xSetOp), uint16(ROL), + /*10356*/ uint16(xReadIb), + /*10357*/ uint16(xArgRM8), + /*10358*/ uint16(xArgImm8u), /*10359*/ uint16(xMatch), - /*10360*/ uint16(xSetOp), uint16(STOSB), - /*10362*/ uint16(xMatch), - /*10363*/ uint16(xCondIs64), 10366, 10376, - /*10366*/ uint16(xCondDataSize), 10370, 10373, 0, - /*10370*/ uint16(xSetOp), uint16(STOSW), - /*10372*/ uint16(xMatch), - /*10373*/ uint16(xSetOp), uint16(STOSD), - /*10375*/ uint16(xMatch), - /*10376*/ uint16(xCondDataSize), 10370, 10373, 10380, - /*10380*/ uint16(xSetOp), uint16(STOSQ), - /*10382*/ uint16(xMatch), - /*10383*/ uint16(xSetOp), uint16(LODSB), - /*10385*/ uint16(xMatch), - /*10386*/ uint16(xCondIs64), 10389, 10399, - /*10389*/ uint16(xCondDataSize), 10393, 10396, 0, - /*10393*/ uint16(xSetOp), uint16(LODSW), + /*10360*/ uint16(xSetOp), uint16(ROR), + /*10362*/ uint16(xReadIb), + /*10363*/ uint16(xArgRM8), + /*10364*/ uint16(xArgImm8u), + /*10365*/ uint16(xMatch), + /*10366*/ uint16(xSetOp), uint16(RCL), + /*10368*/ uint16(xReadIb), + /*10369*/ uint16(xArgRM8), + /*10370*/ uint16(xArgImm8u), + /*10371*/ uint16(xMatch), + /*10372*/ uint16(xSetOp), uint16(RCR), + /*10374*/ uint16(xReadIb), + /*10375*/ uint16(xArgRM8), + /*10376*/ uint16(xArgImm8u), + /*10377*/ uint16(xMatch), + /*10378*/ uint16(xSetOp), uint16(SHL), + /*10380*/ uint16(xReadIb), + /*10381*/ uint16(xArgRM8), + /*10382*/ uint16(xArgImm8u), + /*10383*/ uint16(xMatch), + /*10384*/ uint16(xSetOp), uint16(SHR), + /*10386*/ uint16(xReadIb), + /*10387*/ uint16(xArgRM8), + /*10388*/ uint16(xArgImm8u), + /*10389*/ uint16(xMatch), + /*10390*/ uint16(xSetOp), uint16(SAR), + /*10392*/ uint16(xReadIb), + /*10393*/ uint16(xArgRM8), + /*10394*/ uint16(xArgImm8u), /*10395*/ uint16(xMatch), - /*10396*/ uint16(xSetOp), uint16(LODSD), - /*10398*/ uint16(xMatch), - /*10399*/ uint16(xCondDataSize), 10393, 10396, 10403, - /*10403*/ uint16(xSetOp), uint16(LODSQ), - /*10405*/ uint16(xMatch), - /*10406*/ uint16(xSetOp), uint16(SCASB), - /*10408*/ uint16(xMatch), - /*10409*/ uint16(xCondIs64), 10412, 10422, - /*10412*/ uint16(xCondDataSize), 10416, 10419, 0, - /*10416*/ uint16(xSetOp), uint16(SCASW), - /*10418*/ uint16(xMatch), - /*10419*/ uint16(xSetOp), uint16(SCASD), - /*10421*/ uint16(xMatch), - /*10422*/ uint16(xCondDataSize), 10416, 10419, 10426, - /*10426*/ uint16(xSetOp), uint16(SCASQ), - /*10428*/ uint16(xMatch), - /*10429*/ uint16(xSetOp), uint16(MOV), - /*10431*/ uint16(xReadIb), - /*10432*/ uint16(xArgR8op), - /*10433*/ uint16(xArgImm8u), - /*10434*/ uint16(xMatch), - /*10435*/ uint16(xCondIs64), 10438, 10454, - /*10438*/ uint16(xCondDataSize), 10442, 10448, 0, - /*10442*/ uint16(xSetOp), uint16(MOV), - /*10444*/ uint16(xReadIw), - /*10445*/ uint16(xArgR16op), - /*10446*/ uint16(xArgImm16), - /*10447*/ uint16(xMatch), - /*10448*/ uint16(xSetOp), uint16(MOV), - /*10450*/ uint16(xReadId), - /*10451*/ uint16(xArgR32op), - /*10452*/ uint16(xArgImm32), - /*10453*/ uint16(xMatch), - /*10454*/ uint16(xCondDataSize), 10442, 10448, 10458, - /*10458*/ uint16(xSetOp), uint16(MOV), - /*10460*/ uint16(xReadIo), - /*10461*/ uint16(xArgR64op), - /*10462*/ uint16(xArgImm64), - /*10463*/ uint16(xMatch), - /*10464*/ uint16(xCondSlashR), - 10473, // 0 - 10479, // 1 - 10485, // 2 - 10491, // 3 - 10497, // 4 - 10503, // 5 + /*10396*/ uint16(xCondSlashR), + 10405, // 0 + 10427, // 1 + 10449, // 2 + 10478, // 3 + 10507, // 4 + 10536, // 5 0, // 6 - 10509, // 7 - /*10473*/ uint16(xSetOp), uint16(ROL), - /*10475*/ uint16(xReadIb), - /*10476*/ uint16(xArgRM8), - /*10477*/ uint16(xArgImm8u), - /*10478*/ uint16(xMatch), - /*10479*/ uint16(xSetOp), uint16(ROR), - /*10481*/ uint16(xReadIb), - /*10482*/ uint16(xArgRM8), - /*10483*/ uint16(xArgImm8u), - /*10484*/ uint16(xMatch), - /*10485*/ uint16(xSetOp), uint16(RCL), + 10565, // 7 + /*10405*/ uint16(xCondDataSize), 10409, 10415, 10421, + /*10409*/ uint16(xSetOp), uint16(ROL), + /*10411*/ uint16(xReadIb), + /*10412*/ uint16(xArgRM16), + /*10413*/ uint16(xArgImm8u), + /*10414*/ uint16(xMatch), + /*10415*/ uint16(xSetOp), uint16(ROL), + /*10417*/ uint16(xReadIb), + /*10418*/ uint16(xArgRM32), + /*10419*/ uint16(xArgImm8u), + /*10420*/ uint16(xMatch), + /*10421*/ uint16(xSetOp), uint16(ROL), + /*10423*/ uint16(xReadIb), + /*10424*/ uint16(xArgRM64), + /*10425*/ uint16(xArgImm8u), + /*10426*/ uint16(xMatch), + /*10427*/ uint16(xCondDataSize), 10431, 10437, 10443, + /*10431*/ uint16(xSetOp), uint16(ROR), + /*10433*/ uint16(xReadIb), + /*10434*/ uint16(xArgRM16), + /*10435*/ uint16(xArgImm8u), + /*10436*/ uint16(xMatch), + /*10437*/ uint16(xSetOp), uint16(ROR), + /*10439*/ uint16(xReadIb), + /*10440*/ uint16(xArgRM32), + /*10441*/ uint16(xArgImm8u), + /*10442*/ uint16(xMatch), + /*10443*/ uint16(xSetOp), uint16(ROR), + /*10445*/ uint16(xReadIb), + /*10446*/ uint16(xArgRM64), + /*10447*/ uint16(xArgImm8u), + /*10448*/ uint16(xMatch), + /*10449*/ uint16(xCondIs64), 10452, 10468, + /*10452*/ uint16(xCondDataSize), 10456, 10462, 0, + /*10456*/ uint16(xSetOp), uint16(RCL), + /*10458*/ uint16(xReadIb), + /*10459*/ uint16(xArgRM16), + /*10460*/ uint16(xArgImm8u), + /*10461*/ uint16(xMatch), + /*10462*/ uint16(xSetOp), uint16(RCL), + /*10464*/ uint16(xReadIb), + /*10465*/ uint16(xArgRM32), + /*10466*/ uint16(xArgImm8u), + /*10467*/ uint16(xMatch), + /*10468*/ uint16(xCondDataSize), 10456, 10462, 10472, + /*10472*/ uint16(xSetOp), uint16(RCL), + /*10474*/ uint16(xReadIb), + /*10475*/ uint16(xArgRM64), + /*10476*/ uint16(xArgImm8u), + /*10477*/ uint16(xMatch), + /*10478*/ uint16(xCondIs64), 10481, 10497, + /*10481*/ uint16(xCondDataSize), 10485, 10491, 0, + /*10485*/ uint16(xSetOp), uint16(RCR), /*10487*/ uint16(xReadIb), - /*10488*/ uint16(xArgRM8), + /*10488*/ uint16(xArgRM16), /*10489*/ uint16(xArgImm8u), /*10490*/ uint16(xMatch), /*10491*/ uint16(xSetOp), uint16(RCR), /*10493*/ uint16(xReadIb), - /*10494*/ uint16(xArgRM8), + /*10494*/ uint16(xArgRM32), /*10495*/ uint16(xArgImm8u), /*10496*/ uint16(xMatch), - /*10497*/ uint16(xSetOp), uint16(SHL), - /*10499*/ uint16(xReadIb), - /*10500*/ uint16(xArgRM8), - /*10501*/ uint16(xArgImm8u), - /*10502*/ uint16(xMatch), - /*10503*/ uint16(xSetOp), uint16(SHR), - /*10505*/ uint16(xReadIb), - /*10506*/ uint16(xArgRM8), - /*10507*/ uint16(xArgImm8u), - /*10508*/ uint16(xMatch), - /*10509*/ uint16(xSetOp), uint16(SAR), - /*10511*/ uint16(xReadIb), - /*10512*/ uint16(xArgRM8), - /*10513*/ uint16(xArgImm8u), - /*10514*/ uint16(xMatch), - /*10515*/ uint16(xCondSlashR), - 10524, // 0 - 10546, // 1 - 10568, // 2 - 10597, // 3 - 10626, // 4 - 10655, // 5 - 0, // 6 - 10684, // 7 - /*10524*/ uint16(xCondDataSize), 10528, 10534, 10540, - /*10528*/ uint16(xSetOp), uint16(ROL), - /*10530*/ uint16(xReadIb), - /*10531*/ uint16(xArgRM16), - /*10532*/ uint16(xArgImm8u), - /*10533*/ uint16(xMatch), - /*10534*/ uint16(xSetOp), uint16(ROL), - /*10536*/ uint16(xReadIb), - /*10537*/ uint16(xArgRM32), - /*10538*/ uint16(xArgImm8u), - /*10539*/ uint16(xMatch), - /*10540*/ uint16(xSetOp), uint16(ROL), - /*10542*/ uint16(xReadIb), - /*10543*/ uint16(xArgRM64), - /*10544*/ uint16(xArgImm8u), - /*10545*/ uint16(xMatch), - /*10546*/ uint16(xCondDataSize), 10550, 10556, 10562, - /*10550*/ uint16(xSetOp), uint16(ROR), - /*10552*/ uint16(xReadIb), - /*10553*/ uint16(xArgRM16), - /*10554*/ uint16(xArgImm8u), - /*10555*/ uint16(xMatch), - /*10556*/ uint16(xSetOp), uint16(ROR), - /*10558*/ uint16(xReadIb), - /*10559*/ uint16(xArgRM32), - /*10560*/ uint16(xArgImm8u), - /*10561*/ uint16(xMatch), - /*10562*/ uint16(xSetOp), uint16(ROR), - /*10564*/ uint16(xReadIb), - /*10565*/ uint16(xArgRM64), - /*10566*/ uint16(xArgImm8u), - /*10567*/ uint16(xMatch), - /*10568*/ uint16(xCondIs64), 10571, 10587, - /*10571*/ uint16(xCondDataSize), 10575, 10581, 0, - /*10575*/ uint16(xSetOp), uint16(RCL), - /*10577*/ uint16(xReadIb), - /*10578*/ uint16(xArgRM16), - /*10579*/ uint16(xArgImm8u), - /*10580*/ uint16(xMatch), - /*10581*/ uint16(xSetOp), uint16(RCL), - /*10583*/ uint16(xReadIb), - /*10584*/ uint16(xArgRM32), - /*10585*/ uint16(xArgImm8u), - /*10586*/ uint16(xMatch), - /*10587*/ uint16(xCondDataSize), 10575, 10581, 10591, - /*10591*/ uint16(xSetOp), uint16(RCL), - /*10593*/ uint16(xReadIb), - /*10594*/ uint16(xArgRM64), - /*10595*/ uint16(xArgImm8u), - /*10596*/ uint16(xMatch), - /*10597*/ uint16(xCondIs64), 10600, 10616, - /*10600*/ uint16(xCondDataSize), 10604, 10610, 0, - /*10604*/ uint16(xSetOp), uint16(RCR), - /*10606*/ uint16(xReadIb), - /*10607*/ uint16(xArgRM16), - /*10608*/ uint16(xArgImm8u), - /*10609*/ uint16(xMatch), - /*10610*/ uint16(xSetOp), uint16(RCR), - /*10612*/ uint16(xReadIb), - /*10613*/ uint16(xArgRM32), - /*10614*/ uint16(xArgImm8u), - /*10615*/ uint16(xMatch), - /*10616*/ uint16(xCondDataSize), 10604, 10610, 10620, - /*10620*/ uint16(xSetOp), uint16(RCR), - /*10622*/ uint16(xReadIb), - /*10623*/ uint16(xArgRM64), - /*10624*/ uint16(xArgImm8u), - /*10625*/ uint16(xMatch), - /*10626*/ uint16(xCondIs64), 10629, 10645, - /*10629*/ uint16(xCondDataSize), 10633, 10639, 0, - /*10633*/ uint16(xSetOp), uint16(SHL), - /*10635*/ uint16(xReadIb), - /*10636*/ uint16(xArgRM16), - /*10637*/ uint16(xArgImm8u), - /*10638*/ uint16(xMatch), - /*10639*/ uint16(xSetOp), uint16(SHL), - /*10641*/ uint16(xReadIb), - /*10642*/ uint16(xArgRM32), - /*10643*/ uint16(xArgImm8u), - /*10644*/ uint16(xMatch), - /*10645*/ uint16(xCondDataSize), 10633, 10639, 10649, - /*10649*/ uint16(xSetOp), uint16(SHL), - /*10651*/ uint16(xReadIb), - /*10652*/ uint16(xArgRM64), - /*10653*/ uint16(xArgImm8u), - /*10654*/ uint16(xMatch), - /*10655*/ uint16(xCondIs64), 10658, 10674, - /*10658*/ uint16(xCondDataSize), 10662, 10668, 0, - /*10662*/ uint16(xSetOp), uint16(SHR), - /*10664*/ uint16(xReadIb), - /*10665*/ uint16(xArgRM16), - /*10666*/ uint16(xArgImm8u), - /*10667*/ uint16(xMatch), - /*10668*/ uint16(xSetOp), uint16(SHR), - /*10670*/ uint16(xReadIb), - /*10671*/ uint16(xArgRM32), - /*10672*/ uint16(xArgImm8u), - /*10673*/ uint16(xMatch), - /*10674*/ uint16(xCondDataSize), 10662, 10668, 10678, - /*10678*/ uint16(xSetOp), uint16(SHR), - /*10680*/ uint16(xReadIb), - /*10681*/ uint16(xArgRM64), - /*10682*/ uint16(xArgImm8u), - /*10683*/ uint16(xMatch), - /*10684*/ uint16(xCondIs64), 10687, 10703, - /*10687*/ uint16(xCondDataSize), 10691, 10697, 0, - /*10691*/ uint16(xSetOp), uint16(SAR), - /*10693*/ uint16(xReadIb), - /*10694*/ uint16(xArgRM16), - /*10695*/ uint16(xArgImm8u), - /*10696*/ uint16(xMatch), - /*10697*/ uint16(xSetOp), uint16(SAR), - /*10699*/ uint16(xReadIb), - /*10700*/ uint16(xArgRM32), - /*10701*/ uint16(xArgImm8u), - /*10702*/ uint16(xMatch), - /*10703*/ uint16(xCondDataSize), 10691, 10697, 10707, - /*10707*/ uint16(xSetOp), uint16(SAR), - /*10709*/ uint16(xReadIb), - /*10710*/ uint16(xArgRM64), - /*10711*/ uint16(xArgImm8u), - /*10712*/ uint16(xMatch), - /*10713*/ uint16(xSetOp), uint16(RET), - /*10715*/ uint16(xReadIw), - /*10716*/ uint16(xArgImm16u), - /*10717*/ uint16(xMatch), - /*10718*/ uint16(xSetOp), uint16(RET), - /*10720*/ uint16(xMatch), - /*10721*/ uint16(xCondIs64), 10724, 0, - /*10724*/ uint16(xCondDataSize), 10728, 10734, 0, - /*10728*/ uint16(xSetOp), uint16(LES), - /*10730*/ uint16(xReadSlashR), - /*10731*/ uint16(xArgR16), - /*10732*/ uint16(xArgM16colon16), - /*10733*/ uint16(xMatch), - /*10734*/ uint16(xSetOp), uint16(LES), - /*10736*/ uint16(xReadSlashR), - /*10737*/ uint16(xArgR32), - /*10738*/ uint16(xArgM16colon32), - /*10739*/ uint16(xMatch), - /*10740*/ uint16(xCondIs64), 10743, 0, - /*10743*/ uint16(xCondDataSize), 10747, 10753, 0, - /*10747*/ uint16(xSetOp), uint16(LDS), - /*10749*/ uint16(xReadSlashR), - /*10750*/ uint16(xArgR16), - /*10751*/ uint16(xArgM16colon16), - /*10752*/ uint16(xMatch), - /*10753*/ uint16(xSetOp), uint16(LDS), - /*10755*/ uint16(xReadSlashR), - /*10756*/ uint16(xArgR32), - /*10757*/ uint16(xArgM16colon32), - /*10758*/ uint16(xMatch), - /*10759*/ uint16(xCondByte), 1, - 0xF8, 10778, - /*10763*/ uint16(xCondSlashR), - 10772, // 0 + /*10497*/ uint16(xCondDataSize), 10485, 10491, 10501, + /*10501*/ uint16(xSetOp), uint16(RCR), + /*10503*/ uint16(xReadIb), + /*10504*/ uint16(xArgRM64), + /*10505*/ uint16(xArgImm8u), + /*10506*/ uint16(xMatch), + /*10507*/ uint16(xCondIs64), 10510, 10526, + /*10510*/ uint16(xCondDataSize), 10514, 10520, 0, + /*10514*/ uint16(xSetOp), uint16(SHL), + /*10516*/ uint16(xReadIb), + /*10517*/ uint16(xArgRM16), + /*10518*/ uint16(xArgImm8u), + /*10519*/ uint16(xMatch), + /*10520*/ uint16(xSetOp), uint16(SHL), + /*10522*/ uint16(xReadIb), + /*10523*/ uint16(xArgRM32), + /*10524*/ uint16(xArgImm8u), + /*10525*/ uint16(xMatch), + /*10526*/ uint16(xCondDataSize), 10514, 10520, 10530, + /*10530*/ uint16(xSetOp), uint16(SHL), + /*10532*/ uint16(xReadIb), + /*10533*/ uint16(xArgRM64), + /*10534*/ uint16(xArgImm8u), + /*10535*/ uint16(xMatch), + /*10536*/ uint16(xCondIs64), 10539, 10555, + /*10539*/ uint16(xCondDataSize), 10543, 10549, 0, + /*10543*/ uint16(xSetOp), uint16(SHR), + /*10545*/ uint16(xReadIb), + /*10546*/ uint16(xArgRM16), + /*10547*/ uint16(xArgImm8u), + /*10548*/ uint16(xMatch), + /*10549*/ uint16(xSetOp), uint16(SHR), + /*10551*/ uint16(xReadIb), + /*10552*/ uint16(xArgRM32), + /*10553*/ uint16(xArgImm8u), + /*10554*/ uint16(xMatch), + /*10555*/ uint16(xCondDataSize), 10543, 10549, 10559, + /*10559*/ uint16(xSetOp), uint16(SHR), + /*10561*/ uint16(xReadIb), + /*10562*/ uint16(xArgRM64), + /*10563*/ uint16(xArgImm8u), + /*10564*/ uint16(xMatch), + /*10565*/ uint16(xCondIs64), 10568, 10584, + /*10568*/ uint16(xCondDataSize), 10572, 10578, 0, + /*10572*/ uint16(xSetOp), uint16(SAR), + /*10574*/ uint16(xReadIb), + /*10575*/ uint16(xArgRM16), + /*10576*/ uint16(xArgImm8u), + /*10577*/ uint16(xMatch), + /*10578*/ uint16(xSetOp), uint16(SAR), + /*10580*/ uint16(xReadIb), + /*10581*/ uint16(xArgRM32), + /*10582*/ uint16(xArgImm8u), + /*10583*/ uint16(xMatch), + /*10584*/ uint16(xCondDataSize), 10572, 10578, 10588, + /*10588*/ uint16(xSetOp), uint16(SAR), + /*10590*/ uint16(xReadIb), + /*10591*/ uint16(xArgRM64), + /*10592*/ uint16(xArgImm8u), + /*10593*/ uint16(xMatch), + /*10594*/ uint16(xSetOp), uint16(RET), + /*10596*/ uint16(xReadIw), + /*10597*/ uint16(xArgImm16u), + /*10598*/ uint16(xMatch), + /*10599*/ uint16(xSetOp), uint16(RET), + /*10601*/ uint16(xMatch), + /*10602*/ uint16(xCondIs64), 10605, 0, + /*10605*/ uint16(xCondDataSize), 10609, 10615, 0, + /*10609*/ uint16(xSetOp), uint16(LES), + /*10611*/ uint16(xReadSlashR), + /*10612*/ uint16(xArgR16), + /*10613*/ uint16(xArgM16colon16), + /*10614*/ uint16(xMatch), + /*10615*/ uint16(xSetOp), uint16(LES), + /*10617*/ uint16(xReadSlashR), + /*10618*/ uint16(xArgR32), + /*10619*/ uint16(xArgM16colon32), + /*10620*/ uint16(xMatch), + /*10621*/ uint16(xCondIs64), 10624, 0, + /*10624*/ uint16(xCondDataSize), 10628, 10634, 0, + /*10628*/ uint16(xSetOp), uint16(LDS), + /*10630*/ uint16(xReadSlashR), + /*10631*/ uint16(xArgR16), + /*10632*/ uint16(xArgM16colon16), + /*10633*/ uint16(xMatch), + /*10634*/ uint16(xSetOp), uint16(LDS), + /*10636*/ uint16(xReadSlashR), + /*10637*/ uint16(xArgR32), + /*10638*/ uint16(xArgM16colon32), + /*10639*/ uint16(xMatch), + /*10640*/ uint16(xCondByte), 1, + 0xF8, 10659, + /*10644*/ uint16(xCondSlashR), + 10653, // 0 0, // 1 0, // 2 0, // 3 @@ -7009,19 +6944,19 @@ var decoder = [...]uint16{ 0, // 5 0, // 6 0, // 7 - /*10772*/ uint16(xSetOp), uint16(MOV), - /*10774*/ uint16(xReadIb), - /*10775*/ uint16(xArgRM8), - /*10776*/ uint16(xArgImm8u), - /*10777*/ uint16(xMatch), - /*10778*/ uint16(xSetOp), uint16(XABORT), - /*10780*/ uint16(xReadIb), - /*10781*/ uint16(xArgImm8u), - /*10782*/ uint16(xMatch), - /*10783*/ uint16(xCondByte), 1, - 0xF8, 10825, - /*10787*/ uint16(xCondSlashR), - 10796, // 0 + /*10653*/ uint16(xSetOp), uint16(MOV), + /*10655*/ uint16(xReadIb), + /*10656*/ uint16(xArgRM8), + /*10657*/ uint16(xArgImm8u), + /*10658*/ uint16(xMatch), + /*10659*/ uint16(xSetOp), uint16(XABORT), + /*10661*/ uint16(xReadIb), + /*10662*/ uint16(xArgImm8u), + /*10663*/ uint16(xMatch), + /*10664*/ uint16(xCondByte), 1, + 0xF8, 10706, + /*10668*/ uint16(xCondSlashR), + 10677, // 0 0, // 1 0, // 2 0, // 3 @@ -7029,1662 +6964,1640 @@ var decoder = [...]uint16{ 0, // 5 0, // 6 0, // 7 - /*10796*/ uint16(xCondIs64), 10799, 10815, - /*10799*/ uint16(xCondDataSize), 10803, 10809, 0, - /*10803*/ uint16(xSetOp), uint16(MOV), - /*10805*/ uint16(xReadIw), - /*10806*/ uint16(xArgRM16), - /*10807*/ uint16(xArgImm16), - /*10808*/ uint16(xMatch), - /*10809*/ uint16(xSetOp), uint16(MOV), - /*10811*/ uint16(xReadId), - /*10812*/ uint16(xArgRM32), - /*10813*/ uint16(xArgImm32), - /*10814*/ uint16(xMatch), - /*10815*/ uint16(xCondDataSize), 10803, 10809, 10819, - /*10819*/ uint16(xSetOp), uint16(MOV), - /*10821*/ uint16(xReadId), - /*10822*/ uint16(xArgRM64), - /*10823*/ uint16(xArgImm32), - /*10824*/ uint16(xMatch), - /*10825*/ uint16(xCondDataSize), 10829, 10834, 10839, - /*10829*/ uint16(xSetOp), uint16(XBEGIN), - /*10831*/ uint16(xReadCw), - /*10832*/ uint16(xArgRel16), - /*10833*/ uint16(xMatch), - /*10834*/ uint16(xSetOp), uint16(XBEGIN), - /*10836*/ uint16(xReadCd), - /*10837*/ uint16(xArgRel32), - /*10838*/ uint16(xMatch), - /*10839*/ uint16(xSetOp), uint16(XBEGIN), - /*10841*/ uint16(xReadCd), - /*10842*/ uint16(xArgRel32), - /*10843*/ uint16(xMatch), - /*10844*/ uint16(xSetOp), uint16(ENTER), - /*10846*/ uint16(xReadIw), - /*10847*/ uint16(xReadIb), - /*10848*/ uint16(xArgImm16u), - /*10849*/ uint16(xArgImm8u), - /*10850*/ uint16(xMatch), - /*10851*/ uint16(xCondIs64), 10854, 10864, - /*10854*/ uint16(xCondDataSize), 10858, 10861, 0, - /*10858*/ uint16(xSetOp), uint16(LEAVE), - /*10860*/ uint16(xMatch), - /*10861*/ uint16(xSetOp), uint16(LEAVE), - /*10863*/ uint16(xMatch), - /*10864*/ uint16(xCondDataSize), 10858, 10868, 10871, - /*10868*/ uint16(xSetOp), uint16(LEAVE), - /*10870*/ uint16(xMatch), - /*10871*/ uint16(xSetOp), uint16(LEAVE), - /*10873*/ uint16(xMatch), - /*10874*/ uint16(xSetOp), uint16(LRET), - /*10876*/ uint16(xReadIw), - /*10877*/ uint16(xArgImm16u), - /*10878*/ uint16(xMatch), - /*10879*/ uint16(xSetOp), uint16(LRET), - /*10881*/ uint16(xMatch), - /*10882*/ uint16(xSetOp), uint16(INT), - /*10884*/ uint16(xArg3), - /*10885*/ uint16(xMatch), - /*10886*/ uint16(xSetOp), uint16(INT), - /*10888*/ uint16(xReadIb), - /*10889*/ uint16(xArgImm8u), - /*10890*/ uint16(xMatch), - /*10891*/ uint16(xCondIs64), 10894, 0, - /*10894*/ uint16(xSetOp), uint16(INTO), - /*10896*/ uint16(xMatch), - /*10897*/ uint16(xCondIs64), 10900, 10910, - /*10900*/ uint16(xCondDataSize), 10904, 10907, 0, - /*10904*/ uint16(xSetOp), uint16(IRET), - /*10906*/ uint16(xMatch), - /*10907*/ uint16(xSetOp), uint16(IRETD), - /*10909*/ uint16(xMatch), - /*10910*/ uint16(xCondDataSize), 10904, 10907, 10914, - /*10914*/ uint16(xSetOp), uint16(IRETQ), - /*10916*/ uint16(xMatch), - /*10917*/ uint16(xCondSlashR), - 10926, // 0 - 10931, // 1 - 10936, // 2 - 10941, // 3 - 10946, // 4 - 10951, // 5 + /*10677*/ uint16(xCondIs64), 10680, 10696, + /*10680*/ uint16(xCondDataSize), 10684, 10690, 0, + /*10684*/ uint16(xSetOp), uint16(MOV), + /*10686*/ uint16(xReadIw), + /*10687*/ uint16(xArgRM16), + /*10688*/ uint16(xArgImm16), + /*10689*/ uint16(xMatch), + /*10690*/ uint16(xSetOp), uint16(MOV), + /*10692*/ uint16(xReadId), + /*10693*/ uint16(xArgRM32), + /*10694*/ uint16(xArgImm32), + /*10695*/ uint16(xMatch), + /*10696*/ uint16(xCondDataSize), 10684, 10690, 10700, + /*10700*/ uint16(xSetOp), uint16(MOV), + /*10702*/ uint16(xReadId), + /*10703*/ uint16(xArgRM64), + /*10704*/ uint16(xArgImm32), + /*10705*/ uint16(xMatch), + /*10706*/ uint16(xCondDataSize), 10710, 10715, 10720, + /*10710*/ uint16(xSetOp), uint16(XBEGIN), + /*10712*/ uint16(xReadCw), + /*10713*/ uint16(xArgRel16), + /*10714*/ uint16(xMatch), + /*10715*/ uint16(xSetOp), uint16(XBEGIN), + /*10717*/ uint16(xReadCd), + /*10718*/ uint16(xArgRel32), + /*10719*/ uint16(xMatch), + /*10720*/ uint16(xSetOp), uint16(XBEGIN), + /*10722*/ uint16(xReadCd), + /*10723*/ uint16(xArgRel32), + /*10724*/ uint16(xMatch), + /*10725*/ uint16(xSetOp), uint16(ENTER), + /*10727*/ uint16(xReadIw), + /*10728*/ uint16(xReadIb), + /*10729*/ uint16(xArgImm16u), + /*10730*/ uint16(xArgImm8u), + /*10731*/ uint16(xMatch), + /*10732*/ uint16(xCondIs64), 10735, 10745, + /*10735*/ uint16(xCondDataSize), 10739, 10742, 0, + /*10739*/ uint16(xSetOp), uint16(LEAVE), + /*10741*/ uint16(xMatch), + /*10742*/ uint16(xSetOp), uint16(LEAVE), + /*10744*/ uint16(xMatch), + /*10745*/ uint16(xCondDataSize), 10739, 10749, 10752, + /*10749*/ uint16(xSetOp), uint16(LEAVE), + /*10751*/ uint16(xMatch), + /*10752*/ uint16(xSetOp), uint16(LEAVE), + /*10754*/ uint16(xMatch), + /*10755*/ uint16(xSetOp), uint16(LRET), + /*10757*/ uint16(xReadIw), + /*10758*/ uint16(xArgImm16u), + /*10759*/ uint16(xMatch), + /*10760*/ uint16(xSetOp), uint16(LRET), + /*10762*/ uint16(xMatch), + /*10763*/ uint16(xSetOp), uint16(INT), + /*10765*/ uint16(xArg3), + /*10766*/ uint16(xMatch), + /*10767*/ uint16(xSetOp), uint16(INT), + /*10769*/ uint16(xReadIb), + /*10770*/ uint16(xArgImm8u), + /*10771*/ uint16(xMatch), + /*10772*/ uint16(xCondIs64), 10775, 0, + /*10775*/ uint16(xSetOp), uint16(INTO), + /*10777*/ uint16(xMatch), + /*10778*/ uint16(xCondIs64), 10781, 10791, + /*10781*/ uint16(xCondDataSize), 10785, 10788, 0, + /*10785*/ uint16(xSetOp), uint16(IRET), + /*10787*/ uint16(xMatch), + /*10788*/ uint16(xSetOp), uint16(IRETD), + /*10790*/ uint16(xMatch), + /*10791*/ uint16(xCondDataSize), 10785, 10788, 10795, + /*10795*/ uint16(xSetOp), uint16(IRETQ), + /*10797*/ uint16(xMatch), + /*10798*/ uint16(xCondSlashR), + 10807, // 0 + 10812, // 1 + 10817, // 2 + 10822, // 3 + 10827, // 4 + 10832, // 5 0, // 6 - 10956, // 7 - /*10926*/ uint16(xSetOp), uint16(ROL), - /*10928*/ uint16(xArgRM8), - /*10929*/ uint16(xArg1), - /*10930*/ uint16(xMatch), - /*10931*/ uint16(xSetOp), uint16(ROR), - /*10933*/ uint16(xArgRM8), - /*10934*/ uint16(xArg1), - /*10935*/ uint16(xMatch), - /*10936*/ uint16(xSetOp), uint16(RCL), - /*10938*/ uint16(xArgRM8), + 10837, // 7 + /*10807*/ uint16(xSetOp), uint16(ROL), + /*10809*/ uint16(xArgRM8), + /*10810*/ uint16(xArg1), + /*10811*/ uint16(xMatch), + /*10812*/ uint16(xSetOp), uint16(ROR), + /*10814*/ uint16(xArgRM8), + /*10815*/ uint16(xArg1), + /*10816*/ uint16(xMatch), + /*10817*/ uint16(xSetOp), uint16(RCL), + /*10819*/ uint16(xArgRM8), + /*10820*/ uint16(xArg1), + /*10821*/ uint16(xMatch), + /*10822*/ uint16(xSetOp), uint16(RCR), + /*10824*/ uint16(xArgRM8), + /*10825*/ uint16(xArg1), + /*10826*/ uint16(xMatch), + /*10827*/ uint16(xSetOp), uint16(SHL), + /*10829*/ uint16(xArgRM8), + /*10830*/ uint16(xArg1), + /*10831*/ uint16(xMatch), + /*10832*/ uint16(xSetOp), uint16(SHR), + /*10834*/ uint16(xArgRM8), + /*10835*/ uint16(xArg1), + /*10836*/ uint16(xMatch), + /*10837*/ uint16(xSetOp), uint16(SAR), + /*10839*/ uint16(xArgRM8), + /*10840*/ uint16(xArg1), + /*10841*/ uint16(xMatch), + /*10842*/ uint16(xCondSlashR), + 10851, // 0 + 10877, // 1 + 10903, // 2 + 10929, // 3 + 10955, // 4 + 10981, // 5 + 0, // 6 + 11007, // 7 + /*10851*/ uint16(xCondIs64), 10854, 10868, + /*10854*/ uint16(xCondDataSize), 10858, 10863, 0, + /*10858*/ uint16(xSetOp), uint16(ROL), + /*10860*/ uint16(xArgRM16), + /*10861*/ uint16(xArg1), + /*10862*/ uint16(xMatch), + /*10863*/ uint16(xSetOp), uint16(ROL), + /*10865*/ uint16(xArgRM32), + /*10866*/ uint16(xArg1), + /*10867*/ uint16(xMatch), + /*10868*/ uint16(xCondDataSize), 10858, 10863, 10872, + /*10872*/ uint16(xSetOp), uint16(ROL), + /*10874*/ uint16(xArgRM64), + /*10875*/ uint16(xArg1), + /*10876*/ uint16(xMatch), + /*10877*/ uint16(xCondIs64), 10880, 10894, + /*10880*/ uint16(xCondDataSize), 10884, 10889, 0, + /*10884*/ uint16(xSetOp), uint16(ROR), + /*10886*/ uint16(xArgRM16), + /*10887*/ uint16(xArg1), + /*10888*/ uint16(xMatch), + /*10889*/ uint16(xSetOp), uint16(ROR), + /*10891*/ uint16(xArgRM32), + /*10892*/ uint16(xArg1), + /*10893*/ uint16(xMatch), + /*10894*/ uint16(xCondDataSize), 10884, 10889, 10898, + /*10898*/ uint16(xSetOp), uint16(ROR), + /*10900*/ uint16(xArgRM64), + /*10901*/ uint16(xArg1), + /*10902*/ uint16(xMatch), + /*10903*/ uint16(xCondIs64), 10906, 10920, + /*10906*/ uint16(xCondDataSize), 10910, 10915, 0, + /*10910*/ uint16(xSetOp), uint16(RCL), + /*10912*/ uint16(xArgRM16), + /*10913*/ uint16(xArg1), + /*10914*/ uint16(xMatch), + /*10915*/ uint16(xSetOp), uint16(RCL), + /*10917*/ uint16(xArgRM32), + /*10918*/ uint16(xArg1), + /*10919*/ uint16(xMatch), + /*10920*/ uint16(xCondDataSize), 10910, 10915, 10924, + /*10924*/ uint16(xSetOp), uint16(RCL), + /*10926*/ uint16(xArgRM64), + /*10927*/ uint16(xArg1), + /*10928*/ uint16(xMatch), + /*10929*/ uint16(xCondIs64), 10932, 10946, + /*10932*/ uint16(xCondDataSize), 10936, 10941, 0, + /*10936*/ uint16(xSetOp), uint16(RCR), + /*10938*/ uint16(xArgRM16), /*10939*/ uint16(xArg1), /*10940*/ uint16(xMatch), /*10941*/ uint16(xSetOp), uint16(RCR), - /*10943*/ uint16(xArgRM8), + /*10943*/ uint16(xArgRM32), /*10944*/ uint16(xArg1), /*10945*/ uint16(xMatch), - /*10946*/ uint16(xSetOp), uint16(SHL), - /*10948*/ uint16(xArgRM8), - /*10949*/ uint16(xArg1), - /*10950*/ uint16(xMatch), - /*10951*/ uint16(xSetOp), uint16(SHR), - /*10953*/ uint16(xArgRM8), - /*10954*/ uint16(xArg1), - /*10955*/ uint16(xMatch), - /*10956*/ uint16(xSetOp), uint16(SAR), - /*10958*/ uint16(xArgRM8), - /*10959*/ uint16(xArg1), - /*10960*/ uint16(xMatch), - /*10961*/ uint16(xCondSlashR), - 10970, // 0 - 10996, // 1 - 11022, // 2 - 11048, // 3 - 11074, // 4 - 11100, // 5 + /*10946*/ uint16(xCondDataSize), 10936, 10941, 10950, + /*10950*/ uint16(xSetOp), uint16(RCR), + /*10952*/ uint16(xArgRM64), + /*10953*/ uint16(xArg1), + /*10954*/ uint16(xMatch), + /*10955*/ uint16(xCondIs64), 10958, 10972, + /*10958*/ uint16(xCondDataSize), 10962, 10967, 0, + /*10962*/ uint16(xSetOp), uint16(SHL), + /*10964*/ uint16(xArgRM16), + /*10965*/ uint16(xArg1), + /*10966*/ uint16(xMatch), + /*10967*/ uint16(xSetOp), uint16(SHL), + /*10969*/ uint16(xArgRM32), + /*10970*/ uint16(xArg1), + /*10971*/ uint16(xMatch), + /*10972*/ uint16(xCondDataSize), 10962, 10967, 10976, + /*10976*/ uint16(xSetOp), uint16(SHL), + /*10978*/ uint16(xArgRM64), + /*10979*/ uint16(xArg1), + /*10980*/ uint16(xMatch), + /*10981*/ uint16(xCondIs64), 10984, 10998, + /*10984*/ uint16(xCondDataSize), 10988, 10993, 0, + /*10988*/ uint16(xSetOp), uint16(SHR), + /*10990*/ uint16(xArgRM16), + /*10991*/ uint16(xArg1), + /*10992*/ uint16(xMatch), + /*10993*/ uint16(xSetOp), uint16(SHR), + /*10995*/ uint16(xArgRM32), + /*10996*/ uint16(xArg1), + /*10997*/ uint16(xMatch), + /*10998*/ uint16(xCondDataSize), 10988, 10993, 11002, + /*11002*/ uint16(xSetOp), uint16(SHR), + /*11004*/ uint16(xArgRM64), + /*11005*/ uint16(xArg1), + /*11006*/ uint16(xMatch), + /*11007*/ uint16(xCondIs64), 11010, 11024, + /*11010*/ uint16(xCondDataSize), 11014, 11019, 0, + /*11014*/ uint16(xSetOp), uint16(SAR), + /*11016*/ uint16(xArgRM16), + /*11017*/ uint16(xArg1), + /*11018*/ uint16(xMatch), + /*11019*/ uint16(xSetOp), uint16(SAR), + /*11021*/ uint16(xArgRM32), + /*11022*/ uint16(xArg1), + /*11023*/ uint16(xMatch), + /*11024*/ uint16(xCondDataSize), 11014, 11019, 11028, + /*11028*/ uint16(xSetOp), uint16(SAR), + /*11030*/ uint16(xArgRM64), + /*11031*/ uint16(xArg1), + /*11032*/ uint16(xMatch), + /*11033*/ uint16(xCondSlashR), + 11042, // 0 + 11047, // 1 + 11052, // 2 + 11057, // 3 + 11062, // 4 + 11067, // 5 + 0, // 6 + 11072, // 7 + /*11042*/ uint16(xSetOp), uint16(ROL), + /*11044*/ uint16(xArgRM8), + /*11045*/ uint16(xArgCL), + /*11046*/ uint16(xMatch), + /*11047*/ uint16(xSetOp), uint16(ROR), + /*11049*/ uint16(xArgRM8), + /*11050*/ uint16(xArgCL), + /*11051*/ uint16(xMatch), + /*11052*/ uint16(xSetOp), uint16(RCL), + /*11054*/ uint16(xArgRM8), + /*11055*/ uint16(xArgCL), + /*11056*/ uint16(xMatch), + /*11057*/ uint16(xSetOp), uint16(RCR), + /*11059*/ uint16(xArgRM8), + /*11060*/ uint16(xArgCL), + /*11061*/ uint16(xMatch), + /*11062*/ uint16(xSetOp), uint16(SHL), + /*11064*/ uint16(xArgRM8), + /*11065*/ uint16(xArgCL), + /*11066*/ uint16(xMatch), + /*11067*/ uint16(xSetOp), uint16(SHR), + /*11069*/ uint16(xArgRM8), + /*11070*/ uint16(xArgCL), + /*11071*/ uint16(xMatch), + /*11072*/ uint16(xSetOp), uint16(SAR), + /*11074*/ uint16(xArgRM8), + /*11075*/ uint16(xArgCL), + /*11076*/ uint16(xMatch), + /*11077*/ uint16(xCondSlashR), + 11086, // 0 + 11112, // 1 + 11138, // 2 + 11164, // 3 + 11190, // 4 + 11216, // 5 0, // 6 - 11126, // 7 - /*10970*/ uint16(xCondIs64), 10973, 10987, - /*10973*/ uint16(xCondDataSize), 10977, 10982, 0, - /*10977*/ uint16(xSetOp), uint16(ROL), - /*10979*/ uint16(xArgRM16), - /*10980*/ uint16(xArg1), - /*10981*/ uint16(xMatch), - /*10982*/ uint16(xSetOp), uint16(ROL), - /*10984*/ uint16(xArgRM32), - /*10985*/ uint16(xArg1), - /*10986*/ uint16(xMatch), - /*10987*/ uint16(xCondDataSize), 10977, 10982, 10991, - /*10991*/ uint16(xSetOp), uint16(ROL), - /*10993*/ uint16(xArgRM64), - /*10994*/ uint16(xArg1), - /*10995*/ uint16(xMatch), - /*10996*/ uint16(xCondIs64), 10999, 11013, - /*10999*/ uint16(xCondDataSize), 11003, 11008, 0, - /*11003*/ uint16(xSetOp), uint16(ROR), - /*11005*/ uint16(xArgRM16), - /*11006*/ uint16(xArg1), - /*11007*/ uint16(xMatch), - /*11008*/ uint16(xSetOp), uint16(ROR), - /*11010*/ uint16(xArgRM32), - /*11011*/ uint16(xArg1), - /*11012*/ uint16(xMatch), - /*11013*/ uint16(xCondDataSize), 11003, 11008, 11017, - /*11017*/ uint16(xSetOp), uint16(ROR), - /*11019*/ uint16(xArgRM64), - /*11020*/ uint16(xArg1), - /*11021*/ uint16(xMatch), - /*11022*/ uint16(xCondIs64), 11025, 11039, - /*11025*/ uint16(xCondDataSize), 11029, 11034, 0, - /*11029*/ uint16(xSetOp), uint16(RCL), - /*11031*/ uint16(xArgRM16), - /*11032*/ uint16(xArg1), - /*11033*/ uint16(xMatch), - /*11034*/ uint16(xSetOp), uint16(RCL), - /*11036*/ uint16(xArgRM32), - /*11037*/ uint16(xArg1), - /*11038*/ uint16(xMatch), - /*11039*/ uint16(xCondDataSize), 11029, 11034, 11043, - /*11043*/ uint16(xSetOp), uint16(RCL), - /*11045*/ uint16(xArgRM64), - /*11046*/ uint16(xArg1), - /*11047*/ uint16(xMatch), - /*11048*/ uint16(xCondIs64), 11051, 11065, - /*11051*/ uint16(xCondDataSize), 11055, 11060, 0, - /*11055*/ uint16(xSetOp), uint16(RCR), - /*11057*/ uint16(xArgRM16), - /*11058*/ uint16(xArg1), - /*11059*/ uint16(xMatch), - /*11060*/ uint16(xSetOp), uint16(RCR), - /*11062*/ uint16(xArgRM32), - /*11063*/ uint16(xArg1), - /*11064*/ uint16(xMatch), - /*11065*/ uint16(xCondDataSize), 11055, 11060, 11069, - /*11069*/ uint16(xSetOp), uint16(RCR), - /*11071*/ uint16(xArgRM64), - /*11072*/ uint16(xArg1), - /*11073*/ uint16(xMatch), - /*11074*/ uint16(xCondIs64), 11077, 11091, - /*11077*/ uint16(xCondDataSize), 11081, 11086, 0, - /*11081*/ uint16(xSetOp), uint16(SHL), - /*11083*/ uint16(xArgRM16), - /*11084*/ uint16(xArg1), - /*11085*/ uint16(xMatch), - /*11086*/ uint16(xSetOp), uint16(SHL), - /*11088*/ uint16(xArgRM32), - /*11089*/ uint16(xArg1), - /*11090*/ uint16(xMatch), - /*11091*/ uint16(xCondDataSize), 11081, 11086, 11095, - /*11095*/ uint16(xSetOp), uint16(SHL), - /*11097*/ uint16(xArgRM64), - /*11098*/ uint16(xArg1), - /*11099*/ uint16(xMatch), - /*11100*/ uint16(xCondIs64), 11103, 11117, - /*11103*/ uint16(xCondDataSize), 11107, 11112, 0, - /*11107*/ uint16(xSetOp), uint16(SHR), - /*11109*/ uint16(xArgRM16), - /*11110*/ uint16(xArg1), + 11242, // 7 + /*11086*/ uint16(xCondIs64), 11089, 11103, + /*11089*/ uint16(xCondDataSize), 11093, 11098, 0, + /*11093*/ uint16(xSetOp), uint16(ROL), + /*11095*/ uint16(xArgRM16), + /*11096*/ uint16(xArgCL), + /*11097*/ uint16(xMatch), + /*11098*/ uint16(xSetOp), uint16(ROL), + /*11100*/ uint16(xArgRM32), + /*11101*/ uint16(xArgCL), + /*11102*/ uint16(xMatch), + /*11103*/ uint16(xCondDataSize), 11093, 11098, 11107, + /*11107*/ uint16(xSetOp), uint16(ROL), + /*11109*/ uint16(xArgRM64), + /*11110*/ uint16(xArgCL), /*11111*/ uint16(xMatch), - /*11112*/ uint16(xSetOp), uint16(SHR), - /*11114*/ uint16(xArgRM32), - /*11115*/ uint16(xArg1), - /*11116*/ uint16(xMatch), - /*11117*/ uint16(xCondDataSize), 11107, 11112, 11121, - /*11121*/ uint16(xSetOp), uint16(SHR), - /*11123*/ uint16(xArgRM64), - /*11124*/ uint16(xArg1), - /*11125*/ uint16(xMatch), - /*11126*/ uint16(xCondIs64), 11129, 11143, - /*11129*/ uint16(xCondDataSize), 11133, 11138, 0, - /*11133*/ uint16(xSetOp), uint16(SAR), - /*11135*/ uint16(xArgRM16), - /*11136*/ uint16(xArg1), + /*11112*/ uint16(xCondIs64), 11115, 11129, + /*11115*/ uint16(xCondDataSize), 11119, 11124, 0, + /*11119*/ uint16(xSetOp), uint16(ROR), + /*11121*/ uint16(xArgRM16), + /*11122*/ uint16(xArgCL), + /*11123*/ uint16(xMatch), + /*11124*/ uint16(xSetOp), uint16(ROR), + /*11126*/ uint16(xArgRM32), + /*11127*/ uint16(xArgCL), + /*11128*/ uint16(xMatch), + /*11129*/ uint16(xCondDataSize), 11119, 11124, 11133, + /*11133*/ uint16(xSetOp), uint16(ROR), + /*11135*/ uint16(xArgRM64), + /*11136*/ uint16(xArgCL), /*11137*/ uint16(xMatch), - /*11138*/ uint16(xSetOp), uint16(SAR), - /*11140*/ uint16(xArgRM32), - /*11141*/ uint16(xArg1), - /*11142*/ uint16(xMatch), - /*11143*/ uint16(xCondDataSize), 11133, 11138, 11147, - /*11147*/ uint16(xSetOp), uint16(SAR), - /*11149*/ uint16(xArgRM64), - /*11150*/ uint16(xArg1), - /*11151*/ uint16(xMatch), - /*11152*/ uint16(xCondSlashR), - 11161, // 0 - 11166, // 1 - 11171, // 2 - 11176, // 3 - 11181, // 4 - 11186, // 5 - 0, // 6 - 11191, // 7 - /*11161*/ uint16(xSetOp), uint16(ROL), - /*11163*/ uint16(xArgRM8), - /*11164*/ uint16(xArgCL), - /*11165*/ uint16(xMatch), - /*11166*/ uint16(xSetOp), uint16(ROR), - /*11168*/ uint16(xArgRM8), - /*11169*/ uint16(xArgCL), - /*11170*/ uint16(xMatch), - /*11171*/ uint16(xSetOp), uint16(RCL), - /*11173*/ uint16(xArgRM8), + /*11138*/ uint16(xCondIs64), 11141, 11155, + /*11141*/ uint16(xCondDataSize), 11145, 11150, 0, + /*11145*/ uint16(xSetOp), uint16(RCL), + /*11147*/ uint16(xArgRM16), + /*11148*/ uint16(xArgCL), + /*11149*/ uint16(xMatch), + /*11150*/ uint16(xSetOp), uint16(RCL), + /*11152*/ uint16(xArgRM32), + /*11153*/ uint16(xArgCL), + /*11154*/ uint16(xMatch), + /*11155*/ uint16(xCondDataSize), 11145, 11150, 11159, + /*11159*/ uint16(xSetOp), uint16(RCL), + /*11161*/ uint16(xArgRM64), + /*11162*/ uint16(xArgCL), + /*11163*/ uint16(xMatch), + /*11164*/ uint16(xCondIs64), 11167, 11181, + /*11167*/ uint16(xCondDataSize), 11171, 11176, 0, + /*11171*/ uint16(xSetOp), uint16(RCR), + /*11173*/ uint16(xArgRM16), /*11174*/ uint16(xArgCL), /*11175*/ uint16(xMatch), /*11176*/ uint16(xSetOp), uint16(RCR), - /*11178*/ uint16(xArgRM8), + /*11178*/ uint16(xArgRM32), /*11179*/ uint16(xArgCL), /*11180*/ uint16(xMatch), - /*11181*/ uint16(xSetOp), uint16(SHL), - /*11183*/ uint16(xArgRM8), - /*11184*/ uint16(xArgCL), - /*11185*/ uint16(xMatch), - /*11186*/ uint16(xSetOp), uint16(SHR), - /*11188*/ uint16(xArgRM8), - /*11189*/ uint16(xArgCL), - /*11190*/ uint16(xMatch), - /*11191*/ uint16(xSetOp), uint16(SAR), - /*11193*/ uint16(xArgRM8), - /*11194*/ uint16(xArgCL), - /*11195*/ uint16(xMatch), - /*11196*/ uint16(xCondSlashR), - 11205, // 0 - 11231, // 1 - 11257, // 2 - 11283, // 3 - 11309, // 4 - 11335, // 5 - 0, // 6 - 11361, // 7 - /*11205*/ uint16(xCondIs64), 11208, 11222, - /*11208*/ uint16(xCondDataSize), 11212, 11217, 0, - /*11212*/ uint16(xSetOp), uint16(ROL), - /*11214*/ uint16(xArgRM16), - /*11215*/ uint16(xArgCL), - /*11216*/ uint16(xMatch), - /*11217*/ uint16(xSetOp), uint16(ROL), - /*11219*/ uint16(xArgRM32), - /*11220*/ uint16(xArgCL), - /*11221*/ uint16(xMatch), - /*11222*/ uint16(xCondDataSize), 11212, 11217, 11226, - /*11226*/ uint16(xSetOp), uint16(ROL), - /*11228*/ uint16(xArgRM64), - /*11229*/ uint16(xArgCL), - /*11230*/ uint16(xMatch), - /*11231*/ uint16(xCondIs64), 11234, 11248, - /*11234*/ uint16(xCondDataSize), 11238, 11243, 0, - /*11238*/ uint16(xSetOp), uint16(ROR), - /*11240*/ uint16(xArgRM16), - /*11241*/ uint16(xArgCL), - /*11242*/ uint16(xMatch), - /*11243*/ uint16(xSetOp), uint16(ROR), - /*11245*/ uint16(xArgRM32), - /*11246*/ uint16(xArgCL), - /*11247*/ uint16(xMatch), - /*11248*/ uint16(xCondDataSize), 11238, 11243, 11252, - /*11252*/ uint16(xSetOp), uint16(ROR), - /*11254*/ uint16(xArgRM64), - /*11255*/ uint16(xArgCL), - /*11256*/ uint16(xMatch), - /*11257*/ uint16(xCondIs64), 11260, 11274, - /*11260*/ uint16(xCondDataSize), 11264, 11269, 0, - /*11264*/ uint16(xSetOp), uint16(RCL), - /*11266*/ uint16(xArgRM16), - /*11267*/ uint16(xArgCL), - /*11268*/ uint16(xMatch), - /*11269*/ uint16(xSetOp), uint16(RCL), - /*11271*/ uint16(xArgRM32), - /*11272*/ uint16(xArgCL), - /*11273*/ uint16(xMatch), - /*11274*/ uint16(xCondDataSize), 11264, 11269, 11278, - /*11278*/ uint16(xSetOp), uint16(RCL), - /*11280*/ uint16(xArgRM64), - /*11281*/ uint16(xArgCL), - /*11282*/ uint16(xMatch), - /*11283*/ uint16(xCondIs64), 11286, 11300, - /*11286*/ uint16(xCondDataSize), 11290, 11295, 0, - /*11290*/ uint16(xSetOp), uint16(RCR), - /*11292*/ uint16(xArgRM16), - /*11293*/ uint16(xArgCL), - /*11294*/ uint16(xMatch), - /*11295*/ uint16(xSetOp), uint16(RCR), - /*11297*/ uint16(xArgRM32), - /*11298*/ uint16(xArgCL), - /*11299*/ uint16(xMatch), - /*11300*/ uint16(xCondDataSize), 11290, 11295, 11304, - /*11304*/ uint16(xSetOp), uint16(RCR), - /*11306*/ uint16(xArgRM64), - /*11307*/ uint16(xArgCL), - /*11308*/ uint16(xMatch), - /*11309*/ uint16(xCondIs64), 11312, 11326, - /*11312*/ uint16(xCondDataSize), 11316, 11321, 0, - /*11316*/ uint16(xSetOp), uint16(SHL), - /*11318*/ uint16(xArgRM16), - /*11319*/ uint16(xArgCL), - /*11320*/ uint16(xMatch), - /*11321*/ uint16(xSetOp), uint16(SHL), - /*11323*/ uint16(xArgRM32), - /*11324*/ uint16(xArgCL), - /*11325*/ uint16(xMatch), - /*11326*/ uint16(xCondDataSize), 11316, 11321, 11330, - /*11330*/ uint16(xSetOp), uint16(SHL), - /*11332*/ uint16(xArgRM64), - /*11333*/ uint16(xArgCL), - /*11334*/ uint16(xMatch), - /*11335*/ uint16(xCondIs64), 11338, 11352, - /*11338*/ uint16(xCondDataSize), 11342, 11347, 0, - /*11342*/ uint16(xSetOp), uint16(SHR), - /*11344*/ uint16(xArgRM16), - /*11345*/ uint16(xArgCL), - /*11346*/ uint16(xMatch), - /*11347*/ uint16(xSetOp), uint16(SHR), - /*11349*/ uint16(xArgRM32), - /*11350*/ uint16(xArgCL), - /*11351*/ uint16(xMatch), - /*11352*/ uint16(xCondDataSize), 11342, 11347, 11356, - /*11356*/ uint16(xSetOp), uint16(SHR), - /*11358*/ uint16(xArgRM64), - /*11359*/ uint16(xArgCL), - /*11360*/ uint16(xMatch), - /*11361*/ uint16(xCondIs64), 11364, 11378, - /*11364*/ uint16(xCondDataSize), 11368, 11373, 0, - /*11368*/ uint16(xSetOp), uint16(SAR), - /*11370*/ uint16(xArgRM16), - /*11371*/ uint16(xArgCL), - /*11372*/ uint16(xMatch), - /*11373*/ uint16(xSetOp), uint16(SAR), - /*11375*/ uint16(xArgRM32), - /*11376*/ uint16(xArgCL), - /*11377*/ uint16(xMatch), - /*11378*/ uint16(xCondDataSize), 11368, 11373, 11382, - /*11382*/ uint16(xSetOp), uint16(SAR), - /*11384*/ uint16(xArgRM64), - /*11385*/ uint16(xArgCL), - /*11386*/ uint16(xMatch), - /*11387*/ uint16(xCondIs64), 11390, 0, - /*11390*/ uint16(xSetOp), uint16(AAM), - /*11392*/ uint16(xReadIb), - /*11393*/ uint16(xArgImm8u), - /*11394*/ uint16(xMatch), - /*11395*/ uint16(xCondIs64), 11398, 0, - /*11398*/ uint16(xSetOp), uint16(AAD), - /*11400*/ uint16(xReadIb), - /*11401*/ uint16(xArgImm8u), - /*11402*/ uint16(xMatch), - /*11403*/ uint16(xCondIs64), 11406, 11409, - /*11406*/ uint16(xSetOp), uint16(XLATB), - /*11408*/ uint16(xMatch), - /*11409*/ uint16(xCondDataSize), 11406, 11406, 11413, - /*11413*/ uint16(xSetOp), uint16(XLATB), - /*11415*/ uint16(xMatch), - /*11416*/ uint16(xCondByte), 64, - 0xc0, 11587, - 0xc1, 11587, - 0xc2, 11587, - 0xc3, 11587, - 0xc4, 11587, - 0xc5, 11587, - 0xc6, 11587, - 0xc7, 11587, - 0xc8, 11592, - 0xc9, 11592, - 0xca, 11592, - 0xcb, 11592, - 0xcc, 11592, - 0xcd, 11592, - 0xce, 11592, - 0xcf, 11592, - 0xd0, 11597, - 0xd1, 11597, - 0xd2, 11597, - 0xd3, 11597, - 0xd4, 11597, - 0xd5, 11597, - 0xd6, 11597, - 0xd7, 11597, - 0xd8, 11601, - 0xd9, 11601, - 0xda, 11601, - 0xdb, 11601, - 0xdc, 11601, - 0xdd, 11601, - 0xde, 11601, - 0xdf, 11601, - 0xe0, 11605, - 0xe1, 11605, - 0xe2, 11605, - 0xe3, 11605, - 0xe4, 11605, - 0xe5, 11605, - 0xe6, 11605, - 0xe7, 11605, - 0xe8, 11610, - 0xe9, 11610, - 0xea, 11610, - 0xeb, 11610, - 0xec, 11610, - 0xed, 11610, - 0xee, 11610, - 0xef, 11610, - 0xf0, 11615, - 0xf1, 11615, - 0xf2, 11615, - 0xf3, 11615, - 0xf4, 11615, - 0xf5, 11615, - 0xf6, 11615, - 0xf7, 11615, - 0xf8, 11620, - 0xf9, 11620, - 0xfa, 11620, - 0xfb, 11620, - 0xfc, 11620, - 0xfd, 11620, - 0xfe, 11620, - 0xff, 11620, - /*11546*/ uint16(xCondSlashR), - 11555, // 0 - 11559, // 1 - 11563, // 2 - 11567, // 3 - 11571, // 4 - 11575, // 5 - 11579, // 6 - 11583, // 7 - /*11555*/ uint16(xSetOp), uint16(FADD), - /*11557*/ uint16(xArgM32fp), - /*11558*/ uint16(xMatch), - /*11559*/ uint16(xSetOp), uint16(FMUL), - /*11561*/ uint16(xArgM32fp), - /*11562*/ uint16(xMatch), - /*11563*/ uint16(xSetOp), uint16(FCOM), - /*11565*/ uint16(xArgM32fp), - /*11566*/ uint16(xMatch), - /*11567*/ uint16(xSetOp), uint16(FCOMP), - /*11569*/ uint16(xArgM32fp), - /*11570*/ uint16(xMatch), - /*11571*/ uint16(xSetOp), uint16(FSUB), - /*11573*/ uint16(xArgM32fp), - /*11574*/ uint16(xMatch), - /*11575*/ uint16(xSetOp), uint16(FSUBR), - /*11577*/ uint16(xArgM32fp), - /*11578*/ uint16(xMatch), - /*11579*/ uint16(xSetOp), uint16(FDIV), - /*11581*/ uint16(xArgM32fp), - /*11582*/ uint16(xMatch), - /*11583*/ uint16(xSetOp), uint16(FDIVR), - /*11585*/ uint16(xArgM32fp), - /*11586*/ uint16(xMatch), - /*11587*/ uint16(xSetOp), uint16(FADD), - /*11589*/ uint16(xArgST), - /*11590*/ uint16(xArgSTi), - /*11591*/ uint16(xMatch), - /*11592*/ uint16(xSetOp), uint16(FMUL), - /*11594*/ uint16(xArgST), - /*11595*/ uint16(xArgSTi), - /*11596*/ uint16(xMatch), - /*11597*/ uint16(xSetOp), uint16(FCOM), - /*11599*/ uint16(xArgSTi), - /*11600*/ uint16(xMatch), - /*11601*/ uint16(xSetOp), uint16(FCOMP), - /*11603*/ uint16(xArgSTi), - /*11604*/ uint16(xMatch), - /*11605*/ uint16(xSetOp), uint16(FSUB), - /*11607*/ uint16(xArgST), - /*11608*/ uint16(xArgSTi), - /*11609*/ uint16(xMatch), - /*11610*/ uint16(xSetOp), uint16(FSUBR), - /*11612*/ uint16(xArgST), - /*11613*/ uint16(xArgSTi), - /*11614*/ uint16(xMatch), - /*11615*/ uint16(xSetOp), uint16(FDIV), - /*11617*/ uint16(xArgST), - /*11618*/ uint16(xArgSTi), - /*11619*/ uint16(xMatch), - /*11620*/ uint16(xSetOp), uint16(FDIVR), - /*11622*/ uint16(xArgST), - /*11623*/ uint16(xArgSTi), - /*11624*/ uint16(xMatch), - /*11625*/ uint16(xCondByte), 44, - 0xc0, 11752, - 0xc1, 11752, - 0xc2, 11752, - 0xc3, 11752, - 0xc4, 11752, - 0xc5, 11752, - 0xc6, 11752, - 0xc7, 11752, - 0xc8, 11756, - 0xc9, 11756, - 0xca, 11756, - 0xcb, 11756, - 0xcc, 11756, - 0xcd, 11756, - 0xce, 11756, - 0xcf, 11756, - 0xD0, 11760, - 0xE0, 11763, - 0xE1, 11766, - 0xE4, 11769, - 0xE5, 11772, - 0xE8, 11775, - 0xE9, 11778, - 0xEA, 11781, - 0xEB, 11784, - 0xEC, 11787, - 0xED, 11790, - 0xEE, 11793, - 0xF0, 11796, - 0xF1, 11799, - 0xF2, 11802, - 0xF3, 11805, - 0xF4, 11808, - 0xF5, 11811, - 0xF6, 11814, - 0xF7, 11817, - 0xF8, 11820, - 0xF9, 11823, - 0xFA, 11826, - 0xFB, 11829, - 0xFC, 11832, - 0xFD, 11835, - 0xFE, 11838, - 0xFF, 11841, - /*11715*/ uint16(xCondSlashR), - 11724, // 0 + /*11181*/ uint16(xCondDataSize), 11171, 11176, 11185, + /*11185*/ uint16(xSetOp), uint16(RCR), + /*11187*/ uint16(xArgRM64), + /*11188*/ uint16(xArgCL), + /*11189*/ uint16(xMatch), + /*11190*/ uint16(xCondIs64), 11193, 11207, + /*11193*/ uint16(xCondDataSize), 11197, 11202, 0, + /*11197*/ uint16(xSetOp), uint16(SHL), + /*11199*/ uint16(xArgRM16), + /*11200*/ uint16(xArgCL), + /*11201*/ uint16(xMatch), + /*11202*/ uint16(xSetOp), uint16(SHL), + /*11204*/ uint16(xArgRM32), + /*11205*/ uint16(xArgCL), + /*11206*/ uint16(xMatch), + /*11207*/ uint16(xCondDataSize), 11197, 11202, 11211, + /*11211*/ uint16(xSetOp), uint16(SHL), + /*11213*/ uint16(xArgRM64), + /*11214*/ uint16(xArgCL), + /*11215*/ uint16(xMatch), + /*11216*/ uint16(xCondIs64), 11219, 11233, + /*11219*/ uint16(xCondDataSize), 11223, 11228, 0, + /*11223*/ uint16(xSetOp), uint16(SHR), + /*11225*/ uint16(xArgRM16), + /*11226*/ uint16(xArgCL), + /*11227*/ uint16(xMatch), + /*11228*/ uint16(xSetOp), uint16(SHR), + /*11230*/ uint16(xArgRM32), + /*11231*/ uint16(xArgCL), + /*11232*/ uint16(xMatch), + /*11233*/ uint16(xCondDataSize), 11223, 11228, 11237, + /*11237*/ uint16(xSetOp), uint16(SHR), + /*11239*/ uint16(xArgRM64), + /*11240*/ uint16(xArgCL), + /*11241*/ uint16(xMatch), + /*11242*/ uint16(xCondIs64), 11245, 11259, + /*11245*/ uint16(xCondDataSize), 11249, 11254, 0, + /*11249*/ uint16(xSetOp), uint16(SAR), + /*11251*/ uint16(xArgRM16), + /*11252*/ uint16(xArgCL), + /*11253*/ uint16(xMatch), + /*11254*/ uint16(xSetOp), uint16(SAR), + /*11256*/ uint16(xArgRM32), + /*11257*/ uint16(xArgCL), + /*11258*/ uint16(xMatch), + /*11259*/ uint16(xCondDataSize), 11249, 11254, 11263, + /*11263*/ uint16(xSetOp), uint16(SAR), + /*11265*/ uint16(xArgRM64), + /*11266*/ uint16(xArgCL), + /*11267*/ uint16(xMatch), + /*11268*/ uint16(xCondIs64), 11271, 0, + /*11271*/ uint16(xSetOp), uint16(AAM), + /*11273*/ uint16(xReadIb), + /*11274*/ uint16(xArgImm8u), + /*11275*/ uint16(xMatch), + /*11276*/ uint16(xCondIs64), 11279, 0, + /*11279*/ uint16(xSetOp), uint16(AAD), + /*11281*/ uint16(xReadIb), + /*11282*/ uint16(xArgImm8u), + /*11283*/ uint16(xMatch), + /*11284*/ uint16(xCondIs64), 11287, 11290, + /*11287*/ uint16(xSetOp), uint16(XLATB), + /*11289*/ uint16(xMatch), + /*11290*/ uint16(xCondDataSize), 11287, 11287, 11294, + /*11294*/ uint16(xSetOp), uint16(XLATB), + /*11296*/ uint16(xMatch), + /*11297*/ uint16(xCondByte), 64, + 0xc0, 11468, + 0xc1, 11468, + 0xc2, 11468, + 0xc3, 11468, + 0xc4, 11468, + 0xc5, 11468, + 0xc6, 11468, + 0xc7, 11468, + 0xc8, 11473, + 0xc9, 11473, + 0xca, 11473, + 0xcb, 11473, + 0xcc, 11473, + 0xcd, 11473, + 0xce, 11473, + 0xcf, 11473, + 0xd0, 11478, + 0xd1, 11478, + 0xd2, 11478, + 0xd3, 11478, + 0xd4, 11478, + 0xd5, 11478, + 0xd6, 11478, + 0xd7, 11478, + 0xd8, 11482, + 0xd9, 11482, + 0xda, 11482, + 0xdb, 11482, + 0xdc, 11482, + 0xdd, 11482, + 0xde, 11482, + 0xdf, 11482, + 0xe0, 11486, + 0xe1, 11486, + 0xe2, 11486, + 0xe3, 11486, + 0xe4, 11486, + 0xe5, 11486, + 0xe6, 11486, + 0xe7, 11486, + 0xe8, 11491, + 0xe9, 11491, + 0xea, 11491, + 0xeb, 11491, + 0xec, 11491, + 0xed, 11491, + 0xee, 11491, + 0xef, 11491, + 0xf0, 11496, + 0xf1, 11496, + 0xf2, 11496, + 0xf3, 11496, + 0xf4, 11496, + 0xf5, 11496, + 0xf6, 11496, + 0xf7, 11496, + 0xf8, 11501, + 0xf9, 11501, + 0xfa, 11501, + 0xfb, 11501, + 0xfc, 11501, + 0xfd, 11501, + 0xfe, 11501, + 0xff, 11501, + /*11427*/ uint16(xCondSlashR), + 11436, // 0 + 11440, // 1 + 11444, // 2 + 11448, // 3 + 11452, // 4 + 11456, // 5 + 11460, // 6 + 11464, // 7 + /*11436*/ uint16(xSetOp), uint16(FADD), + /*11438*/ uint16(xArgM32fp), + /*11439*/ uint16(xMatch), + /*11440*/ uint16(xSetOp), uint16(FMUL), + /*11442*/ uint16(xArgM32fp), + /*11443*/ uint16(xMatch), + /*11444*/ uint16(xSetOp), uint16(FCOM), + /*11446*/ uint16(xArgM32fp), + /*11447*/ uint16(xMatch), + /*11448*/ uint16(xSetOp), uint16(FCOMP), + /*11450*/ uint16(xArgM32fp), + /*11451*/ uint16(xMatch), + /*11452*/ uint16(xSetOp), uint16(FSUB), + /*11454*/ uint16(xArgM32fp), + /*11455*/ uint16(xMatch), + /*11456*/ uint16(xSetOp), uint16(FSUBR), + /*11458*/ uint16(xArgM32fp), + /*11459*/ uint16(xMatch), + /*11460*/ uint16(xSetOp), uint16(FDIV), + /*11462*/ uint16(xArgM32fp), + /*11463*/ uint16(xMatch), + /*11464*/ uint16(xSetOp), uint16(FDIVR), + /*11466*/ uint16(xArgM32fp), + /*11467*/ uint16(xMatch), + /*11468*/ uint16(xSetOp), uint16(FADD), + /*11470*/ uint16(xArgST), + /*11471*/ uint16(xArgSTi), + /*11472*/ uint16(xMatch), + /*11473*/ uint16(xSetOp), uint16(FMUL), + /*11475*/ uint16(xArgST), + /*11476*/ uint16(xArgSTi), + /*11477*/ uint16(xMatch), + /*11478*/ uint16(xSetOp), uint16(FCOM), + /*11480*/ uint16(xArgSTi), + /*11481*/ uint16(xMatch), + /*11482*/ uint16(xSetOp), uint16(FCOMP), + /*11484*/ uint16(xArgSTi), + /*11485*/ uint16(xMatch), + /*11486*/ uint16(xSetOp), uint16(FSUB), + /*11488*/ uint16(xArgST), + /*11489*/ uint16(xArgSTi), + /*11490*/ uint16(xMatch), + /*11491*/ uint16(xSetOp), uint16(FSUBR), + /*11493*/ uint16(xArgST), + /*11494*/ uint16(xArgSTi), + /*11495*/ uint16(xMatch), + /*11496*/ uint16(xSetOp), uint16(FDIV), + /*11498*/ uint16(xArgST), + /*11499*/ uint16(xArgSTi), + /*11500*/ uint16(xMatch), + /*11501*/ uint16(xSetOp), uint16(FDIVR), + /*11503*/ uint16(xArgST), + /*11504*/ uint16(xArgSTi), + /*11505*/ uint16(xMatch), + /*11506*/ uint16(xCondByte), 44, + 0xc0, 11633, + 0xc1, 11633, + 0xc2, 11633, + 0xc3, 11633, + 0xc4, 11633, + 0xc5, 11633, + 0xc6, 11633, + 0xc7, 11633, + 0xc8, 11637, + 0xc9, 11637, + 0xca, 11637, + 0xcb, 11637, + 0xcc, 11637, + 0xcd, 11637, + 0xce, 11637, + 0xcf, 11637, + 0xD0, 11641, + 0xE0, 11644, + 0xE1, 11647, + 0xE4, 11650, + 0xE5, 11653, + 0xE8, 11656, + 0xE9, 11659, + 0xEA, 11662, + 0xEB, 11665, + 0xEC, 11668, + 0xED, 11671, + 0xEE, 11674, + 0xF0, 11677, + 0xF1, 11680, + 0xF2, 11683, + 0xF3, 11686, + 0xF4, 11689, + 0xF5, 11692, + 0xF6, 11695, + 0xF7, 11698, + 0xF8, 11701, + 0xF9, 11704, + 0xFA, 11707, + 0xFB, 11710, + 0xFC, 11713, + 0xFD, 11716, + 0xFE, 11719, + 0xFF, 11722, + /*11596*/ uint16(xCondSlashR), + 11605, // 0 0, // 1 - 11728, // 2 - 11732, // 3 - 11736, // 4 - 11740, // 5 - 11744, // 6 - 11748, // 7 - /*11724*/ uint16(xSetOp), uint16(FLD), - /*11726*/ uint16(xArgM32fp), - /*11727*/ uint16(xMatch), - /*11728*/ uint16(xSetOp), uint16(FST), - /*11730*/ uint16(xArgM32fp), - /*11731*/ uint16(xMatch), - /*11732*/ uint16(xSetOp), uint16(FSTP), - /*11734*/ uint16(xArgM32fp), - /*11735*/ uint16(xMatch), - /*11736*/ uint16(xSetOp), uint16(FLDENV), - /*11738*/ uint16(xArgM1428byte), - /*11739*/ uint16(xMatch), - /*11740*/ uint16(xSetOp), uint16(FLDCW), - /*11742*/ uint16(xArgM2byte), - /*11743*/ uint16(xMatch), - /*11744*/ uint16(xSetOp), uint16(FNSTENV), - /*11746*/ uint16(xArgM1428byte), - /*11747*/ uint16(xMatch), - /*11748*/ uint16(xSetOp), uint16(FNSTCW), - /*11750*/ uint16(xArgM2byte), - /*11751*/ uint16(xMatch), - /*11752*/ uint16(xSetOp), uint16(FLD), - /*11754*/ uint16(xArgSTi), - /*11755*/ uint16(xMatch), - /*11756*/ uint16(xSetOp), uint16(FXCH), - /*11758*/ uint16(xArgSTi), - /*11759*/ uint16(xMatch), - /*11760*/ uint16(xSetOp), uint16(FNOP), - /*11762*/ uint16(xMatch), - /*11763*/ uint16(xSetOp), uint16(FCHS), - /*11765*/ uint16(xMatch), - /*11766*/ uint16(xSetOp), uint16(FABS), - /*11768*/ uint16(xMatch), - /*11769*/ uint16(xSetOp), uint16(FTST), - /*11771*/ uint16(xMatch), - /*11772*/ uint16(xSetOp), uint16(FXAM), - /*11774*/ uint16(xMatch), - /*11775*/ uint16(xSetOp), uint16(FLD1), - /*11777*/ uint16(xMatch), - /*11778*/ uint16(xSetOp), uint16(FLDL2T), - /*11780*/ uint16(xMatch), - /*11781*/ uint16(xSetOp), uint16(FLDL2E), - /*11783*/ uint16(xMatch), - /*11784*/ uint16(xSetOp), uint16(FLDPI), - /*11786*/ uint16(xMatch), - /*11787*/ uint16(xSetOp), uint16(FLDLG2), - /*11789*/ uint16(xMatch), - /*11790*/ uint16(xSetOp), uint16(FLDLN2), - /*11792*/ uint16(xMatch), - /*11793*/ uint16(xSetOp), uint16(FLDZ), - /*11795*/ uint16(xMatch), - /*11796*/ uint16(xSetOp), uint16(F2XM1), - /*11798*/ uint16(xMatch), - /*11799*/ uint16(xSetOp), uint16(FYL2X), - /*11801*/ uint16(xMatch), - /*11802*/ uint16(xSetOp), uint16(FPTAN), - /*11804*/ uint16(xMatch), - /*11805*/ uint16(xSetOp), uint16(FPATAN), - /*11807*/ uint16(xMatch), - /*11808*/ uint16(xSetOp), uint16(FXTRACT), - /*11810*/ uint16(xMatch), - /*11811*/ uint16(xSetOp), uint16(FPREM1), + 11609, // 2 + 11613, // 3 + 11617, // 4 + 11621, // 5 + 11625, // 6 + 11629, // 7 + /*11605*/ uint16(xSetOp), uint16(FLD), + /*11607*/ uint16(xArgM32fp), + /*11608*/ uint16(xMatch), + /*11609*/ uint16(xSetOp), uint16(FST), + /*11611*/ uint16(xArgM32fp), + /*11612*/ uint16(xMatch), + /*11613*/ uint16(xSetOp), uint16(FSTP), + /*11615*/ uint16(xArgM32fp), + /*11616*/ uint16(xMatch), + /*11617*/ uint16(xSetOp), uint16(FLDENV), + /*11619*/ uint16(xArgM1428byte), + /*11620*/ uint16(xMatch), + /*11621*/ uint16(xSetOp), uint16(FLDCW), + /*11623*/ uint16(xArgM2byte), + /*11624*/ uint16(xMatch), + /*11625*/ uint16(xSetOp), uint16(FNSTENV), + /*11627*/ uint16(xArgM1428byte), + /*11628*/ uint16(xMatch), + /*11629*/ uint16(xSetOp), uint16(FNSTCW), + /*11631*/ uint16(xArgM2byte), + /*11632*/ uint16(xMatch), + /*11633*/ uint16(xSetOp), uint16(FLD), + /*11635*/ uint16(xArgSTi), + /*11636*/ uint16(xMatch), + /*11637*/ uint16(xSetOp), uint16(FXCH), + /*11639*/ uint16(xArgSTi), + /*11640*/ uint16(xMatch), + /*11641*/ uint16(xSetOp), uint16(FNOP), + /*11643*/ uint16(xMatch), + /*11644*/ uint16(xSetOp), uint16(FCHS), + /*11646*/ uint16(xMatch), + /*11647*/ uint16(xSetOp), uint16(FABS), + /*11649*/ uint16(xMatch), + /*11650*/ uint16(xSetOp), uint16(FTST), + /*11652*/ uint16(xMatch), + /*11653*/ uint16(xSetOp), uint16(FXAM), + /*11655*/ uint16(xMatch), + /*11656*/ uint16(xSetOp), uint16(FLD1), + /*11658*/ uint16(xMatch), + /*11659*/ uint16(xSetOp), uint16(FLDL2T), + /*11661*/ uint16(xMatch), + /*11662*/ uint16(xSetOp), uint16(FLDL2E), + /*11664*/ uint16(xMatch), + /*11665*/ uint16(xSetOp), uint16(FLDPI), + /*11667*/ uint16(xMatch), + /*11668*/ uint16(xSetOp), uint16(FLDLG2), + /*11670*/ uint16(xMatch), + /*11671*/ uint16(xSetOp), uint16(FLDLN2), + /*11673*/ uint16(xMatch), + /*11674*/ uint16(xSetOp), uint16(FLDZ), + /*11676*/ uint16(xMatch), + /*11677*/ uint16(xSetOp), uint16(F2XM1), + /*11679*/ uint16(xMatch), + /*11680*/ uint16(xSetOp), uint16(FYL2X), + /*11682*/ uint16(xMatch), + /*11683*/ uint16(xSetOp), uint16(FPTAN), + /*11685*/ uint16(xMatch), + /*11686*/ uint16(xSetOp), uint16(FPATAN), + /*11688*/ uint16(xMatch), + /*11689*/ uint16(xSetOp), uint16(FXTRACT), + /*11691*/ uint16(xMatch), + /*11692*/ uint16(xSetOp), uint16(FPREM1), + /*11694*/ uint16(xMatch), + /*11695*/ uint16(xSetOp), uint16(FDECSTP), + /*11697*/ uint16(xMatch), + /*11698*/ uint16(xSetOp), uint16(FINCSTP), + /*11700*/ uint16(xMatch), + /*11701*/ uint16(xSetOp), uint16(FPREM), + /*11703*/ uint16(xMatch), + /*11704*/ uint16(xSetOp), uint16(FYL2XP1), + /*11706*/ uint16(xMatch), + /*11707*/ uint16(xSetOp), uint16(FSQRT), + /*11709*/ uint16(xMatch), + /*11710*/ uint16(xSetOp), uint16(FSINCOS), + /*11712*/ uint16(xMatch), + /*11713*/ uint16(xSetOp), uint16(FRNDINT), + /*11715*/ uint16(xMatch), + /*11716*/ uint16(xSetOp), uint16(FSCALE), + /*11718*/ uint16(xMatch), + /*11719*/ uint16(xSetOp), uint16(FSIN), + /*11721*/ uint16(xMatch), + /*11722*/ uint16(xSetOp), uint16(FCOS), + /*11724*/ uint16(xMatch), + /*11725*/ uint16(xCondByte), 33, + 0xc0, 11834, + 0xc1, 11834, + 0xc2, 11834, + 0xc3, 11834, + 0xc4, 11834, + 0xc5, 11834, + 0xc6, 11834, + 0xc7, 11834, + 0xc8, 11839, + 0xc9, 11839, + 0xca, 11839, + 0xcb, 11839, + 0xcc, 11839, + 0xcd, 11839, + 0xce, 11839, + 0xcf, 11839, + 0xd0, 11844, + 0xd1, 11844, + 0xd2, 11844, + 0xd3, 11844, + 0xd4, 11844, + 0xd5, 11844, + 0xd6, 11844, + 0xd7, 11844, + 0xd8, 11849, + 0xd9, 11849, + 0xda, 11849, + 0xdb, 11849, + 0xdc, 11849, + 0xdd, 11849, + 0xde, 11849, + 0xdf, 11849, + 0xE9, 11854, + /*11793*/ uint16(xCondSlashR), + 11802, // 0 + 11806, // 1 + 11810, // 2 + 11814, // 3 + 11818, // 4 + 11822, // 5 + 11826, // 6 + 11830, // 7 + /*11802*/ uint16(xSetOp), uint16(FIADD), + /*11804*/ uint16(xArgM32int), + /*11805*/ uint16(xMatch), + /*11806*/ uint16(xSetOp), uint16(FIMUL), + /*11808*/ uint16(xArgM32int), + /*11809*/ uint16(xMatch), + /*11810*/ uint16(xSetOp), uint16(FICOM), + /*11812*/ uint16(xArgM32int), /*11813*/ uint16(xMatch), - /*11814*/ uint16(xSetOp), uint16(FDECSTP), - /*11816*/ uint16(xMatch), - /*11817*/ uint16(xSetOp), uint16(FINCSTP), - /*11819*/ uint16(xMatch), - /*11820*/ uint16(xSetOp), uint16(FPREM), - /*11822*/ uint16(xMatch), - /*11823*/ uint16(xSetOp), uint16(FYL2XP1), + /*11814*/ uint16(xSetOp), uint16(FICOMP), + /*11816*/ uint16(xArgM32int), + /*11817*/ uint16(xMatch), + /*11818*/ uint16(xSetOp), uint16(FISUB), + /*11820*/ uint16(xArgM32int), + /*11821*/ uint16(xMatch), + /*11822*/ uint16(xSetOp), uint16(FISUBR), + /*11824*/ uint16(xArgM32int), /*11825*/ uint16(xMatch), - /*11826*/ uint16(xSetOp), uint16(FSQRT), - /*11828*/ uint16(xMatch), - /*11829*/ uint16(xSetOp), uint16(FSINCOS), - /*11831*/ uint16(xMatch), - /*11832*/ uint16(xSetOp), uint16(FRNDINT), - /*11834*/ uint16(xMatch), - /*11835*/ uint16(xSetOp), uint16(FSCALE), - /*11837*/ uint16(xMatch), - /*11838*/ uint16(xSetOp), uint16(FSIN), - /*11840*/ uint16(xMatch), - /*11841*/ uint16(xSetOp), uint16(FCOS), + /*11826*/ uint16(xSetOp), uint16(FIDIV), + /*11828*/ uint16(xArgM32int), + /*11829*/ uint16(xMatch), + /*11830*/ uint16(xSetOp), uint16(FIDIVR), + /*11832*/ uint16(xArgM32int), + /*11833*/ uint16(xMatch), + /*11834*/ uint16(xSetOp), uint16(FCMOVB), + /*11836*/ uint16(xArgST), + /*11837*/ uint16(xArgSTi), + /*11838*/ uint16(xMatch), + /*11839*/ uint16(xSetOp), uint16(FCMOVE), + /*11841*/ uint16(xArgST), + /*11842*/ uint16(xArgSTi), /*11843*/ uint16(xMatch), - /*11844*/ uint16(xCondByte), 33, - 0xc0, 11953, - 0xc1, 11953, - 0xc2, 11953, - 0xc3, 11953, - 0xc4, 11953, - 0xc5, 11953, - 0xc6, 11953, - 0xc7, 11953, - 0xc8, 11958, - 0xc9, 11958, - 0xca, 11958, - 0xcb, 11958, - 0xcc, 11958, - 0xcd, 11958, - 0xce, 11958, - 0xcf, 11958, - 0xd0, 11963, - 0xd1, 11963, - 0xd2, 11963, - 0xd3, 11963, - 0xd4, 11963, - 0xd5, 11963, - 0xd6, 11963, - 0xd7, 11963, - 0xd8, 11968, - 0xd9, 11968, - 0xda, 11968, - 0xdb, 11968, - 0xdc, 11968, - 0xdd, 11968, - 0xde, 11968, - 0xdf, 11968, - 0xE9, 11973, - /*11912*/ uint16(xCondSlashR), - 11921, // 0 - 11925, // 1 - 11929, // 2 - 11933, // 3 - 11937, // 4 - 11941, // 5 - 11945, // 6 - 11949, // 7 - /*11921*/ uint16(xSetOp), uint16(FIADD), - /*11923*/ uint16(xArgM32int), - /*11924*/ uint16(xMatch), - /*11925*/ uint16(xSetOp), uint16(FIMUL), - /*11927*/ uint16(xArgM32int), - /*11928*/ uint16(xMatch), - /*11929*/ uint16(xSetOp), uint16(FICOM), - /*11931*/ uint16(xArgM32int), - /*11932*/ uint16(xMatch), - /*11933*/ uint16(xSetOp), uint16(FICOMP), - /*11935*/ uint16(xArgM32int), - /*11936*/ uint16(xMatch), - /*11937*/ uint16(xSetOp), uint16(FISUB), - /*11939*/ uint16(xArgM32int), - /*11940*/ uint16(xMatch), - /*11941*/ uint16(xSetOp), uint16(FISUBR), - /*11943*/ uint16(xArgM32int), - /*11944*/ uint16(xMatch), - /*11945*/ uint16(xSetOp), uint16(FIDIV), - /*11947*/ uint16(xArgM32int), - /*11948*/ uint16(xMatch), - /*11949*/ uint16(xSetOp), uint16(FIDIVR), - /*11951*/ uint16(xArgM32int), - /*11952*/ uint16(xMatch), - /*11953*/ uint16(xSetOp), uint16(FCMOVB), - /*11955*/ uint16(xArgST), - /*11956*/ uint16(xArgSTi), - /*11957*/ uint16(xMatch), - /*11958*/ uint16(xSetOp), uint16(FCMOVE), - /*11960*/ uint16(xArgST), - /*11961*/ uint16(xArgSTi), - /*11962*/ uint16(xMatch), - /*11963*/ uint16(xSetOp), uint16(FCMOVBE), - /*11965*/ uint16(xArgST), - /*11966*/ uint16(xArgSTi), - /*11967*/ uint16(xMatch), - /*11968*/ uint16(xSetOp), uint16(FCMOVU), - /*11970*/ uint16(xArgST), - /*11971*/ uint16(xArgSTi), - /*11972*/ uint16(xMatch), - /*11973*/ uint16(xSetOp), uint16(FUCOMPP), - /*11975*/ uint16(xMatch), - /*11976*/ uint16(xCondByte), 50, - 0xc0, 12111, - 0xc1, 12111, - 0xc2, 12111, - 0xc3, 12111, - 0xc4, 12111, - 0xc5, 12111, - 0xc6, 12111, - 0xc7, 12111, - 0xc8, 12116, - 0xc9, 12116, - 0xca, 12116, - 0xcb, 12116, - 0xcc, 12116, - 0xcd, 12116, - 0xce, 12116, - 0xcf, 12116, - 0xd0, 12121, - 0xd1, 12121, - 0xd2, 12121, - 0xd3, 12121, - 0xd4, 12121, - 0xd5, 12121, - 0xd6, 12121, - 0xd7, 12121, - 0xd8, 12126, - 0xd9, 12126, - 0xda, 12126, - 0xdb, 12126, - 0xdc, 12126, - 0xdd, 12126, - 0xde, 12126, - 0xdf, 12126, - 0xE2, 12131, - 0xE3, 12134, - 0xe8, 12137, - 0xe9, 12137, - 0xea, 12137, - 0xeb, 12137, - 0xec, 12137, - 0xed, 12137, - 0xee, 12137, - 0xef, 12137, - 0xf0, 12142, - 0xf1, 12142, - 0xf2, 12142, - 0xf3, 12142, - 0xf4, 12142, - 0xf5, 12142, - 0xf6, 12142, - 0xf7, 12142, - /*12078*/ uint16(xCondSlashR), - 12087, // 0 - 12091, // 1 - 12095, // 2 - 12099, // 3 + /*11844*/ uint16(xSetOp), uint16(FCMOVBE), + /*11846*/ uint16(xArgST), + /*11847*/ uint16(xArgSTi), + /*11848*/ uint16(xMatch), + /*11849*/ uint16(xSetOp), uint16(FCMOVU), + /*11851*/ uint16(xArgST), + /*11852*/ uint16(xArgSTi), + /*11853*/ uint16(xMatch), + /*11854*/ uint16(xSetOp), uint16(FUCOMPP), + /*11856*/ uint16(xMatch), + /*11857*/ uint16(xCondByte), 50, + 0xc0, 11992, + 0xc1, 11992, + 0xc2, 11992, + 0xc3, 11992, + 0xc4, 11992, + 0xc5, 11992, + 0xc6, 11992, + 0xc7, 11992, + 0xc8, 11997, + 0xc9, 11997, + 0xca, 11997, + 0xcb, 11997, + 0xcc, 11997, + 0xcd, 11997, + 0xce, 11997, + 0xcf, 11997, + 0xd0, 12002, + 0xd1, 12002, + 0xd2, 12002, + 0xd3, 12002, + 0xd4, 12002, + 0xd5, 12002, + 0xd6, 12002, + 0xd7, 12002, + 0xd8, 12007, + 0xd9, 12007, + 0xda, 12007, + 0xdb, 12007, + 0xdc, 12007, + 0xdd, 12007, + 0xde, 12007, + 0xdf, 12007, + 0xE2, 12012, + 0xE3, 12015, + 0xe8, 12018, + 0xe9, 12018, + 0xea, 12018, + 0xeb, 12018, + 0xec, 12018, + 0xed, 12018, + 0xee, 12018, + 0xef, 12018, + 0xf0, 12023, + 0xf1, 12023, + 0xf2, 12023, + 0xf3, 12023, + 0xf4, 12023, + 0xf5, 12023, + 0xf6, 12023, + 0xf7, 12023, + /*11959*/ uint16(xCondSlashR), + 11968, // 0 + 11972, // 1 + 11976, // 2 + 11980, // 3 0, // 4 - 12103, // 5 + 11984, // 5 0, // 6 - 12107, // 7 - /*12087*/ uint16(xSetOp), uint16(FILD), - /*12089*/ uint16(xArgM32int), - /*12090*/ uint16(xMatch), - /*12091*/ uint16(xSetOp), uint16(FISTTP), - /*12093*/ uint16(xArgM32int), - /*12094*/ uint16(xMatch), - /*12095*/ uint16(xSetOp), uint16(FIST), - /*12097*/ uint16(xArgM32int), - /*12098*/ uint16(xMatch), - /*12099*/ uint16(xSetOp), uint16(FISTP), - /*12101*/ uint16(xArgM32int), - /*12102*/ uint16(xMatch), - /*12103*/ uint16(xSetOp), uint16(FLD), - /*12105*/ uint16(xArgM80fp), - /*12106*/ uint16(xMatch), - /*12107*/ uint16(xSetOp), uint16(FSTP), - /*12109*/ uint16(xArgM80fp), - /*12110*/ uint16(xMatch), - /*12111*/ uint16(xSetOp), uint16(FCMOVNB), - /*12113*/ uint16(xArgST), - /*12114*/ uint16(xArgSTi), - /*12115*/ uint16(xMatch), - /*12116*/ uint16(xSetOp), uint16(FCMOVNE), - /*12118*/ uint16(xArgST), - /*12119*/ uint16(xArgSTi), - /*12120*/ uint16(xMatch), - /*12121*/ uint16(xSetOp), uint16(FCMOVNBE), - /*12123*/ uint16(xArgST), - /*12124*/ uint16(xArgSTi), - /*12125*/ uint16(xMatch), - /*12126*/ uint16(xSetOp), uint16(FCMOVNU), - /*12128*/ uint16(xArgST), - /*12129*/ uint16(xArgSTi), - /*12130*/ uint16(xMatch), - /*12131*/ uint16(xSetOp), uint16(FNCLEX), - /*12133*/ uint16(xMatch), - /*12134*/ uint16(xSetOp), uint16(FNINIT), - /*12136*/ uint16(xMatch), - /*12137*/ uint16(xSetOp), uint16(FUCOMI), - /*12139*/ uint16(xArgST), - /*12140*/ uint16(xArgSTi), - /*12141*/ uint16(xMatch), - /*12142*/ uint16(xSetOp), uint16(FCOMI), - /*12144*/ uint16(xArgST), - /*12145*/ uint16(xArgSTi), + 11988, // 7 + /*11968*/ uint16(xSetOp), uint16(FILD), + /*11970*/ uint16(xArgM32int), + /*11971*/ uint16(xMatch), + /*11972*/ uint16(xSetOp), uint16(FISTTP), + /*11974*/ uint16(xArgM32int), + /*11975*/ uint16(xMatch), + /*11976*/ uint16(xSetOp), uint16(FIST), + /*11978*/ uint16(xArgM32int), + /*11979*/ uint16(xMatch), + /*11980*/ uint16(xSetOp), uint16(FISTP), + /*11982*/ uint16(xArgM32int), + /*11983*/ uint16(xMatch), + /*11984*/ uint16(xSetOp), uint16(FLD), + /*11986*/ uint16(xArgM80fp), + /*11987*/ uint16(xMatch), + /*11988*/ uint16(xSetOp), uint16(FSTP), + /*11990*/ uint16(xArgM80fp), + /*11991*/ uint16(xMatch), + /*11992*/ uint16(xSetOp), uint16(FCMOVNB), + /*11994*/ uint16(xArgST), + /*11995*/ uint16(xArgSTi), + /*11996*/ uint16(xMatch), + /*11997*/ uint16(xSetOp), uint16(FCMOVNE), + /*11999*/ uint16(xArgST), + /*12000*/ uint16(xArgSTi), + /*12001*/ uint16(xMatch), + /*12002*/ uint16(xSetOp), uint16(FCMOVNBE), + /*12004*/ uint16(xArgST), + /*12005*/ uint16(xArgSTi), + /*12006*/ uint16(xMatch), + /*12007*/ uint16(xSetOp), uint16(FCMOVNU), + /*12009*/ uint16(xArgST), + /*12010*/ uint16(xArgSTi), + /*12011*/ uint16(xMatch), + /*12012*/ uint16(xSetOp), uint16(FNCLEX), + /*12014*/ uint16(xMatch), + /*12015*/ uint16(xSetOp), uint16(FNINIT), + /*12017*/ uint16(xMatch), + /*12018*/ uint16(xSetOp), uint16(FUCOMI), + /*12020*/ uint16(xArgST), + /*12021*/ uint16(xArgSTi), + /*12022*/ uint16(xMatch), + /*12023*/ uint16(xSetOp), uint16(FCOMI), + /*12025*/ uint16(xArgST), + /*12026*/ uint16(xArgSTi), + /*12027*/ uint16(xMatch), + /*12028*/ uint16(xCondByte), 48, + 0xc0, 12167, + 0xc1, 12167, + 0xc2, 12167, + 0xc3, 12167, + 0xc4, 12167, + 0xc5, 12167, + 0xc6, 12167, + 0xc7, 12167, + 0xc8, 12172, + 0xc9, 12172, + 0xca, 12172, + 0xcb, 12172, + 0xcc, 12172, + 0xcd, 12172, + 0xce, 12172, + 0xcf, 12172, + 0xe0, 12177, + 0xe1, 12177, + 0xe2, 12177, + 0xe3, 12177, + 0xe4, 12177, + 0xe5, 12177, + 0xe6, 12177, + 0xe7, 12177, + 0xe8, 12182, + 0xe9, 12182, + 0xea, 12182, + 0xeb, 12182, + 0xec, 12182, + 0xed, 12182, + 0xee, 12182, + 0xef, 12182, + 0xf0, 12187, + 0xf1, 12187, + 0xf2, 12187, + 0xf3, 12187, + 0xf4, 12187, + 0xf5, 12187, + 0xf6, 12187, + 0xf7, 12187, + 0xf8, 12192, + 0xf9, 12192, + 0xfa, 12192, + 0xfb, 12192, + 0xfc, 12192, + 0xfd, 12192, + 0xfe, 12192, + 0xff, 12192, + /*12126*/ uint16(xCondSlashR), + 12135, // 0 + 12139, // 1 + 12143, // 2 + 12147, // 3 + 12151, // 4 + 12155, // 5 + 12159, // 6 + 12163, // 7 + /*12135*/ uint16(xSetOp), uint16(FADD), + /*12137*/ uint16(xArgM64fp), + /*12138*/ uint16(xMatch), + /*12139*/ uint16(xSetOp), uint16(FMUL), + /*12141*/ uint16(xArgM64fp), + /*12142*/ uint16(xMatch), + /*12143*/ uint16(xSetOp), uint16(FCOM), + /*12145*/ uint16(xArgM64fp), /*12146*/ uint16(xMatch), - /*12147*/ uint16(xCondByte), 48, - 0xc0, 12286, - 0xc1, 12286, - 0xc2, 12286, - 0xc3, 12286, - 0xc4, 12286, - 0xc5, 12286, - 0xc6, 12286, - 0xc7, 12286, - 0xc8, 12291, - 0xc9, 12291, - 0xca, 12291, - 0xcb, 12291, - 0xcc, 12291, - 0xcd, 12291, - 0xce, 12291, - 0xcf, 12291, - 0xe0, 12296, - 0xe1, 12296, - 0xe2, 12296, - 0xe3, 12296, - 0xe4, 12296, - 0xe5, 12296, - 0xe6, 12296, - 0xe7, 12296, - 0xe8, 12301, - 0xe9, 12301, - 0xea, 12301, - 0xeb, 12301, - 0xec, 12301, - 0xed, 12301, - 0xee, 12301, - 0xef, 12301, - 0xf0, 12306, - 0xf1, 12306, - 0xf2, 12306, - 0xf3, 12306, - 0xf4, 12306, - 0xf5, 12306, - 0xf6, 12306, - 0xf7, 12306, - 0xf8, 12311, - 0xf9, 12311, - 0xfa, 12311, - 0xfb, 12311, - 0xfc, 12311, - 0xfd, 12311, - 0xfe, 12311, - 0xff, 12311, - /*12245*/ uint16(xCondSlashR), - 12254, // 0 - 12258, // 1 - 12262, // 2 - 12266, // 3 - 12270, // 4 - 12274, // 5 - 12278, // 6 - 12282, // 7 - /*12254*/ uint16(xSetOp), uint16(FADD), - /*12256*/ uint16(xArgM64fp), - /*12257*/ uint16(xMatch), - /*12258*/ uint16(xSetOp), uint16(FMUL), - /*12260*/ uint16(xArgM64fp), - /*12261*/ uint16(xMatch), - /*12262*/ uint16(xSetOp), uint16(FCOM), - /*12264*/ uint16(xArgM64fp), - /*12265*/ uint16(xMatch), - /*12266*/ uint16(xSetOp), uint16(FCOMP), - /*12268*/ uint16(xArgM64fp), - /*12269*/ uint16(xMatch), - /*12270*/ uint16(xSetOp), uint16(FSUB), - /*12272*/ uint16(xArgM64fp), - /*12273*/ uint16(xMatch), - /*12274*/ uint16(xSetOp), uint16(FSUBR), - /*12276*/ uint16(xArgM64fp), - /*12277*/ uint16(xMatch), - /*12278*/ uint16(xSetOp), uint16(FDIV), - /*12280*/ uint16(xArgM64fp), - /*12281*/ uint16(xMatch), - /*12282*/ uint16(xSetOp), uint16(FDIVR), - /*12284*/ uint16(xArgM64fp), - /*12285*/ uint16(xMatch), - /*12286*/ uint16(xSetOp), uint16(FADD), - /*12288*/ uint16(xArgSTi), - /*12289*/ uint16(xArgST), - /*12290*/ uint16(xMatch), - /*12291*/ uint16(xSetOp), uint16(FMUL), - /*12293*/ uint16(xArgSTi), - /*12294*/ uint16(xArgST), + /*12147*/ uint16(xSetOp), uint16(FCOMP), + /*12149*/ uint16(xArgM64fp), + /*12150*/ uint16(xMatch), + /*12151*/ uint16(xSetOp), uint16(FSUB), + /*12153*/ uint16(xArgM64fp), + /*12154*/ uint16(xMatch), + /*12155*/ uint16(xSetOp), uint16(FSUBR), + /*12157*/ uint16(xArgM64fp), + /*12158*/ uint16(xMatch), + /*12159*/ uint16(xSetOp), uint16(FDIV), + /*12161*/ uint16(xArgM64fp), + /*12162*/ uint16(xMatch), + /*12163*/ uint16(xSetOp), uint16(FDIVR), + /*12165*/ uint16(xArgM64fp), + /*12166*/ uint16(xMatch), + /*12167*/ uint16(xSetOp), uint16(FADD), + /*12169*/ uint16(xArgSTi), + /*12170*/ uint16(xArgST), + /*12171*/ uint16(xMatch), + /*12172*/ uint16(xSetOp), uint16(FMUL), + /*12174*/ uint16(xArgSTi), + /*12175*/ uint16(xArgST), + /*12176*/ uint16(xMatch), + /*12177*/ uint16(xSetOp), uint16(FSUBR), + /*12179*/ uint16(xArgSTi), + /*12180*/ uint16(xArgST), + /*12181*/ uint16(xMatch), + /*12182*/ uint16(xSetOp), uint16(FSUB), + /*12184*/ uint16(xArgSTi), + /*12185*/ uint16(xArgST), + /*12186*/ uint16(xMatch), + /*12187*/ uint16(xSetOp), uint16(FDIVR), + /*12189*/ uint16(xArgSTi), + /*12190*/ uint16(xArgST), + /*12191*/ uint16(xMatch), + /*12192*/ uint16(xSetOp), uint16(FDIV), + /*12194*/ uint16(xArgSTi), + /*12195*/ uint16(xArgST), + /*12196*/ uint16(xMatch), + /*12197*/ uint16(xCondByte), 40, + 0xc0, 12316, + 0xc1, 12316, + 0xc2, 12316, + 0xc3, 12316, + 0xc4, 12316, + 0xc5, 12316, + 0xc6, 12316, + 0xc7, 12316, + 0xd0, 12320, + 0xd1, 12320, + 0xd2, 12320, + 0xd3, 12320, + 0xd4, 12320, + 0xd5, 12320, + 0xd6, 12320, + 0xd7, 12320, + 0xd8, 12324, + 0xd9, 12324, + 0xda, 12324, + 0xdb, 12324, + 0xdc, 12324, + 0xdd, 12324, + 0xde, 12324, + 0xdf, 12324, + 0xe0, 12328, + 0xe1, 12328, + 0xe2, 12328, + 0xe3, 12328, + 0xe4, 12328, + 0xe5, 12328, + 0xe6, 12328, + 0xe7, 12328, + 0xe8, 12332, + 0xe9, 12332, + 0xea, 12332, + 0xeb, 12332, + 0xec, 12332, + 0xed, 12332, + 0xee, 12332, + 0xef, 12332, + /*12279*/ uint16(xCondSlashR), + 12288, // 0 + 12292, // 1 + 12296, // 2 + 12300, // 3 + 12304, // 4 + 0, // 5 + 12308, // 6 + 12312, // 7 + /*12288*/ uint16(xSetOp), uint16(FLD), + /*12290*/ uint16(xArgM64fp), + /*12291*/ uint16(xMatch), + /*12292*/ uint16(xSetOp), uint16(FISTTP), + /*12294*/ uint16(xArgM64int), /*12295*/ uint16(xMatch), - /*12296*/ uint16(xSetOp), uint16(FSUBR), - /*12298*/ uint16(xArgSTi), - /*12299*/ uint16(xArgST), - /*12300*/ uint16(xMatch), - /*12301*/ uint16(xSetOp), uint16(FSUB), - /*12303*/ uint16(xArgSTi), - /*12304*/ uint16(xArgST), - /*12305*/ uint16(xMatch), - /*12306*/ uint16(xSetOp), uint16(FDIVR), - /*12308*/ uint16(xArgSTi), - /*12309*/ uint16(xArgST), - /*12310*/ uint16(xMatch), - /*12311*/ uint16(xSetOp), uint16(FDIV), - /*12313*/ uint16(xArgSTi), - /*12314*/ uint16(xArgST), + /*12296*/ uint16(xSetOp), uint16(FST), + /*12298*/ uint16(xArgM64fp), + /*12299*/ uint16(xMatch), + /*12300*/ uint16(xSetOp), uint16(FSTP), + /*12302*/ uint16(xArgM64fp), + /*12303*/ uint16(xMatch), + /*12304*/ uint16(xSetOp), uint16(FRSTOR), + /*12306*/ uint16(xArgM94108byte), + /*12307*/ uint16(xMatch), + /*12308*/ uint16(xSetOp), uint16(FNSAVE), + /*12310*/ uint16(xArgM94108byte), + /*12311*/ uint16(xMatch), + /*12312*/ uint16(xSetOp), uint16(FNSTSW), + /*12314*/ uint16(xArgM2byte), /*12315*/ uint16(xMatch), - /*12316*/ uint16(xCondByte), 40, - 0xc0, 12435, - 0xc1, 12435, - 0xc2, 12435, - 0xc3, 12435, - 0xc4, 12435, - 0xc5, 12435, - 0xc6, 12435, - 0xc7, 12435, - 0xd0, 12439, - 0xd1, 12439, - 0xd2, 12439, - 0xd3, 12439, - 0xd4, 12439, - 0xd5, 12439, - 0xd6, 12439, - 0xd7, 12439, - 0xd8, 12443, - 0xd9, 12443, - 0xda, 12443, - 0xdb, 12443, - 0xdc, 12443, - 0xdd, 12443, - 0xde, 12443, - 0xdf, 12443, - 0xe0, 12447, - 0xe1, 12447, - 0xe2, 12447, - 0xe3, 12447, - 0xe4, 12447, - 0xe5, 12447, - 0xe6, 12447, - 0xe7, 12447, - 0xe8, 12451, - 0xe9, 12451, - 0xea, 12451, - 0xeb, 12451, - 0xec, 12451, - 0xed, 12451, - 0xee, 12451, - 0xef, 12451, - /*12398*/ uint16(xCondSlashR), - 12407, // 0 - 12411, // 1 - 12415, // 2 - 12419, // 3 - 12423, // 4 - 0, // 5 - 12427, // 6 - 12431, // 7 - /*12407*/ uint16(xSetOp), uint16(FLD), - /*12409*/ uint16(xArgM64fp), - /*12410*/ uint16(xMatch), - /*12411*/ uint16(xSetOp), uint16(FISTTP), - /*12413*/ uint16(xArgM64int), - /*12414*/ uint16(xMatch), - /*12415*/ uint16(xSetOp), uint16(FST), - /*12417*/ uint16(xArgM64fp), - /*12418*/ uint16(xMatch), - /*12419*/ uint16(xSetOp), uint16(FSTP), - /*12421*/ uint16(xArgM64fp), - /*12422*/ uint16(xMatch), - /*12423*/ uint16(xSetOp), uint16(FRSTOR), - /*12425*/ uint16(xArgM94108byte), - /*12426*/ uint16(xMatch), - /*12427*/ uint16(xSetOp), uint16(FNSAVE), - /*12429*/ uint16(xArgM94108byte), - /*12430*/ uint16(xMatch), - /*12431*/ uint16(xSetOp), uint16(FNSTSW), - /*12433*/ uint16(xArgM2byte), - /*12434*/ uint16(xMatch), - /*12435*/ uint16(xSetOp), uint16(FFREE), - /*12437*/ uint16(xArgSTi), - /*12438*/ uint16(xMatch), - /*12439*/ uint16(xSetOp), uint16(FST), - /*12441*/ uint16(xArgSTi), - /*12442*/ uint16(xMatch), - /*12443*/ uint16(xSetOp), uint16(FSTP), - /*12445*/ uint16(xArgSTi), - /*12446*/ uint16(xMatch), - /*12447*/ uint16(xSetOp), uint16(FUCOM), - /*12449*/ uint16(xArgSTi), - /*12450*/ uint16(xMatch), - /*12451*/ uint16(xSetOp), uint16(FUCOMP), - /*12453*/ uint16(xArgSTi), - /*12454*/ uint16(xMatch), - /*12455*/ uint16(xCondByte), 49, - 0xc0, 12596, - 0xc1, 12596, - 0xc2, 12596, - 0xc3, 12596, - 0xc4, 12596, - 0xc5, 12596, - 0xc6, 12596, - 0xc7, 12596, - 0xc8, 12601, - 0xc9, 12601, - 0xca, 12601, - 0xcb, 12601, - 0xcc, 12601, - 0xcd, 12601, - 0xce, 12601, - 0xcf, 12601, - 0xD9, 12606, - 0xe0, 12609, - 0xe1, 12609, - 0xe2, 12609, - 0xe3, 12609, - 0xe4, 12609, - 0xe5, 12609, - 0xe6, 12609, - 0xe7, 12609, - 0xe8, 12614, - 0xe9, 12614, - 0xea, 12614, - 0xeb, 12614, - 0xec, 12614, - 0xed, 12614, - 0xee, 12614, - 0xef, 12614, - 0xf0, 12619, - 0xf1, 12619, - 0xf2, 12619, - 0xf3, 12619, - 0xf4, 12619, - 0xf5, 12619, - 0xf6, 12619, - 0xf7, 12619, - 0xf8, 12624, - 0xf9, 12624, - 0xfa, 12624, - 0xfb, 12624, - 0xfc, 12624, - 0xfd, 12624, - 0xfe, 12624, - 0xff, 12624, - /*12555*/ uint16(xCondSlashR), - 12564, // 0 - 12568, // 1 - 12572, // 2 - 12576, // 3 - 12580, // 4 - 12584, // 5 - 12588, // 6 - 12592, // 7 - /*12564*/ uint16(xSetOp), uint16(FIADD), - /*12566*/ uint16(xArgM16int), - /*12567*/ uint16(xMatch), - /*12568*/ uint16(xSetOp), uint16(FIMUL), - /*12570*/ uint16(xArgM16int), - /*12571*/ uint16(xMatch), - /*12572*/ uint16(xSetOp), uint16(FICOM), - /*12574*/ uint16(xArgM16int), - /*12575*/ uint16(xMatch), - /*12576*/ uint16(xSetOp), uint16(FICOMP), - /*12578*/ uint16(xArgM16int), - /*12579*/ uint16(xMatch), - /*12580*/ uint16(xSetOp), uint16(FISUB), - /*12582*/ uint16(xArgM16int), - /*12583*/ uint16(xMatch), - /*12584*/ uint16(xSetOp), uint16(FISUBR), - /*12586*/ uint16(xArgM16int), - /*12587*/ uint16(xMatch), - /*12588*/ uint16(xSetOp), uint16(FIDIV), - /*12590*/ uint16(xArgM16int), - /*12591*/ uint16(xMatch), - /*12592*/ uint16(xSetOp), uint16(FIDIVR), - /*12594*/ uint16(xArgM16int), - /*12595*/ uint16(xMatch), - /*12596*/ uint16(xSetOp), uint16(FADDP), - /*12598*/ uint16(xArgSTi), - /*12599*/ uint16(xArgST), - /*12600*/ uint16(xMatch), - /*12601*/ uint16(xSetOp), uint16(FMULP), - /*12603*/ uint16(xArgSTi), - /*12604*/ uint16(xArgST), - /*12605*/ uint16(xMatch), - /*12606*/ uint16(xSetOp), uint16(FCOMPP), - /*12608*/ uint16(xMatch), - /*12609*/ uint16(xSetOp), uint16(FSUBRP), - /*12611*/ uint16(xArgSTi), - /*12612*/ uint16(xArgST), - /*12613*/ uint16(xMatch), - /*12614*/ uint16(xSetOp), uint16(FSUBP), - /*12616*/ uint16(xArgSTi), - /*12617*/ uint16(xArgST), - /*12618*/ uint16(xMatch), - /*12619*/ uint16(xSetOp), uint16(FDIVRP), - /*12621*/ uint16(xArgSTi), - /*12622*/ uint16(xArgST), - /*12623*/ uint16(xMatch), - /*12624*/ uint16(xSetOp), uint16(FDIVP), - /*12626*/ uint16(xArgSTi), - /*12627*/ uint16(xArgST), - /*12628*/ uint16(xMatch), - /*12629*/ uint16(xCondByte), 25, - 0xc0, 12722, - 0xc1, 12722, - 0xc2, 12722, - 0xc3, 12722, - 0xc4, 12722, - 0xc5, 12722, - 0xc6, 12722, - 0xc7, 12722, - 0xE0, 12726, - 0xe8, 12730, - 0xe9, 12730, - 0xea, 12730, - 0xeb, 12730, - 0xec, 12730, - 0xed, 12730, - 0xee, 12730, - 0xef, 12730, - 0xf0, 12735, - 0xf1, 12735, - 0xf2, 12735, - 0xf3, 12735, - 0xf4, 12735, - 0xf5, 12735, - 0xf6, 12735, - 0xf7, 12735, - /*12681*/ uint16(xCondSlashR), - 12690, // 0 - 12694, // 1 - 12698, // 2 - 12702, // 3 - 12706, // 4 - 12710, // 5 - 12714, // 6 - 12718, // 7 - /*12690*/ uint16(xSetOp), uint16(FILD), - /*12692*/ uint16(xArgM16int), - /*12693*/ uint16(xMatch), - /*12694*/ uint16(xSetOp), uint16(FISTTP), - /*12696*/ uint16(xArgM16int), - /*12697*/ uint16(xMatch), - /*12698*/ uint16(xSetOp), uint16(FIST), - /*12700*/ uint16(xArgM16int), - /*12701*/ uint16(xMatch), - /*12702*/ uint16(xSetOp), uint16(FISTP), - /*12704*/ uint16(xArgM16int), + /*12316*/ uint16(xSetOp), uint16(FFREE), + /*12318*/ uint16(xArgSTi), + /*12319*/ uint16(xMatch), + /*12320*/ uint16(xSetOp), uint16(FST), + /*12322*/ uint16(xArgSTi), + /*12323*/ uint16(xMatch), + /*12324*/ uint16(xSetOp), uint16(FSTP), + /*12326*/ uint16(xArgSTi), + /*12327*/ uint16(xMatch), + /*12328*/ uint16(xSetOp), uint16(FUCOM), + /*12330*/ uint16(xArgSTi), + /*12331*/ uint16(xMatch), + /*12332*/ uint16(xSetOp), uint16(FUCOMP), + /*12334*/ uint16(xArgSTi), + /*12335*/ uint16(xMatch), + /*12336*/ uint16(xCondByte), 49, + 0xc0, 12477, + 0xc1, 12477, + 0xc2, 12477, + 0xc3, 12477, + 0xc4, 12477, + 0xc5, 12477, + 0xc6, 12477, + 0xc7, 12477, + 0xc8, 12482, + 0xc9, 12482, + 0xca, 12482, + 0xcb, 12482, + 0xcc, 12482, + 0xcd, 12482, + 0xce, 12482, + 0xcf, 12482, + 0xD9, 12487, + 0xe0, 12490, + 0xe1, 12490, + 0xe2, 12490, + 0xe3, 12490, + 0xe4, 12490, + 0xe5, 12490, + 0xe6, 12490, + 0xe7, 12490, + 0xe8, 12495, + 0xe9, 12495, + 0xea, 12495, + 0xeb, 12495, + 0xec, 12495, + 0xed, 12495, + 0xee, 12495, + 0xef, 12495, + 0xf0, 12500, + 0xf1, 12500, + 0xf2, 12500, + 0xf3, 12500, + 0xf4, 12500, + 0xf5, 12500, + 0xf6, 12500, + 0xf7, 12500, + 0xf8, 12505, + 0xf9, 12505, + 0xfa, 12505, + 0xfb, 12505, + 0xfc, 12505, + 0xfd, 12505, + 0xfe, 12505, + 0xff, 12505, + /*12436*/ uint16(xCondSlashR), + 12445, // 0 + 12449, // 1 + 12453, // 2 + 12457, // 3 + 12461, // 4 + 12465, // 5 + 12469, // 6 + 12473, // 7 + /*12445*/ uint16(xSetOp), uint16(FIADD), + /*12447*/ uint16(xArgM16int), + /*12448*/ uint16(xMatch), + /*12449*/ uint16(xSetOp), uint16(FIMUL), + /*12451*/ uint16(xArgM16int), + /*12452*/ uint16(xMatch), + /*12453*/ uint16(xSetOp), uint16(FICOM), + /*12455*/ uint16(xArgM16int), + /*12456*/ uint16(xMatch), + /*12457*/ uint16(xSetOp), uint16(FICOMP), + /*12459*/ uint16(xArgM16int), + /*12460*/ uint16(xMatch), + /*12461*/ uint16(xSetOp), uint16(FISUB), + /*12463*/ uint16(xArgM16int), + /*12464*/ uint16(xMatch), + /*12465*/ uint16(xSetOp), uint16(FISUBR), + /*12467*/ uint16(xArgM16int), + /*12468*/ uint16(xMatch), + /*12469*/ uint16(xSetOp), uint16(FIDIV), + /*12471*/ uint16(xArgM16int), + /*12472*/ uint16(xMatch), + /*12473*/ uint16(xSetOp), uint16(FIDIVR), + /*12475*/ uint16(xArgM16int), + /*12476*/ uint16(xMatch), + /*12477*/ uint16(xSetOp), uint16(FADDP), + /*12479*/ uint16(xArgSTi), + /*12480*/ uint16(xArgST), + /*12481*/ uint16(xMatch), + /*12482*/ uint16(xSetOp), uint16(FMULP), + /*12484*/ uint16(xArgSTi), + /*12485*/ uint16(xArgST), + /*12486*/ uint16(xMatch), + /*12487*/ uint16(xSetOp), uint16(FCOMPP), + /*12489*/ uint16(xMatch), + /*12490*/ uint16(xSetOp), uint16(FSUBRP), + /*12492*/ uint16(xArgSTi), + /*12493*/ uint16(xArgST), + /*12494*/ uint16(xMatch), + /*12495*/ uint16(xSetOp), uint16(FSUBP), + /*12497*/ uint16(xArgSTi), + /*12498*/ uint16(xArgST), + /*12499*/ uint16(xMatch), + /*12500*/ uint16(xSetOp), uint16(FDIVRP), + /*12502*/ uint16(xArgSTi), + /*12503*/ uint16(xArgST), + /*12504*/ uint16(xMatch), + /*12505*/ uint16(xSetOp), uint16(FDIVP), + /*12507*/ uint16(xArgSTi), + /*12508*/ uint16(xArgST), + /*12509*/ uint16(xMatch), + /*12510*/ uint16(xCondByte), 25, + 0xc0, 12603, + 0xc1, 12603, + 0xc2, 12603, + 0xc3, 12603, + 0xc4, 12603, + 0xc5, 12603, + 0xc6, 12603, + 0xc7, 12603, + 0xE0, 12607, + 0xe8, 12611, + 0xe9, 12611, + 0xea, 12611, + 0xeb, 12611, + 0xec, 12611, + 0xed, 12611, + 0xee, 12611, + 0xef, 12611, + 0xf0, 12616, + 0xf1, 12616, + 0xf2, 12616, + 0xf3, 12616, + 0xf4, 12616, + 0xf5, 12616, + 0xf6, 12616, + 0xf7, 12616, + /*12562*/ uint16(xCondSlashR), + 12571, // 0 + 12575, // 1 + 12579, // 2 + 12583, // 3 + 12587, // 4 + 12591, // 5 + 12595, // 6 + 12599, // 7 + /*12571*/ uint16(xSetOp), uint16(FILD), + /*12573*/ uint16(xArgM16int), + /*12574*/ uint16(xMatch), + /*12575*/ uint16(xSetOp), uint16(FISTTP), + /*12577*/ uint16(xArgM16int), + /*12578*/ uint16(xMatch), + /*12579*/ uint16(xSetOp), uint16(FIST), + /*12581*/ uint16(xArgM16int), + /*12582*/ uint16(xMatch), + /*12583*/ uint16(xSetOp), uint16(FISTP), + /*12585*/ uint16(xArgM16int), + /*12586*/ uint16(xMatch), + /*12587*/ uint16(xSetOp), uint16(FBLD), + /*12589*/ uint16(xArgM80dec), + /*12590*/ uint16(xMatch), + /*12591*/ uint16(xSetOp), uint16(FILD), + /*12593*/ uint16(xArgM64int), + /*12594*/ uint16(xMatch), + /*12595*/ uint16(xSetOp), uint16(FBSTP), + /*12597*/ uint16(xArgM80bcd), + /*12598*/ uint16(xMatch), + /*12599*/ uint16(xSetOp), uint16(FISTP), + /*12601*/ uint16(xArgM64int), + /*12602*/ uint16(xMatch), + /*12603*/ uint16(xSetOp), uint16(FFREEP), + /*12605*/ uint16(xArgSTi), + /*12606*/ uint16(xMatch), + /*12607*/ uint16(xSetOp), uint16(FNSTSW), + /*12609*/ uint16(xArgAX), + /*12610*/ uint16(xMatch), + /*12611*/ uint16(xSetOp), uint16(FUCOMIP), + /*12613*/ uint16(xArgST), + /*12614*/ uint16(xArgSTi), + /*12615*/ uint16(xMatch), + /*12616*/ uint16(xSetOp), uint16(FCOMIP), + /*12618*/ uint16(xArgST), + /*12619*/ uint16(xArgSTi), + /*12620*/ uint16(xMatch), + /*12621*/ uint16(xSetOp), uint16(LOOPNE), + /*12623*/ uint16(xReadCb), + /*12624*/ uint16(xArgRel8), + /*12625*/ uint16(xMatch), + /*12626*/ uint16(xSetOp), uint16(LOOPE), + /*12628*/ uint16(xReadCb), + /*12629*/ uint16(xArgRel8), + /*12630*/ uint16(xMatch), + /*12631*/ uint16(xSetOp), uint16(LOOP), + /*12633*/ uint16(xReadCb), + /*12634*/ uint16(xArgRel8), + /*12635*/ uint16(xMatch), + /*12636*/ uint16(xCondIs64), 12639, 12653, + /*12639*/ uint16(xCondAddrSize), 12643, 12648, 0, + /*12643*/ uint16(xSetOp), uint16(JCXZ), + /*12645*/ uint16(xReadCb), + /*12646*/ uint16(xArgRel8), + /*12647*/ uint16(xMatch), + /*12648*/ uint16(xSetOp), uint16(JECXZ), + /*12650*/ uint16(xReadCb), + /*12651*/ uint16(xArgRel8), + /*12652*/ uint16(xMatch), + /*12653*/ uint16(xCondAddrSize), 0, 12648, 12657, + /*12657*/ uint16(xSetOp), uint16(JRCXZ), + /*12659*/ uint16(xReadCb), + /*12660*/ uint16(xArgRel8), + /*12661*/ uint16(xMatch), + /*12662*/ uint16(xSetOp), uint16(IN), + /*12664*/ uint16(xReadIb), + /*12665*/ uint16(xArgAL), + /*12666*/ uint16(xArgImm8u), + /*12667*/ uint16(xMatch), + /*12668*/ uint16(xCondDataSize), 12672, 12678, 12684, + /*12672*/ uint16(xSetOp), uint16(IN), + /*12674*/ uint16(xReadIb), + /*12675*/ uint16(xArgAX), + /*12676*/ uint16(xArgImm8u), + /*12677*/ uint16(xMatch), + /*12678*/ uint16(xSetOp), uint16(IN), + /*12680*/ uint16(xReadIb), + /*12681*/ uint16(xArgEAX), + /*12682*/ uint16(xArgImm8u), + /*12683*/ uint16(xMatch), + /*12684*/ uint16(xSetOp), uint16(IN), + /*12686*/ uint16(xReadIb), + /*12687*/ uint16(xArgEAX), + /*12688*/ uint16(xArgImm8u), + /*12689*/ uint16(xMatch), + /*12690*/ uint16(xSetOp), uint16(OUT), + /*12692*/ uint16(xReadIb), + /*12693*/ uint16(xArgImm8u), + /*12694*/ uint16(xArgAL), + /*12695*/ uint16(xMatch), + /*12696*/ uint16(xCondDataSize), 12700, 12706, 12712, + /*12700*/ uint16(xSetOp), uint16(OUT), + /*12702*/ uint16(xReadIb), + /*12703*/ uint16(xArgImm8u), + /*12704*/ uint16(xArgAX), /*12705*/ uint16(xMatch), - /*12706*/ uint16(xSetOp), uint16(FBLD), - /*12708*/ uint16(xArgM80dec), - /*12709*/ uint16(xMatch), - /*12710*/ uint16(xSetOp), uint16(FILD), - /*12712*/ uint16(xArgM64int), - /*12713*/ uint16(xMatch), - /*12714*/ uint16(xSetOp), uint16(FBSTP), - /*12716*/ uint16(xArgM80bcd), + /*12706*/ uint16(xSetOp), uint16(OUT), + /*12708*/ uint16(xReadIb), + /*12709*/ uint16(xArgImm8u), + /*12710*/ uint16(xArgEAX), + /*12711*/ uint16(xMatch), + /*12712*/ uint16(xSetOp), uint16(OUT), + /*12714*/ uint16(xReadIb), + /*12715*/ uint16(xArgImm8u), + /*12716*/ uint16(xArgEAX), /*12717*/ uint16(xMatch), - /*12718*/ uint16(xSetOp), uint16(FISTP), - /*12720*/ uint16(xArgM64int), - /*12721*/ uint16(xMatch), - /*12722*/ uint16(xSetOp), uint16(FFREEP), - /*12724*/ uint16(xArgSTi), - /*12725*/ uint16(xMatch), - /*12726*/ uint16(xSetOp), uint16(FNSTSW), - /*12728*/ uint16(xArgAX), + /*12718*/ uint16(xCondIs64), 12721, 12735, + /*12721*/ uint16(xCondDataSize), 12725, 12730, 0, + /*12725*/ uint16(xSetOp), uint16(CALL), + /*12727*/ uint16(xReadCw), + /*12728*/ uint16(xArgRel16), /*12729*/ uint16(xMatch), - /*12730*/ uint16(xSetOp), uint16(FUCOMIP), - /*12732*/ uint16(xArgST), - /*12733*/ uint16(xArgSTi), + /*12730*/ uint16(xSetOp), uint16(CALL), + /*12732*/ uint16(xReadCd), + /*12733*/ uint16(xArgRel32), /*12734*/ uint16(xMatch), - /*12735*/ uint16(xSetOp), uint16(FCOMIP), - /*12737*/ uint16(xArgST), - /*12738*/ uint16(xArgSTi), - /*12739*/ uint16(xMatch), - /*12740*/ uint16(xSetOp), uint16(LOOPNE), - /*12742*/ uint16(xReadCb), - /*12743*/ uint16(xArgRel8), - /*12744*/ uint16(xMatch), - /*12745*/ uint16(xSetOp), uint16(LOOPE), - /*12747*/ uint16(xReadCb), - /*12748*/ uint16(xArgRel8), - /*12749*/ uint16(xMatch), - /*12750*/ uint16(xSetOp), uint16(LOOP), - /*12752*/ uint16(xReadCb), - /*12753*/ uint16(xArgRel8), - /*12754*/ uint16(xMatch), - /*12755*/ uint16(xCondIs64), 12758, 12772, - /*12758*/ uint16(xCondAddrSize), 12762, 12767, 0, - /*12762*/ uint16(xSetOp), uint16(JCXZ), - /*12764*/ uint16(xReadCb), - /*12765*/ uint16(xArgRel8), - /*12766*/ uint16(xMatch), - /*12767*/ uint16(xSetOp), uint16(JECXZ), - /*12769*/ uint16(xReadCb), - /*12770*/ uint16(xArgRel8), - /*12771*/ uint16(xMatch), - /*12772*/ uint16(xCondAddrSize), 0, 12767, 12776, - /*12776*/ uint16(xSetOp), uint16(JRCXZ), - /*12778*/ uint16(xReadCb), - /*12779*/ uint16(xArgRel8), - /*12780*/ uint16(xMatch), - /*12781*/ uint16(xSetOp), uint16(IN), - /*12783*/ uint16(xReadIb), - /*12784*/ uint16(xArgAL), - /*12785*/ uint16(xArgImm8u), - /*12786*/ uint16(xMatch), - /*12787*/ uint16(xCondDataSize), 12791, 12797, 12803, - /*12791*/ uint16(xSetOp), uint16(IN), - /*12793*/ uint16(xReadIb), - /*12794*/ uint16(xArgAX), - /*12795*/ uint16(xArgImm8u), + /*12735*/ uint16(xCondDataSize), 12739, 12730, 12744, + /*12739*/ uint16(xSetOp), uint16(CALL), + /*12741*/ uint16(xReadCd), + /*12742*/ uint16(xArgRel32), + /*12743*/ uint16(xMatch), + /*12744*/ uint16(xSetOp), uint16(CALL), + /*12746*/ uint16(xReadCd), + /*12747*/ uint16(xArgRel32), + /*12748*/ uint16(xMatch), + /*12749*/ uint16(xCondIs64), 12752, 12766, + /*12752*/ uint16(xCondDataSize), 12756, 12761, 0, + /*12756*/ uint16(xSetOp), uint16(JMP), + /*12758*/ uint16(xReadCw), + /*12759*/ uint16(xArgRel16), + /*12760*/ uint16(xMatch), + /*12761*/ uint16(xSetOp), uint16(JMP), + /*12763*/ uint16(xReadCd), + /*12764*/ uint16(xArgRel32), + /*12765*/ uint16(xMatch), + /*12766*/ uint16(xCondDataSize), 12770, 12761, 12775, + /*12770*/ uint16(xSetOp), uint16(JMP), + /*12772*/ uint16(xReadCd), + /*12773*/ uint16(xArgRel32), + /*12774*/ uint16(xMatch), + /*12775*/ uint16(xSetOp), uint16(JMP), + /*12777*/ uint16(xReadCd), + /*12778*/ uint16(xArgRel32), + /*12779*/ uint16(xMatch), + /*12780*/ uint16(xCondIs64), 12783, 0, + /*12783*/ uint16(xCondDataSize), 12787, 12792, 0, + /*12787*/ uint16(xSetOp), uint16(LJMP), + /*12789*/ uint16(xReadCd), + /*12790*/ uint16(xArgPtr16colon16), + /*12791*/ uint16(xMatch), + /*12792*/ uint16(xSetOp), uint16(LJMP), + /*12794*/ uint16(xReadCp), + /*12795*/ uint16(xArgPtr16colon32), /*12796*/ uint16(xMatch), - /*12797*/ uint16(xSetOp), uint16(IN), - /*12799*/ uint16(xReadIb), - /*12800*/ uint16(xArgEAX), - /*12801*/ uint16(xArgImm8u), - /*12802*/ uint16(xMatch), - /*12803*/ uint16(xSetOp), uint16(IN), - /*12805*/ uint16(xReadIb), - /*12806*/ uint16(xArgEAX), - /*12807*/ uint16(xArgImm8u), - /*12808*/ uint16(xMatch), - /*12809*/ uint16(xSetOp), uint16(OUT), - /*12811*/ uint16(xReadIb), - /*12812*/ uint16(xArgImm8u), - /*12813*/ uint16(xArgAL), - /*12814*/ uint16(xMatch), - /*12815*/ uint16(xCondPrefix), 3, - 0xC5, 12859, - 0xC4, 12845, - 0x0, 12823, - /*12823*/ uint16(xCondDataSize), 12827, 12833, 12839, - /*12827*/ uint16(xSetOp), uint16(OUT), - /*12829*/ uint16(xReadIb), - /*12830*/ uint16(xArgImm8u), - /*12831*/ uint16(xArgAX), - /*12832*/ uint16(xMatch), - /*12833*/ uint16(xSetOp), uint16(OUT), - /*12835*/ uint16(xReadIb), - /*12836*/ uint16(xArgImm8u), - /*12837*/ uint16(xArgEAX), - /*12838*/ uint16(xMatch), - /*12839*/ uint16(xSetOp), uint16(OUT), - /*12841*/ uint16(xReadIb), - /*12842*/ uint16(xArgImm8u), + /*12797*/ uint16(xSetOp), uint16(JMP), + /*12799*/ uint16(xReadCb), + /*12800*/ uint16(xArgRel8), + /*12801*/ uint16(xMatch), + /*12802*/ uint16(xSetOp), uint16(IN), + /*12804*/ uint16(xArgAL), + /*12805*/ uint16(xArgDX), + /*12806*/ uint16(xMatch), + /*12807*/ uint16(xCondDataSize), 12811, 12816, 12821, + /*12811*/ uint16(xSetOp), uint16(IN), + /*12813*/ uint16(xArgAX), + /*12814*/ uint16(xArgDX), + /*12815*/ uint16(xMatch), + /*12816*/ uint16(xSetOp), uint16(IN), + /*12818*/ uint16(xArgEAX), + /*12819*/ uint16(xArgDX), + /*12820*/ uint16(xMatch), + /*12821*/ uint16(xSetOp), uint16(IN), + /*12823*/ uint16(xArgEAX), + /*12824*/ uint16(xArgDX), + /*12825*/ uint16(xMatch), + /*12826*/ uint16(xSetOp), uint16(OUT), + /*12828*/ uint16(xArgDX), + /*12829*/ uint16(xArgAL), + /*12830*/ uint16(xMatch), + /*12831*/ uint16(xCondDataSize), 12835, 12840, 12845, + /*12835*/ uint16(xSetOp), uint16(OUT), + /*12837*/ uint16(xArgDX), + /*12838*/ uint16(xArgAX), + /*12839*/ uint16(xMatch), + /*12840*/ uint16(xSetOp), uint16(OUT), + /*12842*/ uint16(xArgDX), /*12843*/ uint16(xArgEAX), /*12844*/ uint16(xMatch), - /*12845*/ uint16(xCondPrefix), 1, - 0x66, 12849, - /*12849*/ uint16(xCondPrefix), 1, - 0x0F, 12853, - /*12853*/ uint16(xSetOp), uint16(VMOVNTDQ), - /*12855*/ uint16(xReadSlashR), - /*12856*/ uint16(xArgM256), - /*12857*/ uint16(xArgYmm1), + /*12845*/ uint16(xSetOp), uint16(OUT), + /*12847*/ uint16(xArgDX), + /*12848*/ uint16(xArgEAX), + /*12849*/ uint16(xMatch), + /*12850*/ uint16(xSetOp), uint16(ICEBP), + /*12852*/ uint16(xMatch), + /*12853*/ uint16(xSetOp), uint16(HLT), + /*12855*/ uint16(xMatch), + /*12856*/ uint16(xSetOp), uint16(CMC), /*12858*/ uint16(xMatch), - /*12859*/ uint16(xCondPrefix), 1, - 0x66, 12863, - /*12863*/ uint16(xCondPrefix), 1, - 0x0F, 12867, - /*12867*/ uint16(xSetOp), uint16(VMOVNTDQ), - /*12869*/ uint16(xReadSlashR), - /*12870*/ uint16(xArgM256), - /*12871*/ uint16(xArgYmm1), - /*12872*/ uint16(xMatch), - /*12873*/ uint16(xCondIs64), 12876, 12890, - /*12876*/ uint16(xCondDataSize), 12880, 12885, 0, - /*12880*/ uint16(xSetOp), uint16(CALL), - /*12882*/ uint16(xReadCw), - /*12883*/ uint16(xArgRel16), - /*12884*/ uint16(xMatch), - /*12885*/ uint16(xSetOp), uint16(CALL), - /*12887*/ uint16(xReadCd), - /*12888*/ uint16(xArgRel32), + /*12859*/ uint16(xCondSlashR), + 12868, // 0 + 0, // 1 + 12874, // 2 + 12878, // 3 + 12882, // 4 + 12886, // 5 + 12890, // 6 + 12894, // 7 + /*12868*/ uint16(xSetOp), uint16(TEST), + /*12870*/ uint16(xReadIb), + /*12871*/ uint16(xArgRM8), + /*12872*/ uint16(xArgImm8u), + /*12873*/ uint16(xMatch), + /*12874*/ uint16(xSetOp), uint16(NOT), + /*12876*/ uint16(xArgRM8), + /*12877*/ uint16(xMatch), + /*12878*/ uint16(xSetOp), uint16(NEG), + /*12880*/ uint16(xArgRM8), + /*12881*/ uint16(xMatch), + /*12882*/ uint16(xSetOp), uint16(MUL), + /*12884*/ uint16(xArgRM8), + /*12885*/ uint16(xMatch), + /*12886*/ uint16(xSetOp), uint16(IMUL), + /*12888*/ uint16(xArgRM8), /*12889*/ uint16(xMatch), - /*12890*/ uint16(xCondDataSize), 12894, 12885, 12899, - /*12894*/ uint16(xSetOp), uint16(CALL), - /*12896*/ uint16(xReadCd), - /*12897*/ uint16(xArgRel32), - /*12898*/ uint16(xMatch), - /*12899*/ uint16(xSetOp), uint16(CALL), - /*12901*/ uint16(xReadCd), - /*12902*/ uint16(xArgRel32), - /*12903*/ uint16(xMatch), - /*12904*/ uint16(xCondIs64), 12907, 12921, - /*12907*/ uint16(xCondDataSize), 12911, 12916, 0, - /*12911*/ uint16(xSetOp), uint16(JMP), - /*12913*/ uint16(xReadCw), - /*12914*/ uint16(xArgRel16), - /*12915*/ uint16(xMatch), - /*12916*/ uint16(xSetOp), uint16(JMP), - /*12918*/ uint16(xReadCd), - /*12919*/ uint16(xArgRel32), - /*12920*/ uint16(xMatch), - /*12921*/ uint16(xCondDataSize), 12925, 12916, 12930, - /*12925*/ uint16(xSetOp), uint16(JMP), - /*12927*/ uint16(xReadCd), - /*12928*/ uint16(xArgRel32), - /*12929*/ uint16(xMatch), - /*12930*/ uint16(xSetOp), uint16(JMP), - /*12932*/ uint16(xReadCd), - /*12933*/ uint16(xArgRel32), - /*12934*/ uint16(xMatch), - /*12935*/ uint16(xCondIs64), 12938, 0, - /*12938*/ uint16(xCondDataSize), 12942, 12947, 0, - /*12942*/ uint16(xSetOp), uint16(LJMP), - /*12944*/ uint16(xReadCd), - /*12945*/ uint16(xArgPtr16colon16), + /*12890*/ uint16(xSetOp), uint16(DIV), + /*12892*/ uint16(xArgRM8), + /*12893*/ uint16(xMatch), + /*12894*/ uint16(xSetOp), uint16(IDIV), + /*12896*/ uint16(xArgRM8), + /*12897*/ uint16(xMatch), + /*12898*/ uint16(xCondSlashR), + 12907, // 0 + 0, // 1 + 12936, // 2 + 12959, // 3 + 12982, // 4 + 13005, // 5 + 13028, // 6 + 13051, // 7 + /*12907*/ uint16(xCondIs64), 12910, 12926, + /*12910*/ uint16(xCondDataSize), 12914, 12920, 0, + /*12914*/ uint16(xSetOp), uint16(TEST), + /*12916*/ uint16(xReadIw), + /*12917*/ uint16(xArgRM16), + /*12918*/ uint16(xArgImm16), + /*12919*/ uint16(xMatch), + /*12920*/ uint16(xSetOp), uint16(TEST), + /*12922*/ uint16(xReadId), + /*12923*/ uint16(xArgRM32), + /*12924*/ uint16(xArgImm32), + /*12925*/ uint16(xMatch), + /*12926*/ uint16(xCondDataSize), 12914, 12920, 12930, + /*12930*/ uint16(xSetOp), uint16(TEST), + /*12932*/ uint16(xReadId), + /*12933*/ uint16(xArgRM64), + /*12934*/ uint16(xArgImm32), + /*12935*/ uint16(xMatch), + /*12936*/ uint16(xCondIs64), 12939, 12951, + /*12939*/ uint16(xCondDataSize), 12943, 12947, 0, + /*12943*/ uint16(xSetOp), uint16(NOT), + /*12945*/ uint16(xArgRM16), /*12946*/ uint16(xMatch), - /*12947*/ uint16(xSetOp), uint16(LJMP), - /*12949*/ uint16(xReadCp), - /*12950*/ uint16(xArgPtr16colon32), - /*12951*/ uint16(xMatch), - /*12952*/ uint16(xSetOp), uint16(JMP), - /*12954*/ uint16(xReadCb), - /*12955*/ uint16(xArgRel8), - /*12956*/ uint16(xMatch), - /*12957*/ uint16(xSetOp), uint16(IN), - /*12959*/ uint16(xArgAL), - /*12960*/ uint16(xArgDX), - /*12961*/ uint16(xMatch), - /*12962*/ uint16(xCondDataSize), 12966, 12971, 12976, - /*12966*/ uint16(xSetOp), uint16(IN), - /*12968*/ uint16(xArgAX), - /*12969*/ uint16(xArgDX), - /*12970*/ uint16(xMatch), - /*12971*/ uint16(xSetOp), uint16(IN), - /*12973*/ uint16(xArgEAX), - /*12974*/ uint16(xArgDX), - /*12975*/ uint16(xMatch), - /*12976*/ uint16(xSetOp), uint16(IN), - /*12978*/ uint16(xArgEAX), - /*12979*/ uint16(xArgDX), - /*12980*/ uint16(xMatch), - /*12981*/ uint16(xSetOp), uint16(OUT), - /*12983*/ uint16(xArgDX), - /*12984*/ uint16(xArgAL), - /*12985*/ uint16(xMatch), - /*12986*/ uint16(xCondDataSize), 12990, 12995, 13000, - /*12990*/ uint16(xSetOp), uint16(OUT), - /*12992*/ uint16(xArgDX), - /*12993*/ uint16(xArgAX), - /*12994*/ uint16(xMatch), - /*12995*/ uint16(xSetOp), uint16(OUT), - /*12997*/ uint16(xArgDX), - /*12998*/ uint16(xArgEAX), - /*12999*/ uint16(xMatch), - /*13000*/ uint16(xSetOp), uint16(OUT), - /*13002*/ uint16(xArgDX), - /*13003*/ uint16(xArgEAX), + /*12947*/ uint16(xSetOp), uint16(NOT), + /*12949*/ uint16(xArgRM32), + /*12950*/ uint16(xMatch), + /*12951*/ uint16(xCondDataSize), 12943, 12947, 12955, + /*12955*/ uint16(xSetOp), uint16(NOT), + /*12957*/ uint16(xArgRM64), + /*12958*/ uint16(xMatch), + /*12959*/ uint16(xCondIs64), 12962, 12974, + /*12962*/ uint16(xCondDataSize), 12966, 12970, 0, + /*12966*/ uint16(xSetOp), uint16(NEG), + /*12968*/ uint16(xArgRM16), + /*12969*/ uint16(xMatch), + /*12970*/ uint16(xSetOp), uint16(NEG), + /*12972*/ uint16(xArgRM32), + /*12973*/ uint16(xMatch), + /*12974*/ uint16(xCondDataSize), 12966, 12970, 12978, + /*12978*/ uint16(xSetOp), uint16(NEG), + /*12980*/ uint16(xArgRM64), + /*12981*/ uint16(xMatch), + /*12982*/ uint16(xCondIs64), 12985, 12997, + /*12985*/ uint16(xCondDataSize), 12989, 12993, 0, + /*12989*/ uint16(xSetOp), uint16(MUL), + /*12991*/ uint16(xArgRM16), + /*12992*/ uint16(xMatch), + /*12993*/ uint16(xSetOp), uint16(MUL), + /*12995*/ uint16(xArgRM32), + /*12996*/ uint16(xMatch), + /*12997*/ uint16(xCondDataSize), 12989, 12993, 13001, + /*13001*/ uint16(xSetOp), uint16(MUL), + /*13003*/ uint16(xArgRM64), /*13004*/ uint16(xMatch), - /*13005*/ uint16(xSetOp), uint16(ICEBP), - /*13007*/ uint16(xMatch), - /*13008*/ uint16(xSetOp), uint16(HLT), - /*13010*/ uint16(xMatch), - /*13011*/ uint16(xSetOp), uint16(CMC), - /*13013*/ uint16(xMatch), - /*13014*/ uint16(xCondSlashR), - 13023, // 0 - 0, // 1 - 13029, // 2 - 13033, // 3 - 13037, // 4 - 13041, // 5 - 13045, // 6 - 13049, // 7 - /*13023*/ uint16(xSetOp), uint16(TEST), - /*13025*/ uint16(xReadIb), - /*13026*/ uint16(xArgRM8), - /*13027*/ uint16(xArgImm8u), - /*13028*/ uint16(xMatch), - /*13029*/ uint16(xSetOp), uint16(NOT), - /*13031*/ uint16(xArgRM8), - /*13032*/ uint16(xMatch), - /*13033*/ uint16(xSetOp), uint16(NEG), - /*13035*/ uint16(xArgRM8), - /*13036*/ uint16(xMatch), - /*13037*/ uint16(xSetOp), uint16(MUL), - /*13039*/ uint16(xArgRM8), - /*13040*/ uint16(xMatch), - /*13041*/ uint16(xSetOp), uint16(IMUL), - /*13043*/ uint16(xArgRM8), - /*13044*/ uint16(xMatch), - /*13045*/ uint16(xSetOp), uint16(DIV), - /*13047*/ uint16(xArgRM8), - /*13048*/ uint16(xMatch), - /*13049*/ uint16(xSetOp), uint16(IDIV), - /*13051*/ uint16(xArgRM8), - /*13052*/ uint16(xMatch), - /*13053*/ uint16(xCondSlashR), - 13062, // 0 - 0, // 1 - 13091, // 2 - 13114, // 3 - 13137, // 4 - 13160, // 5 - 13183, // 6 - 13206, // 7 - /*13062*/ uint16(xCondIs64), 13065, 13081, - /*13065*/ uint16(xCondDataSize), 13069, 13075, 0, - /*13069*/ uint16(xSetOp), uint16(TEST), - /*13071*/ uint16(xReadIw), - /*13072*/ uint16(xArgRM16), - /*13073*/ uint16(xArgImm16), - /*13074*/ uint16(xMatch), - /*13075*/ uint16(xSetOp), uint16(TEST), - /*13077*/ uint16(xReadId), - /*13078*/ uint16(xArgRM32), - /*13079*/ uint16(xArgImm32), - /*13080*/ uint16(xMatch), - /*13081*/ uint16(xCondDataSize), 13069, 13075, 13085, - /*13085*/ uint16(xSetOp), uint16(TEST), - /*13087*/ uint16(xReadId), - /*13088*/ uint16(xArgRM64), - /*13089*/ uint16(xArgImm32), - /*13090*/ uint16(xMatch), - /*13091*/ uint16(xCondIs64), 13094, 13106, - /*13094*/ uint16(xCondDataSize), 13098, 13102, 0, - /*13098*/ uint16(xSetOp), uint16(NOT), - /*13100*/ uint16(xArgRM16), - /*13101*/ uint16(xMatch), - /*13102*/ uint16(xSetOp), uint16(NOT), - /*13104*/ uint16(xArgRM32), - /*13105*/ uint16(xMatch), - /*13106*/ uint16(xCondDataSize), 13098, 13102, 13110, - /*13110*/ uint16(xSetOp), uint16(NOT), - /*13112*/ uint16(xArgRM64), - /*13113*/ uint16(xMatch), - /*13114*/ uint16(xCondIs64), 13117, 13129, - /*13117*/ uint16(xCondDataSize), 13121, 13125, 0, - /*13121*/ uint16(xSetOp), uint16(NEG), - /*13123*/ uint16(xArgRM16), - /*13124*/ uint16(xMatch), - /*13125*/ uint16(xSetOp), uint16(NEG), - /*13127*/ uint16(xArgRM32), + /*13005*/ uint16(xCondIs64), 13008, 13020, + /*13008*/ uint16(xCondDataSize), 13012, 13016, 0, + /*13012*/ uint16(xSetOp), uint16(IMUL), + /*13014*/ uint16(xArgRM16), + /*13015*/ uint16(xMatch), + /*13016*/ uint16(xSetOp), uint16(IMUL), + /*13018*/ uint16(xArgRM32), + /*13019*/ uint16(xMatch), + /*13020*/ uint16(xCondDataSize), 13012, 13016, 13024, + /*13024*/ uint16(xSetOp), uint16(IMUL), + /*13026*/ uint16(xArgRM64), + /*13027*/ uint16(xMatch), + /*13028*/ uint16(xCondIs64), 13031, 13043, + /*13031*/ uint16(xCondDataSize), 13035, 13039, 0, + /*13035*/ uint16(xSetOp), uint16(DIV), + /*13037*/ uint16(xArgRM16), + /*13038*/ uint16(xMatch), + /*13039*/ uint16(xSetOp), uint16(DIV), + /*13041*/ uint16(xArgRM32), + /*13042*/ uint16(xMatch), + /*13043*/ uint16(xCondDataSize), 13035, 13039, 13047, + /*13047*/ uint16(xSetOp), uint16(DIV), + /*13049*/ uint16(xArgRM64), + /*13050*/ uint16(xMatch), + /*13051*/ uint16(xCondIs64), 13054, 13066, + /*13054*/ uint16(xCondDataSize), 13058, 13062, 0, + /*13058*/ uint16(xSetOp), uint16(IDIV), + /*13060*/ uint16(xArgRM16), + /*13061*/ uint16(xMatch), + /*13062*/ uint16(xSetOp), uint16(IDIV), + /*13064*/ uint16(xArgRM32), + /*13065*/ uint16(xMatch), + /*13066*/ uint16(xCondDataSize), 13058, 13062, 13070, + /*13070*/ uint16(xSetOp), uint16(IDIV), + /*13072*/ uint16(xArgRM64), + /*13073*/ uint16(xMatch), + /*13074*/ uint16(xSetOp), uint16(CLC), + /*13076*/ uint16(xMatch), + /*13077*/ uint16(xSetOp), uint16(STC), + /*13079*/ uint16(xMatch), + /*13080*/ uint16(xSetOp), uint16(CLI), + /*13082*/ uint16(xMatch), + /*13083*/ uint16(xSetOp), uint16(STI), + /*13085*/ uint16(xMatch), + /*13086*/ uint16(xSetOp), uint16(CLD), + /*13088*/ uint16(xMatch), + /*13089*/ uint16(xSetOp), uint16(STD), + /*13091*/ uint16(xMatch), + /*13092*/ uint16(xCondSlashR), + 13101, // 0 + 13105, // 1 + 0, // 2 + 0, // 3 + 0, // 4 + 0, // 5 + 0, // 6 + 0, // 7 + /*13101*/ uint16(xSetOp), uint16(INC), + /*13103*/ uint16(xArgRM8), + /*13104*/ uint16(xMatch), + /*13105*/ uint16(xSetOp), uint16(DEC), + /*13107*/ uint16(xArgRM8), + /*13108*/ uint16(xMatch), + /*13109*/ uint16(xCondSlashR), + 13118, // 0 + 13141, // 1 + 13164, // 2 + 13183, // 3 + 13206, // 4 + 13225, // 5 + 13248, // 6 + 0, // 7 + /*13118*/ uint16(xCondIs64), 13121, 13133, + /*13121*/ uint16(xCondDataSize), 13125, 13129, 0, + /*13125*/ uint16(xSetOp), uint16(INC), + /*13127*/ uint16(xArgRM16), /*13128*/ uint16(xMatch), - /*13129*/ uint16(xCondDataSize), 13121, 13125, 13133, - /*13133*/ uint16(xSetOp), uint16(NEG), - /*13135*/ uint16(xArgRM64), - /*13136*/ uint16(xMatch), - /*13137*/ uint16(xCondIs64), 13140, 13152, - /*13140*/ uint16(xCondDataSize), 13144, 13148, 0, - /*13144*/ uint16(xSetOp), uint16(MUL), - /*13146*/ uint16(xArgRM16), - /*13147*/ uint16(xMatch), - /*13148*/ uint16(xSetOp), uint16(MUL), - /*13150*/ uint16(xArgRM32), + /*13129*/ uint16(xSetOp), uint16(INC), + /*13131*/ uint16(xArgRM32), + /*13132*/ uint16(xMatch), + /*13133*/ uint16(xCondDataSize), 13125, 13129, 13137, + /*13137*/ uint16(xSetOp), uint16(INC), + /*13139*/ uint16(xArgRM64), + /*13140*/ uint16(xMatch), + /*13141*/ uint16(xCondIs64), 13144, 13156, + /*13144*/ uint16(xCondDataSize), 13148, 13152, 0, + /*13148*/ uint16(xSetOp), uint16(DEC), + /*13150*/ uint16(xArgRM16), /*13151*/ uint16(xMatch), - /*13152*/ uint16(xCondDataSize), 13144, 13148, 13156, - /*13156*/ uint16(xSetOp), uint16(MUL), - /*13158*/ uint16(xArgRM64), - /*13159*/ uint16(xMatch), - /*13160*/ uint16(xCondIs64), 13163, 13175, - /*13163*/ uint16(xCondDataSize), 13167, 13171, 0, - /*13167*/ uint16(xSetOp), uint16(IMUL), - /*13169*/ uint16(xArgRM16), - /*13170*/ uint16(xMatch), - /*13171*/ uint16(xSetOp), uint16(IMUL), - /*13173*/ uint16(xArgRM32), + /*13152*/ uint16(xSetOp), uint16(DEC), + /*13154*/ uint16(xArgRM32), + /*13155*/ uint16(xMatch), + /*13156*/ uint16(xCondDataSize), 13148, 13152, 13160, + /*13160*/ uint16(xSetOp), uint16(DEC), + /*13162*/ uint16(xArgRM64), + /*13163*/ uint16(xMatch), + /*13164*/ uint16(xCondIs64), 13167, 13179, + /*13167*/ uint16(xCondDataSize), 13171, 13175, 0, + /*13171*/ uint16(xSetOp), uint16(CALL), + /*13173*/ uint16(xArgRM16), /*13174*/ uint16(xMatch), - /*13175*/ uint16(xCondDataSize), 13167, 13171, 13179, - /*13179*/ uint16(xSetOp), uint16(IMUL), + /*13175*/ uint16(xSetOp), uint16(CALL), + /*13177*/ uint16(xArgRM32), + /*13178*/ uint16(xMatch), + /*13179*/ uint16(xSetOp), uint16(CALL), /*13181*/ uint16(xArgRM64), /*13182*/ uint16(xMatch), /*13183*/ uint16(xCondIs64), 13186, 13198, /*13186*/ uint16(xCondDataSize), 13190, 13194, 0, - /*13190*/ uint16(xSetOp), uint16(DIV), - /*13192*/ uint16(xArgRM16), + /*13190*/ uint16(xSetOp), uint16(LCALL), + /*13192*/ uint16(xArgM16colon16), /*13193*/ uint16(xMatch), - /*13194*/ uint16(xSetOp), uint16(DIV), - /*13196*/ uint16(xArgRM32), + /*13194*/ uint16(xSetOp), uint16(LCALL), + /*13196*/ uint16(xArgM16colon32), /*13197*/ uint16(xMatch), /*13198*/ uint16(xCondDataSize), 13190, 13194, 13202, - /*13202*/ uint16(xSetOp), uint16(DIV), - /*13204*/ uint16(xArgRM64), + /*13202*/ uint16(xSetOp), uint16(LCALL), + /*13204*/ uint16(xArgM16colon64), /*13205*/ uint16(xMatch), /*13206*/ uint16(xCondIs64), 13209, 13221, /*13209*/ uint16(xCondDataSize), 13213, 13217, 0, - /*13213*/ uint16(xSetOp), uint16(IDIV), + /*13213*/ uint16(xSetOp), uint16(JMP), /*13215*/ uint16(xArgRM16), /*13216*/ uint16(xMatch), - /*13217*/ uint16(xSetOp), uint16(IDIV), + /*13217*/ uint16(xSetOp), uint16(JMP), /*13219*/ uint16(xArgRM32), /*13220*/ uint16(xMatch), - /*13221*/ uint16(xCondDataSize), 13213, 13217, 13225, - /*13225*/ uint16(xSetOp), uint16(IDIV), - /*13227*/ uint16(xArgRM64), - /*13228*/ uint16(xMatch), - /*13229*/ uint16(xSetOp), uint16(CLC), - /*13231*/ uint16(xMatch), - /*13232*/ uint16(xSetOp), uint16(STC), - /*13234*/ uint16(xMatch), - /*13235*/ uint16(xSetOp), uint16(CLI), - /*13237*/ uint16(xMatch), - /*13238*/ uint16(xSetOp), uint16(STI), - /*13240*/ uint16(xMatch), - /*13241*/ uint16(xSetOp), uint16(CLD), - /*13243*/ uint16(xMatch), - /*13244*/ uint16(xSetOp), uint16(STD), - /*13246*/ uint16(xMatch), - /*13247*/ uint16(xCondSlashR), - 13256, // 0 - 13260, // 1 - 0, // 2 - 0, // 3 - 0, // 4 - 0, // 5 - 0, // 6 - 0, // 7 - /*13256*/ uint16(xSetOp), uint16(INC), - /*13258*/ uint16(xArgRM8), - /*13259*/ uint16(xMatch), - /*13260*/ uint16(xSetOp), uint16(DEC), - /*13262*/ uint16(xArgRM8), - /*13263*/ uint16(xMatch), - /*13264*/ uint16(xCondSlashR), - 13273, // 0 - 13296, // 1 - 13319, // 2 - 13338, // 3 - 13361, // 4 - 13380, // 5 - 13403, // 6 - 0, // 7 - /*13273*/ uint16(xCondIs64), 13276, 13288, - /*13276*/ uint16(xCondDataSize), 13280, 13284, 0, - /*13280*/ uint16(xSetOp), uint16(INC), - /*13282*/ uint16(xArgRM16), - /*13283*/ uint16(xMatch), - /*13284*/ uint16(xSetOp), uint16(INC), - /*13286*/ uint16(xArgRM32), - /*13287*/ uint16(xMatch), - /*13288*/ uint16(xCondDataSize), 13280, 13284, 13292, - /*13292*/ uint16(xSetOp), uint16(INC), - /*13294*/ uint16(xArgRM64), - /*13295*/ uint16(xMatch), - /*13296*/ uint16(xCondIs64), 13299, 13311, - /*13299*/ uint16(xCondDataSize), 13303, 13307, 0, - /*13303*/ uint16(xSetOp), uint16(DEC), - /*13305*/ uint16(xArgRM16), - /*13306*/ uint16(xMatch), - /*13307*/ uint16(xSetOp), uint16(DEC), - /*13309*/ uint16(xArgRM32), - /*13310*/ uint16(xMatch), - /*13311*/ uint16(xCondDataSize), 13303, 13307, 13315, - /*13315*/ uint16(xSetOp), uint16(DEC), - /*13317*/ uint16(xArgRM64), - /*13318*/ uint16(xMatch), - /*13319*/ uint16(xCondIs64), 13322, 13334, - /*13322*/ uint16(xCondDataSize), 13326, 13330, 0, - /*13326*/ uint16(xSetOp), uint16(CALL), - /*13328*/ uint16(xArgRM16), - /*13329*/ uint16(xMatch), - /*13330*/ uint16(xSetOp), uint16(CALL), - /*13332*/ uint16(xArgRM32), - /*13333*/ uint16(xMatch), - /*13334*/ uint16(xSetOp), uint16(CALL), - /*13336*/ uint16(xArgRM64), - /*13337*/ uint16(xMatch), - /*13338*/ uint16(xCondIs64), 13341, 13353, - /*13341*/ uint16(xCondDataSize), 13345, 13349, 0, - /*13345*/ uint16(xSetOp), uint16(LCALL), - /*13347*/ uint16(xArgM16colon16), - /*13348*/ uint16(xMatch), - /*13349*/ uint16(xSetOp), uint16(LCALL), - /*13351*/ uint16(xArgM16colon32), - /*13352*/ uint16(xMatch), - /*13353*/ uint16(xCondDataSize), 13345, 13349, 13357, - /*13357*/ uint16(xSetOp), uint16(LCALL), - /*13359*/ uint16(xArgM16colon64), - /*13360*/ uint16(xMatch), - /*13361*/ uint16(xCondIs64), 13364, 13376, - /*13364*/ uint16(xCondDataSize), 13368, 13372, 0, - /*13368*/ uint16(xSetOp), uint16(JMP), - /*13370*/ uint16(xArgRM16), - /*13371*/ uint16(xMatch), - /*13372*/ uint16(xSetOp), uint16(JMP), - /*13374*/ uint16(xArgRM32), - /*13375*/ uint16(xMatch), - /*13376*/ uint16(xSetOp), uint16(JMP), - /*13378*/ uint16(xArgRM64), - /*13379*/ uint16(xMatch), - /*13380*/ uint16(xCondIs64), 13383, 13395, - /*13383*/ uint16(xCondDataSize), 13387, 13391, 0, - /*13387*/ uint16(xSetOp), uint16(LJMP), - /*13389*/ uint16(xArgM16colon16), - /*13390*/ uint16(xMatch), - /*13391*/ uint16(xSetOp), uint16(LJMP), - /*13393*/ uint16(xArgM16colon32), - /*13394*/ uint16(xMatch), - /*13395*/ uint16(xCondDataSize), 13387, 13391, 13399, - /*13399*/ uint16(xSetOp), uint16(LJMP), - /*13401*/ uint16(xArgM16colon64), - /*13402*/ uint16(xMatch), - /*13403*/ uint16(xCondIs64), 13406, 13418, - /*13406*/ uint16(xCondDataSize), 13410, 13414, 0, - /*13410*/ uint16(xSetOp), uint16(PUSH), - /*13412*/ uint16(xArgRM16), - /*13413*/ uint16(xMatch), - /*13414*/ uint16(xSetOp), uint16(PUSH), - /*13416*/ uint16(xArgRM32), - /*13417*/ uint16(xMatch), - /*13418*/ uint16(xCondDataSize), 13410, 13422, 13426, - /*13422*/ uint16(xSetOp), uint16(PUSH), - /*13424*/ uint16(xArgRM64), - /*13425*/ uint16(xMatch), - /*13426*/ uint16(xSetOp), uint16(PUSH), - /*13428*/ uint16(xArgRM64), - /*13429*/ uint16(xMatch), + /*13221*/ uint16(xSetOp), uint16(JMP), + /*13223*/ uint16(xArgRM64), + /*13224*/ uint16(xMatch), + /*13225*/ uint16(xCondIs64), 13228, 13240, + /*13228*/ uint16(xCondDataSize), 13232, 13236, 0, + /*13232*/ uint16(xSetOp), uint16(LJMP), + /*13234*/ uint16(xArgM16colon16), + /*13235*/ uint16(xMatch), + /*13236*/ uint16(xSetOp), uint16(LJMP), + /*13238*/ uint16(xArgM16colon32), + /*13239*/ uint16(xMatch), + /*13240*/ uint16(xCondDataSize), 13232, 13236, 13244, + /*13244*/ uint16(xSetOp), uint16(LJMP), + /*13246*/ uint16(xArgM16colon64), + /*13247*/ uint16(xMatch), + /*13248*/ uint16(xCondIs64), 13251, 13263, + /*13251*/ uint16(xCondDataSize), 13255, 13259, 0, + /*13255*/ uint16(xSetOp), uint16(PUSH), + /*13257*/ uint16(xArgRM16), + /*13258*/ uint16(xMatch), + /*13259*/ uint16(xSetOp), uint16(PUSH), + /*13261*/ uint16(xArgRM32), + /*13262*/ uint16(xMatch), + /*13263*/ uint16(xCondDataSize), 13255, 13267, 13271, + /*13267*/ uint16(xSetOp), uint16(PUSH), + /*13269*/ uint16(xArgRM64), + /*13270*/ uint16(xMatch), + /*13271*/ uint16(xSetOp), uint16(PUSH), + /*13273*/ uint16(xArgRM64), + /*13274*/ uint16(xMatch), } const ( @@ -9225,6 +9138,13 @@ const ( SETS SFENCE SGDT + SHA1MSG1 + SHA1MSG2 + SHA1NEXTE + SHA1RNDS4 + SHA256MSG1 + SHA256MSG2 + SHA256RNDS2 SHL SHLD SHR @@ -9270,11 +9190,6 @@ const ( UNPCKLPS VERR VERW - VMOVDQA - VMOVDQU - VMOVNTDQ - VMOVNTDQA - VZEROUPPER WBINVD WRFSBASE WRGSBASE @@ -9305,7 +9220,7 @@ const ( XTEST ) -const maxOp = XTEST +const maxNonAVXOp = XTEST var opNames = [...]string{ AAA: "AAA", @@ -9843,6 +9758,13 @@ var opNames = [...]string{ SETS: "SETS", SFENCE: "SFENCE", SGDT: "SGDT", + SHA1MSG1: "SHA1MSG1", + SHA1MSG2: "SHA1MSG2", + SHA1NEXTE: "SHA1NEXTE", + SHA1RNDS4: "SHA1RNDS4", + SHA256MSG1: "SHA256MSG1", + SHA256MSG2: "SHA256MSG2", + SHA256RNDS2: "SHA256RNDS2", SHL: "SHL", SHLD: "SHLD", SHR: "SHR", @@ -9888,11 +9810,6 @@ var opNames = [...]string{ UNPCKLPS: "UNPCKLPS", VERR: "VERR", VERW: "VERW", - VMOVDQA: "VMOVDQA", - VMOVDQU: "VMOVDQU", - VMOVNTDQ: "VMOVNTDQ", - VMOVNTDQA: "VMOVNTDQA", - VZEROUPPER: "VZEROUPPER", WBINVD: "WBINVD", WRFSBASE: "WRFSBASE", WRGSBASE: "WRGSBASE", diff --git a/vendor/modules.txt b/vendor/modules.txt index 11d1bd986f..becc3dd3f7 100644 --- a/vendor/modules.txt +++ b/vendor/modules.txt @@ -67,8 +67,8 @@ go.starlark.net/syntax # go.yaml.in/yaml/v3 v3.0.4 ## explicit; go 1.16 go.yaml.in/yaml/v3 -# golang.org/x/arch v0.11.0 -## explicit; go 1.18 +# golang.org/x/arch v0.28.0 +## explicit; go 1.25.0 golang.org/x/arch/arm64/arm64asm golang.org/x/arch/loong64/loong64asm golang.org/x/arch/ppc64/ppc64asm