diff --git a/ato.yaml b/ato.yaml index 24e7a75..9afdfb8 100644 --- a/ato.yaml +++ b/ato.yaml @@ -17,6 +17,9 @@ builds: elec/src/hat_board/capacitive_sensor/microchip_tech_cap11881cptr.py:Microchip_Tech_CAP1188_1_CP_TR hat-board: entry: elec/src/hat_board/hat_board.py:HatBoard + tps62933: + entry: /Users/mattwildoer/Projects/nonos/elec/src/tps62933.ato:TPS62933 + dependencies: - type: registry identifier: atopile/rpi-cm5 diff --git a/elec/layout/tps62933/tps62933.kicad_pcb b/elec/layout/tps62933/tps62933.kicad_pcb new file mode 100644 index 0000000..db72951 --- /dev/null +++ b/elec/layout/tps62933/tps62933.kicad_pcb @@ -0,0 +1,87 @@ +(kicad_pcb + (version 20241229) + (generator "atopile") + (generator_version "0.4.1") + (general + (thickness 1.6) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) + (50 "User.1" user) + (51 "User.2" user) + (52 "User.3" user) + (53 "User.4" user) + (54 "User.5" user) + (55 "User.6" user) + (56 "User.7" user) + (57 "User.8" user) + (58 "User.9" user) + ) + (setup + (pad_to_mask_clearance 0) + (allow_soldermask_bridges_in_footprints no) + (pcbplotparams + (layerselection 0x00010fc_ffffffff) + (plot_on_all_layers_selection 0x0000000_00000000) + (disableapertmacros no) + (usegerberextensions no) + (usegerberattributes yes) + (usegerberadvancedattributes yes) + (creategerberjobfile yes) + (dashed_line_dash_ratio 12) + (dashed_line_gap_ratio 3) + (svgprecision 4) + (plotframeref no) + (mode 1) + (useauxorigin no) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (pdf_front_fp_property_popups yes) + (pdf_back_fp_property_popups yes) + (dxfpolygonmode yes) + (dxfimperialunits yes) + (dxfusepcbnewfont yes) + (psnegative no) + (psa4output no) + (plot_black_and_white yes) + (plotinvisibletext no) + (sketchpadsonfab no) + (plotreference yes) + (plotvalue yes) + (plotpadnumbers no) + (hidednponfab no) + (sketchdnponfab yes) + (crossoutdnponfab yes) + (plotfptext yes) + (subtractmaskfromsilk no) + (outputformat 1) + (mirror no) + (drillshape 1) + (scaleselection 1) + (outputdirectory "") + ) + ) + (net 0 "") +) \ No newline at end of file diff --git a/elec/src/tps62933.ato b/elec/src/tps62933.ato new file mode 100644 index 0000000..331e764 --- /dev/null +++ b/elec/src/tps62933.ato @@ -0,0 +1,147 @@ +#pragma experiment("FOR_LOOP") +#pragma experiment("BRIDGE_CONNECT") + +import Capacitor, ElectricLogic, Resistor, Inductor + +from "regulators.ato" import AdjustableRegulator + + +module TPS62933 from AdjustableRegulator: + """ + TPS62933 Adjustable Regulator Driver + + Required attributes: + `power_in` and `power_out` are self-explanatory, and inherited + from AdjustableRegulator + `power_out.voltage`, which must be between 0.8 to 22V + `power_out.max_current`, which must be <2A + + `enable` may be left floating, which default enables the device. + `switching_frequency` can be overridden if desired. + `soft_start_time` can be overridden if desired. + """ + _ic = new _TPS62933ODRLR + + enable = new ElectricLogic + enable.line ~ _ic.EN + + ## Power Topology + signal _gnd + + for gndy in [power_in.gnd, power_out.gnd, _ic.GND]: + gndy ~ _gnd + + _c_in = new Capacitor + # FIXME: should be decoupling + power_in.hv ~> _c_in ~> _gnd + power_in.hv ~ _ic.VIN + + _c_bst = new Capacitor + # FIXME: should be decoupling + _ic.BST ~> _c_bst ~> _ic.SW + + inductor = new Inductor + _ic.SW ~> inductor ~> power_out.hv + + power_out ~ feedback_div.power + feedback_div.output.line ~ _ic.FB + + _c_out = new Capacitor + # FIXME: should be decoupling + power_out.hv ~> _c_out ~> _gnd + + ## Configuration Topology + ### Soft-Start Capacitor + _c_ss = new Capacitor + _ic.SS ~> _c_ss ~> _gnd + + _r_rt = new Resistor + _ic.RT ~> _r_rt ~> _gnd + + ## Parametisation + assert v_ref is 784 to 816mV + + _c_bst.capacitance = 100nF +/- 25% # Fixed from the datasheet + _c_bst.package = "C0402" + + ### Inductor + switching_frequency = 500kHz +/- 5% + ripple_current: current = 0.4 * power_out.max_current + assert ripple_current is power_out.voltage / power_in.voltage * (power_in.voltage - power_out.voltage) / (inductor.inductance * switching_frequency) + assert inductor.max_current > (power_out.max_current ** 2 + ripple_current ** 2 / 12) ** 0.5 + + ### Output cap(s) + # FIXME: Hack! + # TODO: I'd like to do this + # _c_out -> MultiCapacitor + _c_out2 = new Capacitor + _c_out.power ~ _c_out2.power + for out_cap in [_c_out, _c_out2]: + out_cap.package = "C1206" + assert out_cap.capacitance > 19uF + assert out_cap.max_voltage > 30V + + ### Frequency selection + assert switching_frequency within 200kHz to 2200kHz + assert switching_frequency / 1kHz is 17293 * (_r_rt.resistance / 1kohm) ** -0.942 + + ### Soft-Start + # FIXME: what's the correct "type" for this? duration? + soft_start_time = 5 to 20ms + # TODO: this would be better as a `check` + # equation provided in the datasheet is all in SI units + assert soft_start_time is (v_ref * _c_ss.capacitance) / 5.5uA +/- 1% + assert _c_ss.capacitance > 6.8nF # minimum provided by the datasheet + + ## Checks + assert power_in.voltage < 30V + assert power_out.voltage within 0.8 to 22V + + +module Test: + """ + Test the TPS62933 driver + """ + _ic = new TPS62933 + _ic.power_out.voltage = 5V +/- 10% + + +component _TPS62933DRLR: + """Texas_Instruments_TPS62933DRLR component""" + lcsc_id = "C3200405" + manufacturer = "Texas Instruments" + mpn = "TPS62933DRLR" + datasheet_url = "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2302220500_Texas-Instruments-TPS62933DRLR_C3200405.pdf" + designator_prefix = "U" + + # pins + pin 1 ~ signal RT + pin 2 ~ signal EN + pin 3 ~ signal VIN + pin 4 ~ signal GND + pin 5 ~ signal FB + pin 6 ~ signal SS + pin 7 ~ signal BST + pin 8 ~ signal SW + + +component _TPS62933ODRLR: + """ + Texas Instruments TPS62933ODRLR buck regulator in the audio-specific + variant that will keep the frequency out of audible range + """ + lcsc_id = "C6290372" + # manufacturer = "Texas Instruments" + # mpn = "TPS62933ODRLR" + datasheet_url = "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2307211801_Texas-Instruments-TPS62933ODRLR_C6290372.pdf" + designator_prefix = "U" + + # pins + pin 1 ~ signal RT + pin 2 ~ signal EN + pin 3 ~ signal VIN + pin 4 ~ signal GND + pin 5 ~ signal FB + pin 6 ~ signal SS + pin 7 ~ signal BST + pin 8 ~ signal SW