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SW-B5M — NV12+A tile input: straight-alpha R8 plane, premultiplied exactly once in-kernel in linear light (deps: SW-C3 payload agreement) — ADR-0058
SW-B6M — Kernel test pins: CPU-oracle/GPU-SSIM parity + the dissolve law (linear-light only; perceptual curve applies to t, never pixels; PQ/HLG goldens) — ADR-C007
Parallel lane in multiview-compositor (+ core types); both kernels (CPU reference + wgpu) move together.
L— Scene pre-pass / on-GPU pass fusion (one NV12 readback per tick) + multi-box composition source — ADR-0056L— Wipe masks: per-tile SDF mask fn + softness/border (post-MVP wave 2) — ADR-0055L— Per-tile affine transform + sub-pixel placement + finally wiring FitMode/crop/rotation (DVE substrate, post-MVP wave 2) — ADR-0055M— Keyer math: luma + linear/fill+key (chroma/pattern post-MVP); key alpha at the verified inv-Bump @vitejs/plugin-react from 4.7.0 to 6.0.2 in /web #8 insertion points — ADR-0056/C007M— NV12+A tile input: straight-alpha R8 plane, premultiplied exactly once in-kernel in linear light (deps: SW-C3 payload agreement) — ADR-0058M— Kernel test pins: CPU-oracle/GPU-SSIM parity + the dissolve law (linear-light only; perceptual curve applies to t, never pixels; PQ/HLG goldens) — ADR-C007Design docs: production-switcher brief · media-playout brief · SW backlog · work-schedule SW stream — all delivered in PR #112. Implementation starts only after the design PR is reviewed/merged and the operator green-lights coding.
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