From b0174552da8bb44f94e879441fe7c67512e23d0e Mon Sep 17 00:00:00 2001 From: BernardXiong Date: Mon, 4 May 2026 22:44:00 +0800 Subject: [PATCH 1/4] [bsp][k230] Add SoC variant selection with per-SoC memory layout Introduce a Kconfig choice between SOC_K230 and SOC_K230D to support different chip variants. SOC_K230D targets the ATK-DNK230D board with 128MB DDR, while SOC_K230 serves as the default for other K230 boards. Key changes: - Replace single BOARD_C908 config with a choice menu for SoC variant - Move common selects (ARCH_RISCV64, RT_USING_CACHE, ARCH_MM_MMU, etc.) into each SoC config entry - Add ARCH_RISCV_XUANTIE select for Xuantie processor support - mem_layout.h: define per-SoC default memory sizes with #if defined() blocks, add #error guard when no SoC is selected - Fix typo: Kerenl -> Kernel in memory layout ASCII diagram Co-Authored-By: Claude Opus 4.7 --- bsp/k230/Kconfig | 26 +++++++++++++-- bsp/k230/board/mem_layout.h | 66 +++++++++++++++++++++++++++++++------ 2 files changed, 79 insertions(+), 13 deletions(-) diff --git a/bsp/k230/Kconfig b/bsp/k230/Kconfig index 3ddee1c468c..e6791a7b6b1 100644 --- a/bsp/k230/Kconfig +++ b/bsp/k230/Kconfig @@ -10,15 +10,35 @@ source "$RTT_DIR/Kconfig" source "$PKGS_DIR/Kconfig" rsource "board/Kconfig" -config BOARD_C908 - bool +choice + prompt "SoC variant" + default SOC_K230 + +config SOC_K230 + bool "K230" + select ARCH_RISCV64 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + select RT_USING_CACHE + select ARCH_MM_MMU + select ARCH_RISCV_FPU + select ARCH_RISCV_XUANTIE + select ARCH_REMAP_KERNEL if RT_USING_SMART + +config SOC_K230D + bool "K230D (128MB DDR)" select ARCH_RISCV64 select RT_USING_COMPONENTS_INIT select RT_USING_USER_MAIN select RT_USING_CACHE - select ARCH_MM_MMU + select ARCH_MM_MMU select ARCH_RISCV_FPU + select ARCH_RISCV_XUANTIE select ARCH_REMAP_KERNEL if RT_USING_SMART +endchoice + +config BOARD_C908 + bool default y config __STACKSIZE__ diff --git a/bsp/k230/board/mem_layout.h b/bsp/k230/board/mem_layout.h index cca1e0f7d99..19ba60ed0b0 100644 --- a/bsp/k230/board/mem_layout.h +++ b/bsp/k230/board/mem_layout.h @@ -26,7 +26,7 @@ * | ...... | maybe zero * +---------+ <- CONFIG_MEM_RTSMART_SIZE * | guard | MEM_GUARD_SIZE - * +---------+ <- End of Kerenl + * +---------+ <- End of Kernel * | | * | | * +---------+ @@ -47,30 +47,76 @@ * the SDK configuration. * * If CONFIG_XXX is defined, it means that the value comes from the SDK - * configuration, otherwise the default configuration of bsp/k230 in RT-Thead - * is used. The default configuration of bsp/k230 is for the 01Studio CanMV - * development board that supports 512MB of memory. + * configuration, otherwise the default configuration defined in this file + * is used. + */ + +#if defined(SOC_K230D) +/* + * ATK-DNK230D: 128MB DDR + * + * +---------+ <- 0x8000000 (128MB) + * | MMZ | CONFIG_MEM_MMZ_SIZE = 0x4600000 (70MB) + * +---------+ <- CONFIG_MEM_MMZ_BASE = 0x3A00000 (58MB) + * | heap | CONFIG_MEM_RTSMART_HEAP_SIZE = 0x800000 (8MB) + * +---------+ + * | kernel | CONFIG_MEM_RTSMART_SIZE - MEM_OPENSBI_SIZE - MEM_GUARD_SIZE - heap + * +---------+ <- CONFIG_MEM_RTSMART_BASE + MEM_OPENSBI_SIZE (128KB) + * | opensbi | MEM_OPENSBI_SIZE = 0x20000 (128KB) + * +---------+ <- 0x0 */ #ifndef CONFIG_MEM_TOTAL_SIZE -#define CONFIG_MEM_TOTAL_SIZE 0x20000000 // 512M +#define CONFIG_MEM_TOTAL_SIZE 0x8000000 // 128M #endif #ifndef CONFIG_MEM_RTSMART_SIZE -#define CONFIG_MEM_RTSMART_SIZE 0x10000000 // 256M +#define CONFIG_MEM_RTSMART_SIZE 0x3A00000 // 58M #endif #ifndef CONFIG_MEM_RTSMART_HEAP_SIZE -#define CONFIG_MEM_RTSMART_HEAP_SIZE 0x2000000 // 32M +#define CONFIG_MEM_RTSMART_HEAP_SIZE 0x800000 // 8M #endif #ifndef CONFIG_MEM_MMZ_BASE -#define CONFIG_MEM_MMZ_BASE 0x10000000 // 512M +#define CONFIG_MEM_MMZ_BASE 0x3A00000 // 58M #endif #ifndef CONFIG_MEM_MMZ_SIZE -#define CONFIG_MEM_MMZ_SIZE 0x10000000 // 256M +#define CONFIG_MEM_MMZ_SIZE 0x4600000 // 70M +#endif + +#elif defined(SOC_K230) +/* + * K230: default memory configuration + * + * The K230 chip supports different DDR sizes (256MB, 512MB, 1GB, 2GB). + * Override the CONFIG_MEM_XXX values in rtconfig.h or SDK configuration + * to match your board's actual DDR size. + */ +#ifndef CONFIG_MEM_TOTAL_SIZE +#define CONFIG_MEM_TOTAL_SIZE 0x8000000 // 128M +#endif + +#ifndef CONFIG_MEM_RTSMART_SIZE +#define CONFIG_MEM_RTSMART_SIZE 0x3A00000 // 58M +#endif + +#ifndef CONFIG_MEM_RTSMART_HEAP_SIZE +#define CONFIG_MEM_RTSMART_HEAP_SIZE 0x800000 // 8M +#endif + +#ifndef CONFIG_MEM_MMZ_BASE +#define CONFIG_MEM_MMZ_BASE 0x3A00000 // 58M +#endif + +#ifndef CONFIG_MEM_MMZ_SIZE +#define CONFIG_MEM_MMZ_SIZE 0x4600000 // 70M +#endif + +#else +#error "Either SOC_K230 or SOC_K230D must be defined" #endif #define MEM_KERNEL_SIZE (CONFIG_MEM_RTSMART_SIZE - MEM_OPENSBI_SIZE - MEM_GUARD_SIZE) -#endif // MEMORY_LAYOUT_H__ \ No newline at end of file +#endif // MEMORY_LAYOUT_H__ From d2496a4514cca6f93b22343eee48a8b77f7f96b3 Mon Sep 17 00:00:00 2001 From: BernardXiong Date: Mon, 4 May 2026 22:44:10 +0800 Subject: [PATCH 2/4] [bsp][k230] Clean up board definitions and add debug logging board.h: Remove unused peripheral base address defines for blocks that are not currently supported (SRAM, GSDMA, DECOMP, ISP, VPU, GPU, VO, DSI, Audio, USB2, SDHC, BootROM, Security, DDRC, XIP Flash, etc.). This reduces clutter and keeps only actively used hardware definitions. board.c: Add DBG_TAG/DBG_LVL configuration to enable debug logging via the ulog framework. Replace Chinese comments with English descriptions for better upstream readability. Add LOG_I/LOG_D trace points in primary_cpu_entry() and rt_hw_board_init() to aid bring-up debugging. Co-Authored-By: Claude Opus 4.7 --- bsp/k230/board/board.c | 33 ++++++++++++------- bsp/k230/board/board.h | 74 ------------------------------------------ 2 files changed, 21 insertions(+), 86 deletions(-) diff --git a/bsp/k230/board/board.c b/bsp/k230/board/board.c index 8e4eb675d58..26259a305e0 100644 --- a/bsp/k230/board/board.c +++ b/bsp/k230/board/board.c @@ -12,6 +12,10 @@ #include #include +#define DBG_TAG "board" +#define DBG_LVL DBG_INFO +#include + #include "board.h" #include "tick.h" @@ -39,7 +43,6 @@ extern unsigned int __bss_end; #define RT_HW_PAGE_END ((void *)(RAM_END)) #ifdef RT_USING_SMART - rt_region_t init_page_region = {(rt_size_t)RT_HW_PAGE_START, (rt_size_t)RT_HW_PAGE_END}; extern size_t MMUTable[]; @@ -47,9 +50,7 @@ extern size_t MMUTable[]; struct mem_desc platform_mem_desc[] = { {KERNEL_VADDR_START, (rt_size_t)(KERNEL_VADDR_START + CONFIG_MEM_MMZ_BASE + CONFIG_MEM_MMZ_SIZE - 1), (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM}, }; - #define NUM_MEM_DESC (sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0])) - #endif /* RT_USING_SMART */ #ifndef ARCH_REMAP_KERNEL @@ -76,34 +77,42 @@ static void __rt_assert_handler(const char *ex_string, const char *func, rt_size asm volatile("ebreak":::"memory"); } -//BSP的C入口 +/* C entry point, this gets called on primary CPU after stack setup. */ void primary_cpu_entry(void) { - //关中断 + LOG_I("primary_cpu_entry"); + rt_hw_interrupt_disable(); + +#ifdef RT_DEBUGING_ASSERT rt_assert_set_hook(__rt_assert_handler); - //启动RT-Thread Smart内核 +#endif + entry(); } #define IOREMAP_SIZE (1ul << 30) -//这个初始化程序由内核主动调用，此时调度器还未启动，因此在此不能使用依赖线程上下文的函数 +/* + * This function is called by the kernel during initialization. At this point, + * the scheduler has not started, so functions that depend on thread context + * cannot be used. + */ void rt_hw_board_init(void) { + LOG_D("board init: heap %p-%p, page %p-%p", + RT_HW_HEAP_BEGIN, RT_HW_HEAP_END, + RT_HW_PAGE_START, RT_HW_PAGE_END); + #ifdef RT_USING_SMART - /* init data structure */ rt_hw_mmu_map_init(&rt_kernel_space, (void *)(IOREMAP_VEND - IOREMAP_SIZE), IOREMAP_SIZE, (rt_size_t *)MMUTable, PV_OFFSET); - - /* init page allocator */ rt_page_init(init_page_region); - /* setup region, and enable MMU */ + LOG_D("mmu setup: %d regions", NUM_MEM_DESC); rt_hw_mmu_setup(&rt_kernel_space, platform_mem_desc, NUM_MEM_DESC); #endif #ifdef RT_USING_HEAP - /* initialize memory system */ rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END); #endif /* initalize interrupt */ diff --git a/bsp/k230/board/board.h b/bsp/k230/board/board.h index 5b06bda30fb..c0d3a3d365d 100644 --- a/bsp/k230/board/board.h +++ b/bsp/k230/board/board.h @@ -20,9 +20,6 @@ * * See K230 Technical Reference Manual, chapter 1.5 Address Space mapping */ -#define SRAM_BASE_ADDR (0x80200000UL) -#define SRAM_IO_SIZE (0x00200000UL) - #define KPU_BASE_ADDR (0x80400000UL) #define KPU_IO_SIZE (0x00000800UL) @@ -32,43 +29,9 @@ #define AI2D_BASE_ADDR (0x80400C00UL) #define AI2D_IO_SIZE (0x00000400UL) -#define GSDMA_BASE_ADDR (0x80800000UL) -#define GSDMA_IO_SIZE (0x00004000UL) - #define DMA_BASE_ADDR (0x80804000UL) #define DMA_IO_SIZE (0x00004000UL) -#define DECOMP_BASE_ADDR (0x80808000UL) -#define DECOMP_IO_SIZE (0x00004000UL) - -#define NON_AI2D_BASE_ADDR (0x8080C000UL) -#define NON_AI2D_IO_SIZE (0x00004000UL) - -#define ISP_BASE_ADDR (0x90000000UL) -#define ISP_IO_SIZE (0x00008000UL) - -#define DEWARP_BASE_ADDR (0x90008000UL) -#define DEWARP_IO_SIZE (0x00001000UL) - -#define CSI_BASE_ADDR (0x90009000UL) -#define CSI_IO_SIZE (0x00002000UL) - -#define VPU_BASE_ADDR (0x90400000UL) -#define VPU_IO_SIZE (0x00010000UL) - -/*2.5D*/ -#define TAAH_GPU_BASE_ADDR (0x90800000UL) -#define TAAH_GPU_IO_SIZE (0x00040000UL) - -#define VO_BASE_ADDR (0x90840000UL) -#define VO_IO_SIZE (0x00010000UL) - -#define DSI_BASE_ADDR (0x90850000UL) -#define DSI_IO_SIZE (0x00001000UL) - -#define GPU_ENGINE_BASE_ADDR (0x90A00000UL) -#define GPU_ENGINE_IO_SIZE (0x00000800UL) - #define PMU_BASE_ADDR (0x91000000UL) #define PMU_IO_SIZE (0x00000C00UL) @@ -105,18 +68,6 @@ #define TS_BASE_ADDR (0x91107000UL) #define TS_IO_SIZE (0x00000800UL) -#define HDI_BASE_ADDR (0x91107800UL) -#define HDI_IO_SIZE (0x00000800UL) - -#define STC_BASE_ADDR (0x91108000UL) -#define STC_IO_SIZE (0x00001000UL) - -#define BOOTROM_BASE_ADDR (0x91200000UL) -#define BOOTROM_IO_SIZE (0x00010000UL) - -#define SECURITY_BASE_ADDR (0x91210000UL) -#define SECURITY_IO_SIZE (0x00008000UL) - #define UART0_BASE_ADDR (0x91400000UL) #define UART0_IO_SIZE (0x00001000UL) @@ -159,35 +110,10 @@ #define ADC_BASE_ADDR (0x9140D000UL) #define ADC_IO_SIZE (0x00001000UL) -#define CODEC_BASE_ADDR (0x9140E000UL) -#define CODEC_IO_SIZE (0x00001000UL) - -#define AUDIO_BASE_ADDR (0x9140F000UL) -#define AUDIO_IO_SIZE (0x00001000UL) - -#define USB2_BASE_ADDR (0x91500000UL) -#define USB2_IO_SIZE (0x00080000UL) - -#define SD_HC_BASE_ADDR (0x91580000UL) -#define SD_HC_IO_SIZE (0x00002000UL) - #define SPI_QOPI_BASE_ADDR (0x91582000UL) #define SPI_QOPI_IO_SIZE (0x00002000UL) #define SPI_OPI_BASE_ADDR (0x91584000UL) #define SPI_OPI_IO_SIZE (0x00001000UL) -#define HI_SYS_CONFIG_BASE_ADDR (0x91585000UL) -#define HI_SYS_CONFIG_IO_SIZE (0x00000400UL) - -#define DDRC_CONF_BASE_ADDR (0x98000000UL) -#define DDRC_CONF_IO_SIZE (0x02000000UL) - -#define SPI_XIP_FLASH_BASE_ADDR (0xC0000000UL) -#define SPI_XIP_FLASH_IO_SIZE (0x08000000UL) - -#define IO_SPACE_BASE_ADDR (KPU_BASE_ADDR) - -#define TIMER_CLK_FREQ (27000000) - #endif // BOARD_H__ From 8b1d4c61819bdae3f21078795240a95769abd158 Mon Sep 17 00:00:00 2001 From: BernardXiong Date: Mon, 4 May 2026 22:44:18 +0800 Subject: [PATCH 3/4] [bsp][k230] Downgrade RTC driver register log from INFO to DEBUG Change LOG_I to LOG_D for the "rtc driver register OK" message to reduce console noise during normal boot. Also remove the unnecessary trailing newline character from the log message. Co-Authored-By: Claude Opus 4.7 --- bsp/k230/drivers/interdrv/rtc/drv_rtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/k230/drivers/interdrv/rtc/drv_rtc.c b/bsp/k230/drivers/interdrv/rtc/drv_rtc.c index b4820dc79a1..17a941b4229 100644 --- a/bsp/k230/drivers/interdrv/rtc/drv_rtc.c +++ b/bsp/k230/drivers/interdrv/rtc/drv_rtc.c @@ -477,7 +477,7 @@ static int rt_hw_rtc_init(void) ret = rt_device_register(&rtc_dev.device, "rtc", RT_DEVICE_FLAG_RDWR); RT_ASSERT(ret == RT_EOK); - LOG_I("rtc driver register OK\n"); + LOG_D("rtc driver register OK"); rtc_alarm_stop(&rtc_dev); rtc_tick_stop(&rtc_dev); From 5dc289ba6ad9fc69fe52d63af4791546c8e7676d Mon Sep 17 00:00:00 2001 From: BernardXiong Date: Mon, 4 May 2026 22:44:33 +0800 Subject: [PATCH 4/4] [libcpu][riscv] Add Xuantie processor support and MMU enhancements Kconfig: Introduce ARCH_RISCV_XUANTIE option for Xuantie-based SoCs and CONFIG_XUANTIE_SVPBMT under RT_USING_SMART to enable Svpbmt extension support used by the Xuantie C908 core. mmu.c: Several improvements for MMU management: - Add dcache flush after populating early page table entries to ensure they are visible to the MMU hardware before enabling address translation - Handle the case where v2p translation fails during aspace switch for low physical addresses below KERNEL_VADDR_START, falling back to direct physical address (needed during early K230 bring-up) - When ARCH_REMAP_KERNEL is enabled, set up an identity map guard for low physical memory during aspace switch to validate boot context liveness during the transition away from the early page table - Fix pointer arithmetic in _init_region() with explicit rt_ubase_t casts to avoid potential type promotion issues Co-Authored-By: Claude Opus 4.7 --- libcpu/Kconfig | 12 ++++++++++++ libcpu/risc-v/common64/mmu.c | 31 +++++++++++++++++++++++++++++-- 2 files changed, 41 insertions(+), 2 deletions(-) diff --git a/libcpu/Kconfig b/libcpu/Kconfig index 1185c495214..d1046f1ac19 100644 --- a/libcpu/Kconfig +++ b/libcpu/Kconfig @@ -288,6 +288,10 @@ config ARCH_RISCV64 select ARCH_CPU_64BIT bool +config ARCH_RISCV_XUANTIE + select ARCH_RISCV + bool + if ARCH_RISCV64 config ARCH_USING_NEW_CTX_SWITCH bool @@ -300,6 +304,14 @@ if ARCH_RISCV64 select ARCH_USING_NEW_CTX_SWITCH help Using the common64 implementation under ./libcpu/risc-v + +if RT_USING_SMART + config CONFIG_XUANTIE_SVPBMT + int + depends on ARCH_RISCV_XUANTIE + default 1 +endif + endif config ARCH_REMAP_KERNEL diff --git a/libcpu/risc-v/common64/mmu.c b/libcpu/risc-v/common64/mmu.c index d88982d5136..fc1a348efb9 100644 --- a/libcpu/risc-v/common64/mmu.c +++ b/libcpu/risc-v/common64/mmu.c @@ -11,6 +11,7 @@ */ #include +#include #include #include @@ -84,12 +85,35 @@ void rt_hw_aspace_switch(rt_aspace_t aspace) uint32_t hartid = rt_cpu_get_id(); uintptr_t ptr = (uintptr_t)aspace->page_table + (uintptr_t)(hartid * ARCH_PAGE_SIZE); uintptr_t page_table = (uintptr_t)rt_kmem_v2p((void *)ptr); + + if (page_table == (uintptr_t)ARCH_MAP_FAILED) + { + /* + * During early K230 bring-up the kernel still runs with low physical + * pointers after relocation, including MMUTable. The formal kernel + * aspace does not translate that low pointer yet, but SATP needs the + * physical page-table address, so use the low address directly. + */ + if (ptr < KERNEL_VADDR_START) + { + page_table = ptr; + } + } #ifndef RT_USING_SMP current_mmu_table = aspace->page_table; #else current_mmu_table[rt_hw_cpu_id()] = (void *)ptr; #endif +#ifdef ARCH_REMAP_KERNEL + /* + * Bring-up guard: keep low physical memory identity-mapped while switching + * away from the early page table. This validates whether any low-address + * boot context is still live during the transition. + */ + ((rt_ubase_t *)ptr)[0] = COMBINEPTE(0, MMU_MAP_EARLY); + rt_hw_cpu_dcache_clean((void *)ptr, sizeof(rt_ubase_t)); +#endif write_csr(satp, (((size_t)SATP_MODE) << SATP_MODE_OFFSET) | ((rt_ubase_t)page_table >> PAGE_OFFSET_BIT)); rt_hw_tlb_invalidate_all_local(); @@ -561,14 +585,14 @@ static inline void _init_region(void *vaddr, size_t size) { rt_ioremap_start = vaddr; rt_ioremap_size = size; - rt_mpr_start = rt_ioremap_start - rt_mpr_size; + rt_mpr_start = (void *)((rt_ubase_t)rt_ioremap_start - rt_mpr_size); LOG_D("rt_ioremap_start: %p, rt_mpr_start: %p", rt_ioremap_start, rt_mpr_start); } #else static inline void _init_region(void *vaddr, size_t size) { - rt_mpr_start = vaddr - rt_mpr_size; + rt_mpr_start = (void *)((rt_ubase_t)vaddr - rt_mpr_size); } #endif @@ -955,6 +979,9 @@ void rt_hw_mem_setup_early(void *pgtbl, rt_uint64_t hartid) vs += L2_PAGE_SIZE; } #endif + /* flush page table entries from data cache before enabling MMU */ + rt_hw_cpu_dcache_clean(early_pgtbl, ARCH_PAGE_SIZE); + /* apply new mapping */ asm volatile("sfence.vma x0, x0"); write_csr(satp, SATP_BASE | ((size_t)early_pgtbl >> PAGE_OFFSET_BIT));