Where is the explicit cache prefetch userspace API described in Section 4.5 implemented?

[ohdh95]

Hi, thank you for open-sourcing Cylon.

I am trying to reproduce/extend the Cylon CXL-SSD artifact, and I am looking for the implementation of the explicit cache prefetch interface described in Section 4.5 of the paper.

From the paper, I understood that Cylon provides an application-level/userspace interface for operations such as explicit cache prefetch, pin, evict, dynamic policy selection, and statistics collection.

In the current repository, I found the following control paths:

• hw/femu/cxlssd/cxlssd.c

  • cxl read-labels mem0 -s 1: print/reset cache stats
  • -s 2: flush buffer
  • -s 3: set associativity
  • -s 5: set Next-N prefetch degree
  • -s 7: set prefetch stride

• hw/femu/bbssd/ftl.h

  • command enum includes BUF_PRINT_STAT, BUF_CLEAR, SSD_INIT, and INC_PREFETCH_DEGREE

I also found the Next-N prefetch implementation in the device-side buffer path, but I could not find a userspace API or command for explicitly prefetching a specific address/range into the Cylon DRAM cache, nor APIs for pin/evict.

Could you clarify where the explicit cache prefetch interface from Section 4.5 is implemented?

Thanks!