perf: Stage 6 sumcheck micro-optimizations#85
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Eliminate per-access tagged union dispatch in the innermost loops of RamRaVirtualProver and LookupsRaVirtualProver by switching once on the first ra_poly's active tag and generating specialized loop bodies via inline else. Also add a has_nulls flag to RaPolynomial compressed rounds so getBoundCoeff can skip optional index checks when all indices are non-null (common for instruction lookups). Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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Summary
RamRaVirtualProverandLookupsRaVirtualProvermapFn bodies now dispatch on the first ra_poly's active tag once viainline else, generating specialized loop bodies per variant. Inner loops use@field(..., @tagName(tag)).getBoundCoeff()instead of the tagged union's switch-based dispatch, eliminating per-access tag checks in release mode.has_nullsbranchless fast path:RaPolynomialcompressed rounds (Round1/2/3) now track ahas_nulls: boolflag, computed duringinitRound1and propagated through bind transitions. When false (common for instruction lookups),getBoundCoeffskips optional index checks entirely.Context: flamegraph analysis of sha256_2048 showed Stage 6 at 7.2% of total prover time. These are diminishing-returns micro-optimizations — the implementation already closely matches Jolt's approach.
Benchmark (sha256_2048, 10 runs, ReleaseFast, Apple Silicon)
Improvement is larger than the conservative 0.5–1% estimate — the
inline elsedispatch likely enables LLVM to further optimize the inner loops (inlining, register allocation) once the variant is statically known. Reduced stdev (188→105) suggests fewer branch mispredictions.Test plan
zig build test— all 539 tests passzig build -Doptimize=ReleaseFast— clean build🤖 Generated with Claude Code